Matt Arsenault | 6bc43d8 | 2016-10-06 16:20:41 +0000 | [diff] [blame] | 1 | ; RUN: not llc -march=amdgcn -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s |
| 2 | |
| 3 | ; FIXME: This should be able to compile, but requires inserting an |
| 4 | ; extra block to restore the scavenged register. |
| 5 | |
| 6 | ; FAIL: LLVM ERROR: Error while trying to spill VCC from class SReg_64: Cannot scavenge register without an emergency spill slot! |
| 7 | |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 8 | define amdgpu_kernel void @spill(i32 addrspace(1)* %arg, i32 %cnd) #0 { |
Matt Arsenault | 6bc43d8 | 2016-10-06 16:20:41 +0000 | [diff] [blame] | 9 | entry: |
Matt Arsenault | 3c7581b | 2017-06-08 19:03:20 +0000 | [diff] [blame] | 10 | %sgpr0 = tail call i32 asm sideeffect "s_mov_b32 s0, 0", "={s0}"() #0 |
| 11 | %sgpr1 = tail call i32 asm sideeffect "s_mov_b32 s1, 0", "={s1}"() #0 |
| 12 | %sgpr2 = tail call i32 asm sideeffect "s_mov_b32 s2, 0", "={s2}"() #0 |
| 13 | %sgpr3 = tail call i32 asm sideeffect "s_mov_b32 s3, 0", "={s3}"() #0 |
| 14 | %sgpr4 = tail call i32 asm sideeffect "s_mov_b32 s4, 0", "={s4}"() #0 |
| 15 | %sgpr5 = tail call i32 asm sideeffect "s_mov_b32 s5, 0", "={s5}"() #0 |
| 16 | %sgpr6 = tail call i32 asm sideeffect "s_mov_b32 s6, 0", "={s6}"() #0 |
| 17 | %sgpr7 = tail call i32 asm sideeffect "s_mov_b32 s7, 0", "={s7}"() #0 |
| 18 | %sgpr8 = tail call i32 asm sideeffect "s_mov_b32 s8, 0", "={s8}"() #0 |
| 19 | %sgpr9 = tail call i32 asm sideeffect "s_mov_b32 s9, 0", "={s9}"() #0 |
| 20 | %sgpr10 = tail call i32 asm sideeffect "s_mov_b32 s10, 0", "={s10}"() #0 |
| 21 | %sgpr11 = tail call i32 asm sideeffect "s_mov_b32 s11, 0", "={s11}"() #0 |
| 22 | %sgpr12 = tail call i32 asm sideeffect "s_mov_b32 s12, 0", "={s12}"() #0 |
| 23 | %sgpr13 = tail call i32 asm sideeffect "s_mov_b32 s13, 0", "={s13}"() #0 |
| 24 | %sgpr14 = tail call i32 asm sideeffect "s_mov_b32 s14, 0", "={s14}"() #0 |
| 25 | %sgpr15 = tail call i32 asm sideeffect "s_mov_b32 s15, 0", "={s15}"() #0 |
| 26 | %sgpr16 = tail call i32 asm sideeffect "s_mov_b32 s16, 0", "={s16}"() #0 |
| 27 | %sgpr17 = tail call i32 asm sideeffect "s_mov_b32 s17, 0", "={s17}"() #0 |
| 28 | %sgpr18 = tail call i32 asm sideeffect "s_mov_b32 s18, 0", "={s18}"() #0 |
| 29 | %sgpr19 = tail call i32 asm sideeffect "s_mov_b32 s19, 0", "={s19}"() #0 |
| 30 | %sgpr20 = tail call i32 asm sideeffect "s_mov_b32 s20, 0", "={s20}"() #0 |
| 31 | %sgpr21 = tail call i32 asm sideeffect "s_mov_b32 s21, 0", "={s21}"() #0 |
| 32 | %sgpr22 = tail call i32 asm sideeffect "s_mov_b32 s22, 0", "={s22}"() #0 |
| 33 | %sgpr23 = tail call i32 asm sideeffect "s_mov_b32 s23, 0", "={s23}"() #0 |
| 34 | %sgpr24 = tail call i32 asm sideeffect "s_mov_b32 s24, 0", "={s24}"() #0 |
| 35 | %sgpr25 = tail call i32 asm sideeffect "s_mov_b32 s25, 0", "={s25}"() #0 |
| 36 | %sgpr26 = tail call i32 asm sideeffect "s_mov_b32 s26, 0", "={s26}"() #0 |
| 37 | %sgpr27 = tail call i32 asm sideeffect "s_mov_b32 s27, 0", "={s27}"() #0 |
| 38 | %sgpr28 = tail call i32 asm sideeffect "s_mov_b32 s28, 0", "={s28}"() #0 |
| 39 | %sgpr29 = tail call i32 asm sideeffect "s_mov_b32 s29, 0", "={s29}"() #0 |
| 40 | %sgpr30 = tail call i32 asm sideeffect "s_mov_b32 s30, 0", "={s30}"() #0 |
| 41 | %sgpr31 = tail call i32 asm sideeffect "s_mov_b32 s31, 0", "={s31}"() #0 |
| 42 | %sgpr32 = tail call i32 asm sideeffect "s_mov_b32 s32, 0", "={s32}"() #0 |
| 43 | %sgpr33 = tail call i32 asm sideeffect "s_mov_b32 s33, 0", "={s33}"() #0 |
| 44 | %sgpr34 = tail call i32 asm sideeffect "s_mov_b32 s34, 0", "={s34}"() #0 |
| 45 | %sgpr35 = tail call i32 asm sideeffect "s_mov_b32 s35, 0", "={s35}"() #0 |
| 46 | %sgpr36 = tail call i32 asm sideeffect "s_mov_b32 s36, 0", "={s36}"() #0 |
| 47 | %sgpr37 = tail call i32 asm sideeffect "s_mov_b32 s37, 0", "={s37}"() #0 |
| 48 | %sgpr38 = tail call i32 asm sideeffect "s_mov_b32 s38, 0", "={s38}"() #0 |
| 49 | %sgpr39 = tail call i32 asm sideeffect "s_mov_b32 s39, 0", "={s39}"() #0 |
| 50 | %sgpr40 = tail call i32 asm sideeffect "s_mov_b32 s40, 0", "={s40}"() #0 |
| 51 | %sgpr41 = tail call i32 asm sideeffect "s_mov_b32 s41, 0", "={s41}"() #0 |
| 52 | %sgpr42 = tail call i32 asm sideeffect "s_mov_b32 s42, 0", "={s42}"() #0 |
| 53 | %sgpr43 = tail call i32 asm sideeffect "s_mov_b32 s43, 0", "={s43}"() #0 |
| 54 | %sgpr44 = tail call i32 asm sideeffect "s_mov_b32 s44, 0", "={s44}"() #0 |
| 55 | %sgpr45 = tail call i32 asm sideeffect "s_mov_b32 s45, 0", "={s45}"() #0 |
| 56 | %sgpr46 = tail call i32 asm sideeffect "s_mov_b32 s46, 0", "={s46}"() #0 |
| 57 | %sgpr47 = tail call i32 asm sideeffect "s_mov_b32 s47, 0", "={s47}"() #0 |
| 58 | %sgpr48 = tail call i32 asm sideeffect "s_mov_b32 s48, 0", "={s48}"() #0 |
| 59 | %sgpr49 = tail call i32 asm sideeffect "s_mov_b32 s49, 0", "={s49}"() #0 |
| 60 | %sgpr50 = tail call i32 asm sideeffect "s_mov_b32 s50, 0", "={s50}"() #0 |
| 61 | %sgpr51 = tail call i32 asm sideeffect "s_mov_b32 s51, 0", "={s51}"() #0 |
| 62 | %sgpr52 = tail call i32 asm sideeffect "s_mov_b32 s52, 0", "={s52}"() #0 |
| 63 | %sgpr53 = tail call i32 asm sideeffect "s_mov_b32 s53, 0", "={s53}"() #0 |
| 64 | %sgpr54 = tail call i32 asm sideeffect "s_mov_b32 s54, 0", "={s54}"() #0 |
| 65 | %sgpr55 = tail call i32 asm sideeffect "s_mov_b32 s55, 0", "={s55}"() #0 |
| 66 | %sgpr56 = tail call i32 asm sideeffect "s_mov_b32 s56, 0", "={s56}"() #0 |
| 67 | %sgpr57 = tail call i32 asm sideeffect "s_mov_b32 s57, 0", "={s57}"() #0 |
| 68 | %sgpr58 = tail call i32 asm sideeffect "s_mov_b32 s58, 0", "={s58}"() #0 |
| 69 | %sgpr59 = tail call i32 asm sideeffect "s_mov_b32 s59, 0", "={s59}"() #0 |
| 70 | %sgpr60 = tail call i32 asm sideeffect "s_mov_b32 s60, 0", "={s60}"() #0 |
| 71 | %sgpr61 = tail call i32 asm sideeffect "s_mov_b32 s61, 0", "={s61}"() #0 |
| 72 | %sgpr62 = tail call i32 asm sideeffect "s_mov_b32 s62, 0", "={s62}"() #0 |
| 73 | %sgpr63 = tail call i32 asm sideeffect "s_mov_b32 s63, 0", "={s63}"() #0 |
| 74 | %sgpr64 = tail call i32 asm sideeffect "s_mov_b32 s64, 0", "={s64}"() #0 |
| 75 | %sgpr65 = tail call i32 asm sideeffect "s_mov_b32 s65, 0", "={s65}"() #0 |
| 76 | %sgpr66 = tail call i32 asm sideeffect "s_mov_b32 s66, 0", "={s66}"() #0 |
| 77 | %sgpr67 = tail call i32 asm sideeffect "s_mov_b32 s67, 0", "={s67}"() #0 |
| 78 | %sgpr68 = tail call i32 asm sideeffect "s_mov_b32 s68, 0", "={s68}"() #0 |
| 79 | %sgpr69 = tail call i32 asm sideeffect "s_mov_b32 s69, 0", "={s69}"() #0 |
| 80 | %sgpr70 = tail call i32 asm sideeffect "s_mov_b32 s70, 0", "={s70}"() #0 |
| 81 | %sgpr71 = tail call i32 asm sideeffect "s_mov_b32 s71, 0", "={s71}"() #0 |
| 82 | %sgpr72 = tail call i32 asm sideeffect "s_mov_b32 s72, 0", "={s72}"() #0 |
| 83 | %sgpr73 = tail call i32 asm sideeffect "s_mov_b32 s73, 0", "={s73}"() #0 |
| 84 | %sgpr74 = tail call i32 asm sideeffect "s_mov_b32 s74, 0", "={s74}"() #0 |
| 85 | %sgpr75 = tail call i32 asm sideeffect "s_mov_b32 s75, 0", "={s75}"() #0 |
| 86 | %sgpr76 = tail call i32 asm sideeffect "s_mov_b32 s76, 0", "={s76}"() #0 |
| 87 | %sgpr77 = tail call i32 asm sideeffect "s_mov_b32 s77, 0", "={s77}"() #0 |
| 88 | %sgpr78 = tail call i32 asm sideeffect "s_mov_b32 s78, 0", "={s78}"() #0 |
| 89 | %sgpr79 = tail call i32 asm sideeffect "s_mov_b32 s79, 0", "={s79}"() #0 |
| 90 | %sgpr80 = tail call i32 asm sideeffect "s_mov_b32 s80, 0", "={s80}"() #0 |
| 91 | %sgpr81 = tail call i32 asm sideeffect "s_mov_b32 s81, 0", "={s81}"() #0 |
| 92 | %sgpr82 = tail call i32 asm sideeffect "s_mov_b32 s82, 0", "={s82}"() #0 |
| 93 | %sgpr83 = tail call i32 asm sideeffect "s_mov_b32 s83, 0", "={s83}"() #0 |
| 94 | %sgpr84 = tail call i32 asm sideeffect "s_mov_b32 s84, 0", "={s84}"() #0 |
| 95 | %sgpr85 = tail call i32 asm sideeffect "s_mov_b32 s85, 0", "={s85}"() #0 |
| 96 | %sgpr86 = tail call i32 asm sideeffect "s_mov_b32 s86, 0", "={s86}"() #0 |
| 97 | %sgpr87 = tail call i32 asm sideeffect "s_mov_b32 s87, 0", "={s87}"() #0 |
| 98 | %sgpr88 = tail call i32 asm sideeffect "s_mov_b32 s88, 0", "={s88}"() #0 |
| 99 | %sgpr89 = tail call i32 asm sideeffect "s_mov_b32 s89, 0", "={s89}"() #0 |
| 100 | %sgpr90 = tail call i32 asm sideeffect "s_mov_b32 s90, 0", "={s90}"() #0 |
| 101 | %sgpr91 = tail call i32 asm sideeffect "s_mov_b32 s91, 0", "={s91}"() #0 |
| 102 | %sgpr92 = tail call i32 asm sideeffect "s_mov_b32 s92, 0", "={s92}"() #0 |
| 103 | %sgpr93 = tail call i32 asm sideeffect "s_mov_b32 s93, 0", "={s93}"() #0 |
| 104 | %sgpr94 = tail call i32 asm sideeffect "s_mov_b32 s94, 0", "={s94}"() #0 |
| 105 | %sgpr95 = tail call i32 asm sideeffect "s_mov_b32 s95, 0", "={s95}"() #0 |
| 106 | %sgpr96 = tail call i32 asm sideeffect "s_mov_b32 s96, 0", "={s96}"() #0 |
| 107 | %sgpr97 = tail call i32 asm sideeffect "s_mov_b32 s97, 0", "={s97}"() #0 |
| 108 | %sgpr98 = tail call i32 asm sideeffect "s_mov_b32 s98, 0", "={s98}"() #0 |
| 109 | %sgpr99 = tail call i32 asm sideeffect "s_mov_b32 s99, 0", "={s99}"() #0 |
| 110 | %sgpr100 = tail call i32 asm sideeffect "s_mov_b32 s100, 0", "={s100}"() #0 |
| 111 | %sgpr101 = tail call i32 asm sideeffect "s_mov_b32 s101, 0", "={s101}"() #0 |
| 112 | %sgpr102 = tail call i32 asm sideeffect "s_mov_b32 s102, 0", "={s102}"() #0 |
| 113 | %sgpr103 = tail call i32 asm sideeffect "s_mov_b32 s103, 0", "={s103}"() #0 |
Matt Arsenault | 6bc43d8 | 2016-10-06 16:20:41 +0000 | [diff] [blame] | 114 | %vcc_lo = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={VCC_LO}"() #0 |
| 115 | %vcc_hi = tail call i32 asm sideeffect "s_mov_b32 $0, 0", "={VCC_HI}"() #0 |
| 116 | %cmp = icmp eq i32 %cnd, 0 |
| 117 | br i1 %cmp, label %bb3, label %bb2 ; +8 dword branch |
| 118 | |
| 119 | bb2: ; 28 bytes |
| 120 | ; 24 byte asm |
| 121 | call void asm sideeffect |
| 122 | "v_nop_e64 |
| 123 | v_nop_e64 |
| 124 | v_nop_e64 |
| 125 | v_nop_e64",""() #0 |
| 126 | br label %bb3 |
| 127 | |
| 128 | bb3: |
Matt Arsenault | 3c7581b | 2017-06-08 19:03:20 +0000 | [diff] [blame] | 129 | tail call void asm sideeffect "; reg use $0", "{s0}"(i32 %sgpr0) #0 |
| 130 | tail call void asm sideeffect "; reg use $0", "{s1}"(i32 %sgpr1) #0 |
| 131 | tail call void asm sideeffect "; reg use $0", "{s2}"(i32 %sgpr2) #0 |
| 132 | tail call void asm sideeffect "; reg use $0", "{s3}"(i32 %sgpr3) #0 |
| 133 | tail call void asm sideeffect "; reg use $0", "{s4}"(i32 %sgpr4) #0 |
| 134 | tail call void asm sideeffect "; reg use $0", "{s5}"(i32 %sgpr5) #0 |
| 135 | tail call void asm sideeffect "; reg use $0", "{s6}"(i32 %sgpr6) #0 |
| 136 | tail call void asm sideeffect "; reg use $0", "{s7}"(i32 %sgpr7) #0 |
| 137 | tail call void asm sideeffect "; reg use $0", "{s8}"(i32 %sgpr8) #0 |
| 138 | tail call void asm sideeffect "; reg use $0", "{s9}"(i32 %sgpr9) #0 |
| 139 | tail call void asm sideeffect "; reg use $0", "{s10}"(i32 %sgpr10) #0 |
| 140 | tail call void asm sideeffect "; reg use $0", "{s11}"(i32 %sgpr11) #0 |
| 141 | tail call void asm sideeffect "; reg use $0", "{s12}"(i32 %sgpr12) #0 |
| 142 | tail call void asm sideeffect "; reg use $0", "{s13}"(i32 %sgpr13) #0 |
| 143 | tail call void asm sideeffect "; reg use $0", "{s14}"(i32 %sgpr14) #0 |
| 144 | tail call void asm sideeffect "; reg use $0", "{s15}"(i32 %sgpr15) #0 |
| 145 | tail call void asm sideeffect "; reg use $0", "{s16}"(i32 %sgpr16) #0 |
| 146 | tail call void asm sideeffect "; reg use $0", "{s17}"(i32 %sgpr17) #0 |
| 147 | tail call void asm sideeffect "; reg use $0", "{s18}"(i32 %sgpr18) #0 |
| 148 | tail call void asm sideeffect "; reg use $0", "{s19}"(i32 %sgpr19) #0 |
| 149 | tail call void asm sideeffect "; reg use $0", "{s20}"(i32 %sgpr20) #0 |
| 150 | tail call void asm sideeffect "; reg use $0", "{s21}"(i32 %sgpr21) #0 |
| 151 | tail call void asm sideeffect "; reg use $0", "{s22}"(i32 %sgpr22) #0 |
| 152 | tail call void asm sideeffect "; reg use $0", "{s23}"(i32 %sgpr23) #0 |
| 153 | tail call void asm sideeffect "; reg use $0", "{s24}"(i32 %sgpr24) #0 |
| 154 | tail call void asm sideeffect "; reg use $0", "{s25}"(i32 %sgpr25) #0 |
| 155 | tail call void asm sideeffect "; reg use $0", "{s26}"(i32 %sgpr26) #0 |
| 156 | tail call void asm sideeffect "; reg use $0", "{s27}"(i32 %sgpr27) #0 |
| 157 | tail call void asm sideeffect "; reg use $0", "{s28}"(i32 %sgpr28) #0 |
| 158 | tail call void asm sideeffect "; reg use $0", "{s29}"(i32 %sgpr29) #0 |
| 159 | tail call void asm sideeffect "; reg use $0", "{s30}"(i32 %sgpr30) #0 |
| 160 | tail call void asm sideeffect "; reg use $0", "{s31}"(i32 %sgpr31) #0 |
| 161 | tail call void asm sideeffect "; reg use $0", "{s32}"(i32 %sgpr32) #0 |
| 162 | tail call void asm sideeffect "; reg use $0", "{s33}"(i32 %sgpr33) #0 |
| 163 | tail call void asm sideeffect "; reg use $0", "{s34}"(i32 %sgpr34) #0 |
| 164 | tail call void asm sideeffect "; reg use $0", "{s35}"(i32 %sgpr35) #0 |
| 165 | tail call void asm sideeffect "; reg use $0", "{s36}"(i32 %sgpr36) #0 |
| 166 | tail call void asm sideeffect "; reg use $0", "{s37}"(i32 %sgpr37) #0 |
| 167 | tail call void asm sideeffect "; reg use $0", "{s38}"(i32 %sgpr38) #0 |
| 168 | tail call void asm sideeffect "; reg use $0", "{s39}"(i32 %sgpr39) #0 |
| 169 | tail call void asm sideeffect "; reg use $0", "{s40}"(i32 %sgpr40) #0 |
| 170 | tail call void asm sideeffect "; reg use $0", "{s41}"(i32 %sgpr41) #0 |
| 171 | tail call void asm sideeffect "; reg use $0", "{s42}"(i32 %sgpr42) #0 |
| 172 | tail call void asm sideeffect "; reg use $0", "{s43}"(i32 %sgpr43) #0 |
| 173 | tail call void asm sideeffect "; reg use $0", "{s44}"(i32 %sgpr44) #0 |
| 174 | tail call void asm sideeffect "; reg use $0", "{s45}"(i32 %sgpr45) #0 |
| 175 | tail call void asm sideeffect "; reg use $0", "{s46}"(i32 %sgpr46) #0 |
| 176 | tail call void asm sideeffect "; reg use $0", "{s47}"(i32 %sgpr47) #0 |
| 177 | tail call void asm sideeffect "; reg use $0", "{s48}"(i32 %sgpr48) #0 |
| 178 | tail call void asm sideeffect "; reg use $0", "{s49}"(i32 %sgpr49) #0 |
| 179 | tail call void asm sideeffect "; reg use $0", "{s50}"(i32 %sgpr50) #0 |
| 180 | tail call void asm sideeffect "; reg use $0", "{s51}"(i32 %sgpr51) #0 |
| 181 | tail call void asm sideeffect "; reg use $0", "{s52}"(i32 %sgpr52) #0 |
| 182 | tail call void asm sideeffect "; reg use $0", "{s53}"(i32 %sgpr53) #0 |
| 183 | tail call void asm sideeffect "; reg use $0", "{s54}"(i32 %sgpr54) #0 |
| 184 | tail call void asm sideeffect "; reg use $0", "{s55}"(i32 %sgpr55) #0 |
| 185 | tail call void asm sideeffect "; reg use $0", "{s56}"(i32 %sgpr56) #0 |
| 186 | tail call void asm sideeffect "; reg use $0", "{s57}"(i32 %sgpr57) #0 |
| 187 | tail call void asm sideeffect "; reg use $0", "{s58}"(i32 %sgpr58) #0 |
| 188 | tail call void asm sideeffect "; reg use $0", "{s59}"(i32 %sgpr59) #0 |
| 189 | tail call void asm sideeffect "; reg use $0", "{s60}"(i32 %sgpr60) #0 |
| 190 | tail call void asm sideeffect "; reg use $0", "{s61}"(i32 %sgpr61) #0 |
| 191 | tail call void asm sideeffect "; reg use $0", "{s62}"(i32 %sgpr62) #0 |
| 192 | tail call void asm sideeffect "; reg use $0", "{s63}"(i32 %sgpr63) #0 |
| 193 | tail call void asm sideeffect "; reg use $0", "{s64}"(i32 %sgpr64) #0 |
| 194 | tail call void asm sideeffect "; reg use $0", "{s65}"(i32 %sgpr65) #0 |
| 195 | tail call void asm sideeffect "; reg use $0", "{s66}"(i32 %sgpr66) #0 |
| 196 | tail call void asm sideeffect "; reg use $0", "{s67}"(i32 %sgpr67) #0 |
| 197 | tail call void asm sideeffect "; reg use $0", "{s68}"(i32 %sgpr68) #0 |
| 198 | tail call void asm sideeffect "; reg use $0", "{s69}"(i32 %sgpr69) #0 |
| 199 | tail call void asm sideeffect "; reg use $0", "{s70}"(i32 %sgpr70) #0 |
| 200 | tail call void asm sideeffect "; reg use $0", "{s71}"(i32 %sgpr71) #0 |
| 201 | tail call void asm sideeffect "; reg use $0", "{s72}"(i32 %sgpr72) #0 |
| 202 | tail call void asm sideeffect "; reg use $0", "{s73}"(i32 %sgpr73) #0 |
| 203 | tail call void asm sideeffect "; reg use $0", "{s74}"(i32 %sgpr74) #0 |
| 204 | tail call void asm sideeffect "; reg use $0", "{s75}"(i32 %sgpr75) #0 |
| 205 | tail call void asm sideeffect "; reg use $0", "{s76}"(i32 %sgpr76) #0 |
| 206 | tail call void asm sideeffect "; reg use $0", "{s77}"(i32 %sgpr77) #0 |
| 207 | tail call void asm sideeffect "; reg use $0", "{s78}"(i32 %sgpr78) #0 |
| 208 | tail call void asm sideeffect "; reg use $0", "{s79}"(i32 %sgpr79) #0 |
| 209 | tail call void asm sideeffect "; reg use $0", "{s80}"(i32 %sgpr80) #0 |
| 210 | tail call void asm sideeffect "; reg use $0", "{s81}"(i32 %sgpr81) #0 |
| 211 | tail call void asm sideeffect "; reg use $0", "{s82}"(i32 %sgpr82) #0 |
| 212 | tail call void asm sideeffect "; reg use $0", "{s83}"(i32 %sgpr83) #0 |
| 213 | tail call void asm sideeffect "; reg use $0", "{s84}"(i32 %sgpr84) #0 |
| 214 | tail call void asm sideeffect "; reg use $0", "{s85}"(i32 %sgpr85) #0 |
| 215 | tail call void asm sideeffect "; reg use $0", "{s86}"(i32 %sgpr86) #0 |
| 216 | tail call void asm sideeffect "; reg use $0", "{s87}"(i32 %sgpr87) #0 |
| 217 | tail call void asm sideeffect "; reg use $0", "{s88}"(i32 %sgpr88) #0 |
| 218 | tail call void asm sideeffect "; reg use $0", "{s89}"(i32 %sgpr89) #0 |
| 219 | tail call void asm sideeffect "; reg use $0", "{s90}"(i32 %sgpr90) #0 |
| 220 | tail call void asm sideeffect "; reg use $0", "{s91}"(i32 %sgpr91) #0 |
| 221 | tail call void asm sideeffect "; reg use $0", "{s92}"(i32 %sgpr92) #0 |
| 222 | tail call void asm sideeffect "; reg use $0", "{s93}"(i32 %sgpr93) #0 |
| 223 | tail call void asm sideeffect "; reg use $0", "{s94}"(i32 %sgpr94) #0 |
| 224 | tail call void asm sideeffect "; reg use $0", "{s95}"(i32 %sgpr95) #0 |
| 225 | tail call void asm sideeffect "; reg use $0", "{s96}"(i32 %sgpr96) #0 |
| 226 | tail call void asm sideeffect "; reg use $0", "{s97}"(i32 %sgpr97) #0 |
| 227 | tail call void asm sideeffect "; reg use $0", "{s98}"(i32 %sgpr98) #0 |
| 228 | tail call void asm sideeffect "; reg use $0", "{s99}"(i32 %sgpr99) #0 |
| 229 | tail call void asm sideeffect "; reg use $0", "{s100}"(i32 %sgpr100) #0 |
| 230 | tail call void asm sideeffect "; reg use $0", "{s101}"(i32 %sgpr101) #0 |
| 231 | tail call void asm sideeffect "; reg use $0", "{s102}"(i32 %sgpr102) #0 |
| 232 | tail call void asm sideeffect "; reg use $0", "{s103}"(i32 %sgpr103) #0 |
| 233 | tail call void asm sideeffect "; reg use $0", "{vcc_lo}"(i32 %vcc_lo) #0 |
| 234 | tail call void asm sideeffect "; reg use $0", "{vcc_hi}"(i32 %vcc_hi) #0 |
Matt Arsenault | 6bc43d8 | 2016-10-06 16:20:41 +0000 | [diff] [blame] | 235 | ret void |
| 236 | } |
| 237 | |
| 238 | attributes #0 = { nounwind } |