Log - ce3ddd2de4c5dbd5a7a68b51ea38f96cf7fbf3aa - toolchain/llvm-project

2fdf2a1 AMDGPU: Redefine clamp node as clamp 0.0-1.0 by Matt Arsenault · 9 years ago
2021f08 AMDGPU: Fix assembler subtarget predicate for gfx9 by Matt Arsenault · 9 years ago
e823d92 AMDGPU: Merge initial gfx9 support by Matt Arsenault · 9 years ago
9f61fea Revert "[AMDGPU] Fix for SIMachineScheduler crash. SI Scheduler should track" by Alexander Timofeev · 9 years ago
205bfdb AMDGPU : Add trap handler support. by Wei Ding · 9 years ago
fd87137 [AMDGPU] Calculate number of min/max SGPRs/VGPRs for WavesPerEU instead of using switch statement by Konstantin Zhuravlyov · 9 years ago
9f89ede [AMDGPU] Add target information that is required by tools to metadata by Konstantin Zhuravlyov · 9 years ago
27d64c3 [AMDGPU][NFC] De-tabify by Konstantin Zhuravlyov · 9 years ago
e03b1d7 [AMDGPU] Move register related queries to subtarget class by Konstantin Zhuravlyov · 9 years ago
a3dace3 [AMDGPU] Fix for SIMachineScheduler crash. SI Scheduler should track by Alexander Timofeev · 9 years ago
2b913b1 [AMDGPU] Account workgroup size in LDS occupancy limits by Stanislav Mekhanoshin · 9 years ago
d8f7ea3 AMDGPU: Enable FeatureFlatForGlobal on Volcanic Islands by Matt Arsenault · 9 years ago
2f3f985 AMDGPU add support for spilling to a user sgpr pointed buffers by Tom Stellard · 9 years ago
7aad8fd Enable FeatureFlatForGlobal on Volcanic Islands by Matt Arsenault · 9 years ago
a6867fd AMDGPU: Combine fp16/fp64 subtarget features by Matt Arsenault · 9 years ago
11590b8 Pacify -Wreorder. by Benjamin Kramer · 9 years ago
07dbde2 [AMDGPU] Add subtarget features for SDWA/DPP by Sam Kolton · 9 years ago
6a9226d [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 9 years ago
1800956 [AMDGPU] Scalarization of global uniform loads. by Alexander Timofeev · 9 years ago
f86e4b7 [AMDGPU] Add f16 support (VI+) by Konstantin Zhuravlyov · 9 years ago
c88ba36 AMDGPU: Use 1/2pi inline imm on VI by Matt Arsenault · 9 years ago
4eae301 AMDGPU: Diagnose using too many SGPRs by Matt Arsenault · 9 years ago
64a9d08 AMDGPU/SI: Don't allow unaligned scratch access by Tom Stellard · 9 years ago
cc88ce3 AMDGPU: Add instruction definitions for VGPR indexing by Matt Arsenault · 9 years ago
e88bbc3 AMDGPU/SI: Include implicit arguments in kernarg_segment_byte_size by Tom Stellard · 9 years ago
1d65026 [AMDGPU] Wave and register controls by Konstantin Zhuravlyov · 9 years ago
0d23ebe AMDGPU/SI: Implement a custom MachineSchedStrategy by Tom Stellard · 9 years ago
56684d4 AMDGPU: Fix crashes on memory functions by Matt Arsenault · 9 years ago
cdae95b AMDGPU: Delete dead code by Matt Arsenault · 9 years ago
7f681ac AMDGPU: Add feature for unaligned access by Matt Arsenault · 9 years ago
6329872 Target: Remove unused arguments from overrideSchedPolicy, NFC by Duncan P. N. Exon Smith · 9 years ago
eb9025d AMDGPU: Fix global isel crashes by Matt Arsenault · 9 years ago
55dff27 AMDGPU: Fix global isel build by Matt Arsenault · 9 years ago
59c0ffa AMDGPU: Implement per-function subtargets by Matt Arsenault · 9 years ago
03d8584 AMDGPU: Move subtarget feature checks into passes by Matt Arsenault · 9 years ago
f2f3d14 [AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header by Konstantin Zhuravlyov · 9 years ago
c581611 AMDGPU: Remove disable-irstructurizer subtarget feature by Matt Arsenault · 9 years ago
43e92fe AMDGPU: Cleanup subtarget handling. by Matt Arsenault · 9 years ago
0e5befe AMDGPU: Make FrameLowering stack alignment 16 by Matt Arsenault · 9 years ago
8e00194 AMDGPU: Fix crashes on unknown processor name by Matt Arsenault · 9 years ago
71369b3 AMDGPU/SI: Enable load-store-opt by default. by Changpeng Fang · 9 years ago
29ddd2b [AMDGPU][NFC] Rename ReserveTrapVGPRs -> ReserveRegs by Konstantin Zhuravlyov · 9 years ago
8a028bf AMDGPU: Fix promote alloca pass creating huge arrays by Matt Arsenault · 9 years ago
e8ed8e5 AMDGPU: Change private_element_size to 4 by Matt Arsenault · 9 years ago
1d99c4d [AMDGPU] Reserve VGPRs for trap handler usage if instructed by Konstantin Zhuravlyov · 10 years ago
8c273ad [AMDGPU] Add insert nops pass based on subtarget features instead of cl::opt by Konstantin Zhuravlyov · 10 years ago
000c5af AMDGPU: Add skeleton GlobalIsel implementation by Tom Stellard · 10 years ago
df3a20c AMDGPU: Add a shader calling convention by Nicolai Haehnle · 10 years ago
0bc954e AMDGPU/SI: Enable lanemask tracking in misched by Tom Stellard · 10 years ago
3a61985 AMDGPU: More bits of frame index are known to be zero by Matt Arsenault · 10 years ago
9d82ee7 AMDGPU: Split vi-insts subtarget feature by Matt Arsenault · 10 years ago
61738cb AMDGPU: Implement readcyclecounter by Matt Arsenault · 10 years ago
24ee078 AMDGPU: Set element_size in private resource descriptor by Matt Arsenault · 10 years ago
f639c32 AMDGPU: Match some med3 patterns by Matt Arsenault · 10 years ago
b22828f AMDGPU: Fix default device handling by Matt Arsenault · 10 years ago
2a93bb6 AMDGPU: Remove Feature64BitPtr by Matt Arsenault · 10 years ago
de008d3 AMDGPU/SI: Pass whether to use the SI scheduler via Target Attribute by Tom Stellard · 10 years ago
e83690c AMDGPU: Add subtarget feature for instruction rates by Matt Arsenault · 10 years ago
5b50497 AMDGPU: add +xnack feature by Nicolai Haehnle · 10 years ago
b41574a AMDGPU/SI: Use flat for global load/store when targeting HSA by Changpeng Fang · 10 years ago
4b0d24c Revert "AMDGPU/SI: Use flat for global load/store when targeting HSA" by Rafael Espindola · 10 years ago
9b8a9be AMDGPU/SI: Use flat for global load/store when targeting HSA by Changpeng Fang · 10 years ago
f59e538 AMDGPU: Cleanup includes by Matt Arsenault · 10 years ago
0c90e95 AMDGPU: Create emergency stack slots during frame lowering by Matt Arsenault · 10 years ago
50f1723 Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. by Daniel Sanders · 10 years ago
153010c Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. by Daniel Sanders · 10 years ago
c40de48 Revert r247684 - Replace Triple with a new TargetTuple ... by Daniel Sanders · 10 years ago
18d4b0d Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. by Daniel Sanders · 10 years ago
c98ee20 AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets by Tom Stellard · 10 years ago
706f930 AMDGPU/SI: Add debugging subtarget feature for DS offsets by Matt Arsenault · 10 years ago
347ac79 AMDGPU/SI: Add hsa code object directives by Tom Stellard · 10 years ago
45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/lib/Target/R600/AMDGPUSubtarget.cpp]
a73f1fd Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC. by Daniel Sanders · 10 years ago
ec87f84 R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chips by Tom Stellard · 10 years ago
d1f0f02 R600/SI: Add assembler support for all CI and VI VOP1 instructions by Tom Stellard · 11 years ago
d7e6f13 R600/SI: Initial support for assembler and inline assembly by Tom Stellard · 11 years ago
4d00dd2 R600/SI: Limit SGPRs to 80 on Tonga and Iceland by Marek Olsak · 11 years ago
111de89 80-column fixups. by Eric Christopher · 11 years ago
7792e32 Reuse a bunch of cached subtargets and remove getSubtarget calls by Eric Christopher · 11 years ago
b035a57 R600/SI: Add subtarget feature for if f32 fma is fast by Matt Arsenault · 11 years ago
83f0bce R600/SI: Define a schedule model and enable the generic machine scheduler by Tom Stellard · 11 years ago
40ce8af R600: Move DataLayout to AMDGPUTargetMachine by Tom Stellard · 11 years ago
eba5648 R600: Use a Southern Islands GPU as the default for the amdgcn target by Tom Stellard · 11 years ago
8b77065 Move DataLayout back to the TargetMachine from TargetSubtargetInfo by Eric Christopher · 11 years ago
e99fb65 R600/SI: Add subtarget feature to enable VGPR spilling for all shader types by Tom Stellard · 11 years ago
d990388 [cleanup] Re-sort all the #include lines in LLVM using utils/sort_includes.py. by Chandler Carruth · 11 years ago
b8fd6ef R600/SI: Emit amd_kernel_code_t header for AMDGPU environment by Tom Stellard · 11 years ago
794c8c0 R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime by Tom Stellard · 11 years ago
4103328 R600/SI: Add load / store machine optimizer pass. by Matt Arsenault · 11 years ago
3f98140 R600/SI: Add preliminary support for flat address space by Matt Arsenault · 11 years ago
515c24b Correct comment by Matt Arsenault · 11 years ago
34aaf97 Move the R600 intrinsic support back to the target machine - there's by Eric Christopher · 11 years ago
ac4b69e Move R600 subtarget dependent variables onto the subtarget. by Eric Christopher · 11 years ago
f171cf2 R600: Add denormal handling subtarget features. by Matt Arsenault · 11 years ago
d9a23ab R600: Add option to disable promote alloca by Matt Arsenault · 11 years ago
d782d05 R600: Move trivial getters into header, use initializer list by Matt Arsenault · 11 years ago
880a80a R600: Use LDS and vectors for private memory by Tom Stellard · 11 years ago
2e59a45 R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget by Tom Stellard · 11 years ago
e01fdff R600: Remove unused function AMDGPUSubtarget::getDefaultSize() by Tom Stellard · 12 years ago
e96dd89 [Modules] Make Support/Debug.h modular. This requires it to not change by Chandler Carruth · 12 years ago