blob: b63f1a78e3b6f78eb199ac13d859744293bdae30 [file] [log] [blame]
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
Harini Jayaramaneba52672011-09-08 15:13:00 -060015#include <linux/i2c.h>
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070016#include <linux/msm_ssbi.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070017#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
Krishna Kondadd794462011-10-01 00:19:29 -070019#include <asm/mach/mmc.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070020#include <mach/board.h>
21#include <mach/msm_iomap.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Harini Jayaraman738c9312011-09-08 15:22:38 -060024#include <mach/msm_spi.h>
Amit Blay5e4ec192011-10-20 09:16:54 +020025#include <linux/usb/android.h>
26#include <linux/usb/msm_hsusb.h>
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070027#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
Jay Chokshieb5d0d52011-09-28 17:16:20 -070028#include <linux/leds.h>
29#include <linux/leds-pm8xxx.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070030#include "timer.h"
31#include "devices.h"
David Collinsfb88c432011-08-25 15:12:47 -070032#include "board-9615.h"
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -060033#include "cpuidle.h"
34#include "pm.h"
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -070035#include "acpuclock.h"
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070036
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070037static struct pm8xxx_adc_amux pm8018_adc_channels_data[] = {
38 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
39 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
40 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
41 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
42 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
43 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
44 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
45 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
46 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV2,
47 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
48 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
49 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
50 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
51 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
52 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
53 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
54 {"pa_therm0", ADC_MPP_1_AMUX3, CHAN_PATH_SCALING1, AMUX_RSV1,
55 ADC_DECIMATION_TYPE2, ADC_SCALE_PA_THERM},
56};
57
58static struct pm8xxx_adc_properties pm8018_adc_data = {
59 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
60 .bitresolution = 15,
61 .bipolar = 0,
62};
63
64static struct pm8xxx_adc_platform_data pm8018_adc_pdata = {
65 .adc_channel = pm8018_adc_channels_data,
66 .adc_num_board_channel = ARRAY_SIZE(pm8018_adc_channels_data),
67 .adc_prop = &pm8018_adc_data,
68};
69
David Collinsfb88c432011-08-25 15:12:47 -070070static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
71 .irq_base = PM8018_IRQ_BASE,
72 .devirq = MSM_GPIO_TO_INT(87),
73 .irq_trigger_flag = IRQF_TRIGGER_LOW,
74};
75
76static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
77 .gpio_base = PM8018_GPIO_PM_TO_SYS(1),
78};
79
80static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
81 .mpp_base = PM8018_MPP_PM_TO_SYS(1),
82};
83
84static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
85 .rtc_write_enable = false,
Ashay Jaiswaldb5e6dc2011-10-12 11:02:47 +053086 .rtc_alarm_powerup = false,
David Collinsfb88c432011-08-25 15:12:47 -070087};
88
89static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
90 .pull_up = 1,
91 .kpd_trigger_delay_us = 970,
92 .wakeup = 1,
93};
94
95static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
96 .priority = 0,
97};
98
Jay Chokshieb5d0d52011-09-28 17:16:20 -070099#define PM8018_LED_KB_MAX_CURRENT 20 /* I = 20mA */
100#define PM8XXX_LED_PWM_PERIOD_US 1000
101
102/**
103 * PM8XXX_PWM_CHANNEL_NONE shall be used when LED shall not be
104 * driven using PWM feature.
105 */
106#define PM8XXX_PWM_CHANNEL_NONE -1
107
108static struct led_info pm8018_led_info[] = {
109 [0] = {
110 .name = "led:kb",
111 },
112};
113
114static struct led_platform_data pm8018_led_core_pdata = {
115 .num_leds = ARRAY_SIZE(pm8018_led_info),
116 .leds = pm8018_led_info,
117};
118
119static struct pm8xxx_led_config pm8018_led_configs[] = {
120 [0] = {
121 .id = PM8XXX_ID_LED_KB_LIGHT,
122 .mode = PM8XXX_LED_MODE_PWM3,
123 .max_current = PM8018_LED_KB_MAX_CURRENT,
124 .pwm_channel = 2,
125 .pwm_period_us = PM8XXX_LED_PWM_PERIOD_US,
126 },
127};
128
129static struct pm8xxx_led_platform_data pm8xxx_leds_pdata = {
130 .led_core = &pm8018_led_core_pdata,
131 .configs = pm8018_led_configs,
132 .num_configs = ARRAY_SIZE(pm8018_led_configs),
133};
134
David Collinsfb88c432011-08-25 15:12:47 -0700135static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
136 .irq_pdata = &pm8xxx_irq_pdata,
137 .gpio_pdata = &pm8xxx_gpio_pdata,
138 .mpp_pdata = &pm8xxx_mpp_pdata,
139 .rtc_pdata = &pm8xxx_rtc_pdata,
140 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
141 .misc_pdata = &pm8xxx_misc_pdata,
David Collins00b31e62011-08-31 20:00:10 -0700142 .regulator_pdatas = msm_pm8018_regulator_pdata,
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -0700143 .adc_pdata = &pm8018_adc_pdata,
Jay Chokshieb5d0d52011-09-28 17:16:20 -0700144 .leds_pdata = &pm8xxx_leds_pdata,
David Collinsfb88c432011-08-25 15:12:47 -0700145};
146
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700147static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
148 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
149 .slave = {
David Collinsfb88c432011-08-25 15:12:47 -0700150 .name = PM8018_CORE_DEV_NAME,
151 .platform_data = &pm8018_platform_data,
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700152 },
153};
154
David Collinsbea297a2011-09-28 13:11:14 -0700155static struct platform_device msm9615_device_rpm_regulator __devinitdata = {
156 .name = "rpm-regulator",
157 .id = -1,
158 .dev = {
159 .platform_data = &msm_rpm_regulator_9615_pdata,
160 },
161};
162
David Collins0f9942a2011-10-31 09:47:34 -0700163static struct platform_device msm9615_device_ext_2p95v_vreg = {
164 .name = GPIO_REGULATOR_DEV_NAME,
165 .id = 18,
166 .dev = {
167 .platform_data =
168 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P95V],
169 },
170};
171
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700172static struct gpiomux_setting ps_hold = {
173 .func = GPIOMUX_FUNC_1,
174 .drv = GPIOMUX_DRV_8MA,
175 .pull = GPIOMUX_PULL_NONE,
176};
177
Rohit Vaswani09666872011-08-23 17:41:54 -0700178static struct gpiomux_setting gsbi4 = {
179 .func = GPIOMUX_FUNC_1,
180 .drv = GPIOMUX_DRV_8MA,
181 .pull = GPIOMUX_PULL_NONE,
182};
183
Harini Jayaramaneba52672011-09-08 15:13:00 -0600184static struct gpiomux_setting gsbi5 = {
185 .func = GPIOMUX_FUNC_1,
186 .drv = GPIOMUX_DRV_8MA,
187 .pull = GPIOMUX_PULL_NONE,
188};
189
Harini Jayaraman738c9312011-09-08 15:22:38 -0600190static struct gpiomux_setting gsbi3 = {
191 .func = GPIOMUX_FUNC_1,
192 .drv = GPIOMUX_DRV_8MA,
193 .pull = GPIOMUX_PULL_NONE,
194};
195
196static struct gpiomux_setting gsbi3_cs1_config = {
197 .func = GPIOMUX_FUNC_4,
198 .drv = GPIOMUX_DRV_8MA,
199 .pull = GPIOMUX_PULL_NONE,
200};
201
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700202struct msm_gpiomux_config msm9615_ps_hold_config[] __initdata = {
203 {
204 .gpio = 83,
205 .settings = {
206 [GPIOMUX_SUSPENDED] = &ps_hold,
207 },
208 },
209};
210
Rohit Vaswani09666872011-08-23 17:41:54 -0700211struct msm_gpiomux_config msm9615_gsbi_configs[] __initdata = {
212 {
Harini Jayaraman738c9312011-09-08 15:22:38 -0600213 .gpio = 8, /* GSBI3 QUP SPI_CLK */
214 .settings = {
215 [GPIOMUX_SUSPENDED] = &gsbi3,
216 },
217 },
218 {
219 .gpio = 9, /* GSBI3 QUP SPI_CS_N */
220 .settings = {
221 [GPIOMUX_SUSPENDED] = &gsbi3,
222 },
223 },
224 {
225 .gpio = 10, /* GSBI3 QUP SPI_DATA_MISO */
226 .settings = {
227 [GPIOMUX_SUSPENDED] = &gsbi3,
228 },
229 },
230 {
231 .gpio = 11, /* GSBI3 QUP SPI_DATA_MOSI */
232 .settings = {
233 [GPIOMUX_SUSPENDED] = &gsbi3,
234 },
235 },
236 {
Rohit Vaswani09666872011-08-23 17:41:54 -0700237 .gpio = 12, /* GSBI4 UART */
238 .settings = {
239 [GPIOMUX_SUSPENDED] = &gsbi4,
240 },
241 },
242 {
243 .gpio = 13, /* GSBI4 UART */
244 .settings = {
245 [GPIOMUX_SUSPENDED] = &gsbi4,
246 },
247 },
248 {
249 .gpio = 14, /* GSBI4 UART */
250 .settings = {
251 [GPIOMUX_SUSPENDED] = &gsbi4,
252 },
253 },
254 {
255 .gpio = 15, /* GSBI4 UART */
256 .settings = {
257 [GPIOMUX_SUSPENDED] = &gsbi4,
258 },
259 },
Harini Jayaramaneba52672011-09-08 15:13:00 -0600260 {
261 .gpio = 16, /* GSBI5 I2C QUP SCL */
262 .settings = {
263 [GPIOMUX_SUSPENDED] = &gsbi5,
264 },
265 },
266 {
267 .gpio = 17, /* GSBI5 I2C QUP SDA */
268 .settings = {
269 [GPIOMUX_SUSPENDED] = &gsbi5,
270 },
271 },
Harini Jayaraman738c9312011-09-08 15:22:38 -0600272 {
273 /* GPIO 19 can be used for I2C/UART on GSBI5 */
274 .gpio = 19, /* GSBI3 QUP SPI_CS_1 */
275 .settings = {
276 [GPIOMUX_SUSPENDED] = &gsbi3_cs1_config,
277 },
278 },
Rohit Vaswani09666872011-08-23 17:41:54 -0700279};
280
Krishna Kondadd794462011-10-01 00:19:29 -0700281#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
282 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
283
Krishna Konda7186bfe2011-10-17 15:36:54 -0700284#define GPIO_SDC1_HW_DET 80
Krishna Konda3b78ea72011-10-18 16:09:19 -0700285#define GPIO_SDC2_DAT1_WAKEUP 26
Krishna Kondadd794462011-10-01 00:19:29 -0700286
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -0700287/* MDM9x15 has 2 SDCC controllers */
Krishna Kondadd794462011-10-01 00:19:29 -0700288enum sdcc_controllers {
289 SDCC1,
290 SDCC2,
291 MAX_SDCC_CONTROLLER
292};
293
294#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
Krishna Kondafea60182011-11-01 16:01:34 -0700295/* All SDCC controllers requires VDD/VCC voltage */
296static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
297 /* SDCC1 : External card slot connected */
298 [SDCC1] = {
299 .name = "sdc_vdd",
300 /*
301 * This is a gpio-regulator and does not support
302 * regulator_set_voltage and regulator_set_optimum_mode
303 */
304 .set_voltage_sup = false,
305 .high_vol_level = 2950000,
306 .low_vol_level = 2950000,
307 .hpm_uA = 600000, /* 600mA */
308 }
309};
310
311/* All SDCC controllers may require voting for VDD PAD voltage */
312static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
313 /* SDCC1 : External card slot connected */
314 [SDCC1] = {
315 .name = "sdc_vddp",
316 .set_voltage_sup = true,
317 .high_vol_level = 2950000,
318 .low_vol_level = 1850000,
319 .always_on = true,
320 .lpm_sup = true,
321 /* Max. Active current required is 16 mA */
322 .hpm_uA = 16000,
323 /*
324 * Sleep current required is ~300 uA. But min. vote can be
325 * in terms of mA (min. 1 mA). So let's vote for 2 mA
326 * during sleep.
327 */
328 .lpm_uA = 2000,
329 }
330};
331
332static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
333 /* SDCC1 : External card slot connected */
334 [SDCC1] = {
335 .vdd_data = &mmc_vdd_reg_data[SDCC1],
336 .vddp_data = &mmc_vddp_reg_data[SDCC1],
337 }
338};
339
Krishna Kondadd794462011-10-01 00:19:29 -0700340/* SDC1 pad data */
341static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
342 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
343 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
344 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
345};
346
347static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
348 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
349 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
350 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
351};
352
353static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
354 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
355 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
356 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
357};
358
359static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
360 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
361 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
362 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
363};
364
365static struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
366 [SDCC1] = {
367 .on = sdc1_pad_pull_on_cfg,
368 .off = sdc1_pad_pull_off_cfg,
369 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
370 },
371};
372
373static struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
374 [SDCC1] = {
375 .on = sdc1_pad_drv_on_cfg,
376 .off = sdc1_pad_drv_off_cfg,
377 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
378 },
379};
380
381static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
382 [SDCC1] = {
383 .pull = &mmc_pad_pull_data[SDCC1],
384 .drv = &mmc_pad_drv_data[SDCC1]
385 },
386};
387#endif
388
Krishna Konda71aef182011-10-01 02:27:51 -0700389#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
390static struct gpiomux_setting sdcc2_clk_actv_cfg = {
391 .func = GPIOMUX_FUNC_1,
392 .drv = GPIOMUX_DRV_16MA,
393 .pull = GPIOMUX_PULL_NONE,
394};
395
396static struct gpiomux_setting sdcc2_cmd_data_0_3_actv_cfg = {
397 .func = GPIOMUX_FUNC_1,
398 .drv = GPIOMUX_DRV_8MA,
399 .pull = GPIOMUX_PULL_UP,
400};
401
402static struct gpiomux_setting sdcc2_suspend_cfg = {
403 .func = GPIOMUX_FUNC_1,
404 .drv = GPIOMUX_DRV_2MA,
405 .pull = GPIOMUX_PULL_DOWN,
406};
407
408static struct msm_gpiomux_config msm9615_sdcc2_configs[] __initdata = {
409 {
410 /* SDC2_DATA_0 */
411 .gpio = 25,
412 .settings = {
413 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
414 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
415 },
416 },
417 {
418 /* SDC2_DATA_1 */
419 .gpio = 26,
420 .settings = {
421 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
Krishna Konda0b10fa12011-11-07 22:47:41 -0800422 [GPIOMUX_SUSPENDED] = &sdcc2_cmd_data_0_3_actv_cfg,
Krishna Konda71aef182011-10-01 02:27:51 -0700423 },
424 },
425 {
426 /* SDC2_DATA_2 */
427 .gpio = 27,
428 .settings = {
429 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
430 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
431 },
432 },
433 {
434 /* SDC2_DATA_3 */
435 .gpio = 28,
436 .settings = {
437 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
438 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
439 },
440 },
441 {
Krishna Konda0b10fa12011-11-07 22:47:41 -0800442 /* SDC2_CMD */
Krishna Konda71aef182011-10-01 02:27:51 -0700443 .gpio = 29,
444 .settings = {
445 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
446 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
447 },
448 },
449 {
Krishna Konda0b10fa12011-11-07 22:47:41 -0800450 /* SDC2_CLK */
Krishna Konda71aef182011-10-01 02:27:51 -0700451 .gpio = 30,
452 .settings = {
453 [GPIOMUX_ACTIVE] = &sdcc2_clk_actv_cfg,
454 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
455 },
456 },
457};
458
459static struct msm_mmc_gpio sdc2_gpio_cfg[] = {
460 {25, "sdc2_dat_0"},
461 {26, "sdc2_dat_1"},
462 {27, "sdc2_dat_2"},
463 {28, "sdc2_dat_3"},
464 {29, "sdc2_cmd"},
465 {30, "sdc2_clk"},
466};
467
468static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
469 [SDCC2] = {
470 .gpio = sdc2_gpio_cfg,
471 .size = ARRAY_SIZE(sdc2_gpio_cfg),
472 },
473};
474#else
475static struct msm_gpiomux_config msm9615_sdcc2_configs[0];
476#endif
477
478static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
Krishna Kondadd794462011-10-01 00:19:29 -0700479#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
480 [SDCC1] = {
481 .is_gpio = 0,
482 .pad_data = &mmc_pad_data[SDCC1],
483 },
484#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700485#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
486 [SDCC2] = {
487 .is_gpio = 1,
488 .gpio_data = &mmc_gpio_data[SDCC2],
489 },
490#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700491};
492
493#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
494static unsigned int sdc1_sup_clk_rates[] = {
495 400000, 24000000, 48000000
496};
497
498static struct mmc_platform_data sdc1_data = {
499 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
500 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
501 .sup_clk_table = sdc1_sup_clk_rates,
502 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
Krishna Kondafea60182011-11-01 16:01:34 -0700503 .pclk_src_dfab = true,
Krishna Kondadd794462011-10-01 00:19:29 -0700504 .sdcc_v4_sup = true,
Krishna Kondafea60182011-11-01 16:01:34 -0700505 .vreg_data = &mmc_slot_vreg_data[SDCC1],
Krishna Kondadd794462011-10-01 00:19:29 -0700506 .pin_data = &mmc_slot_pin_data[SDCC1],
Krishna Konda7186bfe2011-10-17 15:36:54 -0700507#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
508 .status_gpio = GPIO_SDC1_HW_DET,
509 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
510 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
511#endif
Krishna Kondadbcf9702011-11-07 18:45:48 -0800512 .xpc_cap = 1,
513 .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
514 MMC_CAP_MAX_CURRENT_400)
Krishna Kondadd794462011-10-01 00:19:29 -0700515};
516static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
517#else
518static struct mmc_platform_data *msm9615_sdc1_pdata;
519#endif
520
Krishna Konda71aef182011-10-01 02:27:51 -0700521#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
522static unsigned int sdc2_sup_clk_rates[] = {
523 400000, 24000000, 48000000
524};
525
526static struct mmc_platform_data sdc2_data = {
527 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
528 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
529 .sup_clk_table = sdc2_sup_clk_rates,
530 .sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
Krishna Konda890b1d12011-10-18 16:05:37 -0700531 .pclk_src_dfab = 1,
Krishna Konda71aef182011-10-01 02:27:51 -0700532 .sdcc_v4_sup = true,
533 .pin_data = &mmc_slot_pin_data[SDCC2],
Krishna Konda3b78ea72011-10-18 16:09:19 -0700534#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
535 .sdiowakeup_irq = MSM_GPIO_TO_INT(GPIO_SDC2_DAT1_WAKEUP),
536#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700537};
538static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
539#else
540static struct mmc_platform_data *msm9615_sdc2_pdata;
541#endif
542
Krishna Kondadd794462011-10-01 00:19:29 -0700543static void __init msm9615_init_mmc(void)
544{
Krishna Kondadd794462011-10-01 00:19:29 -0700545 if (msm9615_sdc1_pdata) {
Krishna Kondafea60182011-11-01 16:01:34 -0700546 /* SDC1: External card slot for SD/MMC cards */
547 msm_add_sdcc(1, msm9615_sdc1_pdata);
Krishna Kondadd794462011-10-01 00:19:29 -0700548 }
Krishna Konda71aef182011-10-01 02:27:51 -0700549
550 if (msm9615_sdc2_pdata) {
551 msm_gpiomux_install(msm9615_sdcc2_configs,
552 ARRAY_SIZE(msm9615_sdcc2_configs));
553
Krishna Kondafea60182011-11-01 16:01:34 -0700554 /* SDC2: External card slot used for WLAN */
Krishna Konda71aef182011-10-01 02:27:51 -0700555 msm_add_sdcc(2, msm9615_sdc2_pdata);
556 }
Krishna Kondadd794462011-10-01 00:19:29 -0700557}
558#else
559static void __init msm9615_init_mmc(void) { }
560#endif
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600561static struct msm_cpuidle_state msm_cstates[] __initdata = {
562 {0, 0, "C0", "WFI",
563 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
564
565 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
566 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
567
568 {0, 2, "C2", "POWER_COLLAPSE",
569 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
570};
571static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
572 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
573 .idle_supported = 1,
574 .suspend_supported = 1,
575 .idle_enabled = 0,
576 .suspend_enabled = 0,
577 },
578 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
579 .idle_supported = 1,
580 .suspend_supported = 1,
581 .idle_enabled = 0,
582 .suspend_enabled = 0,
583 },
584 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
585 .idle_supported = 1,
586 .suspend_supported = 1,
587 .idle_enabled = 1,
588 .suspend_enabled = 1,
589 },
590};
Krishna Kondadd794462011-10-01 00:19:29 -0700591
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700592static int __init gpiomux_init(void)
593{
594 int rc;
595
596 rc = msm_gpiomux_init(NR_GPIO_IRQS);
597 if (rc) {
598 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
599 return rc;
600 }
Rohit Vaswani09666872011-08-23 17:41:54 -0700601 msm_gpiomux_install(msm9615_gsbi_configs,
602 ARRAY_SIZE(msm9615_gsbi_configs));
603
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700604 msm_gpiomux_install(msm9615_ps_hold_config,
605 ARRAY_SIZE(msm9615_ps_hold_config));
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700606 return 0;
607}
608
Harini Jayaraman738c9312011-09-08 15:22:38 -0600609static struct msm_spi_platform_data msm9615_qup_spi_gsbi3_pdata = {
610 .max_clock_speed = 24000000,
611};
612
Harini Jayaramaneba52672011-09-08 15:13:00 -0600613static struct msm_i2c_platform_data msm9615_i2c_qup_gsbi5_pdata = {
614 .clk_freq = 100000,
615 .src_clk_rate = 24000000,
616};
617
Amit Blay5e4ec192011-10-20 09:16:54 +0200618static struct msm_otg_platform_data msm_otg_pdata = {
619 .mode = USB_PERIPHERAL,
620 .otg_control = OTG_NO_CONTROL,
621 .phy_type = SNPS_28NM_INTEGRATED_PHY,
622 .pclk_src_name = "dfab_usb_hs_clk",
623};
624
625static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
626{
627 return 0;
628}
629
630static struct android_usb_platform_data android_usb_pdata = {
631 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
632};
633
634static struct platform_device android_usb_device = {
635 .name = "android_usb",
636 .id = -1,
637 .dev = {
638 .platform_data = &android_usb_pdata,
639 },
640};
641
642static struct platform_device *common_devices[] = {
643 &msm9615_device_dmov,
644 &msm_device_smd,
645 &msm_device_otg,
646 &msm_device_gadget_peripheral,
647 &android_usb_device,
648 &msm9615_device_uart_gsbi4,
David Collins0f9942a2011-10-31 09:47:34 -0700649 &msm9615_device_ext_2p95v_vreg,
Amit Blay5e4ec192011-10-20 09:16:54 +0200650 &msm9615_device_ssbi_pmic1,
651 &msm9615_device_qup_i2c_gsbi5,
652 &msm9615_device_qup_spi_gsbi3,
653 &msm_device_sps,
654 &msm9615_device_tsens,
655 &msm_device_nand,
Eric Holmberg0c96e702011-11-08 18:04:31 -0700656 &msm_device_bam_dmux,
Amit Blay5e4ec192011-10-20 09:16:54 +0200657 &msm_rpm_device,
658#ifdef CONFIG_HW_RANDOM_MSM
659 &msm_device_rng,
660#endif
661
662#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
663 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700664 &msm9615_qcrypto_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200665#endif
666
667#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
668 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700669 &msm9615_qcedev_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200670#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -0700671 &msm9615_device_watchdog,
Amit Blay5e4ec192011-10-20 09:16:54 +0200672};
673
Harini Jayaramaneba52672011-09-08 15:13:00 -0600674static void __init msm9615_i2c_init(void)
675{
676 msm9615_device_qup_i2c_gsbi5.dev.platform_data =
677 &msm9615_i2c_qup_gsbi5_pdata;
678}
679
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700680static void __init msm9615_common_init(void)
681{
682 msm9615_device_init();
683 gpiomux_init();
Harini Jayaramaneba52672011-09-08 15:13:00 -0600684 msm9615_i2c_init();
David Collins00b31e62011-08-31 20:00:10 -0700685 regulator_suppress_info_printing();
David Collinsbea297a2011-09-28 13:11:14 -0700686 platform_device_register(&msm9615_device_rpm_regulator);
Harini Jayaraman738c9312011-09-08 15:22:38 -0600687 msm9615_device_qup_spi_gsbi3.dev.platform_data =
688 &msm9615_qup_spi_gsbi3_pdata;
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700689 msm9615_device_ssbi_pmic1.dev.platform_data =
690 &msm9615_ssbi_pm8018_pdata;
David Collins00b31e62011-08-31 20:00:10 -0700691 pm8018_platform_data.num_regulators = msm_pm8018_regulator_pdata_len;
Amit Blay5e4ec192011-10-20 09:16:54 +0200692
693 msm_device_otg.dev.platform_data = &msm_otg_pdata;
694 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
Rohit Vaswani09666872011-08-23 17:41:54 -0700695 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
Krishna Kondadd794462011-10-01 00:19:29 -0700696
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -0700697 msm_clock_init(&msm9615_clock_init_data);
698 acpuclk_init(&acpuclk_9615_soc_data);
699
Krishna Kondadd794462011-10-01 00:19:29 -0700700 msm9615_init_mmc();
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600701 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
702 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
703 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
704 msm_pm_data);
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700705}
706
707static void __init msm9615_cdp_init(void)
708{
709 msm9615_common_init();
710}
711
712static void __init msm9615_mtp_init(void)
713{
714 msm9615_common_init();
715}
716
717MACHINE_START(MSM9615_CDP, "QCT MSM9615 CDP")
718 .map_io = msm9615_map_io,
719 .init_irq = msm9615_init_irq,
720 .timer = &msm_timer,
721 .init_machine = msm9615_cdp_init,
722MACHINE_END
723
724MACHINE_START(MSM9615_MTP, "QCT MSM9615 MTP")
725 .map_io = msm9615_map_io,
726 .init_irq = msm9615_init_irq,
727 .timer = &msm_timer,
728 .init_machine = msm9615_mtp_init,
729MACHINE_END