Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1 | /* |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 2 | * Support functions for OMAP GPIO |
| 3 | * |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 4 | * Copyright (C) 2003-2005 Nokia Corporation |
Jan Engelhardt | 96de0e2 | 2007-10-19 23:21:04 +0200 | [diff] [blame] | 5 | * Written by Juha Yrjölä <juha.yrjola@nokia.com> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 6 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 7 | * Copyright (C) 2009 Texas Instruments |
| 8 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 9 | * |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 18 | #include <linux/syscore_ops.h> |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 19 | #include <linux/err.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 20 | #include <linux/clk.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 22 | #include <linux/slab.h> |
| 23 | #include <linux/pm_runtime.h> |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 24 | #include <linux/pm.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 25 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 26 | #include <mach/hardware.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 27 | #include <asm/irq.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 28 | #include <mach/irqs.h> |
Russell King | 1bc857f | 2011-07-26 10:54:55 +0100 | [diff] [blame] | 29 | #include <asm/gpio.h> |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 30 | #include <asm/mach/irq.h> |
| 31 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 32 | #define OFF_MODE 1 |
| 33 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 34 | static LIST_HEAD(omap_gpio_list); |
| 35 | |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 36 | struct gpio_regs { |
| 37 | u32 irqenable1; |
| 38 | u32 irqenable2; |
| 39 | u32 wake_en; |
| 40 | u32 ctrl; |
| 41 | u32 oe; |
| 42 | u32 leveldetect0; |
| 43 | u32 leveldetect1; |
| 44 | u32 risingdetect; |
| 45 | u32 fallingdetect; |
| 46 | u32 dataout; |
| 47 | }; |
| 48 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 49 | struct gpio_bank { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 50 | struct list_head node; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 51 | unsigned long pbase; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 52 | void __iomem *base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 53 | u16 irq; |
| 54 | u16 virtual_irq_start; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 55 | u32 suspend_wakeup; |
| 56 | u32 saved_wakeup; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 57 | u32 non_wakeup_gpios; |
| 58 | u32 enabled_non_wakeup_gpios; |
Charulatha V | 6d62e21 | 2011-04-18 15:06:51 +0000 | [diff] [blame] | 59 | struct gpio_regs context; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 60 | u32 saved_datain; |
| 61 | u32 saved_fallingdetect; |
| 62 | u32 saved_risingdetect; |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 63 | u32 level_mask; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 64 | u32 toggle_mask; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 65 | spinlock_t lock; |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 66 | struct gpio_chip chip; |
Jouni Hogander | 89db948 | 2008-12-10 17:35:24 -0800 | [diff] [blame] | 67 | struct clk *dbck; |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 68 | u32 mod_usage; |
Kevin Hilman | 8865b9b | 2009-01-27 11:15:34 -0800 | [diff] [blame] | 69 | u32 dbck_enable_mask; |
Tarun Kanti DebBarma | 72f83af | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 70 | bool dbck_enabled; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 71 | struct device *dev; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 72 | bool is_mpuio; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 73 | bool dbck_flag; |
Charulatha V | 0cde8d0 | 2011-05-05 20:15:16 +0530 | [diff] [blame] | 74 | bool loses_context; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 75 | int stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 76 | u32 width; |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 77 | int context_loss_count; |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 78 | u16 id; |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 79 | int power_mode; |
| 80 | bool workaround_enabled; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 81 | |
| 82 | void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 83 | int (*get_context_loss_count)(struct device *dev); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 84 | |
| 85 | struct omap_gpio_reg_offs *regs; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 86 | }; |
| 87 | |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 88 | #define GPIO_INDEX(bank, gpio) (gpio % bank->width) |
| 89 | #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 90 | #define GPIO_MOD_CTRL_BIT BIT(0) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 91 | |
| 92 | static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) |
| 93 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 94 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 95 | u32 l; |
| 96 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 97 | reg += bank->regs->direction; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 98 | l = __raw_readl(reg); |
| 99 | if (is_input) |
| 100 | l |= 1 << gpio; |
| 101 | else |
| 102 | l &= ~(1 << gpio); |
| 103 | __raw_writel(l, reg); |
| 104 | } |
| 105 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 106 | |
| 107 | /* set data out value using dedicate set/clear register */ |
| 108 | static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 109 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 110 | void __iomem *reg = bank->base; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 111 | u32 l = GPIO_BIT(bank, gpio); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 112 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 113 | if (enable) |
| 114 | reg += bank->regs->set_dataout; |
| 115 | else |
| 116 | reg += bank->regs->clr_dataout; |
| 117 | |
| 118 | __raw_writel(l, reg); |
| 119 | } |
| 120 | |
| 121 | /* set data out value using mask register */ |
| 122 | static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable) |
| 123 | { |
| 124 | void __iomem *reg = bank->base + bank->regs->dataout; |
| 125 | u32 gpio_bit = GPIO_BIT(bank, gpio); |
| 126 | u32 l; |
| 127 | |
| 128 | l = __raw_readl(reg); |
| 129 | if (enable) |
| 130 | l |= gpio_bit; |
| 131 | else |
| 132 | l &= ~gpio_bit; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 133 | __raw_writel(l, reg); |
| 134 | } |
| 135 | |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 136 | static int _get_gpio_datain(struct gpio_bank *bank, int gpio) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 137 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 138 | void __iomem *reg = bank->base + bank->regs->datain; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 139 | |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 140 | return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 141 | } |
| 142 | |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 143 | static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) |
| 144 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 145 | void __iomem *reg = bank->base + bank->regs->dataout; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 146 | |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 147 | return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 148 | } |
| 149 | |
Kevin Hilman | ece9528 | 2011-07-12 08:18:15 -0700 | [diff] [blame] | 150 | static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) |
| 151 | { |
| 152 | int l = __raw_readl(base + reg); |
| 153 | |
| 154 | if (set) |
| 155 | l |= mask; |
| 156 | else |
| 157 | l &= ~mask; |
| 158 | |
| 159 | __raw_writel(l, base + reg); |
| 160 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 161 | |
Tarun Kanti DebBarma | 72f83af | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 162 | static inline void _gpio_dbck_enable(struct gpio_bank *bank) |
| 163 | { |
| 164 | if (bank->dbck_enable_mask && !bank->dbck_enabled) { |
| 165 | clk_enable(bank->dbck); |
| 166 | bank->dbck_enabled = true; |
| 167 | } |
| 168 | } |
| 169 | |
| 170 | static inline void _gpio_dbck_disable(struct gpio_bank *bank) |
| 171 | { |
| 172 | if (bank->dbck_enable_mask && bank->dbck_enabled) { |
| 173 | clk_disable(bank->dbck); |
| 174 | bank->dbck_enabled = false; |
| 175 | } |
| 176 | } |
| 177 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 178 | /** |
| 179 | * _set_gpio_debounce - low level gpio debounce time |
| 180 | * @bank: the gpio bank we're acting upon |
| 181 | * @gpio: the gpio number on this @gpio |
| 182 | * @debounce: debounce time to use |
| 183 | * |
| 184 | * OMAP's debounce time is in 31us steps so we need |
| 185 | * to convert and round up to the closest unit. |
| 186 | */ |
| 187 | static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, |
| 188 | unsigned debounce) |
| 189 | { |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 190 | void __iomem *reg; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 191 | u32 val; |
| 192 | u32 l; |
| 193 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 194 | if (!bank->dbck_flag) |
| 195 | return; |
| 196 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 197 | if (debounce < 32) |
| 198 | debounce = 0x01; |
| 199 | else if (debounce > 7936) |
| 200 | debounce = 0xff; |
| 201 | else |
| 202 | debounce = (debounce / 0x1f) - 1; |
| 203 | |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 204 | l = GPIO_BIT(bank, gpio); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 205 | |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame^] | 206 | clk_enable(bank->dbck); |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 207 | reg = bank->base + bank->regs->debounce; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 208 | __raw_writel(debounce, reg); |
| 209 | |
Kevin Hilman | 9942da0 | 2011-04-22 12:02:05 -0700 | [diff] [blame] | 210 | reg = bank->base + bank->regs->debounce_en; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 211 | val = __raw_readl(reg); |
| 212 | |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame^] | 213 | if (debounce) |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 214 | val |= l; |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame^] | 215 | else |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 216 | val &= ~l; |
Kevin Hilman | f7ec0b0 | 2010-06-09 13:53:07 +0300 | [diff] [blame] | 217 | bank->dbck_enable_mask = val; |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 218 | |
| 219 | __raw_writel(val, reg); |
Tarun Kanti DebBarma | 6fd9c42 | 2011-11-24 03:58:54 +0530 | [diff] [blame^] | 220 | clk_disable(bank->dbck); |
| 221 | /* |
| 222 | * Enable debounce clock per module. |
| 223 | * This call is mandatory because in omap_gpio_request() when |
| 224 | * *_runtime_get_sync() is called, _gpio_dbck_enable() within |
| 225 | * runtime callbck fails to turn on dbck because dbck_enable_mask |
| 226 | * used within _gpio_dbck_enable() is still not initialized at |
| 227 | * that point. Therefore we have to enable dbck here. |
| 228 | */ |
| 229 | _gpio_dbck_enable(bank); |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 230 | } |
| 231 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 232 | static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio, |
Kevin Hilman | 5eb3bb9 | 2007-05-05 11:40:29 -0700 | [diff] [blame] | 233 | int trigger) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 234 | { |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 235 | void __iomem *base = bank->base; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 236 | u32 gpio_bit = 1 << gpio; |
| 237 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 238 | _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, |
| 239 | trigger & IRQ_TYPE_LEVEL_LOW); |
| 240 | _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, |
| 241 | trigger & IRQ_TYPE_LEVEL_HIGH); |
| 242 | _gpio_rmw(base, bank->regs->risingdetect, gpio_bit, |
| 243 | trigger & IRQ_TYPE_EDGE_RISING); |
| 244 | _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, |
| 245 | trigger & IRQ_TYPE_EDGE_FALLING); |
| 246 | |
| 247 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) |
| 248 | _gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); |
| 249 | |
Ambresh K | 55b220c | 2011-06-15 13:40:45 -0700 | [diff] [blame] | 250 | /* This part needs to be executed always for OMAP{34xx, 44xx} */ |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 251 | if (!bank->regs->irqctrl) { |
| 252 | /* On omap24xx proceed only when valid GPIO bit is set */ |
| 253 | if (bank->non_wakeup_gpios) { |
| 254 | if (!(bank->non_wakeup_gpios & gpio_bit)) |
| 255 | goto exit; |
| 256 | } |
| 257 | |
Chunqiu Wang | 699117a | 2009-06-24 17:13:39 +0000 | [diff] [blame] | 258 | /* |
| 259 | * Log the edge gpio and manually trigger the IRQ |
| 260 | * after resume if the input level changes |
| 261 | * to avoid irq lost during PER RET/OFF mode |
| 262 | * Applies for omap2 non-wakeup gpio and all omap3 gpios |
| 263 | */ |
| 264 | if (trigger & IRQ_TYPE_EDGE_BOTH) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 265 | bank->enabled_non_wakeup_gpios |= gpio_bit; |
| 266 | else |
| 267 | bank->enabled_non_wakeup_gpios &= ~gpio_bit; |
| 268 | } |
Kevin Hilman | 5eb3bb9 | 2007-05-05 11:40:29 -0700 | [diff] [blame] | 269 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 270 | exit: |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 271 | bank->level_mask = |
| 272 | __raw_readl(bank->base + bank->regs->leveldetect0) | |
| 273 | __raw_readl(bank->base + bank->regs->leveldetect1); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 274 | } |
| 275 | |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 276 | #ifdef CONFIG_ARCH_OMAP1 |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 277 | /* |
| 278 | * This only applies to chips that can't do both rising and falling edge |
| 279 | * detection at once. For all other chips, this function is a noop. |
| 280 | */ |
| 281 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) |
| 282 | { |
| 283 | void __iomem *reg = bank->base; |
| 284 | u32 l = 0; |
| 285 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 286 | if (!bank->regs->irqctrl) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 287 | return; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 288 | |
| 289 | reg += bank->regs->irqctrl; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 290 | |
| 291 | l = __raw_readl(reg); |
| 292 | if ((l >> gpio) & 1) |
| 293 | l &= ~(1 << gpio); |
| 294 | else |
| 295 | l |= 1 << gpio; |
| 296 | |
| 297 | __raw_writel(l, reg); |
| 298 | } |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 299 | #else |
| 300 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} |
Uwe Kleine-König | 9198bcd | 2010-01-29 14:20:05 -0800 | [diff] [blame] | 301 | #endif |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 302 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 303 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) |
| 304 | { |
| 305 | void __iomem *reg = bank->base; |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 306 | void __iomem *base = bank->base; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 307 | u32 l = 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 308 | |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 309 | if (bank->regs->leveldetect0 && bank->regs->wkup_en) { |
| 310 | set_gpio_trigger(bank, gpio, trigger); |
| 311 | } else if (bank->regs->irqctrl) { |
| 312 | reg += bank->regs->irqctrl; |
| 313 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 314 | l = __raw_readl(reg); |
Janusz Krzysztofik | 2950157 | 2010-04-05 11:38:06 +0000 | [diff] [blame] | 315 | if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 316 | bank->toggle_mask |= 1 << gpio; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 317 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 318 | l |= 1 << gpio; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 319 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 320 | l &= ~(1 << gpio); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 321 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 322 | return -EINVAL; |
| 323 | |
| 324 | __raw_writel(l, reg); |
| 325 | } else if (bank->regs->edgectrl1) { |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 326 | if (gpio & 0x08) |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 327 | reg += bank->regs->edgectrl2; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 328 | else |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 329 | reg += bank->regs->edgectrl1; |
| 330 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 331 | gpio &= 0x07; |
| 332 | l = __raw_readl(reg); |
| 333 | l &= ~(3 << (gpio << 1)); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 334 | if (trigger & IRQ_TYPE_EDGE_RISING) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 335 | l |= 2 << (gpio << 1); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 336 | if (trigger & IRQ_TYPE_EDGE_FALLING) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 337 | l |= 1 << (gpio << 1); |
Tarun Kanti DebBarma | 5e571f3 | 2011-09-13 15:02:14 +0530 | [diff] [blame] | 338 | |
| 339 | /* Enable wake-up during idle for dynamic tick */ |
| 340 | _gpio_rmw(base, bank->regs->wkup_en, 1 << gpio, trigger); |
| 341 | __raw_writel(l, reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 342 | } |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 343 | return 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 344 | } |
| 345 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 346 | static int gpio_irq_type(struct irq_data *d, unsigned type) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 347 | { |
| 348 | struct gpio_bank *bank; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 349 | unsigned gpio; |
| 350 | int retval; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 351 | unsigned long flags; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 352 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 353 | if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE) |
| 354 | gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 355 | else |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 356 | gpio = d->irq - IH_GPIO_BASE; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 357 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 358 | if (type & ~IRQ_TYPE_SENSE_MASK) |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 359 | return -EINVAL; |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 360 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 361 | bank = irq_data_get_irq_chip_data(d); |
| 362 | |
| 363 | if (!bank->regs->leveldetect0 && |
| 364 | (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 365 | return -EINVAL; |
| 366 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 367 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 368 | retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 369 | spin_unlock_irqrestore(&bank->lock, flags); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 370 | |
| 371 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 372 | __irq_set_handler_locked(d->irq, handle_level_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 373 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 374 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
Kevin Hilman | 672e302 | 2008-01-16 21:56:16 -0800 | [diff] [blame] | 375 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 376 | return retval; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 377 | } |
| 378 | |
| 379 | static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
| 380 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 381 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 382 | |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 383 | reg += bank->regs->irqstatus; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 384 | __raw_writel(gpio_mask, reg); |
Hiroshi DOYU | bee7930 | 2006-09-25 12:41:46 +0300 | [diff] [blame] | 385 | |
| 386 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 387 | if (bank->regs->irqstatus2) { |
| 388 | reg = bank->base + bank->regs->irqstatus2; |
Roger Quadros | bedfd15 | 2009-04-23 11:10:50 -0700 | [diff] [blame] | 389 | __raw_writel(gpio_mask, reg); |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 390 | } |
Roger Quadros | bedfd15 | 2009-04-23 11:10:50 -0700 | [diff] [blame] | 391 | |
| 392 | /* Flush posted write for the irq status to avoid spurious interrupts */ |
| 393 | __raw_readl(reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 394 | } |
| 395 | |
| 396 | static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) |
| 397 | { |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 398 | _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 399 | } |
| 400 | |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 401 | static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) |
| 402 | { |
| 403 | void __iomem *reg = bank->base; |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 404 | u32 l; |
Kevin Hilman | c390aad | 2011-04-21 09:33:36 -0700 | [diff] [blame] | 405 | u32 mask = (1 << bank->width) - 1; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 406 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 407 | reg += bank->regs->irqenable; |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 408 | l = __raw_readl(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 409 | if (bank->regs->irqenable_inv) |
Imre Deak | 99c4770 | 2006-06-26 16:16:07 -0700 | [diff] [blame] | 410 | l = ~l; |
| 411 | l &= mask; |
| 412 | return l; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 413 | } |
| 414 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 415 | static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 416 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 417 | void __iomem *reg = bank->base; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 418 | u32 l; |
| 419 | |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 420 | if (bank->regs->set_irqenable) { |
| 421 | reg += bank->regs->set_irqenable; |
| 422 | l = gpio_mask; |
| 423 | } else { |
| 424 | reg += bank->regs->irqenable; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 425 | l = __raw_readl(reg); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 426 | if (bank->regs->irqenable_inv) |
| 427 | l &= ~gpio_mask; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 428 | else |
| 429 | l |= gpio_mask; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 430 | } |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 431 | |
| 432 | __raw_writel(l, reg); |
| 433 | } |
| 434 | |
| 435 | static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) |
| 436 | { |
| 437 | void __iomem *reg = bank->base; |
| 438 | u32 l; |
| 439 | |
| 440 | if (bank->regs->clr_irqenable) { |
| 441 | reg += bank->regs->clr_irqenable; |
| 442 | l = gpio_mask; |
| 443 | } else { |
| 444 | reg += bank->regs->irqenable; |
| 445 | l = __raw_readl(reg); |
| 446 | if (bank->regs->irqenable_inv) |
| 447 | l |= gpio_mask; |
| 448 | else |
| 449 | l &= ~gpio_mask; |
| 450 | } |
| 451 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 452 | __raw_writel(l, reg); |
| 453 | } |
| 454 | |
| 455 | static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable) |
| 456 | { |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 457 | _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio)); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 458 | } |
| 459 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 460 | /* |
| 461 | * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register. |
| 462 | * 1510 does not seem to have a wake-up register. If JTAG is connected |
| 463 | * to the target, system will wake up always on GPIO events. While |
| 464 | * system is running all registered GPIO interrupts need to have wake-up |
| 465 | * enabled. When system is suspended, only selected GPIO interrupts need |
| 466 | * to have wake-up enabled. |
| 467 | */ |
| 468 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) |
| 469 | { |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 470 | u32 gpio_bit = GPIO_BIT(bank, gpio); |
| 471 | unsigned long flags; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 472 | |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 473 | if (bank->non_wakeup_gpios & gpio_bit) { |
| 474 | dev_err(bank->dev, |
| 475 | "Unable to modify wakeup on non-wakeup GPIO%d\n", gpio); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 476 | return -EINVAL; |
| 477 | } |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 478 | |
| 479 | spin_lock_irqsave(&bank->lock, flags); |
| 480 | if (enable) |
| 481 | bank->suspend_wakeup |= gpio_bit; |
| 482 | else |
| 483 | bank->suspend_wakeup &= ~gpio_bit; |
| 484 | |
| 485 | spin_unlock_irqrestore(&bank->lock, flags); |
| 486 | |
| 487 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 488 | } |
| 489 | |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 490 | static void _reset_gpio(struct gpio_bank *bank, int gpio) |
| 491 | { |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 492 | _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 493 | _set_gpio_irqenable(bank, gpio, 0); |
| 494 | _clear_gpio_irqstatus(bank, gpio); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 495 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 496 | } |
| 497 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 498 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 499 | static int gpio_wake_enable(struct irq_data *d, unsigned int enable) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 500 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 501 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 502 | struct gpio_bank *bank; |
| 503 | int retval; |
| 504 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 505 | bank = irq_data_get_irq_chip_data(d); |
Kevin Hilman | f64ad1a | 2011-04-22 09:45:27 -0700 | [diff] [blame] | 506 | retval = _set_gpio_wakeup(bank, gpio, enable); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 507 | |
| 508 | return retval; |
| 509 | } |
| 510 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 511 | static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 512 | { |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 513 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 514 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 515 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 516 | /* |
| 517 | * If this is the first gpio_request for the bank, |
| 518 | * enable the bank module. |
| 519 | */ |
| 520 | if (!bank->mod_usage) |
| 521 | pm_runtime_get_sync(bank->dev); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 522 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 523 | spin_lock_irqsave(&bank->lock, flags); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 524 | /* Set trigger to none. You need to enable the desired trigger with |
| 525 | * request_irq() or set_irq_type(). |
| 526 | */ |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 527 | _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 528 | |
Charulatha V | fad96ea | 2011-05-25 11:23:50 +0530 | [diff] [blame] | 529 | if (bank->regs->pinctrl) { |
| 530 | void __iomem *reg = bank->base + bank->regs->pinctrl; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 531 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 532 | /* Claim the pin for MPU */ |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 533 | __raw_writel(__raw_readl(reg) | (1 << offset), reg); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 534 | } |
Charulatha V | fad96ea | 2011-05-25 11:23:50 +0530 | [diff] [blame] | 535 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 536 | if (bank->regs->ctrl && !bank->mod_usage) { |
| 537 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 538 | u32 ctrl; |
Charulatha V | 9f09686 | 2010-05-14 12:05:27 -0700 | [diff] [blame] | 539 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 540 | ctrl = __raw_readl(reg); |
| 541 | /* Module is enabled, clocks are not gated */ |
| 542 | ctrl &= ~GPIO_MOD_CTRL_BIT; |
| 543 | __raw_writel(ctrl, reg); |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 544 | } |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 545 | |
| 546 | bank->mod_usage |= 1 << offset; |
| 547 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 548 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 549 | |
| 550 | return 0; |
| 551 | } |
| 552 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 553 | static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 554 | { |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 555 | struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 556 | void __iomem *base = bank->base; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 557 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 558 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 559 | spin_lock_irqsave(&bank->lock, flags); |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 560 | |
| 561 | if (bank->regs->wkup_en) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 562 | /* Disable wake-up during idle for dynamic tick */ |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 563 | _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0); |
| 564 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 565 | bank->mod_usage &= ~(1 << offset); |
Charulatha V | 9f09686 | 2010-05-14 12:05:27 -0700 | [diff] [blame] | 566 | |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 567 | if (bank->regs->ctrl && !bank->mod_usage) { |
| 568 | void __iomem *reg = bank->base + bank->regs->ctrl; |
| 569 | u32 ctrl; |
| 570 | |
| 571 | ctrl = __raw_readl(reg); |
| 572 | /* Module is disabled, clocks are gated */ |
| 573 | ctrl |= GPIO_MOD_CTRL_BIT; |
| 574 | __raw_writel(ctrl, reg); |
Charulatha V | 058af1e | 2009-11-22 10:11:25 -0800 | [diff] [blame] | 575 | } |
Charulatha V | c8eef65 | 2011-05-02 15:21:42 +0530 | [diff] [blame] | 576 | |
Jarkko Nikula | 3ff164e | 2008-12-10 17:35:27 -0800 | [diff] [blame] | 577 | _reset_gpio(bank, bank->chip.base + offset); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 578 | spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 579 | |
| 580 | /* |
| 581 | * If this is the last gpio to be freed in the bank, |
| 582 | * disable the bank module. |
| 583 | */ |
| 584 | if (!bank->mod_usage) |
| 585 | pm_runtime_put(bank->dev); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 586 | } |
| 587 | |
| 588 | /* |
| 589 | * We need to unmask the GPIO bank interrupt as soon as possible to |
| 590 | * avoid missing GPIO interrupts for other lines in the bank. |
| 591 | * Then we need to mask-read-clear-unmask the triggered GPIO lines |
| 592 | * in the bank to avoid missing nested interrupts for a GPIO line. |
| 593 | * If we wait to unmask individual GPIO lines in the bank after the |
| 594 | * line's interrupt handler has been run, we may miss some nested |
| 595 | * interrupts. |
| 596 | */ |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 597 | static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 598 | { |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 599 | void __iomem *isr_reg = NULL; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 600 | u32 isr; |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 601 | unsigned int gpio_irq, gpio_index; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 602 | struct gpio_bank *bank; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 603 | u32 retrigger = 0; |
| 604 | int unmasked = 0; |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 605 | struct irq_chip *chip = irq_desc_get_chip(desc); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 606 | |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 607 | chained_irq_enter(chip, desc); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 608 | |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 609 | bank = irq_get_handler_data(irq); |
Kevin Hilman | eef4bec | 2011-04-21 09:17:35 -0700 | [diff] [blame] | 610 | isr_reg = bank->base + bank->regs->irqstatus; |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 611 | pm_runtime_get_sync(bank->dev); |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 612 | |
| 613 | if (WARN_ON(!isr_reg)) |
| 614 | goto exit; |
| 615 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 616 | while(1) { |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 617 | u32 isr_saved, level_mask = 0; |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 618 | u32 enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 619 | |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 620 | enabled = _get_gpio_irqbank_mask(bank); |
| 621 | isr_saved = isr = __raw_readl(isr_reg) & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 622 | |
Tarun Kanti DebBarma | 9ea14d8 | 2011-08-30 15:05:44 +0530 | [diff] [blame] | 623 | if (bank->level_mask) |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 624 | level_mask = bank->level_mask & enabled; |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 625 | |
| 626 | /* clear edge sensitive interrupts before handler(s) are |
| 627 | called so that we don't miss any interrupt occurred while |
| 628 | executing them */ |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 629 | _disable_gpio_irqbank(bank, isr_saved & ~level_mask); |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 630 | _clear_gpio_irqbank(bank, isr_saved & ~level_mask); |
Kevin Hilman | 28f3b5a | 2011-04-21 09:53:06 -0700 | [diff] [blame] | 631 | _enable_gpio_irqbank(bank, isr_saved & ~level_mask); |
Tony Lindgren | 6e60e79 | 2006-04-02 17:46:23 +0100 | [diff] [blame] | 632 | |
| 633 | /* if there is only edge sensitive GPIO pin interrupts |
| 634 | configured, we could unmask GPIO bank interrupt immediately */ |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 635 | if (!level_mask && !unmasked) { |
| 636 | unmasked = 1; |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 637 | chained_irq_exit(chip, desc); |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 638 | } |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 639 | |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 640 | isr |= retrigger; |
| 641 | retrigger = 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 642 | if (!isr) |
| 643 | break; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 644 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 645 | gpio_irq = bank->virtual_irq_start; |
| 646 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 647 | gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq)); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 648 | |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 649 | if (!(isr & 1)) |
| 650 | continue; |
Thomas Gleixner | 29454dd | 2006-07-03 02:22:22 +0200 | [diff] [blame] | 651 | |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 652 | /* |
| 653 | * Some chips can't respond to both rising and falling |
| 654 | * at the same time. If this irq was requested with |
| 655 | * both flags, we need to flip the ICR data for the IRQ |
| 656 | * to respond to the IRQ for the opposite direction. |
| 657 | * This will be indicated in the bank toggle_mask. |
| 658 | */ |
| 659 | if (bank->toggle_mask & (1 << gpio_index)) |
| 660 | _toggle_gpio_edge_triggering(bank, gpio_index); |
Cory Maccarrone | 4318f36 | 2010-01-08 10:29:04 -0800 | [diff] [blame] | 661 | |
Dmitry Baryshkov | d8aa025 | 2008-10-09 13:36:24 +0100 | [diff] [blame] | 662 | generic_handle_irq(gpio_irq); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 663 | } |
Tony Lindgren | 1a8bfa1 | 2005-11-10 14:26:50 +0000 | [diff] [blame] | 664 | } |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 665 | /* if bank has any level sensitive GPIO pin interrupt |
| 666 | configured, we must unmask the bank interrupt only after |
| 667 | handler(s) are executed in order to avoid spurious bank |
| 668 | interrupt */ |
Evgeny Kuznetsov | b1cc4c5 | 2010-12-07 16:25:40 -0800 | [diff] [blame] | 669 | exit: |
Imre Deak | ea6dedd | 2006-06-26 16:16:00 -0700 | [diff] [blame] | 670 | if (!unmasked) |
Will Deacon | ee14418 | 2011-02-21 13:46:08 +0000 | [diff] [blame] | 671 | chained_irq_exit(chip, desc); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 672 | pm_runtime_put(bank->dev); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 673 | } |
| 674 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 675 | static void gpio_irq_shutdown(struct irq_data *d) |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 676 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 677 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
| 678 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 679 | unsigned long flags; |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 680 | |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 681 | spin_lock_irqsave(&bank->lock, flags); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 682 | _reset_gpio(bank, gpio); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 683 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 4196dd6 | 2006-09-25 12:41:38 +0300 | [diff] [blame] | 684 | } |
| 685 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 686 | static void gpio_ack_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 687 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 688 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
| 689 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 690 | |
| 691 | _clear_gpio_irqstatus(bank, gpio); |
| 692 | } |
| 693 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 694 | static void gpio_mask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 695 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 696 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
| 697 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 698 | unsigned long flags; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 699 | |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 700 | spin_lock_irqsave(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 701 | _set_gpio_irqenable(bank, gpio, 0); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 702 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 703 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 704 | } |
| 705 | |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 706 | static void gpio_unmask_irq(struct irq_data *d) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 707 | { |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 708 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
| 709 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 710 | unsigned int irq_mask = GPIO_BIT(bank, gpio); |
Thomas Gleixner | 8c04a17 | 2011-03-24 12:40:15 +0100 | [diff] [blame] | 711 | u32 trigger = irqd_get_trigger_type(d); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 712 | unsigned long flags; |
Kevin Hilman | 55b6019 | 2009-06-04 15:57:10 -0700 | [diff] [blame] | 713 | |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 714 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | 55b6019 | 2009-06-04 15:57:10 -0700 | [diff] [blame] | 715 | if (trigger) |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 716 | _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger); |
Kevin Hilman | b144ff6 | 2008-01-16 21:56:15 -0800 | [diff] [blame] | 717 | |
| 718 | /* For level-triggered GPIOs, the clearing must be done after |
| 719 | * the HW source is cleared, thus after the handler has run */ |
| 720 | if (bank->level_mask & irq_mask) { |
| 721 | _set_gpio_irqenable(bank, gpio, 0); |
| 722 | _clear_gpio_irqstatus(bank, gpio); |
| 723 | } |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 724 | |
Kevin Hilman | 4de8c75 | 2008-01-16 21:56:14 -0800 | [diff] [blame] | 725 | _set_gpio_irqenable(bank, gpio, 1); |
Colin Cross | 85ec7b9 | 2011-06-06 13:38:18 -0700 | [diff] [blame] | 726 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 727 | } |
| 728 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 729 | static struct irq_chip gpio_irq_chip = { |
| 730 | .name = "GPIO", |
Lennert Buytenhek | e919102 | 2010-11-29 11:17:17 +0100 | [diff] [blame] | 731 | .irq_shutdown = gpio_irq_shutdown, |
| 732 | .irq_ack = gpio_ack_irq, |
| 733 | .irq_mask = gpio_mask_irq, |
| 734 | .irq_unmask = gpio_unmask_irq, |
| 735 | .irq_set_type = gpio_irq_type, |
| 736 | .irq_set_wake = gpio_wake_enable, |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 737 | }; |
| 738 | |
| 739 | /*---------------------------------------------------------------------*/ |
| 740 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 741 | static int omap_mpuio_suspend_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 742 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 743 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 744 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 745 | void __iomem *mask_reg = bank->base + |
| 746 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 747 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 748 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 749 | spin_lock_irqsave(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 750 | bank->saved_wakeup = __raw_readl(mask_reg); |
| 751 | __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 752 | spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 753 | |
| 754 | return 0; |
| 755 | } |
| 756 | |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 757 | static int omap_mpuio_resume_noirq(struct device *dev) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 758 | { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 759 | struct platform_device *pdev = to_platform_device(dev); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 760 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 761 | void __iomem *mask_reg = bank->base + |
| 762 | OMAP_MPUIO_GPIO_MASKIT / bank->stride; |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 763 | unsigned long flags; |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 764 | |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 765 | spin_lock_irqsave(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 766 | __raw_writel(bank->saved_wakeup, mask_reg); |
David Brownell | a647253 | 2008-03-03 04:33:30 -0800 | [diff] [blame] | 767 | spin_unlock_irqrestore(&bank->lock, flags); |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 768 | |
| 769 | return 0; |
| 770 | } |
| 771 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 772 | static const struct dev_pm_ops omap_mpuio_dev_pm_ops = { |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 773 | .suspend_noirq = omap_mpuio_suspend_noirq, |
| 774 | .resume_noirq = omap_mpuio_resume_noirq, |
| 775 | }; |
| 776 | |
Rafael J. Wysocki | 3c437ff | 2011-04-22 22:02:46 +0200 | [diff] [blame] | 777 | /* use platform_driver for this. */ |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 778 | static struct platform_driver omap_mpuio_driver = { |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 779 | .driver = { |
| 780 | .name = "mpuio", |
Magnus Damm | 79ee031 | 2009-07-08 13:22:04 +0200 | [diff] [blame] | 781 | .pm = &omap_mpuio_dev_pm_ops, |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 782 | }, |
| 783 | }; |
| 784 | |
| 785 | static struct platform_device omap_mpuio_device = { |
| 786 | .name = "mpuio", |
| 787 | .id = -1, |
| 788 | .dev = { |
| 789 | .driver = &omap_mpuio_driver.driver, |
| 790 | } |
| 791 | /* could list the /proc/iomem resources */ |
| 792 | }; |
| 793 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 794 | static inline void mpuio_init(struct gpio_bank *bank) |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 795 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 796 | platform_set_drvdata(&omap_mpuio_device, bank); |
David Brownell | fcf126d | 2007-04-02 12:46:47 -0700 | [diff] [blame] | 797 | |
David Brownell | 11a78b7 | 2006-12-06 17:14:11 -0800 | [diff] [blame] | 798 | if (platform_driver_register(&omap_mpuio_driver) == 0) |
| 799 | (void) platform_device_register(&omap_mpuio_device); |
| 800 | } |
| 801 | |
David Brownell | e5c56ed | 2006-12-06 17:13:59 -0800 | [diff] [blame] | 802 | /*---------------------------------------------------------------------*/ |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 803 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 804 | static int gpio_input(struct gpio_chip *chip, unsigned offset) |
| 805 | { |
| 806 | struct gpio_bank *bank; |
| 807 | unsigned long flags; |
| 808 | |
| 809 | bank = container_of(chip, struct gpio_bank, chip); |
| 810 | spin_lock_irqsave(&bank->lock, flags); |
| 811 | _set_gpio_direction(bank, offset, 1); |
| 812 | spin_unlock_irqrestore(&bank->lock, flags); |
| 813 | return 0; |
| 814 | } |
| 815 | |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 816 | static int gpio_is_input(struct gpio_bank *bank, int mask) |
| 817 | { |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 818 | void __iomem *reg = bank->base + bank->regs->direction; |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 819 | |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 820 | return __raw_readl(reg) & mask; |
| 821 | } |
| 822 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 823 | static int gpio_get(struct gpio_chip *chip, unsigned offset) |
| 824 | { |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 825 | struct gpio_bank *bank; |
| 826 | void __iomem *reg; |
| 827 | int gpio; |
| 828 | u32 mask; |
| 829 | |
| 830 | gpio = chip->base + offset; |
Charulatha V | a8be8da | 2011-04-22 16:38:16 +0530 | [diff] [blame] | 831 | bank = container_of(chip, struct gpio_bank, chip); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 832 | reg = bank->base; |
Kevin Hilman | 129fd22 | 2011-04-22 07:59:07 -0700 | [diff] [blame] | 833 | mask = GPIO_BIT(bank, gpio); |
Roger Quadros | b37c45b | 2009-08-05 16:53:24 +0300 | [diff] [blame] | 834 | |
| 835 | if (gpio_is_input(bank, mask)) |
| 836 | return _get_gpio_datain(bank, gpio); |
| 837 | else |
| 838 | return _get_gpio_dataout(bank, gpio); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 839 | } |
| 840 | |
| 841 | static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) |
| 842 | { |
| 843 | struct gpio_bank *bank; |
| 844 | unsigned long flags; |
| 845 | |
| 846 | bank = container_of(chip, struct gpio_bank, chip); |
| 847 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 848 | bank->set_dataout(bank, offset, value); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 849 | _set_gpio_direction(bank, offset, 0); |
| 850 | spin_unlock_irqrestore(&bank->lock, flags); |
| 851 | return 0; |
| 852 | } |
| 853 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 854 | static int gpio_debounce(struct gpio_chip *chip, unsigned offset, |
| 855 | unsigned debounce) |
| 856 | { |
| 857 | struct gpio_bank *bank; |
| 858 | unsigned long flags; |
| 859 | |
| 860 | bank = container_of(chip, struct gpio_bank, chip); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 861 | |
| 862 | if (!bank->dbck) { |
| 863 | bank->dbck = clk_get(bank->dev, "dbclk"); |
| 864 | if (IS_ERR(bank->dbck)) |
| 865 | dev_err(bank->dev, "Could not get gpio dbck\n"); |
| 866 | } |
| 867 | |
Felipe Balbi | 168ef3d | 2010-05-26 14:42:23 -0700 | [diff] [blame] | 868 | spin_lock_irqsave(&bank->lock, flags); |
| 869 | _set_gpio_debounce(bank, offset, debounce); |
| 870 | spin_unlock_irqrestore(&bank->lock, flags); |
| 871 | |
| 872 | return 0; |
| 873 | } |
| 874 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 875 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 876 | { |
| 877 | struct gpio_bank *bank; |
| 878 | unsigned long flags; |
| 879 | |
| 880 | bank = container_of(chip, struct gpio_bank, chip); |
| 881 | spin_lock_irqsave(&bank->lock, flags); |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 882 | bank->set_dataout(bank, offset, value); |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 883 | spin_unlock_irqrestore(&bank->lock, flags); |
| 884 | } |
| 885 | |
David Brownell | a007b70 | 2008-12-10 17:35:25 -0800 | [diff] [blame] | 886 | static int gpio_2irq(struct gpio_chip *chip, unsigned offset) |
| 887 | { |
| 888 | struct gpio_bank *bank; |
| 889 | |
| 890 | bank = container_of(chip, struct gpio_bank, chip); |
| 891 | return bank->virtual_irq_start + offset; |
| 892 | } |
| 893 | |
David Brownell | 52e3134 | 2008-03-03 12:43:23 -0800 | [diff] [blame] | 894 | /*---------------------------------------------------------------------*/ |
| 895 | |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 896 | static void __init omap_gpio_show_rev(struct gpio_bank *bank) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 897 | { |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 898 | static bool called; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 899 | u32 rev; |
| 900 | |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 901 | if (called || bank->regs->revision == USHRT_MAX) |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 902 | return; |
| 903 | |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 904 | rev = __raw_readw(bank->base + bank->regs->revision); |
| 905 | pr_info("OMAP GPIO hardware version %d.%d\n", |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 906 | (rev >> 4) & 0x0f, rev & 0x0f); |
Kevin Hilman | e5ff444 | 2011-04-22 14:37:16 -0700 | [diff] [blame] | 907 | |
| 908 | called = true; |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 909 | } |
| 910 | |
David Brownell | 8ba55c5 | 2008-02-26 11:10:50 -0800 | [diff] [blame] | 911 | /* This lock class tells lockdep that GPIO irqs are in a different |
| 912 | * category than their parents, so it won't report false recursion. |
| 913 | */ |
| 914 | static struct lock_class_key gpio_lock_class; |
| 915 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 916 | static void omap_gpio_mod_init(struct gpio_bank *bank) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 917 | { |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 918 | void __iomem *base = bank->base; |
| 919 | u32 l = 0xffffffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 920 | |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 921 | if (bank->width == 16) |
| 922 | l = 0xffff; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 923 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 924 | if (bank->is_mpuio) { |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 925 | __raw_writel(l, bank->base + bank->regs->irqenable); |
| 926 | return; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 927 | } |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 928 | |
| 929 | _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv); |
| 930 | _gpio_rmw(base, bank->regs->irqstatus, l, |
| 931 | bank->regs->irqenable_inv == false); |
| 932 | _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->debounce_en != 0); |
| 933 | _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->ctrl != 0); |
| 934 | if (bank->regs->debounce_en) |
| 935 | _gpio_rmw(base, bank->regs->debounce_en, 0, 1); |
| 936 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 937 | /* Save OE default value (0xffffffff) in the context */ |
| 938 | bank->context.oe = __raw_readl(bank->base + bank->regs->direction); |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 939 | /* Initialize interface clk ungated, module enabled */ |
| 940 | if (bank->regs->ctrl) |
| 941 | _gpio_rmw(base, bank->regs->ctrl, 0, 1); |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 942 | } |
| 943 | |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 944 | static __init void |
| 945 | omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start, |
| 946 | unsigned int num) |
| 947 | { |
| 948 | struct irq_chip_generic *gc; |
| 949 | struct irq_chip_type *ct; |
| 950 | |
| 951 | gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base, |
| 952 | handle_simple_irq); |
Todd Poynor | 8323374 | 2011-07-18 07:43:14 -0700 | [diff] [blame] | 953 | if (!gc) { |
| 954 | dev_err(bank->dev, "Memory alloc failed for gc\n"); |
| 955 | return; |
| 956 | } |
| 957 | |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 958 | ct = gc->chip_types; |
| 959 | |
| 960 | /* NOTE: No ack required, reading IRQ status clears it. */ |
| 961 | ct->chip.irq_mask = irq_gc_mask_set_bit; |
| 962 | ct->chip.irq_unmask = irq_gc_mask_clr_bit; |
| 963 | ct->chip.irq_set_type = gpio_irq_type; |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 964 | |
| 965 | if (bank->regs->wkup_en) |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 966 | ct->chip.irq_set_wake = gpio_wake_enable, |
| 967 | |
| 968 | ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride; |
| 969 | irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, |
| 970 | IRQ_NOREQUEST | IRQ_NOPROBE, 0); |
| 971 | } |
| 972 | |
Russell King | d52b31d | 2011-05-27 13:56:12 -0700 | [diff] [blame] | 973 | static void __devinit omap_gpio_chip_init(struct gpio_bank *bank) |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 974 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 975 | int j; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 976 | static int gpio; |
| 977 | |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 978 | /* |
| 979 | * REVISIT eventually switch from OMAP-specific gpio structs |
| 980 | * over to the generic ones |
| 981 | */ |
| 982 | bank->chip.request = omap_gpio_request; |
| 983 | bank->chip.free = omap_gpio_free; |
| 984 | bank->chip.direction_input = gpio_input; |
| 985 | bank->chip.get = gpio_get; |
| 986 | bank->chip.direction_output = gpio_output; |
| 987 | bank->chip.set_debounce = gpio_debounce; |
| 988 | bank->chip.set = gpio_set; |
| 989 | bank->chip.to_irq = gpio_2irq; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 990 | if (bank->is_mpuio) { |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 991 | bank->chip.label = "mpuio"; |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 992 | if (bank->regs->wkup_en) |
| 993 | bank->chip.dev = &omap_mpuio_device.dev; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 994 | bank->chip.base = OMAP_MPUIO(0); |
| 995 | } else { |
| 996 | bank->chip.label = "gpio"; |
| 997 | bank->chip.base = gpio; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 998 | gpio += bank->width; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 999 | } |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1000 | bank->chip.ngpio = bank->width; |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1001 | |
| 1002 | gpiochip_add(&bank->chip); |
| 1003 | |
| 1004 | for (j = bank->virtual_irq_start; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1005 | j < bank->virtual_irq_start + bank->width; j++) { |
Thomas Gleixner | 1475b85 | 2011-03-22 17:11:09 +0100 | [diff] [blame] | 1006 | irq_set_lockdep_class(j, &gpio_lock_class); |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 1007 | irq_set_chip_data(j, bank); |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1008 | if (bank->is_mpuio) { |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 1009 | omap_mpuio_alloc_gc(bank, j, bank->width); |
| 1010 | } else { |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 1011 | irq_set_chip(j, &gpio_irq_chip); |
Kevin Hilman | f8b46b5 | 2011-04-21 13:23:34 -0700 | [diff] [blame] | 1012 | irq_set_handler(j, handle_simple_irq); |
| 1013 | set_irq_flags(j, IRQF_VALID); |
| 1014 | } |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1015 | } |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 1016 | irq_set_chained_handler(bank->irq, gpio_irq_handler); |
| 1017 | irq_set_handler_data(bank->irq, bank); |
Varadarajan, Charulatha | 2fae7fb | 2010-12-07 16:26:55 -0800 | [diff] [blame] | 1018 | } |
| 1019 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1020 | static int __devinit omap_gpio_probe(struct platform_device *pdev) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1021 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1022 | struct omap_gpio_platform_data *pdata; |
| 1023 | struct resource *res; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1024 | struct gpio_bank *bank; |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1025 | int ret = 0; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1026 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1027 | if (!pdev->dev.platform_data) { |
| 1028 | ret = -EINVAL; |
| 1029 | goto err_exit; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1030 | } |
| 1031 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1032 | bank = kzalloc(sizeof(struct gpio_bank), GFP_KERNEL); |
| 1033 | if (!bank) { |
| 1034 | dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n"); |
| 1035 | ret = -ENOMEM; |
| 1036 | goto err_exit; |
| 1037 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1038 | |
| 1039 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 1040 | if (unlikely(!res)) { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1041 | dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n", |
| 1042 | pdev->id); |
| 1043 | ret = -ENODEV; |
| 1044 | goto err_free; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1045 | } |
| 1046 | |
| 1047 | bank->irq = res->start; |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1048 | bank->id = pdev->id; |
| 1049 | |
| 1050 | pdata = pdev->dev.platform_data; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1051 | bank->virtual_irq_start = pdata->virtual_irq_start; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1052 | bank->dev = &pdev->dev; |
| 1053 | bank->dbck_flag = pdata->dbck_flag; |
Tony Lindgren | 5de62b8 | 2010-12-07 16:26:58 -0800 | [diff] [blame] | 1054 | bank->stride = pdata->bank_stride; |
Kevin Hilman | d5f4624 | 2011-04-21 09:23:00 -0700 | [diff] [blame] | 1055 | bank->width = pdata->bank_width; |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1056 | bank->is_mpuio = pdata->is_mpuio; |
Charulatha V | 803a243 | 2011-05-05 17:04:12 +0530 | [diff] [blame] | 1057 | bank->non_wakeup_gpios = pdata->non_wakeup_gpios; |
Charulatha V | 0cde8d0 | 2011-05-05 20:15:16 +0530 | [diff] [blame] | 1058 | bank->loses_context = pdata->loses_context; |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1059 | bank->get_context_loss_count = pdata->get_context_loss_count; |
Kevin Hilman | fa87931a | 2011-04-20 16:31:23 -0700 | [diff] [blame] | 1060 | bank->regs = pdata->regs; |
| 1061 | |
| 1062 | if (bank->regs->set_dataout && bank->regs->clr_dataout) |
| 1063 | bank->set_dataout = _set_gpio_dataout_reg; |
| 1064 | else |
| 1065 | bank->set_dataout = _set_gpio_dataout_mask; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1066 | |
| 1067 | spin_lock_init(&bank->lock); |
| 1068 | |
| 1069 | /* Static mapping, never released */ |
| 1070 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1071 | if (unlikely(!res)) { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1072 | dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n", |
| 1073 | pdev->id); |
| 1074 | ret = -ENODEV; |
| 1075 | goto err_free; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1076 | } |
| 1077 | |
| 1078 | bank->base = ioremap(res->start, resource_size(res)); |
| 1079 | if (!bank->base) { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1080 | dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n", |
| 1081 | pdev->id); |
| 1082 | ret = -ENOMEM; |
| 1083 | goto err_free; |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1084 | } |
| 1085 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1086 | platform_set_drvdata(pdev, bank); |
| 1087 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1088 | pm_runtime_enable(bank->dev); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1089 | pm_runtime_irq_safe(bank->dev); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1090 | pm_runtime_get_sync(bank->dev); |
| 1091 | |
Charulatha V | d0d665a | 2011-08-31 00:02:21 +0530 | [diff] [blame] | 1092 | if (bank->is_mpuio) |
Tarun Kanti DebBarma | ab985f0 | 2011-09-13 15:12:05 +0530 | [diff] [blame] | 1093 | mpuio_init(bank); |
| 1094 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1095 | omap_gpio_mod_init(bank); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1096 | omap_gpio_chip_init(bank); |
Tony Lindgren | 9a74805 | 2010-12-07 16:26:56 -0800 | [diff] [blame] | 1097 | omap_gpio_show_rev(bank); |
Tony Lindgren | 9f7065d | 2009-10-19 15:25:20 -0700 | [diff] [blame] | 1098 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1099 | pm_runtime_put(bank->dev); |
| 1100 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1101 | list_add_tail(&bank->node, &omap_gpio_list); |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1102 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1103 | return ret; |
| 1104 | |
| 1105 | err_free: |
| 1106 | kfree(bank); |
| 1107 | err_exit: |
| 1108 | return ret; |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1109 | } |
| 1110 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1111 | #ifdef CONFIG_ARCH_OMAP2PLUS |
| 1112 | |
| 1113 | #if defined(CONFIG_PM_SLEEP) |
| 1114 | static int omap_gpio_suspend(struct device *dev) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1115 | { |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1116 | struct platform_device *pdev = to_platform_device(dev); |
| 1117 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1118 | void __iomem *base = bank->base; |
| 1119 | void __iomem *wakeup_enable; |
| 1120 | unsigned long flags; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1121 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1122 | if (!bank->mod_usage || !bank->loses_context) |
| 1123 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1124 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1125 | if (!bank->regs->wkup_en || !bank->suspend_wakeup) |
| 1126 | return 0; |
Tarun Kanti DebBarma | 6ed87c5 | 2011-09-13 14:41:44 +0530 | [diff] [blame] | 1127 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1128 | wakeup_enable = bank->base + bank->regs->wkup_en; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1129 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1130 | spin_lock_irqsave(&bank->lock, flags); |
| 1131 | bank->saved_wakeup = __raw_readl(wakeup_enable); |
| 1132 | _gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0); |
| 1133 | _gpio_rmw(base, bank->regs->wkup_en, bank->suspend_wakeup, 1); |
| 1134 | spin_unlock_irqrestore(&bank->lock, flags); |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1135 | |
| 1136 | return 0; |
| 1137 | } |
| 1138 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1139 | static int omap_gpio_resume(struct device *dev) |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1140 | { |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1141 | struct platform_device *pdev = to_platform_device(dev); |
| 1142 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1143 | void __iomem *base = bank->base; |
| 1144 | unsigned long flags; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1145 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1146 | if (!bank->mod_usage || !bank->loses_context) |
| 1147 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1148 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1149 | if (!bank->regs->wkup_en || !bank->saved_wakeup) |
| 1150 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1151 | |
Tarun Kanti DebBarma | 065cd79 | 2011-11-24 01:48:52 +0530 | [diff] [blame] | 1152 | spin_lock_irqsave(&bank->lock, flags); |
| 1153 | _gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0); |
| 1154 | _gpio_rmw(base, bank->regs->wkup_en, bank->saved_wakeup, 1); |
| 1155 | spin_unlock_irqrestore(&bank->lock, flags); |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1156 | |
| 1157 | return 0; |
Tony Lindgren | 92105bb | 2005-09-07 17:20:26 +0100 | [diff] [blame] | 1158 | } |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1159 | #endif /* CONFIG_PM_SLEEP */ |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1160 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1161 | #if defined(CONFIG_PM_RUNTIME) |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1162 | static void omap_gpio_save_context(struct gpio_bank *bank); |
| 1163 | static void omap_gpio_restore_context(struct gpio_bank *bank); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1164 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1165 | static int omap_gpio_runtime_suspend(struct device *dev) |
| 1166 | { |
| 1167 | struct platform_device *pdev = to_platform_device(dev); |
| 1168 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1169 | u32 l1 = 0, l2 = 0; |
| 1170 | unsigned long flags; |
| 1171 | |
| 1172 | spin_lock_irqsave(&bank->lock, flags); |
| 1173 | if (bank->power_mode != OFF_MODE) { |
| 1174 | bank->power_mode = 0; |
| 1175 | goto save_gpio_context; |
| 1176 | } |
| 1177 | /* |
| 1178 | * If going to OFF, remove triggering for all |
| 1179 | * non-wakeup GPIOs. Otherwise spurious IRQs will be |
| 1180 | * generated. See OMAP2420 Errata item 1.101. |
| 1181 | */ |
| 1182 | if (!(bank->enabled_non_wakeup_gpios)) |
| 1183 | goto save_gpio_context; |
| 1184 | |
| 1185 | bank->saved_datain = __raw_readl(bank->base + |
| 1186 | bank->regs->datain); |
| 1187 | l1 = __raw_readl(bank->base + bank->regs->fallingdetect); |
| 1188 | l2 = __raw_readl(bank->base + bank->regs->risingdetect); |
| 1189 | |
| 1190 | bank->saved_fallingdetect = l1; |
| 1191 | bank->saved_risingdetect = l2; |
| 1192 | l1 &= ~bank->enabled_non_wakeup_gpios; |
| 1193 | l2 &= ~bank->enabled_non_wakeup_gpios; |
| 1194 | |
| 1195 | __raw_writel(l1, bank->base + bank->regs->fallingdetect); |
| 1196 | __raw_writel(l2, bank->base + bank->regs->risingdetect); |
| 1197 | |
| 1198 | bank->workaround_enabled = true; |
| 1199 | |
| 1200 | save_gpio_context: |
| 1201 | if (bank->get_context_loss_count) |
| 1202 | bank->context_loss_count = |
| 1203 | bank->get_context_loss_count(bank->dev); |
| 1204 | |
| 1205 | omap_gpio_save_context(bank); |
Tarun Kanti DebBarma | 72f83af | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 1206 | _gpio_dbck_disable(bank); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1207 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1208 | |
| 1209 | return 0; |
| 1210 | } |
| 1211 | |
| 1212 | static int omap_gpio_runtime_resume(struct device *dev) |
| 1213 | { |
| 1214 | struct platform_device *pdev = to_platform_device(dev); |
| 1215 | struct gpio_bank *bank = platform_get_drvdata(pdev); |
| 1216 | int context_lost_cnt_after; |
| 1217 | u32 l = 0, gen, gen0, gen1; |
| 1218 | unsigned long flags; |
| 1219 | |
| 1220 | spin_lock_irqsave(&bank->lock, flags); |
Tarun Kanti DebBarma | 72f83af | 2011-11-24 03:03:28 +0530 | [diff] [blame] | 1221 | _gpio_dbck_enable(bank); |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1222 | if (!bank->enabled_non_wakeup_gpios || !bank->workaround_enabled) { |
| 1223 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1224 | return 0; |
| 1225 | } |
| 1226 | |
| 1227 | if (bank->get_context_loss_count) { |
| 1228 | context_lost_cnt_after = |
| 1229 | bank->get_context_loss_count(bank->dev); |
| 1230 | if (context_lost_cnt_after != bank->context_loss_count || |
| 1231 | !context_lost_cnt_after) { |
| 1232 | omap_gpio_restore_context(bank); |
| 1233 | } else { |
| 1234 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1235 | return 0; |
| 1236 | } |
| 1237 | } |
| 1238 | |
| 1239 | __raw_writel(bank->saved_fallingdetect, |
| 1240 | bank->base + bank->regs->fallingdetect); |
| 1241 | __raw_writel(bank->saved_risingdetect, |
| 1242 | bank->base + bank->regs->risingdetect); |
| 1243 | l = __raw_readl(bank->base + bank->regs->datain); |
| 1244 | |
| 1245 | /* |
| 1246 | * Check if any of the non-wakeup interrupt GPIOs have changed |
| 1247 | * state. If so, generate an IRQ by software. This is |
| 1248 | * horribly racy, but it's the best we can do to work around |
| 1249 | * this silicon bug. |
| 1250 | */ |
| 1251 | l ^= bank->saved_datain; |
| 1252 | l &= bank->enabled_non_wakeup_gpios; |
| 1253 | |
| 1254 | /* |
| 1255 | * No need to generate IRQs for the rising edge for gpio IRQs |
| 1256 | * configured with falling edge only; and vice versa. |
| 1257 | */ |
| 1258 | gen0 = l & bank->saved_fallingdetect; |
| 1259 | gen0 &= bank->saved_datain; |
| 1260 | |
| 1261 | gen1 = l & bank->saved_risingdetect; |
| 1262 | gen1 &= ~(bank->saved_datain); |
| 1263 | |
| 1264 | /* FIXME: Consider GPIO IRQs with level detections properly! */ |
| 1265 | gen = l & (~(bank->saved_fallingdetect) & ~(bank->saved_risingdetect)); |
| 1266 | /* Consider all GPIO IRQs needed to be updated */ |
| 1267 | gen |= gen0 | gen1; |
| 1268 | |
| 1269 | if (gen) { |
| 1270 | u32 old0, old1; |
| 1271 | |
| 1272 | old0 = __raw_readl(bank->base + bank->regs->leveldetect0); |
| 1273 | old1 = __raw_readl(bank->base + bank->regs->leveldetect1); |
| 1274 | |
| 1275 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
| 1276 | __raw_writel(old0 | gen, bank->base + |
| 1277 | bank->regs->leveldetect0); |
| 1278 | __raw_writel(old1 | gen, bank->base + |
| 1279 | bank->regs->leveldetect1); |
| 1280 | } |
| 1281 | |
| 1282 | if (cpu_is_omap44xx()) { |
| 1283 | __raw_writel(old0 | l, bank->base + |
| 1284 | bank->regs->leveldetect0); |
| 1285 | __raw_writel(old1 | l, bank->base + |
| 1286 | bank->regs->leveldetect1); |
| 1287 | } |
| 1288 | __raw_writel(old0, bank->base + bank->regs->leveldetect0); |
| 1289 | __raw_writel(old1, bank->base + bank->regs->leveldetect1); |
| 1290 | } |
| 1291 | |
| 1292 | bank->workaround_enabled = false; |
| 1293 | spin_unlock_irqrestore(&bank->lock, flags); |
| 1294 | |
| 1295 | return 0; |
| 1296 | } |
| 1297 | #endif /* CONFIG_PM_RUNTIME */ |
| 1298 | |
| 1299 | void omap2_gpio_prepare_for_idle(int pwr_mode) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1300 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1301 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1302 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1303 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1304 | if (!bank->mod_usage || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1305 | continue; |
| 1306 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1307 | bank->power_mode = pwr_mode; |
| 1308 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1309 | pm_runtime_put_sync_suspend(bank->dev); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1310 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1311 | } |
| 1312 | |
Kevin Hilman | 43ffcd9 | 2009-01-27 11:09:24 -0800 | [diff] [blame] | 1313 | void omap2_gpio_resume_after_idle(void) |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1314 | { |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1315 | struct gpio_bank *bank; |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1316 | |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1317 | list_for_each_entry(bank, &omap_gpio_list, node) { |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1318 | if (!bank->mod_usage || !bank->loses_context) |
Charulatha V | 03e128c | 2011-05-05 19:58:01 +0530 | [diff] [blame] | 1319 | continue; |
| 1320 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1321 | pm_runtime_get_sync(bank->dev); |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1322 | } |
Juha Yrjola | 3ac4fa9 | 2006-12-06 17:13:52 -0800 | [diff] [blame] | 1323 | } |
| 1324 | |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1325 | #if defined(CONFIG_PM_RUNTIME) |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1326 | static void omap_gpio_save_context(struct gpio_bank *bank) |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1327 | { |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1328 | bank->context.irqenable1 = |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1329 | __raw_readl(bank->base + bank->regs->irqenable); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1330 | bank->context.irqenable2 = |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1331 | __raw_readl(bank->base + bank->regs->irqenable2); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1332 | bank->context.wake_en = |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1333 | __raw_readl(bank->base + bank->regs->wkup_en); |
| 1334 | bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl); |
| 1335 | bank->context.oe = __raw_readl(bank->base + bank->regs->direction); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1336 | bank->context.leveldetect0 = |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1337 | __raw_readl(bank->base + bank->regs->leveldetect0); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1338 | bank->context.leveldetect1 = |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1339 | __raw_readl(bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1340 | bank->context.risingdetect = |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1341 | __raw_readl(bank->base + bank->regs->risingdetect); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1342 | bank->context.fallingdetect = |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1343 | __raw_readl(bank->base + bank->regs->fallingdetect); |
| 1344 | bank->context.dataout = __raw_readl(bank->base + bank->regs->dataout); |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1345 | } |
| 1346 | |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1347 | static void omap_gpio_restore_context(struct gpio_bank *bank) |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1348 | { |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1349 | __raw_writel(bank->context.irqenable1, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1350 | bank->base + bank->regs->irqenable); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1351 | __raw_writel(bank->context.irqenable2, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1352 | bank->base + bank->regs->irqenable2); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1353 | __raw_writel(bank->context.wake_en, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1354 | bank->base + bank->regs->wkup_en); |
| 1355 | __raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl); |
| 1356 | __raw_writel(bank->context.oe, bank->base + bank->regs->direction); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1357 | __raw_writel(bank->context.leveldetect0, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1358 | bank->base + bank->regs->leveldetect0); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1359 | __raw_writel(bank->context.leveldetect1, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1360 | bank->base + bank->regs->leveldetect1); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1361 | __raw_writel(bank->context.risingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1362 | bank->base + bank->regs->risingdetect); |
Tarun Kanti DebBarma | 60a3437 | 2011-09-29 04:47:25 +0530 | [diff] [blame] | 1363 | __raw_writel(bank->context.fallingdetect, |
Tarun Kanti DebBarma | ae10f23 | 2011-08-30 15:24:27 +0530 | [diff] [blame] | 1364 | bank->base + bank->regs->fallingdetect); |
| 1365 | __raw_writel(bank->context.dataout, bank->base + bank->regs->dataout); |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1366 | } |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1367 | #endif /* CONFIG_PM_RUNTIME */ |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1368 | #else |
| 1369 | #define omap_gpio_suspend NULL |
| 1370 | #define omap_gpio_resume NULL |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1371 | #define omap_gpio_runtime_suspend NULL |
| 1372 | #define omap_gpio_runtime_resume NULL |
Rajendra Nayak | 40c670f | 2008-09-26 17:47:48 +0530 | [diff] [blame] | 1373 | #endif |
| 1374 | |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1375 | static const struct dev_pm_ops gpio_pm_ops = { |
| 1376 | SET_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume) |
Tarun Kanti DebBarma | 2dc983c | 2011-11-24 02:44:29 +0530 | [diff] [blame] | 1377 | SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume, |
| 1378 | NULL) |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1379 | }; |
| 1380 | |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1381 | static struct platform_driver omap_gpio_driver = { |
| 1382 | .probe = omap_gpio_probe, |
| 1383 | .driver = { |
| 1384 | .name = "omap_gpio", |
Tarun Kanti DebBarma | 55b93c3 | 2011-09-29 07:23:22 +0530 | [diff] [blame] | 1385 | .pm = &gpio_pm_ops, |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1386 | }, |
| 1387 | }; |
| 1388 | |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1389 | /* |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1390 | * gpio driver register needs to be done before |
| 1391 | * machine_init functions access gpio APIs. |
| 1392 | * Hence omap_gpio_drv_reg() is a postcore_initcall. |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1393 | */ |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1394 | static int __init omap_gpio_drv_reg(void) |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1395 | { |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1396 | return platform_driver_register(&omap_gpio_driver); |
Tony Lindgren | 5e1c5ff | 2005-07-10 19:58:15 +0100 | [diff] [blame] | 1397 | } |
Varadarajan, Charulatha | 77640aa | 2010-12-07 16:26:57 -0800 | [diff] [blame] | 1398 | postcore_initcall(omap_gpio_drv_reg); |