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Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001/*
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01002 * Support functions for OMAP GPIO
3 *
Tony Lindgren92105bb2005-09-07 17:20:26 +01004 * Copyright (C) 2003-2005 Nokia Corporation
Jan Engelhardt96de0e22007-10-19 23:21:04 +02005 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01006 *
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2009 Texas Instruments
8 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
9 *
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010010 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010015#include <linux/init.h>
16#include <linux/module.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010017#include <linux/interrupt.h>
Rafael J. Wysocki3c437ff2011-04-22 22:02:46 +020018#include <linux/syscore_ops.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010019#include <linux/err.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000020#include <linux/clk.h>
Russell Kingfced80c2008-09-06 12:10:45 +010021#include <linux/io.h>
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080022#include <linux/slab.h>
23#include <linux/pm_runtime.h>
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +053024#include <linux/pm.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010025
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/hardware.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010027#include <asm/irq.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010028#include <mach/irqs.h>
Russell King1bc857f2011-07-26 10:54:55 +010029#include <asm/gpio.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010030#include <asm/mach/irq.h>
31
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +053032#define OFF_MODE 1
33
Charulatha V03e128c2011-05-05 19:58:01 +053034static LIST_HEAD(omap_gpio_list);
35
Charulatha V6d62e212011-04-18 15:06:51 +000036struct gpio_regs {
37 u32 irqenable1;
38 u32 irqenable2;
39 u32 wake_en;
40 u32 ctrl;
41 u32 oe;
42 u32 leveldetect0;
43 u32 leveldetect1;
44 u32 risingdetect;
45 u32 fallingdetect;
46 u32 dataout;
47};
48
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010049struct gpio_bank {
Charulatha V03e128c2011-05-05 19:58:01 +053050 struct list_head node;
Tony Lindgren9f7065d2009-10-19 15:25:20 -070051 unsigned long pbase;
Tony Lindgren92105bb2005-09-07 17:20:26 +010052 void __iomem *base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010053 u16 irq;
54 u16 virtual_irq_start;
Tony Lindgren92105bb2005-09-07 17:20:26 +010055 u32 suspend_wakeup;
56 u32 saved_wakeup;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -080057 u32 non_wakeup_gpios;
58 u32 enabled_non_wakeup_gpios;
Charulatha V6d62e212011-04-18 15:06:51 +000059 struct gpio_regs context;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -080060 u32 saved_datain;
61 u32 saved_fallingdetect;
62 u32 saved_risingdetect;
Kevin Hilmanb144ff62008-01-16 21:56:15 -080063 u32 level_mask;
Cory Maccarrone4318f362010-01-08 10:29:04 -080064 u32 toggle_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010065 spinlock_t lock;
David Brownell52e31342008-03-03 12:43:23 -080066 struct gpio_chip chip;
Jouni Hogander89db9482008-12-10 17:35:24 -080067 struct clk *dbck;
Charulatha V058af1e2009-11-22 10:11:25 -080068 u32 mod_usage;
Kevin Hilman8865b9b2009-01-27 11:15:34 -080069 u32 dbck_enable_mask;
Tarun Kanti DebBarma72f83af2011-11-24 03:03:28 +053070 bool dbck_enabled;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080071 struct device *dev;
Charulatha Vd0d665a2011-08-31 00:02:21 +053072 bool is_mpuio;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080073 bool dbck_flag;
Charulatha V0cde8d02011-05-05 20:15:16 +053074 bool loses_context;
Tony Lindgren5de62b82010-12-07 16:26:58 -080075 int stride;
Kevin Hilmand5f46242011-04-21 09:23:00 -070076 u32 width;
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +053077 int context_loss_count;
Charulatha V03e128c2011-05-05 19:58:01 +053078 u16 id;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +053079 int power_mode;
80 bool workaround_enabled;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -070081
82 void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +053083 int (*get_context_loss_count)(struct device *dev);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -070084
85 struct omap_gpio_reg_offs *regs;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010086};
87
Kevin Hilman129fd222011-04-22 07:59:07 -070088#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
89#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
Charulatha Vc8eef652011-05-02 15:21:42 +053090#define GPIO_MOD_CTRL_BIT BIT(0)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010091
92static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
93{
Tony Lindgren92105bb2005-09-07 17:20:26 +010094 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010095 u32 l;
96
Kevin Hilmanfa87931a2011-04-20 16:31:23 -070097 reg += bank->regs->direction;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010098 l = __raw_readl(reg);
99 if (is_input)
100 l |= 1 << gpio;
101 else
102 l &= ~(1 << gpio);
103 __raw_writel(l, reg);
104}
105
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700106
107/* set data out value using dedicate set/clear register */
108static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100109{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100110 void __iomem *reg = bank->base;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700111 u32 l = GPIO_BIT(bank, gpio);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100112
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700113 if (enable)
114 reg += bank->regs->set_dataout;
115 else
116 reg += bank->regs->clr_dataout;
117
118 __raw_writel(l, reg);
119}
120
121/* set data out value using mask register */
122static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable)
123{
124 void __iomem *reg = bank->base + bank->regs->dataout;
125 u32 gpio_bit = GPIO_BIT(bank, gpio);
126 u32 l;
127
128 l = __raw_readl(reg);
129 if (enable)
130 l |= gpio_bit;
131 else
132 l &= ~gpio_bit;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100133 __raw_writel(l, reg);
134}
135
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300136static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100137{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700138 void __iomem *reg = bank->base + bank->regs->datain;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100139
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700140 return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100141}
142
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300143static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
144{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700145 void __iomem *reg = bank->base + bank->regs->dataout;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300146
Kevin Hilman129fd222011-04-22 07:59:07 -0700147 return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300148}
149
Kevin Hilmanece95282011-07-12 08:18:15 -0700150static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
151{
152 int l = __raw_readl(base + reg);
153
154 if (set)
155 l |= mask;
156 else
157 l &= ~mask;
158
159 __raw_writel(l, base + reg);
160}
Tony Lindgren92105bb2005-09-07 17:20:26 +0100161
Tarun Kanti DebBarma72f83af2011-11-24 03:03:28 +0530162static inline void _gpio_dbck_enable(struct gpio_bank *bank)
163{
164 if (bank->dbck_enable_mask && !bank->dbck_enabled) {
165 clk_enable(bank->dbck);
166 bank->dbck_enabled = true;
167 }
168}
169
170static inline void _gpio_dbck_disable(struct gpio_bank *bank)
171{
172 if (bank->dbck_enable_mask && bank->dbck_enabled) {
173 clk_disable(bank->dbck);
174 bank->dbck_enabled = false;
175 }
176}
177
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700178/**
179 * _set_gpio_debounce - low level gpio debounce time
180 * @bank: the gpio bank we're acting upon
181 * @gpio: the gpio number on this @gpio
182 * @debounce: debounce time to use
183 *
184 * OMAP's debounce time is in 31us steps so we need
185 * to convert and round up to the closest unit.
186 */
187static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
188 unsigned debounce)
189{
Kevin Hilman9942da02011-04-22 12:02:05 -0700190 void __iomem *reg;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700191 u32 val;
192 u32 l;
193
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800194 if (!bank->dbck_flag)
195 return;
196
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700197 if (debounce < 32)
198 debounce = 0x01;
199 else if (debounce > 7936)
200 debounce = 0xff;
201 else
202 debounce = (debounce / 0x1f) - 1;
203
Kevin Hilman129fd222011-04-22 07:59:07 -0700204 l = GPIO_BIT(bank, gpio);
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700205
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530206 clk_enable(bank->dbck);
Kevin Hilman9942da02011-04-22 12:02:05 -0700207 reg = bank->base + bank->regs->debounce;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700208 __raw_writel(debounce, reg);
209
Kevin Hilman9942da02011-04-22 12:02:05 -0700210 reg = bank->base + bank->regs->debounce_en;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700211 val = __raw_readl(reg);
212
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530213 if (debounce)
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700214 val |= l;
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530215 else
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700216 val &= ~l;
Kevin Hilmanf7ec0b02010-06-09 13:53:07 +0300217 bank->dbck_enable_mask = val;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700218
219 __raw_writel(val, reg);
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530220 clk_disable(bank->dbck);
221 /*
222 * Enable debounce clock per module.
223 * This call is mandatory because in omap_gpio_request() when
224 * *_runtime_get_sync() is called, _gpio_dbck_enable() within
225 * runtime callbck fails to turn on dbck because dbck_enable_mask
226 * used within _gpio_dbck_enable() is still not initialized at
227 * that point. Therefore we have to enable dbck here.
228 */
229 _gpio_dbck_enable(bank);
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700230}
231
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530232static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700233 int trigger)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100234{
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800235 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100236 u32 gpio_bit = 1 << gpio;
237
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530238 _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit,
239 trigger & IRQ_TYPE_LEVEL_LOW);
240 _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit,
241 trigger & IRQ_TYPE_LEVEL_HIGH);
242 _gpio_rmw(base, bank->regs->risingdetect, gpio_bit,
243 trigger & IRQ_TYPE_EDGE_RISING);
244 _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit,
245 trigger & IRQ_TYPE_EDGE_FALLING);
246
247 if (likely(!(bank->non_wakeup_gpios & gpio_bit)))
248 _gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0);
249
Ambresh K55b220c2011-06-15 13:40:45 -0700250 /* This part needs to be executed always for OMAP{34xx, 44xx} */
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530251 if (!bank->regs->irqctrl) {
252 /* On omap24xx proceed only when valid GPIO bit is set */
253 if (bank->non_wakeup_gpios) {
254 if (!(bank->non_wakeup_gpios & gpio_bit))
255 goto exit;
256 }
257
Chunqiu Wang699117a2009-06-24 17:13:39 +0000258 /*
259 * Log the edge gpio and manually trigger the IRQ
260 * after resume if the input level changes
261 * to avoid irq lost during PER RET/OFF mode
262 * Applies for omap2 non-wakeup gpio and all omap3 gpios
263 */
264 if (trigger & IRQ_TYPE_EDGE_BOTH)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800265 bank->enabled_non_wakeup_gpios |= gpio_bit;
266 else
267 bank->enabled_non_wakeup_gpios &= ~gpio_bit;
268 }
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700269
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530270exit:
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530271 bank->level_mask =
272 __raw_readl(bank->base + bank->regs->leveldetect0) |
273 __raw_readl(bank->base + bank->regs->leveldetect1);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100274}
275
Uwe Kleine-König9198bcd2010-01-29 14:20:05 -0800276#ifdef CONFIG_ARCH_OMAP1
Cory Maccarrone4318f362010-01-08 10:29:04 -0800277/*
278 * This only applies to chips that can't do both rising and falling edge
279 * detection at once. For all other chips, this function is a noop.
280 */
281static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
282{
283 void __iomem *reg = bank->base;
284 u32 l = 0;
285
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530286 if (!bank->regs->irqctrl)
Cory Maccarrone4318f362010-01-08 10:29:04 -0800287 return;
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530288
289 reg += bank->regs->irqctrl;
Cory Maccarrone4318f362010-01-08 10:29:04 -0800290
291 l = __raw_readl(reg);
292 if ((l >> gpio) & 1)
293 l &= ~(1 << gpio);
294 else
295 l |= 1 << gpio;
296
297 __raw_writel(l, reg);
298}
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530299#else
300static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {}
Uwe Kleine-König9198bcd2010-01-29 14:20:05 -0800301#endif
Cory Maccarrone4318f362010-01-08 10:29:04 -0800302
Tony Lindgren92105bb2005-09-07 17:20:26 +0100303static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
304{
305 void __iomem *reg = bank->base;
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530306 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100307 u32 l = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100308
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530309 if (bank->regs->leveldetect0 && bank->regs->wkup_en) {
310 set_gpio_trigger(bank, gpio, trigger);
311 } else if (bank->regs->irqctrl) {
312 reg += bank->regs->irqctrl;
313
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100314 l = __raw_readl(reg);
Janusz Krzysztofik29501572010-04-05 11:38:06 +0000315 if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
Cory Maccarrone4318f362010-01-08 10:29:04 -0800316 bank->toggle_mask |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100317 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100318 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100319 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100320 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100321 else
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530322 return -EINVAL;
323
324 __raw_writel(l, reg);
325 } else if (bank->regs->edgectrl1) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100326 if (gpio & 0x08)
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530327 reg += bank->regs->edgectrl2;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100328 else
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530329 reg += bank->regs->edgectrl1;
330
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100331 gpio &= 0x07;
332 l = __raw_readl(reg);
333 l &= ~(3 << (gpio << 1));
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100334 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100335 l |= 2 << (gpio << 1);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100336 if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100337 l |= 1 << (gpio << 1);
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530338
339 /* Enable wake-up during idle for dynamic tick */
340 _gpio_rmw(base, bank->regs->wkup_en, 1 << gpio, trigger);
341 __raw_writel(l, reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100342 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100343 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100344}
345
Lennert Buytenheke9191022010-11-29 11:17:17 +0100346static int gpio_irq_type(struct irq_data *d, unsigned type)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100347{
348 struct gpio_bank *bank;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100349 unsigned gpio;
350 int retval;
David Brownella6472532008-03-03 04:33:30 -0800351 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100352
Lennert Buytenheke9191022010-11-29 11:17:17 +0100353 if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE)
354 gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100355 else
Lennert Buytenheke9191022010-11-29 11:17:17 +0100356 gpio = d->irq - IH_GPIO_BASE;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100357
David Brownelle5c56ed2006-12-06 17:13:59 -0800358 if (type & ~IRQ_TYPE_SENSE_MASK)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100359 return -EINVAL;
David Brownelle5c56ed2006-12-06 17:13:59 -0800360
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530361 bank = irq_data_get_irq_chip_data(d);
362
363 if (!bank->regs->leveldetect0 &&
364 (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
Tony Lindgren92105bb2005-09-07 17:20:26 +0100365 return -EINVAL;
366
David Brownella6472532008-03-03 04:33:30 -0800367 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman129fd222011-04-22 07:59:07 -0700368 retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
David Brownella6472532008-03-03 04:33:30 -0800369 spin_unlock_irqrestore(&bank->lock, flags);
Kevin Hilman672e3022008-01-16 21:56:16 -0800370
371 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100372 __irq_set_handler_locked(d->irq, handle_level_irq);
Kevin Hilman672e3022008-01-16 21:56:16 -0800373 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100374 __irq_set_handler_locked(d->irq, handle_edge_irq);
Kevin Hilman672e3022008-01-16 21:56:16 -0800375
Tony Lindgren92105bb2005-09-07 17:20:26 +0100376 return retval;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100377}
378
379static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
380{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100381 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100382
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700383 reg += bank->regs->irqstatus;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100384 __raw_writel(gpio_mask, reg);
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300385
386 /* Workaround for clearing DSP GPIO interrupts to allow retention */
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700387 if (bank->regs->irqstatus2) {
388 reg = bank->base + bank->regs->irqstatus2;
Roger Quadrosbedfd152009-04-23 11:10:50 -0700389 __raw_writel(gpio_mask, reg);
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700390 }
Roger Quadrosbedfd152009-04-23 11:10:50 -0700391
392 /* Flush posted write for the irq status to avoid spurious interrupts */
393 __raw_readl(reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100394}
395
396static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
397{
Kevin Hilman129fd222011-04-22 07:59:07 -0700398 _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100399}
400
Imre Deakea6dedd2006-06-26 16:16:00 -0700401static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
402{
403 void __iomem *reg = bank->base;
Imre Deak99c47702006-06-26 16:16:07 -0700404 u32 l;
Kevin Hilmanc390aad2011-04-21 09:33:36 -0700405 u32 mask = (1 << bank->width) - 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700406
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700407 reg += bank->regs->irqenable;
Imre Deak99c47702006-06-26 16:16:07 -0700408 l = __raw_readl(reg);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700409 if (bank->regs->irqenable_inv)
Imre Deak99c47702006-06-26 16:16:07 -0700410 l = ~l;
411 l &= mask;
412 return l;
Imre Deakea6dedd2006-06-26 16:16:00 -0700413}
414
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700415static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100416{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100417 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100418 u32 l;
419
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700420 if (bank->regs->set_irqenable) {
421 reg += bank->regs->set_irqenable;
422 l = gpio_mask;
423 } else {
424 reg += bank->regs->irqenable;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100425 l = __raw_readl(reg);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700426 if (bank->regs->irqenable_inv)
427 l &= ~gpio_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100428 else
429 l |= gpio_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100430 }
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700431
432 __raw_writel(l, reg);
433}
434
435static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
436{
437 void __iomem *reg = bank->base;
438 u32 l;
439
440 if (bank->regs->clr_irqenable) {
441 reg += bank->regs->clr_irqenable;
442 l = gpio_mask;
443 } else {
444 reg += bank->regs->irqenable;
445 l = __raw_readl(reg);
446 if (bank->regs->irqenable_inv)
447 l |= gpio_mask;
448 else
449 l &= ~gpio_mask;
450 }
451
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100452 __raw_writel(l, reg);
453}
454
455static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
456{
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700457 _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100458}
459
Tony Lindgren92105bb2005-09-07 17:20:26 +0100460/*
461 * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register.
462 * 1510 does not seem to have a wake-up register. If JTAG is connected
463 * to the target, system will wake up always on GPIO events. While
464 * system is running all registered GPIO interrupts need to have wake-up
465 * enabled. When system is suspended, only selected GPIO interrupts need
466 * to have wake-up enabled.
467 */
468static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
469{
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700470 u32 gpio_bit = GPIO_BIT(bank, gpio);
471 unsigned long flags;
David Brownella6472532008-03-03 04:33:30 -0800472
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700473 if (bank->non_wakeup_gpios & gpio_bit) {
474 dev_err(bank->dev,
475 "Unable to modify wakeup on non-wakeup GPIO%d\n", gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100476 return -EINVAL;
477 }
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700478
479 spin_lock_irqsave(&bank->lock, flags);
480 if (enable)
481 bank->suspend_wakeup |= gpio_bit;
482 else
483 bank->suspend_wakeup &= ~gpio_bit;
484
485 spin_unlock_irqrestore(&bank->lock, flags);
486
487 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100488}
489
Tony Lindgren4196dd62006-09-25 12:41:38 +0300490static void _reset_gpio(struct gpio_bank *bank, int gpio)
491{
Kevin Hilman129fd222011-04-22 07:59:07 -0700492 _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300493 _set_gpio_irqenable(bank, gpio, 0);
494 _clear_gpio_irqstatus(bank, gpio);
Kevin Hilman129fd222011-04-22 07:59:07 -0700495 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300496}
497
Tony Lindgren92105bb2005-09-07 17:20:26 +0100498/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
Lennert Buytenheke9191022010-11-29 11:17:17 +0100499static int gpio_wake_enable(struct irq_data *d, unsigned int enable)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100500{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100501 unsigned int gpio = d->irq - IH_GPIO_BASE;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100502 struct gpio_bank *bank;
503 int retval;
504
Lennert Buytenheke9191022010-11-29 11:17:17 +0100505 bank = irq_data_get_irq_chip_data(d);
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700506 retval = _set_gpio_wakeup(bank, gpio, enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100507
508 return retval;
509}
510
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800511static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100512{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800513 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -0800514 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100515
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530516 /*
517 * If this is the first gpio_request for the bank,
518 * enable the bank module.
519 */
520 if (!bank->mod_usage)
521 pm_runtime_get_sync(bank->dev);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100522
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530523 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300524 /* Set trigger to none. You need to enable the desired trigger with
525 * request_irq() or set_irq_type().
526 */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800527 _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100528
Charulatha Vfad96ea2011-05-25 11:23:50 +0530529 if (bank->regs->pinctrl) {
530 void __iomem *reg = bank->base + bank->regs->pinctrl;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100531
Tony Lindgren92105bb2005-09-07 17:20:26 +0100532 /* Claim the pin for MPU */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800533 __raw_writel(__raw_readl(reg) | (1 << offset), reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100534 }
Charulatha Vfad96ea2011-05-25 11:23:50 +0530535
Charulatha Vc8eef652011-05-02 15:21:42 +0530536 if (bank->regs->ctrl && !bank->mod_usage) {
537 void __iomem *reg = bank->base + bank->regs->ctrl;
538 u32 ctrl;
Charulatha V9f096862010-05-14 12:05:27 -0700539
Charulatha Vc8eef652011-05-02 15:21:42 +0530540 ctrl = __raw_readl(reg);
541 /* Module is enabled, clocks are not gated */
542 ctrl &= ~GPIO_MOD_CTRL_BIT;
543 __raw_writel(ctrl, reg);
Charulatha V058af1e2009-11-22 10:11:25 -0800544 }
Charulatha Vc8eef652011-05-02 15:21:42 +0530545
546 bank->mod_usage |= 1 << offset;
547
David Brownella6472532008-03-03 04:33:30 -0800548 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100549
550 return 0;
551}
552
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800553static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100554{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800555 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530556 void __iomem *base = bank->base;
David Brownella6472532008-03-03 04:33:30 -0800557 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100558
David Brownella6472532008-03-03 04:33:30 -0800559 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530560
561 if (bank->regs->wkup_en)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100562 /* Disable wake-up during idle for dynamic tick */
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530563 _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);
564
Charulatha Vc8eef652011-05-02 15:21:42 +0530565 bank->mod_usage &= ~(1 << offset);
Charulatha V9f096862010-05-14 12:05:27 -0700566
Charulatha Vc8eef652011-05-02 15:21:42 +0530567 if (bank->regs->ctrl && !bank->mod_usage) {
568 void __iomem *reg = bank->base + bank->regs->ctrl;
569 u32 ctrl;
570
571 ctrl = __raw_readl(reg);
572 /* Module is disabled, clocks are gated */
573 ctrl |= GPIO_MOD_CTRL_BIT;
574 __raw_writel(ctrl, reg);
Charulatha V058af1e2009-11-22 10:11:25 -0800575 }
Charulatha Vc8eef652011-05-02 15:21:42 +0530576
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800577 _reset_gpio(bank, bank->chip.base + offset);
David Brownella6472532008-03-03 04:33:30 -0800578 spin_unlock_irqrestore(&bank->lock, flags);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530579
580 /*
581 * If this is the last gpio to be freed in the bank,
582 * disable the bank module.
583 */
584 if (!bank->mod_usage)
585 pm_runtime_put(bank->dev);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100586}
587
588/*
589 * We need to unmask the GPIO bank interrupt as soon as possible to
590 * avoid missing GPIO interrupts for other lines in the bank.
591 * Then we need to mask-read-clear-unmask the triggered GPIO lines
592 * in the bank to avoid missing nested interrupts for a GPIO line.
593 * If we wait to unmask individual GPIO lines in the bank after the
594 * line's interrupt handler has been run, we may miss some nested
595 * interrupts.
596 */
Russell King10dd5ce2006-11-23 11:41:32 +0000597static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100598{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100599 void __iomem *isr_reg = NULL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100600 u32 isr;
Cory Maccarrone4318f362010-01-08 10:29:04 -0800601 unsigned int gpio_irq, gpio_index;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100602 struct gpio_bank *bank;
Imre Deakea6dedd2006-06-26 16:16:00 -0700603 u32 retrigger = 0;
604 int unmasked = 0;
Will Deaconee144182011-02-21 13:46:08 +0000605 struct irq_chip *chip = irq_desc_get_chip(desc);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100606
Will Deaconee144182011-02-21 13:46:08 +0000607 chained_irq_enter(chip, desc);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100608
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100609 bank = irq_get_handler_data(irq);
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700610 isr_reg = bank->base + bank->regs->irqstatus;
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530611 pm_runtime_get_sync(bank->dev);
Evgeny Kuznetsovb1cc4c52010-12-07 16:25:40 -0800612
613 if (WARN_ON(!isr_reg))
614 goto exit;
615
Tony Lindgren92105bb2005-09-07 17:20:26 +0100616 while(1) {
Tony Lindgren6e60e792006-04-02 17:46:23 +0100617 u32 isr_saved, level_mask = 0;
Imre Deakea6dedd2006-06-26 16:16:00 -0700618 u32 enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100619
Imre Deakea6dedd2006-06-26 16:16:00 -0700620 enabled = _get_gpio_irqbank_mask(bank);
621 isr_saved = isr = __raw_readl(isr_reg) & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100622
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530623 if (bank->level_mask)
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800624 level_mask = bank->level_mask & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100625
626 /* clear edge sensitive interrupts before handler(s) are
627 called so that we don't miss any interrupt occurred while
628 executing them */
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700629 _disable_gpio_irqbank(bank, isr_saved & ~level_mask);
Tony Lindgren6e60e792006-04-02 17:46:23 +0100630 _clear_gpio_irqbank(bank, isr_saved & ~level_mask);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700631 _enable_gpio_irqbank(bank, isr_saved & ~level_mask);
Tony Lindgren6e60e792006-04-02 17:46:23 +0100632
633 /* if there is only edge sensitive GPIO pin interrupts
634 configured, we could unmask GPIO bank interrupt immediately */
Imre Deakea6dedd2006-06-26 16:16:00 -0700635 if (!level_mask && !unmasked) {
636 unmasked = 1;
Will Deaconee144182011-02-21 13:46:08 +0000637 chained_irq_exit(chip, desc);
Imre Deakea6dedd2006-06-26 16:16:00 -0700638 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100639
Imre Deakea6dedd2006-06-26 16:16:00 -0700640 isr |= retrigger;
641 retrigger = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100642 if (!isr)
643 break;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100644
Tony Lindgren92105bb2005-09-07 17:20:26 +0100645 gpio_irq = bank->virtual_irq_start;
646 for (; isr != 0; isr >>= 1, gpio_irq++) {
Kevin Hilman129fd222011-04-22 07:59:07 -0700647 gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq));
Cory Maccarrone4318f362010-01-08 10:29:04 -0800648
Tony Lindgren92105bb2005-09-07 17:20:26 +0100649 if (!(isr & 1))
650 continue;
Thomas Gleixner29454dd2006-07-03 02:22:22 +0200651
Cory Maccarrone4318f362010-01-08 10:29:04 -0800652 /*
653 * Some chips can't respond to both rising and falling
654 * at the same time. If this irq was requested with
655 * both flags, we need to flip the ICR data for the IRQ
656 * to respond to the IRQ for the opposite direction.
657 * This will be indicated in the bank toggle_mask.
658 */
659 if (bank->toggle_mask & (1 << gpio_index))
660 _toggle_gpio_edge_triggering(bank, gpio_index);
Cory Maccarrone4318f362010-01-08 10:29:04 -0800661
Dmitry Baryshkovd8aa0252008-10-09 13:36:24 +0100662 generic_handle_irq(gpio_irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100663 }
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000664 }
Imre Deakea6dedd2006-06-26 16:16:00 -0700665 /* if bank has any level sensitive GPIO pin interrupt
666 configured, we must unmask the bank interrupt only after
667 handler(s) are executed in order to avoid spurious bank
668 interrupt */
Evgeny Kuznetsovb1cc4c52010-12-07 16:25:40 -0800669exit:
Imre Deakea6dedd2006-06-26 16:16:00 -0700670 if (!unmasked)
Will Deaconee144182011-02-21 13:46:08 +0000671 chained_irq_exit(chip, desc);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530672 pm_runtime_put(bank->dev);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100673}
674
Lennert Buytenheke9191022010-11-29 11:17:17 +0100675static void gpio_irq_shutdown(struct irq_data *d)
Tony Lindgren4196dd62006-09-25 12:41:38 +0300676{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100677 unsigned int gpio = d->irq - IH_GPIO_BASE;
678 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Colin Cross85ec7b92011-06-06 13:38:18 -0700679 unsigned long flags;
Tony Lindgren4196dd62006-09-25 12:41:38 +0300680
Colin Cross85ec7b92011-06-06 13:38:18 -0700681 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300682 _reset_gpio(bank, gpio);
Colin Cross85ec7b92011-06-06 13:38:18 -0700683 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300684}
685
Lennert Buytenheke9191022010-11-29 11:17:17 +0100686static void gpio_ack_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100687{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100688 unsigned int gpio = d->irq - IH_GPIO_BASE;
689 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100690
691 _clear_gpio_irqstatus(bank, gpio);
692}
693
Lennert Buytenheke9191022010-11-29 11:17:17 +0100694static void gpio_mask_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100695{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100696 unsigned int gpio = d->irq - IH_GPIO_BASE;
697 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Colin Cross85ec7b92011-06-06 13:38:18 -0700698 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100699
Colin Cross85ec7b92011-06-06 13:38:18 -0700700 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100701 _set_gpio_irqenable(bank, gpio, 0);
Kevin Hilman129fd222011-04-22 07:59:07 -0700702 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
Colin Cross85ec7b92011-06-06 13:38:18 -0700703 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100704}
705
Lennert Buytenheke9191022010-11-29 11:17:17 +0100706static void gpio_unmask_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100707{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100708 unsigned int gpio = d->irq - IH_GPIO_BASE;
709 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Kevin Hilman129fd222011-04-22 07:59:07 -0700710 unsigned int irq_mask = GPIO_BIT(bank, gpio);
Thomas Gleixner8c04a172011-03-24 12:40:15 +0100711 u32 trigger = irqd_get_trigger_type(d);
Colin Cross85ec7b92011-06-06 13:38:18 -0700712 unsigned long flags;
Kevin Hilman55b60192009-06-04 15:57:10 -0700713
Colin Cross85ec7b92011-06-06 13:38:18 -0700714 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman55b60192009-06-04 15:57:10 -0700715 if (trigger)
Kevin Hilman129fd222011-04-22 07:59:07 -0700716 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger);
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800717
718 /* For level-triggered GPIOs, the clearing must be done after
719 * the HW source is cleared, thus after the handler has run */
720 if (bank->level_mask & irq_mask) {
721 _set_gpio_irqenable(bank, gpio, 0);
722 _clear_gpio_irqstatus(bank, gpio);
723 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100724
Kevin Hilman4de8c752008-01-16 21:56:14 -0800725 _set_gpio_irqenable(bank, gpio, 1);
Colin Cross85ec7b92011-06-06 13:38:18 -0700726 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100727}
728
David Brownelle5c56ed2006-12-06 17:13:59 -0800729static struct irq_chip gpio_irq_chip = {
730 .name = "GPIO",
Lennert Buytenheke9191022010-11-29 11:17:17 +0100731 .irq_shutdown = gpio_irq_shutdown,
732 .irq_ack = gpio_ack_irq,
733 .irq_mask = gpio_mask_irq,
734 .irq_unmask = gpio_unmask_irq,
735 .irq_set_type = gpio_irq_type,
736 .irq_set_wake = gpio_wake_enable,
David Brownelle5c56ed2006-12-06 17:13:59 -0800737};
738
739/*---------------------------------------------------------------------*/
740
Magnus Damm79ee0312009-07-08 13:22:04 +0200741static int omap_mpuio_suspend_noirq(struct device *dev)
David Brownell11a78b72006-12-06 17:14:11 -0800742{
Magnus Damm79ee0312009-07-08 13:22:04 +0200743 struct platform_device *pdev = to_platform_device(dev);
David Brownell11a78b72006-12-06 17:14:11 -0800744 struct gpio_bank *bank = platform_get_drvdata(pdev);
Tony Lindgren5de62b82010-12-07 16:26:58 -0800745 void __iomem *mask_reg = bank->base +
746 OMAP_MPUIO_GPIO_MASKIT / bank->stride;
David Brownella6472532008-03-03 04:33:30 -0800747 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -0800748
David Brownella6472532008-03-03 04:33:30 -0800749 spin_lock_irqsave(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800750 bank->saved_wakeup = __raw_readl(mask_reg);
751 __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg);
David Brownella6472532008-03-03 04:33:30 -0800752 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800753
754 return 0;
755}
756
Magnus Damm79ee0312009-07-08 13:22:04 +0200757static int omap_mpuio_resume_noirq(struct device *dev)
David Brownell11a78b72006-12-06 17:14:11 -0800758{
Magnus Damm79ee0312009-07-08 13:22:04 +0200759 struct platform_device *pdev = to_platform_device(dev);
David Brownell11a78b72006-12-06 17:14:11 -0800760 struct gpio_bank *bank = platform_get_drvdata(pdev);
Tony Lindgren5de62b82010-12-07 16:26:58 -0800761 void __iomem *mask_reg = bank->base +
762 OMAP_MPUIO_GPIO_MASKIT / bank->stride;
David Brownella6472532008-03-03 04:33:30 -0800763 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -0800764
David Brownella6472532008-03-03 04:33:30 -0800765 spin_lock_irqsave(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800766 __raw_writel(bank->saved_wakeup, mask_reg);
David Brownella6472532008-03-03 04:33:30 -0800767 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800768
769 return 0;
770}
771
Alexey Dobriyan47145212009-12-14 18:00:08 -0800772static const struct dev_pm_ops omap_mpuio_dev_pm_ops = {
Magnus Damm79ee0312009-07-08 13:22:04 +0200773 .suspend_noirq = omap_mpuio_suspend_noirq,
774 .resume_noirq = omap_mpuio_resume_noirq,
775};
776
Rafael J. Wysocki3c437ff2011-04-22 22:02:46 +0200777/* use platform_driver for this. */
David Brownell11a78b72006-12-06 17:14:11 -0800778static struct platform_driver omap_mpuio_driver = {
David Brownell11a78b72006-12-06 17:14:11 -0800779 .driver = {
780 .name = "mpuio",
Magnus Damm79ee0312009-07-08 13:22:04 +0200781 .pm = &omap_mpuio_dev_pm_ops,
David Brownell11a78b72006-12-06 17:14:11 -0800782 },
783};
784
785static struct platform_device omap_mpuio_device = {
786 .name = "mpuio",
787 .id = -1,
788 .dev = {
789 .driver = &omap_mpuio_driver.driver,
790 }
791 /* could list the /proc/iomem resources */
792};
793
Charulatha V03e128c2011-05-05 19:58:01 +0530794static inline void mpuio_init(struct gpio_bank *bank)
David Brownell11a78b72006-12-06 17:14:11 -0800795{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800796 platform_set_drvdata(&omap_mpuio_device, bank);
David Brownellfcf126d2007-04-02 12:46:47 -0700797
David Brownell11a78b72006-12-06 17:14:11 -0800798 if (platform_driver_register(&omap_mpuio_driver) == 0)
799 (void) platform_device_register(&omap_mpuio_device);
800}
801
David Brownelle5c56ed2006-12-06 17:13:59 -0800802/*---------------------------------------------------------------------*/
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100803
David Brownell52e31342008-03-03 12:43:23 -0800804static int gpio_input(struct gpio_chip *chip, unsigned offset)
805{
806 struct gpio_bank *bank;
807 unsigned long flags;
808
809 bank = container_of(chip, struct gpio_bank, chip);
810 spin_lock_irqsave(&bank->lock, flags);
811 _set_gpio_direction(bank, offset, 1);
812 spin_unlock_irqrestore(&bank->lock, flags);
813 return 0;
814}
815
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300816static int gpio_is_input(struct gpio_bank *bank, int mask)
817{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700818 void __iomem *reg = bank->base + bank->regs->direction;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300819
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300820 return __raw_readl(reg) & mask;
821}
822
David Brownell52e31342008-03-03 12:43:23 -0800823static int gpio_get(struct gpio_chip *chip, unsigned offset)
824{
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300825 struct gpio_bank *bank;
826 void __iomem *reg;
827 int gpio;
828 u32 mask;
829
830 gpio = chip->base + offset;
Charulatha Va8be8da2011-04-22 16:38:16 +0530831 bank = container_of(chip, struct gpio_bank, chip);
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300832 reg = bank->base;
Kevin Hilman129fd222011-04-22 07:59:07 -0700833 mask = GPIO_BIT(bank, gpio);
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300834
835 if (gpio_is_input(bank, mask))
836 return _get_gpio_datain(bank, gpio);
837 else
838 return _get_gpio_dataout(bank, gpio);
David Brownell52e31342008-03-03 12:43:23 -0800839}
840
841static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
842{
843 struct gpio_bank *bank;
844 unsigned long flags;
845
846 bank = container_of(chip, struct gpio_bank, chip);
847 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700848 bank->set_dataout(bank, offset, value);
David Brownell52e31342008-03-03 12:43:23 -0800849 _set_gpio_direction(bank, offset, 0);
850 spin_unlock_irqrestore(&bank->lock, flags);
851 return 0;
852}
853
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700854static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
855 unsigned debounce)
856{
857 struct gpio_bank *bank;
858 unsigned long flags;
859
860 bank = container_of(chip, struct gpio_bank, chip);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800861
862 if (!bank->dbck) {
863 bank->dbck = clk_get(bank->dev, "dbclk");
864 if (IS_ERR(bank->dbck))
865 dev_err(bank->dev, "Could not get gpio dbck\n");
866 }
867
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700868 spin_lock_irqsave(&bank->lock, flags);
869 _set_gpio_debounce(bank, offset, debounce);
870 spin_unlock_irqrestore(&bank->lock, flags);
871
872 return 0;
873}
874
David Brownell52e31342008-03-03 12:43:23 -0800875static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
876{
877 struct gpio_bank *bank;
878 unsigned long flags;
879
880 bank = container_of(chip, struct gpio_bank, chip);
881 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700882 bank->set_dataout(bank, offset, value);
David Brownell52e31342008-03-03 12:43:23 -0800883 spin_unlock_irqrestore(&bank->lock, flags);
884}
885
David Brownella007b702008-12-10 17:35:25 -0800886static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
887{
888 struct gpio_bank *bank;
889
890 bank = container_of(chip, struct gpio_bank, chip);
891 return bank->virtual_irq_start + offset;
892}
893
David Brownell52e31342008-03-03 12:43:23 -0800894/*---------------------------------------------------------------------*/
895
Tony Lindgren9a748052010-12-07 16:26:56 -0800896static void __init omap_gpio_show_rev(struct gpio_bank *bank)
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700897{
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700898 static bool called;
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700899 u32 rev;
900
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700901 if (called || bank->regs->revision == USHRT_MAX)
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700902 return;
903
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700904 rev = __raw_readw(bank->base + bank->regs->revision);
905 pr_info("OMAP GPIO hardware version %d.%d\n",
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700906 (rev >> 4) & 0x0f, rev & 0x0f);
Kevin Hilmane5ff4442011-04-22 14:37:16 -0700907
908 called = true;
Tony Lindgren9f7065d2009-10-19 15:25:20 -0700909}
910
David Brownell8ba55c52008-02-26 11:10:50 -0800911/* This lock class tells lockdep that GPIO irqs are in a different
912 * category than their parents, so it won't report false recursion.
913 */
914static struct lock_class_key gpio_lock_class;
915
Charulatha V03e128c2011-05-05 19:58:01 +0530916static void omap_gpio_mod_init(struct gpio_bank *bank)
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800917{
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530918 void __iomem *base = bank->base;
919 u32 l = 0xffffffff;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800920
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530921 if (bank->width == 16)
922 l = 0xffff;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800923
Charulatha Vd0d665a2011-08-31 00:02:21 +0530924 if (bank->is_mpuio) {
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530925 __raw_writel(l, bank->base + bank->regs->irqenable);
926 return;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800927 }
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530928
929 _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv);
930 _gpio_rmw(base, bank->regs->irqstatus, l,
931 bank->regs->irqenable_inv == false);
932 _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->debounce_en != 0);
933 _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->ctrl != 0);
934 if (bank->regs->debounce_en)
935 _gpio_rmw(base, bank->regs->debounce_en, 0, 1);
936
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +0530937 /* Save OE default value (0xffffffff) in the context */
938 bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +0530939 /* Initialize interface clk ungated, module enabled */
940 if (bank->regs->ctrl)
941 _gpio_rmw(base, bank->regs->ctrl, 0, 1);
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800942}
943
Kevin Hilmanf8b46b52011-04-21 13:23:34 -0700944static __init void
945omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
946 unsigned int num)
947{
948 struct irq_chip_generic *gc;
949 struct irq_chip_type *ct;
950
951 gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base,
952 handle_simple_irq);
Todd Poynor83233742011-07-18 07:43:14 -0700953 if (!gc) {
954 dev_err(bank->dev, "Memory alloc failed for gc\n");
955 return;
956 }
957
Kevin Hilmanf8b46b52011-04-21 13:23:34 -0700958 ct = gc->chip_types;
959
960 /* NOTE: No ack required, reading IRQ status clears it. */
961 ct->chip.irq_mask = irq_gc_mask_set_bit;
962 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
963 ct->chip.irq_set_type = gpio_irq_type;
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530964
965 if (bank->regs->wkup_en)
Kevin Hilmanf8b46b52011-04-21 13:23:34 -0700966 ct->chip.irq_set_wake = gpio_wake_enable,
967
968 ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
969 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
970 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
971}
972
Russell Kingd52b31d2011-05-27 13:56:12 -0700973static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800974{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800975 int j;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800976 static int gpio;
977
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800978 /*
979 * REVISIT eventually switch from OMAP-specific gpio structs
980 * over to the generic ones
981 */
982 bank->chip.request = omap_gpio_request;
983 bank->chip.free = omap_gpio_free;
984 bank->chip.direction_input = gpio_input;
985 bank->chip.get = gpio_get;
986 bank->chip.direction_output = gpio_output;
987 bank->chip.set_debounce = gpio_debounce;
988 bank->chip.set = gpio_set;
989 bank->chip.to_irq = gpio_2irq;
Charulatha Vd0d665a2011-08-31 00:02:21 +0530990 if (bank->is_mpuio) {
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800991 bank->chip.label = "mpuio";
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +0530992 if (bank->regs->wkup_en)
993 bank->chip.dev = &omap_mpuio_device.dev;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800994 bank->chip.base = OMAP_MPUIO(0);
995 } else {
996 bank->chip.label = "gpio";
997 bank->chip.base = gpio;
Kevin Hilmand5f46242011-04-21 09:23:00 -0700998 gpio += bank->width;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -0800999 }
Kevin Hilmand5f46242011-04-21 09:23:00 -07001000 bank->chip.ngpio = bank->width;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001001
1002 gpiochip_add(&bank->chip);
1003
1004 for (j = bank->virtual_irq_start;
Kevin Hilmand5f46242011-04-21 09:23:00 -07001005 j < bank->virtual_irq_start + bank->width; j++) {
Thomas Gleixner1475b852011-03-22 17:11:09 +01001006 irq_set_lockdep_class(j, &gpio_lock_class);
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001007 irq_set_chip_data(j, bank);
Charulatha Vd0d665a2011-08-31 00:02:21 +05301008 if (bank->is_mpuio) {
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001009 omap_mpuio_alloc_gc(bank, j, bank->width);
1010 } else {
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001011 irq_set_chip(j, &gpio_irq_chip);
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001012 irq_set_handler(j, handle_simple_irq);
1013 set_irq_flags(j, IRQF_VALID);
1014 }
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001015 }
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001016 irq_set_chained_handler(bank->irq, gpio_irq_handler);
1017 irq_set_handler_data(bank->irq, bank);
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001018}
1019
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001020static int __devinit omap_gpio_probe(struct platform_device *pdev)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001021{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001022 struct omap_gpio_platform_data *pdata;
1023 struct resource *res;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001024 struct gpio_bank *bank;
Charulatha V03e128c2011-05-05 19:58:01 +05301025 int ret = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001026
Charulatha V03e128c2011-05-05 19:58:01 +05301027 if (!pdev->dev.platform_data) {
1028 ret = -EINVAL;
1029 goto err_exit;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001030 }
1031
Charulatha V03e128c2011-05-05 19:58:01 +05301032 bank = kzalloc(sizeof(struct gpio_bank), GFP_KERNEL);
1033 if (!bank) {
1034 dev_err(&pdev->dev, "Memory alloc failed for gpio_bank\n");
1035 ret = -ENOMEM;
1036 goto err_exit;
1037 }
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001038
1039 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1040 if (unlikely(!res)) {
Charulatha V03e128c2011-05-05 19:58:01 +05301041 dev_err(&pdev->dev, "GPIO Bank %i Invalid IRQ resource\n",
1042 pdev->id);
1043 ret = -ENODEV;
1044 goto err_free;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001045 }
1046
1047 bank->irq = res->start;
Charulatha V03e128c2011-05-05 19:58:01 +05301048 bank->id = pdev->id;
1049
1050 pdata = pdev->dev.platform_data;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001051 bank->virtual_irq_start = pdata->virtual_irq_start;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001052 bank->dev = &pdev->dev;
1053 bank->dbck_flag = pdata->dbck_flag;
Tony Lindgren5de62b82010-12-07 16:26:58 -08001054 bank->stride = pdata->bank_stride;
Kevin Hilmand5f46242011-04-21 09:23:00 -07001055 bank->width = pdata->bank_width;
Charulatha Vd0d665a2011-08-31 00:02:21 +05301056 bank->is_mpuio = pdata->is_mpuio;
Charulatha V803a2432011-05-05 17:04:12 +05301057 bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
Charulatha V0cde8d02011-05-05 20:15:16 +05301058 bank->loses_context = pdata->loses_context;
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301059 bank->get_context_loss_count = pdata->get_context_loss_count;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -07001060 bank->regs = pdata->regs;
1061
1062 if (bank->regs->set_dataout && bank->regs->clr_dataout)
1063 bank->set_dataout = _set_gpio_dataout_reg;
1064 else
1065 bank->set_dataout = _set_gpio_dataout_mask;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001066
1067 spin_lock_init(&bank->lock);
1068
1069 /* Static mapping, never released */
1070 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1071 if (unlikely(!res)) {
Charulatha V03e128c2011-05-05 19:58:01 +05301072 dev_err(&pdev->dev, "GPIO Bank %i Invalid mem resource\n",
1073 pdev->id);
1074 ret = -ENODEV;
1075 goto err_free;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001076 }
1077
1078 bank->base = ioremap(res->start, resource_size(res));
1079 if (!bank->base) {
Charulatha V03e128c2011-05-05 19:58:01 +05301080 dev_err(&pdev->dev, "Could not ioremap gpio bank%i\n",
1081 pdev->id);
1082 ret = -ENOMEM;
1083 goto err_free;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001084 }
1085
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301086 platform_set_drvdata(pdev, bank);
1087
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001088 pm_runtime_enable(bank->dev);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301089 pm_runtime_irq_safe(bank->dev);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001090 pm_runtime_get_sync(bank->dev);
1091
Charulatha Vd0d665a2011-08-31 00:02:21 +05301092 if (bank->is_mpuio)
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301093 mpuio_init(bank);
1094
Charulatha V03e128c2011-05-05 19:58:01 +05301095 omap_gpio_mod_init(bank);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001096 omap_gpio_chip_init(bank);
Tony Lindgren9a748052010-12-07 16:26:56 -08001097 omap_gpio_show_rev(bank);
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001098
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301099 pm_runtime_put(bank->dev);
1100
Charulatha V03e128c2011-05-05 19:58:01 +05301101 list_add_tail(&bank->node, &omap_gpio_list);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001102
Charulatha V03e128c2011-05-05 19:58:01 +05301103 return ret;
1104
1105err_free:
1106 kfree(bank);
1107err_exit:
1108 return ret;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001109}
1110
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301111#ifdef CONFIG_ARCH_OMAP2PLUS
1112
1113#if defined(CONFIG_PM_SLEEP)
1114static int omap_gpio_suspend(struct device *dev)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001115{
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301116 struct platform_device *pdev = to_platform_device(dev);
1117 struct gpio_bank *bank = platform_get_drvdata(pdev);
1118 void __iomem *base = bank->base;
1119 void __iomem *wakeup_enable;
1120 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001121
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301122 if (!bank->mod_usage || !bank->loses_context)
1123 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001124
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301125 if (!bank->regs->wkup_en || !bank->suspend_wakeup)
1126 return 0;
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +05301127
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301128 wakeup_enable = bank->base + bank->regs->wkup_en;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001129
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301130 spin_lock_irqsave(&bank->lock, flags);
1131 bank->saved_wakeup = __raw_readl(wakeup_enable);
1132 _gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);
1133 _gpio_rmw(base, bank->regs->wkup_en, bank->suspend_wakeup, 1);
1134 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001135
1136 return 0;
1137}
1138
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301139static int omap_gpio_resume(struct device *dev)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001140{
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301141 struct platform_device *pdev = to_platform_device(dev);
1142 struct gpio_bank *bank = platform_get_drvdata(pdev);
1143 void __iomem *base = bank->base;
1144 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001145
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301146 if (!bank->mod_usage || !bank->loses_context)
1147 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001148
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301149 if (!bank->regs->wkup_en || !bank->saved_wakeup)
1150 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001151
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301152 spin_lock_irqsave(&bank->lock, flags);
1153 _gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);
1154 _gpio_rmw(base, bank->regs->wkup_en, bank->saved_wakeup, 1);
1155 spin_unlock_irqrestore(&bank->lock, flags);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301156
1157 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001158}
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301159#endif /* CONFIG_PM_SLEEP */
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001160
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301161#if defined(CONFIG_PM_RUNTIME)
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301162static void omap_gpio_save_context(struct gpio_bank *bank);
1163static void omap_gpio_restore_context(struct gpio_bank *bank);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001164
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301165static int omap_gpio_runtime_suspend(struct device *dev)
1166{
1167 struct platform_device *pdev = to_platform_device(dev);
1168 struct gpio_bank *bank = platform_get_drvdata(pdev);
1169 u32 l1 = 0, l2 = 0;
1170 unsigned long flags;
1171
1172 spin_lock_irqsave(&bank->lock, flags);
1173 if (bank->power_mode != OFF_MODE) {
1174 bank->power_mode = 0;
1175 goto save_gpio_context;
1176 }
1177 /*
1178 * If going to OFF, remove triggering for all
1179 * non-wakeup GPIOs. Otherwise spurious IRQs will be
1180 * generated. See OMAP2420 Errata item 1.101.
1181 */
1182 if (!(bank->enabled_non_wakeup_gpios))
1183 goto save_gpio_context;
1184
1185 bank->saved_datain = __raw_readl(bank->base +
1186 bank->regs->datain);
1187 l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
1188 l2 = __raw_readl(bank->base + bank->regs->risingdetect);
1189
1190 bank->saved_fallingdetect = l1;
1191 bank->saved_risingdetect = l2;
1192 l1 &= ~bank->enabled_non_wakeup_gpios;
1193 l2 &= ~bank->enabled_non_wakeup_gpios;
1194
1195 __raw_writel(l1, bank->base + bank->regs->fallingdetect);
1196 __raw_writel(l2, bank->base + bank->regs->risingdetect);
1197
1198 bank->workaround_enabled = true;
1199
1200save_gpio_context:
1201 if (bank->get_context_loss_count)
1202 bank->context_loss_count =
1203 bank->get_context_loss_count(bank->dev);
1204
1205 omap_gpio_save_context(bank);
Tarun Kanti DebBarma72f83af2011-11-24 03:03:28 +05301206 _gpio_dbck_disable(bank);
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301207 spin_unlock_irqrestore(&bank->lock, flags);
1208
1209 return 0;
1210}
1211
1212static int omap_gpio_runtime_resume(struct device *dev)
1213{
1214 struct platform_device *pdev = to_platform_device(dev);
1215 struct gpio_bank *bank = platform_get_drvdata(pdev);
1216 int context_lost_cnt_after;
1217 u32 l = 0, gen, gen0, gen1;
1218 unsigned long flags;
1219
1220 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma72f83af2011-11-24 03:03:28 +05301221 _gpio_dbck_enable(bank);
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301222 if (!bank->enabled_non_wakeup_gpios || !bank->workaround_enabled) {
1223 spin_unlock_irqrestore(&bank->lock, flags);
1224 return 0;
1225 }
1226
1227 if (bank->get_context_loss_count) {
1228 context_lost_cnt_after =
1229 bank->get_context_loss_count(bank->dev);
1230 if (context_lost_cnt_after != bank->context_loss_count ||
1231 !context_lost_cnt_after) {
1232 omap_gpio_restore_context(bank);
1233 } else {
1234 spin_unlock_irqrestore(&bank->lock, flags);
1235 return 0;
1236 }
1237 }
1238
1239 __raw_writel(bank->saved_fallingdetect,
1240 bank->base + bank->regs->fallingdetect);
1241 __raw_writel(bank->saved_risingdetect,
1242 bank->base + bank->regs->risingdetect);
1243 l = __raw_readl(bank->base + bank->regs->datain);
1244
1245 /*
1246 * Check if any of the non-wakeup interrupt GPIOs have changed
1247 * state. If so, generate an IRQ by software. This is
1248 * horribly racy, but it's the best we can do to work around
1249 * this silicon bug.
1250 */
1251 l ^= bank->saved_datain;
1252 l &= bank->enabled_non_wakeup_gpios;
1253
1254 /*
1255 * No need to generate IRQs for the rising edge for gpio IRQs
1256 * configured with falling edge only; and vice versa.
1257 */
1258 gen0 = l & bank->saved_fallingdetect;
1259 gen0 &= bank->saved_datain;
1260
1261 gen1 = l & bank->saved_risingdetect;
1262 gen1 &= ~(bank->saved_datain);
1263
1264 /* FIXME: Consider GPIO IRQs with level detections properly! */
1265 gen = l & (~(bank->saved_fallingdetect) & ~(bank->saved_risingdetect));
1266 /* Consider all GPIO IRQs needed to be updated */
1267 gen |= gen0 | gen1;
1268
1269 if (gen) {
1270 u32 old0, old1;
1271
1272 old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
1273 old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
1274
1275 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1276 __raw_writel(old0 | gen, bank->base +
1277 bank->regs->leveldetect0);
1278 __raw_writel(old1 | gen, bank->base +
1279 bank->regs->leveldetect1);
1280 }
1281
1282 if (cpu_is_omap44xx()) {
1283 __raw_writel(old0 | l, bank->base +
1284 bank->regs->leveldetect0);
1285 __raw_writel(old1 | l, bank->base +
1286 bank->regs->leveldetect1);
1287 }
1288 __raw_writel(old0, bank->base + bank->regs->leveldetect0);
1289 __raw_writel(old1, bank->base + bank->regs->leveldetect1);
1290 }
1291
1292 bank->workaround_enabled = false;
1293 spin_unlock_irqrestore(&bank->lock, flags);
1294
1295 return 0;
1296}
1297#endif /* CONFIG_PM_RUNTIME */
1298
1299void omap2_gpio_prepare_for_idle(int pwr_mode)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001300{
Charulatha V03e128c2011-05-05 19:58:01 +05301301 struct gpio_bank *bank;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001302
Charulatha V03e128c2011-05-05 19:58:01 +05301303 list_for_each_entry(bank, &omap_gpio_list, node) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301304 if (!bank->mod_usage || !bank->loses_context)
Charulatha V03e128c2011-05-05 19:58:01 +05301305 continue;
1306
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301307 bank->power_mode = pwr_mode;
1308
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301309 pm_runtime_put_sync_suspend(bank->dev);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001310 }
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001311}
1312
Kevin Hilman43ffcd92009-01-27 11:09:24 -08001313void omap2_gpio_resume_after_idle(void)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001314{
Charulatha V03e128c2011-05-05 19:58:01 +05301315 struct gpio_bank *bank;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001316
Charulatha V03e128c2011-05-05 19:58:01 +05301317 list_for_each_entry(bank, &omap_gpio_list, node) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301318 if (!bank->mod_usage || !bank->loses_context)
Charulatha V03e128c2011-05-05 19:58:01 +05301319 continue;
1320
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301321 pm_runtime_get_sync(bank->dev);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001322 }
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001323}
1324
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301325#if defined(CONFIG_PM_RUNTIME)
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301326static void omap_gpio_save_context(struct gpio_bank *bank)
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301327{
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301328 bank->context.irqenable1 =
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301329 __raw_readl(bank->base + bank->regs->irqenable);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301330 bank->context.irqenable2 =
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301331 __raw_readl(bank->base + bank->regs->irqenable2);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301332 bank->context.wake_en =
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301333 __raw_readl(bank->base + bank->regs->wkup_en);
1334 bank->context.ctrl = __raw_readl(bank->base + bank->regs->ctrl);
1335 bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301336 bank->context.leveldetect0 =
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301337 __raw_readl(bank->base + bank->regs->leveldetect0);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301338 bank->context.leveldetect1 =
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301339 __raw_readl(bank->base + bank->regs->leveldetect1);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301340 bank->context.risingdetect =
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301341 __raw_readl(bank->base + bank->regs->risingdetect);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301342 bank->context.fallingdetect =
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301343 __raw_readl(bank->base + bank->regs->fallingdetect);
1344 bank->context.dataout = __raw_readl(bank->base + bank->regs->dataout);
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301345}
1346
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301347static void omap_gpio_restore_context(struct gpio_bank *bank)
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301348{
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301349 __raw_writel(bank->context.irqenable1,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301350 bank->base + bank->regs->irqenable);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301351 __raw_writel(bank->context.irqenable2,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301352 bank->base + bank->regs->irqenable2);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301353 __raw_writel(bank->context.wake_en,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301354 bank->base + bank->regs->wkup_en);
1355 __raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
1356 __raw_writel(bank->context.oe, bank->base + bank->regs->direction);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301357 __raw_writel(bank->context.leveldetect0,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301358 bank->base + bank->regs->leveldetect0);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301359 __raw_writel(bank->context.leveldetect1,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301360 bank->base + bank->regs->leveldetect1);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301361 __raw_writel(bank->context.risingdetect,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301362 bank->base + bank->regs->risingdetect);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301363 __raw_writel(bank->context.fallingdetect,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301364 bank->base + bank->regs->fallingdetect);
1365 __raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301366}
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301367#endif /* CONFIG_PM_RUNTIME */
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301368#else
1369#define omap_gpio_suspend NULL
1370#define omap_gpio_resume NULL
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301371#define omap_gpio_runtime_suspend NULL
1372#define omap_gpio_runtime_resume NULL
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301373#endif
1374
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301375static const struct dev_pm_ops gpio_pm_ops = {
1376 SET_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume)
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301377 SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
1378 NULL)
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301379};
1380
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001381static struct platform_driver omap_gpio_driver = {
1382 .probe = omap_gpio_probe,
1383 .driver = {
1384 .name = "omap_gpio",
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301385 .pm = &gpio_pm_ops,
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001386 },
1387};
1388
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001389/*
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001390 * gpio driver register needs to be done before
1391 * machine_init functions access gpio APIs.
1392 * Hence omap_gpio_drv_reg() is a postcore_initcall.
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001393 */
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001394static int __init omap_gpio_drv_reg(void)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001395{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001396 return platform_driver_register(&omap_gpio_driver);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001397}
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001398postcore_initcall(omap_gpio_drv_reg);