blob: 9629b5ca66b671e65c63085926d6d3f8f7c3bacd [file] [log] [blame]
Daniel Walker2682fd32010-02-24 15:47:58 -08001/*
2 * Copyright (C) 2007 Google, Inc.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Daniel Walker2682fd32010-02-24 15:47:58 -08004 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/gpio.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080019#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/input.h>
22#include <linux/io.h>
23#include <linux/delay.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#include <linux/bootmem.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080025#include <linux/power_supply.h>
26
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <mach/msm_memtypes.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080028#include <mach/hardware.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/flash.h>
33#include <asm/setup.h>
34#ifdef CONFIG_CACHE_L2X0
35#include <asm/hardware/cache-l2x0.h>
36#endif
37
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038#include <asm/mach/mmc.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080039#include <mach/vreg.h>
40#include <mach/mpp.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080041#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042#include <mach/pmic.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080043#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070044#include <mach/msm_rpcrouter.h>
45#include <mach/msm_hsusb.h>
46#include <mach/rpc_hsusb.h>
47#include <mach/rpc_pmapp.h>
48#include <mach/msm_serial_hs.h>
49#include <mach/memory.h>
50#include <mach/msm_battery.h>
51#include <mach/rpc_server_handset.h>
52#include <mach/msm_tsif.h>
53#include <mach/socinfo.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080054
55#include <linux/mtd/nand.h>
56#include <linux/mtd/partitions.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <linux/i2c.h>
58#include <linux/android_pmem.h>
59#include <mach/camera.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080060
Manu Gautam99ed3912011-10-13 18:00:55 +053061#ifdef CONFIG_USB_G_ANDROID
62#include <linux/usb/android.h>
63#include <mach/usbdiag.h>
64#endif
65
Daniel Walker2682fd32010-02-24 15:47:58 -080066#include "devices.h"
Daniel Walker2682fd32010-02-24 15:47:58 -080067#include "clock.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -070068#include "acpuclock.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#include "msm-keypad-devices.h"
70#include "pm.h"
71
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070072#ifdef CONFIG_ARCH_MSM7X25
73#define MSM_PMEM_MDP_SIZE 0xb21000
74#define MSM_PMEM_ADSP_SIZE 0x97b000
75#define MSM_PMEM_AUDIO_SIZE 0x121000
76#define MSM_FB_SIZE 0x200000
77#define PMEM_KERNEL_EBI1_SIZE 0x64000
78#endif
79
80#ifdef CONFIG_ARCH_MSM7X27
81#define MSM_PMEM_MDP_SIZE 0x1B76000
82#define MSM_PMEM_ADSP_SIZE 0xC8A000
83#define MSM_PMEM_AUDIO_SIZE 0x5B000
84
85#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
86#define MSM_FB_SIZE 0x233000
87#else
88#define MSM_FB_SIZE 0x177000
89#endif
90
91#define PMEM_KERNEL_EBI1_SIZE 0x1C000
92#endif
Daniel Walker2682fd32010-02-24 15:47:58 -080093
94static struct resource smc91x_resources[] = {
95 [0] = {
96 .start = 0x9C004300,
97 .end = 0x9C0043ff,
98 .flags = IORESOURCE_MEM,
99 },
100 [1] = {
101 .start = MSM_GPIO_TO_INT(132),
102 .end = MSM_GPIO_TO_INT(132),
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
Manu Gautam99ed3912011-10-13 18:00:55 +0530107static struct platform_device smc91x_device = {
108 .name = "smc91x",
109 .id = 0,
110 .num_resources = ARRAY_SIZE(smc91x_resources),
111 .resource = smc91x_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112};
113
Manu Gautam99ed3912011-10-13 18:00:55 +0530114#ifdef CONFIG_USB_G_ANDROID
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700115static struct android_usb_platform_data android_usb_pdata = {
Manu Gautam99ed3912011-10-13 18:00:55 +0530116 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700117};
118
119static struct platform_device android_usb_device = {
120 .name = "android_usb",
121 .id = -1,
122 .dev = {
123 .platform_data = &android_usb_pdata,
124 },
125};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700126#endif
127
128#ifdef CONFIG_USB_EHCI_MSM_72K
129static void msm_hsusb_vbus_power(unsigned phy_info, int on)
130{
131 if (on)
132 msm_hsusb_vbus_powerup();
133 else
134 msm_hsusb_vbus_shutdown();
135}
136
137static struct msm_usb_host_platform_data msm_usb_host_pdata = {
138 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_65NM),
139};
140
141static void __init msm7x2x_init_host(void)
142{
143 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
144 return;
145
146 msm_add_host(0, &msm_usb_host_pdata);
147}
148#endif
149
150#ifdef CONFIG_USB_MSM_OTG_72K
151static int hsusb_rpc_connect(int connect)
152{
153 if (connect)
154 return msm_hsusb_rpc_connect();
155 else
156 return msm_hsusb_rpc_close();
157}
158#endif
159
160#ifdef CONFIG_USB_MSM_OTG_72K
161struct vreg *vreg_3p3;
162static int msm_hsusb_ldo_init(int init)
163{
164 if (init) {
165 /*
166 * PHY 3.3V analog domain(VDDA33) is powered up by
167 * an always enabled power supply (LP5900TL-3.3).
168 * USB VREG default source is VBUS line. Turning
169 * on USB VREG has a side effect on the USB suspend
170 * current. Hence USB VREG is explicitly turned
171 * off here.
172 */
173 vreg_3p3 = vreg_get(NULL, "usb");
174 if (IS_ERR(vreg_3p3))
175 return PTR_ERR(vreg_3p3);
176 vreg_enable(vreg_3p3);
177 vreg_disable(vreg_3p3);
178 vreg_put(vreg_3p3);
179 }
180
181 return 0;
182}
183
184static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
185{
186 int ret;
187
188 if (init) {
189 ret = msm_pm_app_rpc_init(callback);
190 } else {
191 msm_pm_app_rpc_deinit(callback);
192 ret = 0;
193 }
194 return ret;
195}
196
197static int msm_otg_rpc_phy_reset(void __iomem *regs)
198{
199 return msm_hsusb_phy_reset();
200}
201
202static struct msm_otg_platform_data msm_otg_pdata = {
203 .rpc_connect = hsusb_rpc_connect,
204 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
205 .chg_vbus_draw = hsusb_chg_vbus_draw,
206 .chg_connected = hsusb_chg_connected,
207 .chg_init = hsusb_chg_init,
208#ifdef CONFIG_USB_EHCI_MSM_72K
209 .vbus_power = msm_hsusb_vbus_power,
210#endif
211 .ldo_init = msm_hsusb_ldo_init,
212 .pclk_required_during_lpm = 1,
213 .pclk_src_name = "ebi1_usb_clk",
214};
215
216#ifdef CONFIG_USB_GADGET
217static struct msm_hsusb_gadget_platform_data msm_gadget_pdata;
218#endif
219#endif
220
221#define SND(desc, num) { .name = #desc, .id = num }
222static struct snd_endpoint snd_endpoints_list[] = {
223 SND(HANDSET, 0),
224 SND(MONO_HEADSET, 2),
225 SND(HEADSET, 3),
226 SND(SPEAKER, 6),
227 SND(TTY_HEADSET, 8),
228 SND(TTY_VCO, 9),
229 SND(TTY_HCO, 10),
230 SND(BT, 12),
231 SND(IN_S_SADC_OUT_HANDSET, 16),
232 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
233 SND(CURRENT, 27),
234};
235#undef SND
236
237static struct msm_snd_endpoints msm_device_snd_endpoints = {
238 .endpoints = snd_endpoints_list,
239 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
240};
241
242static struct platform_device msm_device_snd = {
243 .name = "msm_snd",
244 .id = -1,
245 .dev = {
246 .platform_data = &msm_device_snd_endpoints
247 },
248};
249
250#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
251 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
252 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
253 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
254 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
255 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
256#ifdef CONFIG_ARCH_MSM7X25
257#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
258 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
259 (1<<MSM_ADSP_CODEC_MP3))
260#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
261 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
262 (1<<MSM_ADSP_CODEC_MP3))
263#define DEC3_FORMAT 0
264#define DEC4_FORMAT 0
265#else
266#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
267 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
268 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
269 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
270 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
271 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
272#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
273 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
274 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
275 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
276 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
277 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
278#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
279 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
280 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
281 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
282 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
283 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
284#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
285#endif
286
287static unsigned int dec_concurrency_table[] = {
288 /* Audio LP */
289 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
290 0, 0, 0,
291
292 /* Concurrency 1 */
293 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
294 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
295 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
296 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
297 (DEC4_FORMAT),
298
299 /* Concurrency 2 */
300 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
301 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
302 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
303 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
304 (DEC4_FORMAT),
305
306 /* Concurrency 3 */
307 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
308 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
309 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
310 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
311 (DEC4_FORMAT),
312
313 /* Concurrency 4 */
314 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
315 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
316 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
317 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
318 (DEC4_FORMAT),
319
320 /* Concurrency 5 */
321 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
322 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
323 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
324 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
325 (DEC4_FORMAT),
326
327 /* Concurrency 6 */
328 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
329 0, 0, 0, 0,
330
331 /* Concurrency 7 */
332 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
333 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
334 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
335 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
336 (DEC4_FORMAT),
337};
338
339#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
340 .module_queueid = queueid, .module_decid = decid, \
341 .nr_codec_support = nr_codec}
342
343static struct msm_adspdec_info dec_info_list[] = {
344 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
345#ifdef CONFIG_ARCH_MSM7X25
346 DEC_INFO("AUDPLAY1TASK", 14, 1, 5), /* AudPlay1BitStreamCtrlQueue */
347 DEC_INFO("AUDPLAY2TASK", 15, 2, 5), /* AudPlay2BitStreamCtrlQueue */
348 DEC_INFO("AUDPLAY3TASK", 16, 3, 0), /* AudPlay3BitStreamCtrlQueue */
349 DEC_INFO("AUDPLAY4TASK", 17, 4, 0), /* AudPlay4BitStreamCtrlQueue */
350#else
351 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
352 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
353 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
354 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
355#endif
356};
357
358static struct msm_adspdec_database msm_device_adspdec_database = {
359 .num_dec = ARRAY_SIZE(dec_info_list),
360 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
361 ARRAY_SIZE(dec_info_list)),
362 .dec_concurrency_table = dec_concurrency_table,
363 .dec_info_list = dec_info_list,
364};
365
366static struct platform_device msm_device_adspdec = {
367 .name = "msm_adspdec",
368 .id = -1,
369 .dev = {
370 .platform_data = &msm_device_adspdec_database
371 },
372};
373
374static struct android_pmem_platform_data android_pmem_pdata = {
375 .name = "pmem",
376 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
377 .cached = 1,
378 .memory_type = MEMTYPE_EBI1,
379};
380
381static struct android_pmem_platform_data android_pmem_adsp_pdata = {
382 .name = "pmem_adsp",
383 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
384 .cached = 0,
385 .memory_type = MEMTYPE_EBI1,
386};
387
388static struct android_pmem_platform_data android_pmem_audio_pdata = {
389 .name = "pmem_audio",
390 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
391 .cached = 0,
392 .memory_type = MEMTYPE_EBI1,
393};
394
395static struct platform_device android_pmem_device = {
396 .name = "android_pmem",
397 .id = 0,
398 .dev = { .platform_data = &android_pmem_pdata },
399};
400
401static struct platform_device android_pmem_adsp_device = {
402 .name = "android_pmem",
403 .id = 1,
404 .dev = { .platform_data = &android_pmem_adsp_pdata },
405};
406
407static struct platform_device android_pmem_audio_device = {
408 .name = "android_pmem",
409 .id = 2,
410 .dev = { .platform_data = &android_pmem_audio_pdata },
411};
412
413static struct msm_handset_platform_data hs_platform_data = {
414 .hs_name = "7k_handset",
415 .pwr_key_delay_ms = 500, /* 0 will disable end key */
416};
417
418static struct platform_device hs_device = {
419 .name = "msm-handset",
420 .id = -1,
421 .dev = {
422 .platform_data = &hs_platform_data,
423 },
424};
425
426/* TSIF begin */
427#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
428
429#define TSIF_B_SYNC GPIO_CFG(87, 5, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
430#define TSIF_B_DATA GPIO_CFG(86, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
431#define TSIF_B_EN GPIO_CFG(85, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
432#define TSIF_B_CLK GPIO_CFG(84, 4, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
433
434static const struct msm_gpio tsif_gpios[] = {
435 { .gpio_cfg = TSIF_B_CLK, .label = "tsif_clk", },
436 { .gpio_cfg = TSIF_B_EN, .label = "tsif_en", },
437 { .gpio_cfg = TSIF_B_DATA, .label = "tsif_data", },
438 { .gpio_cfg = TSIF_B_SYNC, .label = "tsif_sync", },
439};
440
441static struct msm_tsif_platform_data tsif_platform_data = {
442 .num_gpios = ARRAY_SIZE(tsif_gpios),
443 .gpios = tsif_gpios,
Matt Wagantall640e5fd2011-08-17 16:08:53 -0700444 .tsif_clk = "core_clk",
445 .tsif_pclk = "iface_clk",
446 .tsif_ref_clk = "ref_clk",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447};
448#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
449/* TSIF end */
450
451#define LCDC_CONFIG_PROC 21
452#define LCDC_UN_CONFIG_PROC 22
453#define LCDC_API_PROG 0x30000066
454#define LCDC_API_VERS 0x00010001
455
456#define GPIO_OUT_132 132
457#define GPIO_OUT_131 131
458#define GPIO_OUT_103 103
459#define GPIO_OUT_102 102
460#define GPIO_OUT_88 88
461
462static struct msm_rpc_endpoint *lcdc_ep;
463
464static int msm_fb_lcdc_config(int on)
465{
466 int rc = 0;
467 struct rpc_request_hdr hdr;
468
469 if (on)
470 pr_info("lcdc config\n");
471 else
472 pr_info("lcdc un-config\n");
473
474 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
475 if (IS_ERR(lcdc_ep)) {
476 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
477 __func__, PTR_ERR(lcdc_ep));
478 return -EINVAL;
479 }
480
481 rc = msm_rpc_call(lcdc_ep,
482 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
483 &hdr, sizeof(hdr),
484 5 * HZ);
485 if (rc)
486 printk(KERN_ERR
487 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
488
489 msm_rpc_close(lcdc_ep);
490 return rc;
491}
492
493static int gpio_array_num[] = {
494 GPIO_OUT_132, /* spi_clk */
495 GPIO_OUT_131, /* spi_cs */
496 GPIO_OUT_103, /* spi_sdi */
497 GPIO_OUT_102, /* spi_sdoi */
498 GPIO_OUT_88
499 };
500
501static void lcdc_gordon_gpio_init(void)
502{
503 if (gpio_request(GPIO_OUT_132, "spi_clk"))
504 pr_err("failed to request gpio spi_clk\n");
505 if (gpio_request(GPIO_OUT_131, "spi_cs"))
506 pr_err("failed to request gpio spi_cs\n");
507 if (gpio_request(GPIO_OUT_103, "spi_sdi"))
508 pr_err("failed to request gpio spi_sdi\n");
509 if (gpio_request(GPIO_OUT_102, "spi_sdoi"))
510 pr_err("failed to request gpio spi_sdoi\n");
511 if (gpio_request(GPIO_OUT_88, "gpio_dac"))
512 pr_err("failed to request gpio_dac\n");
513}
514
515static uint32_t lcdc_gpio_table[] = {
516 GPIO_CFG(GPIO_OUT_132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
517 GPIO_CFG(GPIO_OUT_131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
518 GPIO_CFG(GPIO_OUT_103, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
519 GPIO_CFG(GPIO_OUT_102, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
520 GPIO_CFG(GPIO_OUT_88, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
521};
522
523static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
524{
525 int n, rc;
526 for (n = 0; n < len; n++) {
527 rc = gpio_tlmm_config(table[n],
528 enable ? GPIO_CFG_ENABLE : GPIO_CFG_DISABLE);
529 if (rc) {
530 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
531 __func__, table[n], rc);
532 break;
533 }
534 }
535}
536
537static void lcdc_gordon_config_gpios(int enable)
538{
539 config_lcdc_gpio_table(lcdc_gpio_table,
540 ARRAY_SIZE(lcdc_gpio_table), enable);
541}
542
543static char *msm_fb_lcdc_vreg[] = {
544 "gp5"
545};
546
547static int msm_fb_lcdc_power_save(int on)
548{
549 struct vreg *vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
550 int i, rc = 0;
551
552 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
553 if (on) {
554 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
555 rc = vreg_enable(vreg[i]);
556 if (rc) {
557 printk(KERN_ERR "vreg_enable: %s vreg"
558 "operation failed \n",
559 msm_fb_lcdc_vreg[i]);
560 goto bail;
561 }
562 } else {
563 int tmp;
564 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
565 tmp = vreg_disable(vreg[i]);
566 if (tmp) {
567 printk(KERN_ERR "vreg_disable: %s vreg "
568 "operation failed \n",
569 msm_fb_lcdc_vreg[i]);
570 if (!rc)
571 rc = tmp;
572 }
573 tmp = gpio_tlmm_config(GPIO_CFG(GPIO_OUT_88, 0,
574 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
575 GPIO_CFG_2MA), GPIO_CFG_ENABLE);
576 if (tmp) {
577 printk(KERN_ERR "gpio_tlmm_config failed\n");
578 if (!rc)
579 rc = tmp;
580 }
581 gpio_set_value(88, 0);
582 mdelay(15);
583 gpio_set_value(88, 1);
584 mdelay(15);
585 }
586 }
587
588 return rc;
589
590bail:
591 if (on) {
592 for (; i > 0; i--)
593 vreg_disable(vreg[i - 1]);
594 }
595
596 return rc;
597}
598static struct lcdc_platform_data lcdc_pdata = {
599 .lcdc_gpio_config = msm_fb_lcdc_config,
600 .lcdc_power_save = msm_fb_lcdc_power_save,
601};
602
603static struct msm_panel_common_pdata lcdc_gordon_panel_data = {
604 .panel_config_gpio = lcdc_gordon_config_gpios,
605 .gpio_num = gpio_array_num,
606};
607
608static struct platform_device lcdc_gordon_panel_device = {
609 .name = "lcdc_gordon_vga",
610 .id = 0,
611 .dev = {
612 .platform_data = &lcdc_gordon_panel_data,
613 }
614};
615
616static struct resource msm_fb_resources[] = {
617 {
618 .flags = IORESOURCE_DMA,
619 }
620};
621
622static int msm_fb_detect_panel(const char *name)
623{
624 int ret = -EPERM;
625
626 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
627 if (!strcmp(name, "lcdc_gordon_vga"))
628 ret = 0;
629 else
630 ret = -ENODEV;
631 }
632
633 return ret;
634}
635
636static struct msm_fb_platform_data msm_fb_pdata = {
637 .detect_client = msm_fb_detect_panel,
638 .mddi_prescan = 1,
639};
640
641static struct platform_device msm_fb_device = {
642 .name = "msm_fb",
643 .id = 0,
644 .num_resources = ARRAY_SIZE(msm_fb_resources),
645 .resource = msm_fb_resources,
646 .dev = {
647 .platform_data = &msm_fb_pdata,
648 }
649};
650
651#ifdef CONFIG_BT
652static struct platform_device msm_bt_power_device = {
653 .name = "bt_power",
654};
655
656enum {
657 BT_WAKE,
658 BT_RFR,
659 BT_CTS,
660 BT_RX,
661 BT_TX,
662 BT_PCM_DOUT,
663 BT_PCM_DIN,
664 BT_PCM_SYNC,
665 BT_PCM_CLK,
666 BT_HOST_WAKE,
667};
668
669static unsigned bt_config_power_on[] = {
670 GPIO_CFG(42, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* WAKE */
671 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* RFR */
672 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* CTS */
673 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Rx */
674 GPIO_CFG(46, 3, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Tx */
675 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DOUT */
676 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DIN */
677 GPIO_CFG(70, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_SYNC */
678 GPIO_CFG(71, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_CLK */
679 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* HOST_WAKE */
680};
681static unsigned bt_config_power_off[] = {
682 GPIO_CFG(42, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* WAKE */
683 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* RFR */
684 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* CTS */
685 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Rx */
686 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Tx */
687 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DOUT */
688 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DIN */
689 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_SYNC */
690 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_CLK */
691 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HOST_WAKE */
692};
693
694static int bluetooth_power(int on)
695{
696 struct vreg *vreg_bt;
697 int pin, rc;
698
699 printk(KERN_DEBUG "%s\n", __func__);
700
701 /* do not have vreg bt defined, gp6 is the same */
702 /* vreg_get parameter 1 (struct device *) is ignored */
703 vreg_bt = vreg_get(NULL, "gp6");
704
705 if (IS_ERR(vreg_bt)) {
706 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
707 __func__, PTR_ERR(vreg_bt));
708 return PTR_ERR(vreg_bt);
709 }
710
711 if (on) {
712 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); pin++) {
713 rc = gpio_tlmm_config(bt_config_power_on[pin],
714 GPIO_CFG_ENABLE);
715 if (rc) {
716 printk(KERN_ERR
717 "%s: gpio_tlmm_config(%#x)=%d\n",
718 __func__, bt_config_power_on[pin], rc);
719 return -EIO;
720 }
721 }
722
723 /* units of mV, steps of 50 mV */
724 rc = vreg_set_level(vreg_bt, 2600);
725 if (rc) {
726 printk(KERN_ERR "%s: vreg set level failed (%d)\n",
727 __func__, rc);
728 return -EIO;
729 }
730 rc = vreg_enable(vreg_bt);
731 if (rc) {
732 printk(KERN_ERR "%s: vreg enable failed (%d)\n",
733 __func__, rc);
734 return -EIO;
735 }
736 } else {
737 rc = vreg_disable(vreg_bt);
738 if (rc) {
739 printk(KERN_ERR "%s: vreg disable failed (%d)\n",
740 __func__, rc);
741 return -EIO;
742 }
743 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); pin++) {
744 rc = gpio_tlmm_config(bt_config_power_off[pin],
745 GPIO_CFG_ENABLE);
746 if (rc) {
747 printk(KERN_ERR
748 "%s: gpio_tlmm_config(%#x)=%d\n",
749 __func__, bt_config_power_off[pin], rc);
750 return -EIO;
751 }
752 }
753 }
754 return 0;
755}
756
757static void __init bt_power_init(void)
758{
759 msm_bt_power_device.dev.platform_data = &bluetooth_power;
760}
761#else
762#define bt_power_init(x) do {} while (0)
763#endif
764
765static struct platform_device msm_device_pmic_leds = {
766 .name = "pmic-leds",
767 .id = -1,
768};
769
770static struct resource bluesleep_resources[] = {
771 {
772 .name = "gpio_host_wake",
773 .start = 83,
774 .end = 83,
775 .flags = IORESOURCE_IO,
776 },
777 {
778 .name = "gpio_ext_wake",
779 .start = 42,
780 .end = 42,
781 .flags = IORESOURCE_IO,
782 },
783 {
784 .name = "host_wake",
785 .start = MSM_GPIO_TO_INT(83),
786 .end = MSM_GPIO_TO_INT(83),
787 .flags = IORESOURCE_IRQ,
788 },
789};
790
791static struct platform_device msm_bluesleep_device = {
792 .name = "bluesleep",
793 .id = -1,
794 .num_resources = ARRAY_SIZE(bluesleep_resources),
795 .resource = bluesleep_resources,
796};
797
798static struct i2c_board_info i2c_devices[] = {
799#ifdef CONFIG_MT9D112
800 {
801 I2C_BOARD_INFO("mt9d112", 0x78 >> 1),
802 },
803#endif
804#ifdef CONFIG_S5K3E2FX
805 {
806 I2C_BOARD_INFO("s5k3e2fx", 0x20 >> 1),
807 },
808#endif
809#ifdef CONFIG_MT9P012
810 {
811 I2C_BOARD_INFO("mt9p012", 0x6C >> 1),
812 },
813#endif
814#ifdef CONFIG_MT9P012_KM
815 {
816 I2C_BOARD_INFO("mt9p012_km", 0x6C >> 2),
817 },
818#endif
819#if defined(CONFIG_MT9T013) || defined(CONFIG_SENSORS_MT9T013)
820 {
821 I2C_BOARD_INFO("mt9t013", 0x6C),
822 },
823#endif
824#ifdef CONFIG_VB6801
825 {
826 I2C_BOARD_INFO("vb6801", 0x20),
827 },
828#endif
829};
830
831#ifdef CONFIG_MSM_CAMERA
832static uint32_t camera_off_gpio_table[] = {
833 /* parallel CAMERA interfaces */
834 GPIO_CFG(0, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
835 GPIO_CFG(1, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
836 GPIO_CFG(2, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
837 GPIO_CFG(3, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
838 GPIO_CFG(4, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
839 GPIO_CFG(5, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
840 GPIO_CFG(6, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
841 GPIO_CFG(7, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
842 GPIO_CFG(8, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
843 GPIO_CFG(9, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
844 GPIO_CFG(10, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
845 GPIO_CFG(11, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
846 GPIO_CFG(12, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCLK */
847 GPIO_CFG(13, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
848 GPIO_CFG(14, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
849 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* MCLK */
850};
851
852static uint32_t camera_on_gpio_table[] = {
853 /* parallel CAMERA interfaces */
854 GPIO_CFG(0, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
855 GPIO_CFG(1, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
856 GPIO_CFG(2, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
857 GPIO_CFG(3, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
858 GPIO_CFG(4, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
859 GPIO_CFG(5, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
860 GPIO_CFG(6, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
861 GPIO_CFG(7, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
862 GPIO_CFG(8, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
863 GPIO_CFG(9, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
864 GPIO_CFG(10, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
865 GPIO_CFG(11, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
866 GPIO_CFG(12, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* PCLK */
867 GPIO_CFG(13, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
868 GPIO_CFG(14, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
869 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* MCLK */
870 };
871
872static void config_gpio_table(uint32_t *table, int len)
873{
874 int n, rc;
875 for (n = 0; n < len; n++) {
876 rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE);
877 if (rc) {
878 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
879 __func__, table[n], rc);
880 break;
881 }
882 }
883}
884
885static struct vreg *vreg_gp2;
886static struct vreg *vreg_gp3;
887
888static void msm_camera_vreg_config(int vreg_en)
889{
890 int rc;
891
892 if (vreg_gp2 == NULL) {
893 vreg_gp2 = vreg_get(NULL, "gp2");
894 if (IS_ERR(vreg_gp2)) {
895 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
896 __func__, "gp2", PTR_ERR(vreg_gp2));
897 return;
898 }
899
900 rc = vreg_set_level(vreg_gp2, 1800);
901 if (rc) {
902 printk(KERN_ERR "%s: GP2 set_level failed (%d)\n",
903 __func__, rc);
904 }
905 }
906
907 if (vreg_gp3 == NULL) {
908 vreg_gp3 = vreg_get(NULL, "gp3");
909 if (IS_ERR(vreg_gp3)) {
910 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
911 __func__, "gp3", PTR_ERR(vreg_gp3));
912 return;
913 }
914
915 rc = vreg_set_level(vreg_gp3, 2850);
916 if (rc) {
917 printk(KERN_ERR "%s: GP3 set level failed (%d)\n",
918 __func__, rc);
919 }
920 }
921
922 if (vreg_en) {
923 rc = vreg_enable(vreg_gp2);
924 if (rc) {
925 printk(KERN_ERR "%s: GP2 enable failed (%d)\n",
926 __func__, rc);
927 }
928
929 rc = vreg_enable(vreg_gp3);
930 if (rc) {
931 printk(KERN_ERR "%s: GP3 enable failed (%d)\n",
932 __func__, rc);
933 }
934 } else {
935 rc = vreg_disable(vreg_gp2);
936 if (rc) {
937 printk(KERN_ERR "%s: GP2 disable failed (%d)\n",
938 __func__, rc);
939 }
940
941 rc = vreg_disable(vreg_gp3);
942 if (rc) {
943 printk(KERN_ERR "%s: GP3 disable failed (%d)\n",
944 __func__, rc);
945 }
946 }
947}
948
949static int config_camera_on_gpios(void)
950{
951 int vreg_en = 1;
952
953 if (machine_is_msm7x25_ffa() ||
954 machine_is_msm7x27_ffa())
955 msm_camera_vreg_config(vreg_en);
956
957 config_gpio_table(camera_on_gpio_table,
958 ARRAY_SIZE(camera_on_gpio_table));
959 return 0;
960}
961
962static void config_camera_off_gpios(void)
963{
964 int vreg_en = 0;
965
966 if (machine_is_msm7x25_ffa() ||
967 machine_is_msm7x27_ffa())
968 msm_camera_vreg_config(vreg_en);
969
970 config_gpio_table(camera_off_gpio_table,
971 ARRAY_SIZE(camera_off_gpio_table));
972}
973
974static struct msm_camera_device_platform_data msm_camera_device_data = {
975 .camera_gpio_on = config_camera_on_gpios,
976 .camera_gpio_off = config_camera_off_gpios,
977 .ioext.mdcphy = MSM_MDC_PHYS,
978 .ioext.mdcsz = MSM_MDC_SIZE,
979 .ioext.appphy = MSM_CLK_CTL_PHYS,
980 .ioext.appsz = MSM_CLK_CTL_SIZE,
981};
982
983int pmic_set_flash_led_current(enum pmic8058_leds id, unsigned mA)
984{
985 int rc;
986 rc = pmic_flash_led_set_current(mA);
987 return rc;
988}
989
990static struct msm_camera_sensor_flash_src msm_flash_src = {
991 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
992 ._fsrc.pmic_src.num_of_src = 1,
993 ._fsrc.pmic_src.low_current = 30,
994 ._fsrc.pmic_src.high_current = 100,
995 ._fsrc.pmic_src.led_src_1 = 0,
996 ._fsrc.pmic_src.led_src_2 = 0,
997 ._fsrc.pmic_src.pmic_set_current = pmic_set_flash_led_current,
998};
999
1000#ifdef CONFIG_MT9D112
1001static struct msm_camera_sensor_flash_data flash_mt9d112 = {
1002 .flash_type = MSM_CAMERA_FLASH_LED,
1003 .flash_src = &msm_flash_src
1004};
1005
1006static struct msm_camera_sensor_info msm_camera_sensor_mt9d112_data = {
1007 .sensor_name = "mt9d112",
1008 .sensor_reset = 89,
1009 .sensor_pwd = 85,
1010 .vcm_pwd = 0,
1011 .vcm_enable = 0,
1012 .pdata = &msm_camera_device_data,
1013 .flash_data = &flash_mt9d112
1014};
1015
1016static struct platform_device msm_camera_sensor_mt9d112 = {
1017 .name = "msm_camera_mt9d112",
1018 .dev = {
1019 .platform_data = &msm_camera_sensor_mt9d112_data,
1020 },
1021};
1022#endif
1023
1024#ifdef CONFIG_S5K3E2FX
1025static struct msm_camera_sensor_flash_data flash_s5k3e2fx = {
1026 .flash_type = MSM_CAMERA_FLASH_LED,
1027 .flash_src = &msm_flash_src
1028};
1029
1030static struct msm_camera_sensor_info msm_camera_sensor_s5k3e2fx_data = {
1031 .sensor_name = "s5k3e2fx",
1032 .sensor_reset = 89,
1033 .sensor_pwd = 85,
1034 .vcm_pwd = 0,
1035 .vcm_enable = 0,
1036 .pdata = &msm_camera_device_data,
1037 .flash_data = &flash_s5k3e2fx
1038};
1039
1040static struct platform_device msm_camera_sensor_s5k3e2fx = {
1041 .name = "msm_camera_s5k3e2fx",
1042 .dev = {
1043 .platform_data = &msm_camera_sensor_s5k3e2fx_data,
1044 },
1045};
1046#endif
1047
1048#ifdef CONFIG_MT9P012
1049static struct msm_camera_sensor_flash_data flash_mt9p012 = {
1050 .flash_type = MSM_CAMERA_FLASH_LED,
1051 .flash_src = &msm_flash_src
1052};
1053
1054static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_data = {
1055 .sensor_name = "mt9p012",
1056 .sensor_reset = 89,
1057 .sensor_pwd = 85,
1058 .vcm_pwd = 88,
1059 .vcm_enable = 0,
1060 .pdata = &msm_camera_device_data,
1061 .flash_data = &flash_mt9p012
1062};
1063
1064static struct platform_device msm_camera_sensor_mt9p012 = {
1065 .name = "msm_camera_mt9p012",
1066 .dev = {
1067 .platform_data = &msm_camera_sensor_mt9p012_data,
1068 },
1069};
1070#endif
1071
1072#ifdef CONFIG_MT9P012_KM
1073static struct msm_camera_sensor_flash_data flash_mt9p012_km = {
1074 .flash_type = MSM_CAMERA_FLASH_LED,
1075 .flash_src = &msm_flash_src
1076};
1077
1078static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_km_data = {
1079 .sensor_name = "mt9p012_km",
1080 .sensor_reset = 89,
1081 .sensor_pwd = 85,
1082 .vcm_pwd = 88,
1083 .vcm_enable = 0,
1084 .pdata = &msm_camera_device_data,
1085 .flash_data = &flash_mt9p012_km
1086};
1087
1088static struct platform_device msm_camera_sensor_mt9p012_km = {
1089 .name = "msm_camera_mt9p012_km",
1090 .dev = {
1091 .platform_data = &msm_camera_sensor_mt9p012_km_data,
1092 },
1093};
1094#endif
1095
1096#ifdef CONFIG_MT9T013
1097static struct msm_camera_sensor_flash_data flash_mt9t013 = {
1098 .flash_type = MSM_CAMERA_FLASH_LED,
1099 .flash_src = &msm_flash_src
1100};
1101
1102static struct msm_camera_sensor_info msm_camera_sensor_mt9t013_data = {
1103 .sensor_name = "mt9t013",
1104 .sensor_reset = 89,
1105 .sensor_pwd = 85,
1106 .vcm_pwd = 0,
1107 .vcm_enable = 0,
1108 .pdata = &msm_camera_device_data,
1109 .flash_data = &flash_mt9t013
1110};
1111
1112static struct platform_device msm_camera_sensor_mt9t013 = {
1113 .name = "msm_camera_mt9t013",
1114 .dev = {
1115 .platform_data = &msm_camera_sensor_mt9t013_data,
1116 },
1117};
1118#endif
1119
1120#ifdef CONFIG_VB6801
1121static struct msm_camera_sensor_flash_data flash_vb6801 = {
1122 .flash_type = MSM_CAMERA_FLASH_LED,
1123 .flash_src = &msm_flash_src
1124};
1125
1126static struct msm_camera_sensor_info msm_camera_sensor_vb6801_data = {
1127 .sensor_name = "vb6801",
1128 .sensor_reset = 89,
1129 .sensor_pwd = 88,
1130 .vcm_pwd = 0,
1131 .vcm_enable = 0,
1132 .pdata = &msm_camera_device_data,
1133 .flash_data = &flash_vb6801
1134};
1135
1136static struct platform_device msm_camera_sensor_vb6801 = {
1137 .name = "msm_camera_vb6801",
1138 .dev = {
1139 .platform_data = &msm_camera_sensor_vb6801_data,
1140 },
1141};
1142#endif
1143#endif
1144
1145static u32 msm_calculate_batt_capacity(u32 current_voltage);
1146
1147static struct msm_psy_batt_pdata msm_psy_batt_data = {
1148 .voltage_min_design = 2800,
1149 .voltage_max_design = 4300,
1150 .avail_chg_sources = AC_CHG | USB_CHG ,
1151 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
1152 .calculate_capacity = &msm_calculate_batt_capacity,
1153};
1154
1155static u32 msm_calculate_batt_capacity(u32 current_voltage)
1156{
1157 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
1158 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
1159
1160 return (current_voltage - low_voltage) * 100
1161 / (high_voltage - low_voltage);
1162}
1163
1164static struct platform_device msm_batt_device = {
1165 .name = "msm-battery",
1166 .id = -1,
1167 .dev.platform_data = &msm_psy_batt_data,
1168};
1169
1170
Daniel Walker2682fd32010-02-24 15:47:58 -08001171static struct platform_device *devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001172 &asoc_msm_pcm,
1173 &asoc_msm_dai0,
1174 &asoc_msm_dai1,
1175
Daniel Walker2682fd32010-02-24 15:47:58 -08001176 &msm_device_smd,
1177 &msm_device_dmov,
1178 &msm_device_nand,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001179
1180#ifdef CONFIG_USB_MSM_OTG_72K
1181 &msm_device_otg,
1182#ifdef CONFIG_USB_GADGET
1183 &msm_device_gadget_peripheral,
1184#endif
1185#endif
1186
Manu Gautam99ed3912011-10-13 18:00:55 +05301187#ifdef CONFIG_USB_G_ANDROID
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001188 &android_usb_device,
1189#endif
Manu Gautam99ed3912011-10-13 18:00:55 +05301190
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001191 &msm_device_i2c,
Daniel Walker2682fd32010-02-24 15:47:58 -08001192 &smc91x_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001193 &msm_device_tssc,
1194 &android_pmem_device,
1195 &android_pmem_adsp_device,
1196 &android_pmem_audio_device,
1197 &msm_fb_device,
1198 &lcdc_gordon_panel_device,
1199 &msm_device_uart_dm1,
1200#ifdef CONFIG_BT
1201 &msm_bt_power_device,
1202#endif
1203 &msm_device_pmic_leds,
1204 &msm_device_snd,
1205 &msm_device_adspdec,
1206#ifdef CONFIG_MT9T013
1207 &msm_camera_sensor_mt9t013,
1208#endif
1209#ifdef CONFIG_MT9D112
1210 &msm_camera_sensor_mt9d112,
1211#endif
1212#ifdef CONFIG_S5K3E2FX
1213 &msm_camera_sensor_s5k3e2fx,
1214#endif
1215#ifdef CONFIG_MT9P012
1216 &msm_camera_sensor_mt9p012,
1217#endif
1218#ifdef CONFIG_MT9P012_KM
1219 &msm_camera_sensor_mt9p012_km,
1220#endif
1221#ifdef CONFIG_VB6801
1222 &msm_camera_sensor_vb6801,
1223#endif
1224 &msm_bluesleep_device,
1225#ifdef CONFIG_ARCH_MSM7X27
1226 &msm_kgsl_3d0,
1227#endif
1228#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1229 &msm_device_tsif,
1230#endif
1231 &hs_device,
1232 &msm_batt_device,
Daniel Walker2682fd32010-02-24 15:47:58 -08001233};
1234
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001235static struct msm_panel_common_pdata mdp_pdata = {
1236 .gpio = 97,
Ravishangar Kalyanam07ef7882011-08-09 15:50:48 -07001237 .mdp_rev = MDP_REV_30,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001238};
1239
1240static void __init msm_fb_add_devices(void)
1241{
1242 msm_fb_register_device("mdp", &mdp_pdata);
1243 msm_fb_register_device("pmdh", 0);
1244 msm_fb_register_device("lcdc", &lcdc_pdata);
1245}
1246
Daniel Walker2682fd32010-02-24 15:47:58 -08001247extern struct sys_timer msm_timer;
1248
1249static void __init msm7x2x_init_irq(void)
1250{
1251 msm_init_irq();
1252}
1253
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001254void msm_serial_debug_init(unsigned int base, int irq,
1255 struct device *clk_device, int signal_irq);
1256
1257#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1258 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1259 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1260 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1261
1262static unsigned long vreg_sts, gpio_sts;
1263static struct vreg *vreg_mmc;
1264static unsigned mpp_mmc = 2;
1265
1266struct sdcc_gpio {
1267 struct msm_gpio *cfg_data;
1268 uint32_t size;
1269 struct msm_gpio *sleep_cfg_data;
1270};
1271
1272static struct msm_gpio sdc1_cfg_data[] = {
1273 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_3"},
1274 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_2"},
1275 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_1"},
1276 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_0"},
1277 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_cmd"},
1278 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc1_clk"},
1279};
1280
1281static struct msm_gpio sdc2_cfg_data[] = {
1282 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc2_clk"},
1283 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_cmd"},
1284 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_3"},
1285 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_2"},
1286 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_1"},
1287 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_0"},
1288};
1289
1290static struct msm_gpio sdc2_sleep_cfg_data[] = {
1291 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_clk"},
1292 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_cmd"},
1293 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_3"},
1294 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_2"},
1295 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_1"},
1296 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_0"},
1297};
1298static struct msm_gpio sdc3_cfg_data[] = {
1299 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc3_clk"},
1300 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_cmd"},
1301 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_3"},
1302 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_2"},
1303 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_1"},
1304 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_0"},
1305};
1306
1307static struct msm_gpio sdc4_cfg_data[] = {
1308 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_3"},
1309 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_2"},
1310 {GPIO_CFG(21, 4, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_1"},
1311 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_cmd"},
1312 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_0"},
1313 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc4_clk"},
1314};
1315
1316static struct sdcc_gpio sdcc_cfg_data[] = {
1317 {
1318 .cfg_data = sdc1_cfg_data,
1319 .size = ARRAY_SIZE(sdc1_cfg_data),
1320 .sleep_cfg_data = NULL,
1321 },
1322 {
1323 .cfg_data = sdc2_cfg_data,
1324 .size = ARRAY_SIZE(sdc2_cfg_data),
1325 .sleep_cfg_data = sdc2_sleep_cfg_data,
1326 },
1327 {
1328 .cfg_data = sdc3_cfg_data,
1329 .size = ARRAY_SIZE(sdc3_cfg_data),
1330 .sleep_cfg_data = NULL,
1331 },
1332 {
1333 .cfg_data = sdc4_cfg_data,
1334 .size = ARRAY_SIZE(sdc4_cfg_data),
1335 .sleep_cfg_data = NULL,
1336 },
1337};
1338
1339static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1340{
1341 int rc = 0;
1342 struct sdcc_gpio *curr;
1343
1344 curr = &sdcc_cfg_data[dev_id - 1];
1345 if (!(test_bit(dev_id, &gpio_sts)^enable))
1346 return;
1347
1348 if (enable) {
1349 set_bit(dev_id, &gpio_sts);
1350 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1351 if (rc)
1352 printk(KERN_ERR "%s: Failed to turn on GPIOs for slot %d\n",
1353 __func__, dev_id);
1354 } else {
1355 clear_bit(dev_id, &gpio_sts);
1356 if (curr->sleep_cfg_data) {
1357 msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1358 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1359 return;
1360 }
1361 msm_gpios_disable_free(curr->cfg_data, curr->size);
1362 }
1363}
1364
1365static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1366{
1367 int rc = 0;
1368 struct platform_device *pdev;
1369
1370 pdev = container_of(dv, struct platform_device, dev);
1371 msm_sdcc_setup_gpio(pdev->id, !!vdd);
1372
1373 if (vdd == 0) {
1374 if (!vreg_sts)
1375 return 0;
1376
1377 clear_bit(pdev->id, &vreg_sts);
1378
1379 if (!vreg_sts) {
1380 if (machine_is_msm7x25_ffa() ||
1381 machine_is_msm7x27_ffa()) {
1382 rc = mpp_config_digital_out(mpp_mmc,
1383 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1384 MPP_DLOGIC_OUT_CTRL_LOW));
1385 } else
1386 rc = vreg_disable(vreg_mmc);
1387 if (rc)
1388 printk(KERN_ERR "%s: return val: %d \n",
1389 __func__, rc);
1390 }
1391 return 0;
1392 }
1393
1394 if (!vreg_sts) {
1395 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1396 rc = mpp_config_digital_out(mpp_mmc,
1397 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1398 MPP_DLOGIC_OUT_CTRL_HIGH));
1399 } else {
1400 rc = vreg_set_level(vreg_mmc, 2850);
1401 if (!rc)
1402 rc = vreg_enable(vreg_mmc);
1403 }
1404 if (rc)
1405 printk(KERN_ERR "%s: return val: %d \n",
1406 __func__, rc);
1407 }
1408 set_bit(pdev->id, &vreg_sts);
1409 return 0;
1410}
1411
1412#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1413static struct mmc_platform_data msm7x2x_sdc1_data = {
1414 .ocr_mask = MMC_VDD_28_29,
1415 .translate_vdd = msm_sdcc_setup_power,
1416 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1417 .msmsdcc_fmin = 144000,
1418 .msmsdcc_fmid = 24576000,
1419 .msmsdcc_fmax = 49152000,
1420 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001421};
1422#endif
1423
1424#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1425static struct mmc_platform_data msm7x2x_sdc2_data = {
1426 .ocr_mask = MMC_VDD_28_29,
1427 .translate_vdd = msm_sdcc_setup_power,
1428 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1429#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1430 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1431#endif
1432 .msmsdcc_fmin = 144000,
1433 .msmsdcc_fmid = 24576000,
1434 .msmsdcc_fmax = 49152000,
1435 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001436};
1437#endif
1438
1439#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1440static struct mmc_platform_data msm7x2x_sdc3_data = {
1441 .ocr_mask = MMC_VDD_28_29,
1442 .translate_vdd = msm_sdcc_setup_power,
1443 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1444 .msmsdcc_fmin = 144000,
1445 .msmsdcc_fmid = 24576000,
1446 .msmsdcc_fmax = 49152000,
1447 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001448};
1449#endif
1450
1451#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1452static struct mmc_platform_data msm7x2x_sdc4_data = {
1453 .ocr_mask = MMC_VDD_28_29,
1454 .translate_vdd = msm_sdcc_setup_power,
1455 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1456 .msmsdcc_fmin = 144000,
1457 .msmsdcc_fmid = 24576000,
1458 .msmsdcc_fmax = 49152000,
1459 .nonremovable = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001460};
1461#endif
1462
1463static void __init msm7x2x_init_mmc(void)
1464{
1465 if (!machine_is_msm7x25_ffa() && !machine_is_msm7x27_ffa()) {
1466 vreg_mmc = vreg_get(NULL, "mmc");
1467 if (IS_ERR(vreg_mmc)) {
1468 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
1469 __func__, PTR_ERR(vreg_mmc));
1470 return;
1471 }
1472 }
1473
1474#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1475 msm_add_sdcc(1, &msm7x2x_sdc1_data);
1476#endif
1477
1478 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf() ||
1479 machine_is_msm7x27_ffa()) {
1480#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1481 msm_sdcc_setup_gpio(2, 1);
1482 msm_add_sdcc(2, &msm7x2x_sdc2_data);
1483#endif
1484 }
1485
1486 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf()) {
1487#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1488 msm_add_sdcc(3, &msm7x2x_sdc3_data);
1489#endif
1490#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1491 msm_add_sdcc(4, &msm7x2x_sdc4_data);
1492#endif
1493 }
1494}
1495#else
1496#define msm7x2x_init_mmc() do {} while (0)
1497#endif
1498
1499
1500static struct msm_pm_platform_data msm7x25_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1501 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 16000,
1502
1503 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency = 12000,
1504
1505 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency = 2000,
1506};
1507
1508static struct msm_pm_platform_data msm7x27_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1509 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1510 .idle_supported = 1,
1511 .suspend_supported = 1,
1512 .idle_enabled = 1,
1513 .suspend_enabled = 1,
1514 .latency = 16000,
1515 .residency = 20000,
1516 },
1517
1518 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1519 .idle_supported = 1,
1520 .suspend_supported = 1,
1521 .idle_enabled = 1,
1522 .suspend_enabled = 1,
1523 .latency = 12000,
1524 .residency = 20000,
1525 },
1526
1527 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1528 .idle_supported = 1,
1529 .suspend_supported = 1,
1530 .idle_enabled = 1,
1531 .suspend_enabled = 1,
1532 .latency = 2000,
1533 .residency = 0,
1534 },
1535};
1536
1537static void
1538msm_i2c_gpio_config(int iface, int config_type)
1539{
1540 int gpio_scl;
1541 int gpio_sda;
1542 if (iface) {
1543 gpio_scl = 95;
1544 gpio_sda = 96;
1545 } else {
1546 gpio_scl = 60;
1547 gpio_sda = 61;
1548 }
1549 if (config_type) {
1550 gpio_tlmm_config(GPIO_CFG(gpio_scl, 1, GPIO_CFG_INPUT,
1551 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1552 gpio_tlmm_config(GPIO_CFG(gpio_sda, 1, GPIO_CFG_INPUT,
1553 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1554 } else {
1555 gpio_tlmm_config(GPIO_CFG(gpio_scl, 0, GPIO_CFG_OUTPUT,
1556 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1557 gpio_tlmm_config(GPIO_CFG(gpio_sda, 0, GPIO_CFG_OUTPUT,
1558 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1559 }
1560}
1561
1562static struct msm_i2c_platform_data msm_i2c_pdata = {
1563 .clk_freq = 100000,
1564 .rmutex = 0,
1565 .pri_clk = 60,
1566 .pri_dat = 61,
1567 .aux_clk = 95,
1568 .aux_dat = 96,
1569 .msm_i2c_config_gpio = msm_i2c_gpio_config,
1570};
1571
1572static void __init msm_device_i2c_init(void)
1573{
1574 if (gpio_request(60, "i2c_pri_clk"))
1575 pr_err("failed to request gpio i2c_pri_clk\n");
1576 if (gpio_request(61, "i2c_pri_dat"))
1577 pr_err("failed to request gpio i2c_pri_dat\n");
1578 if (gpio_request(95, "i2c_sec_clk"))
1579 pr_err("failed to request gpio i2c_sec_clk\n");
1580 if (gpio_request(96, "i2c_sec_dat"))
1581 pr_err("failed to request gpio i2c_sec_dat\n");
1582
1583 if (cpu_is_msm7x27())
1584 msm_i2c_pdata.pm_lat =
1585 msm7x27_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1586 .latency;
1587 else
1588 msm_i2c_pdata.pm_lat =
1589 msm7x25_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1590 .latency;
1591
1592 msm_device_i2c.dev.platform_data = &msm_i2c_pdata;
1593}
1594
1595static void usb_mpp_init(void)
1596{
1597 unsigned rc;
1598 unsigned mpp_usb = 7;
1599
1600 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1601 rc = mpp_config_digital_out(mpp_usb,
1602 MPP_CFG(MPP_DLOGIC_LVL_VDD,
1603 MPP_DLOGIC_OUT_CTRL_HIGH));
1604 if (rc)
1605 pr_err("%s: configuring mpp pin"
1606 "to enable 3.3V LDO failed\n", __func__);
1607 }
1608}
1609
1610static void msm7x27_wlan_init(void)
1611{
1612 int rc = 0;
1613 /* TBD: if (machine_is_msm7x27_ffa_with_wcn1312()) */
1614 if (machine_is_msm7x27_ffa()) {
1615 rc = mpp_config_digital_out(3, MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1616 MPP_DLOGIC_OUT_CTRL_LOW));
1617 if (rc)
1618 printk(KERN_ERR "%s: return val: %d \n",
1619 __func__, rc);
1620 }
1621}
1622
Daniel Walker2682fd32010-02-24 15:47:58 -08001623static void __init msm7x2x_init(void)
1624{
Daniel Walker2682fd32010-02-24 15:47:58 -08001625
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001626#ifdef CONFIG_ARCH_MSM7X25
1627 msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25);
1628#elif defined(CONFIG_ARCH_MSM7X27)
Stephen Boydbb600ae2011-08-02 20:11:40 -07001629 msm_clock_init(&msm7x27_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001630#endif
1631
1632#if defined(CONFIG_SMC91X)
Daniel Walker2682fd32010-02-24 15:47:58 -08001633 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1634 smc91x_resources[0].start = 0x98000300;
1635 smc91x_resources[0].end = 0x980003ff;
1636 smc91x_resources[1].start = MSM_GPIO_TO_INT(85);
1637 smc91x_resources[1].end = MSM_GPIO_TO_INT(85);
1638 if (gpio_tlmm_config(GPIO_CFG(85, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001639 GPIO_CFG_INPUT,
1640 GPIO_CFG_PULL_DOWN,
1641 GPIO_CFG_2MA),
1642 GPIO_CFG_ENABLE)) {
Daniel Walker2682fd32010-02-24 15:47:58 -08001643 printk(KERN_ERR
1644 "%s: Err: Config GPIO-85 INT\n",
1645 __func__);
1646 }
1647 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001648#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001649 if (cpu_is_msm7x27())
Matt Wagantallec57f062011-08-16 23:54:46 -07001650 acpuclk_init(&acpuclk_7x27_soc_data);
1651 else
1652 acpuclk_init(&acpuclk_7201_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001653
1654 usb_mpp_init();
1655
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001656
1657#ifdef CONFIG_USB_MSM_OTG_72K
1658 msm_device_otg.dev.platform_data = &msm_otg_pdata;
1659 if (machine_is_msm7x25_surf() || machine_is_msm7x25_ffa()) {
1660 msm_otg_pdata.pemp_level =
1661 PRE_EMPHASIS_WITH_20_PERCENT;
1662 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1663 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_ENABLE;
1664 msm_otg_pdata.phy_reset = msm_otg_rpc_phy_reset;
1665 }
1666 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
1667 msm_otg_pdata.pemp_level =
1668 PRE_EMPHASIS_WITH_10_PERCENT;
1669 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1670 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_DISABLE;
1671 msm_otg_pdata.phy_reset_sig_inverted = 1;
1672 }
1673
1674#ifdef CONFIG_USB_GADGET
1675 msm_otg_pdata.swfi_latency =
1676 msm7x27_pm_data
1677 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
1678 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
1679 msm_gadget_pdata.is_phy_status_timer_on = 1;
1680#endif
1681#endif
1682#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1683 msm_device_tsif.dev.platform_data = &tsif_platform_data;
1684#endif
1685 platform_add_devices(msm_footswitch_devices,
1686 msm_num_footswitch_devices);
Daniel Walker2682fd32010-02-24 15:47:58 -08001687 platform_add_devices(devices, ARRAY_SIZE(devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001688#ifdef CONFIG_MSM_CAMERA
1689 config_camera_off_gpios(); /* might not be necessary */
1690#endif
1691 msm_device_i2c_init();
1692 i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
1693
1694#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
1695 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
1696 platform_device_register(&keypad_device_7k_ffa);
1697 else
1698 platform_device_register(&keypad_device_surf);
1699#endif
1700 lcdc_gordon_gpio_init();
1701 msm_fb_add_devices();
1702#ifdef CONFIG_USB_EHCI_MSM_72K
1703 msm7x2x_init_host();
1704#endif
1705 msm7x2x_init_mmc();
1706 bt_power_init();
1707
1708 if (cpu_is_msm7x27())
1709 msm_pm_set_platform_data(msm7x27_pm_data,
1710 ARRAY_SIZE(msm7x27_pm_data));
1711 else
1712 msm_pm_set_platform_data(msm7x25_pm_data,
1713 ARRAY_SIZE(msm7x25_pm_data));
1714 msm7x27_wlan_init();
1715}
1716
1717static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
1718static int __init pmem_kernel_ebi1_size_setup(char *p)
1719{
1720 pmem_kernel_ebi1_size = memparse(p, NULL);
1721 return 0;
1722}
1723early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
1724
1725static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1726static int __init pmem_mdp_size_setup(char *p)
1727{
1728 pmem_mdp_size = memparse(p, NULL);
1729 return 0;
1730}
1731early_param("pmem_mdp_size", pmem_mdp_size_setup);
1732
1733static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1734static int __init pmem_adsp_size_setup(char *p)
1735{
1736 pmem_adsp_size = memparse(p, NULL);
1737 return 0;
1738}
1739early_param("pmem_adsp_size", pmem_adsp_size_setup);
1740
1741static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
1742static int __init pmem_audio_size_setup(char *p)
1743{
1744 pmem_audio_size = memparse(p, NULL);
1745 return 0;
1746}
1747early_param("pmem_audio_size", pmem_audio_size_setup);
1748
1749static unsigned fb_size = MSM_FB_SIZE;
1750static int __init fb_size_setup(char *p)
1751{
1752 fb_size = memparse(p, NULL);
1753 return 0;
1754}
1755early_param("fb_size", fb_size_setup);
1756
1757static void __init msm_msm7x2x_allocate_memory_regions(void)
1758{
1759 void *addr;
1760 unsigned long size;
1761
1762 size = fb_size ? : MSM_FB_SIZE;
1763 addr = alloc_bootmem_align(size, 0x1000);
1764 msm_fb_resources[0].start = __pa(addr);
1765 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1766 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
1767 size, addr, __pa(addr));
1768}
1769
1770static struct memtype_reserve msm7x27_reserve_table[] __initdata = {
1771 [MEMTYPE_SMI] = {
1772 },
1773 [MEMTYPE_EBI0] = {
1774 .flags = MEMTYPE_FLAGS_1M_ALIGN,
1775 },
1776 [MEMTYPE_EBI1] = {
1777 .flags = MEMTYPE_FLAGS_1M_ALIGN,
1778 },
1779};
1780
1781static void __init size_pmem_devices(void)
1782{
1783#ifdef CONFIG_ANDROID_PMEM
1784 android_pmem_adsp_pdata.size = pmem_adsp_size;
1785 android_pmem_pdata.size = pmem_mdp_size;
1786 android_pmem_audio_pdata.size = pmem_audio_size;
1787#endif
1788}
1789
1790static void __init reserve_memory_for(struct android_pmem_platform_data *p)
1791{
1792 msm7x27_reserve_table[p->memory_type].size += p->size;
1793}
1794
1795static void __init reserve_pmem_memory(void)
1796{
1797#ifdef CONFIG_ANDROID_PMEM
1798 reserve_memory_for(&android_pmem_adsp_pdata);
1799 reserve_memory_for(&android_pmem_pdata);
1800 reserve_memory_for(&android_pmem_audio_pdata);
1801 msm7x27_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
1802#endif
1803}
1804
1805static void __init msm7x27_calculate_reserve_sizes(void)
1806{
1807 size_pmem_devices();
1808 reserve_pmem_memory();
1809}
1810
1811static int msm7x27_paddr_to_memtype(unsigned int paddr)
1812{
1813 return MEMTYPE_EBI1;
1814}
1815
1816static struct reserve_info msm7x27_reserve_info __initdata = {
1817 .memtype_reserve_table = msm7x27_reserve_table,
1818 .calculate_reserve_sizes = msm7x27_calculate_reserve_sizes,
1819 .paddr_to_memtype = msm7x27_paddr_to_memtype,
1820};
1821
1822static void __init msm7x27_reserve(void)
1823{
1824 reserve_info = &msm7x27_reserve_info;
1825 msm_reserve();
1826}
1827
1828static void __init msm7x27_init_early(void)
1829{
1830 msm_msm7x2x_allocate_memory_regions();
Daniel Walker2682fd32010-02-24 15:47:58 -08001831}
1832
1833static void __init msm7x2x_map_io(void)
1834{
1835 msm_map_common_io();
Daniel Walker2682fd32010-02-24 15:47:58 -08001836
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001837 if (socinfo_init() < 0)
1838 BUG();
Daniel Walker2682fd32010-02-24 15:47:58 -08001839
1840#ifdef CONFIG_CACHE_L2X0
1841 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
1842 /* 7x27 has 256KB L2 cache:
1843 64Kb/Way and 4-Way Associativity;
Daniel Walker2682fd32010-02-24 15:47:58 -08001844 evmon/parity/share disabled. */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001845 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) > 1)
1846 || ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1)
1847 && (SOCINFO_VERSION_MINOR(socinfo_get_version()) >= 3)))
1848 /* R/W latency: 4 cycles; */
1849 l2x0_init(MSM_L2CC_BASE, 0x0006801B, 0xfe000000);
1850 else
1851 /* R/W latency: 3 cycles; */
1852 l2x0_init(MSM_L2CC_BASE, 0x00068012, 0xfe000000);
Daniel Walker2682fd32010-02-24 15:47:58 -08001853 }
1854#endif
1855}
1856
1857MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00001858 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001859 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001860 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001861 .init_irq = msm7x2x_init_irq,
1862 .init_machine = msm7x2x_init,
1863 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08001865MACHINE_END
1866
1867MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00001868 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001869 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001870 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001871 .init_irq = msm7x2x_init_irq,
1872 .init_machine = msm7x2x_init,
1873 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001874 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08001875MACHINE_END
1876
1877MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00001878 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001879 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001880 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001881 .init_irq = msm7x2x_init_irq,
1882 .init_machine = msm7x2x_init,
1883 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001884 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08001885MACHINE_END
1886
1887MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00001888 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08001889 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001890 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08001891 .init_irq = msm7x2x_init_irq,
1892 .init_machine = msm7x2x_init,
1893 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001894 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08001895MACHINE_END