blob: e86bcd284148787293dfb53475a552c0aa2da6d4 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +010021#include "reg.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070022
23#define ATH_PCI_VERSION "0.1"
24
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070025static char *dev_info = "ath9k";
26
27MODULE_AUTHOR("Atheros Communications");
28MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
29MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
30MODULE_LICENSE("Dual BSD/GPL");
31
32static struct pci_device_id ath_pci_id_table[] __devinitdata = {
33 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
34 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
35 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
38 { 0 }
39};
40
Sujith9757d552008-11-04 18:25:27 +053041static void ath_detach(struct ath_softc *sc);
42
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070043static int ath_get_channel(struct ath_softc *sc,
44 struct ieee80211_channel *chan)
45{
46 int i;
47
48 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
49 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
50 return i;
51 }
52
53 return -1;
54}
55
56static u32 ath_get_extchanmode(struct ath_softc *sc,
57 struct ieee80211_channel *chan)
58{
59 u32 chanmode = 0;
60 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
61 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
62
63 switch (chan->band) {
64 case IEEE80211_BAND_2GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020065 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070066 (tx_chan_width == ATH9K_HT_MACMODE_20))
67 chanmode = CHANNEL_G_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020068 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070069 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020071 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070072 (tx_chan_width == ATH9K_HT_MACMODE_2040))
73 chanmode = CHANNEL_G_HT40MINUS;
74 break;
75 case IEEE80211_BAND_5GHZ:
Johannes Bergd9fe60d2008-10-09 12:13:49 +020076 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070077 (tx_chan_width == ATH9K_HT_MACMODE_20))
78 chanmode = CHANNEL_A_HT20;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020079 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070080 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40PLUS;
Johannes Bergd9fe60d2008-10-09 12:13:49 +020082 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070083 (tx_chan_width == ATH9K_HT_MACMODE_2040))
84 chanmode = CHANNEL_A_HT40MINUS;
85 break;
86 default:
87 break;
88 }
89
90 return chanmode;
91}
92
93
94static int ath_setkey_tkip(struct ath_softc *sc,
95 struct ieee80211_key_conf *key,
96 struct ath9k_keyval *hk,
97 const u8 *addr)
98{
99 u8 *key_rxmic = NULL;
100 u8 *key_txmic = NULL;
101
102 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
103 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
104
105 if (addr == NULL) {
106 /* Group key installation */
107 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
108 return ath_keyset(sc, key->keyidx, hk, addr);
109 }
110 if (!sc->sc_splitmic) {
111 /*
112 * data key goes at first index,
113 * the hal handles the MIC keys at index+64.
114 */
115 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
116 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
117 return ath_keyset(sc, key->keyidx, hk, addr);
118 }
119 /*
120 * TX key goes at first index, RX key at +32.
121 * The hal handles the MIC keys at index+64.
122 */
123 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
124 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
125 /* Txmic entry failed. No need to proceed further */
126 DPRINTF(sc, ATH_DBG_KEYCACHE,
127 "%s Setting TX MIC Key Failed\n", __func__);
128 return 0;
129 }
130
131 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
132 /* XXX delete tx key on failure? */
133 return ath_keyset(sc, key->keyidx+32, hk, addr);
134}
135
136static int ath_key_config(struct ath_softc *sc,
137 const u8 *addr,
138 struct ieee80211_key_conf *key)
139{
140 struct ieee80211_vif *vif;
141 struct ath9k_keyval hk;
142 const u8 *mac = NULL;
143 int ret = 0;
Johannes Berg05c914f2008-09-11 00:01:58 +0200144 enum nl80211_iftype opmode;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700145
146 memset(&hk, 0, sizeof(hk));
147
148 switch (key->alg) {
149 case ALG_WEP:
150 hk.kv_type = ATH9K_CIPHER_WEP;
151 break;
152 case ALG_TKIP:
153 hk.kv_type = ATH9K_CIPHER_TKIP;
154 break;
155 case ALG_CCMP:
156 hk.kv_type = ATH9K_CIPHER_AES_CCM;
157 break;
158 default:
159 return -EINVAL;
160 }
161
162 hk.kv_len = key->keylen;
163 memcpy(hk.kv_val, key->key, key->keylen);
164
165 if (!sc->sc_vaps[0])
166 return -EIO;
167
Sujith5640b082008-10-29 10:16:06 +0530168 vif = sc->sc_vaps[0];
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700169 opmode = vif->type;
170
171 /*
172 * Strategy:
173 * For _M_STA mc tx, we will not setup a key at all since we never
174 * tx mc.
175 * _M_STA mc rx, we will use the keyID.
176 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
177 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
178 * peer node. BUT we will plumb a cleartext key so that we can do
179 * perSta default key table lookup in software.
180 */
181 if (is_broadcast_ether_addr(addr)) {
182 switch (opmode) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200183 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700184 /* default key: could be group WPA key
185 * or could be static WEP key */
186 mac = NULL;
187 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200188 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700189 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200190 case NL80211_IFTYPE_AP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700191 break;
192 default:
193 ASSERT(0);
194 break;
195 }
196 } else {
197 mac = addr;
198 }
199
200 if (key->alg == ALG_TKIP)
201 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 else
203 ret = ath_keyset(sc, key->keyidx, &hk, mac);
204
205 if (!ret)
206 return -EIO;
207
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700208 return 0;
209}
210
211static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
212{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700213 int freeslot;
214
Sujithff9b6622008-08-14 13:27:16 +0530215 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700216 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700217}
218
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200219static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700220{
Sujith60653672008-08-14 13:28:02 +0530221#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700223
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200224 ht_info->ht_supported = true;
225 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
226 IEEE80211_HT_CAP_SM_PS |
227 IEEE80211_HT_CAP_SGI_40 |
228 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700229
Sujith60653672008-08-14 13:28:02 +0530230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200232 /* set up supported mcs set */
233 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
234 ht_info->mcs.rx_mask[0] = 0xff;
235 ht_info->mcs.rx_mask[1] = 0xff;
236 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700237}
238
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530239static void ath9k_ht_conf(struct ath_softc *sc,
240 struct ieee80211_bss_conf *bss_conf)
241{
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530242 struct ath_ht_info *ht_info = &sc->sc_ht_info;
243
Johannes Bergae5eb022008-10-14 16:58:37 +0200244 if (sc->hw->conf.ht.enabled) {
245 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530246
Johannes Bergae5eb022008-10-14 16:58:37 +0200247 if (bss_conf->ht.width_40_ok)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530248 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
249 else
250 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
251
252 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530253 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530254}
255
256static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +0530257 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530258 struct ieee80211_bss_conf *bss_conf)
259{
260 struct ieee80211_hw *hw = sc->hw;
261 struct ieee80211_channel *curchan = hw->conf.channel;
Sujith5640b082008-10-29 10:16:06 +0530262 struct ath_vap *avp = (void *)vif->drv_priv;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530263 int pos;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530264
265 if (bss_conf->assoc) {
266 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
267 __func__,
268 bss_conf->aid);
269
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530270 /* New association, store aid */
271 if (avp->av_opmode == ATH9K_M_STA) {
272 sc->sc_curaid = bss_conf->aid;
273 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
274 sc->sc_curaid);
275 }
276
277 /* Configure the beacon */
278 ath_beacon_config(sc, 0);
279 sc->sc_flags |= SC_OP_BEACONS;
280
281 /* Reset rssi stats */
282 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
283 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
284 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
285 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
286
287 /* Update chainmask */
Johannes Bergae5eb022008-10-14 16:58:37 +0200288 ath_update_chainmask(sc, hw->conf.ht.enabled);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530289
290 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -0700291 "%s: bssid %pM aid 0x%x\n",
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530292 __func__,
Johannes Berge1749612008-10-27 15:59:26 -0700293 sc->sc_curbssid, sc->sc_curaid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530294
295 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
296 __func__,
297 curchan->center_freq);
298
299 pos = ath_get_channel(sc, curchan);
300 if (pos == -1) {
301 DPRINTF(sc, ATH_DBG_FATAL,
302 "%s: Invalid channel\n", __func__);
303 return;
304 }
305
Johannes Bergae5eb022008-10-14 16:58:37 +0200306 if (hw->conf.ht.enabled)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530307 sc->sc_ah->ah_channels[pos].chanmode =
308 ath_get_extchanmode(sc, curchan);
309 else
310 sc->sc_ah->ah_channels[pos].chanmode =
311 (curchan->band == IEEE80211_BAND_2GHZ) ?
312 CHANNEL_G : CHANNEL_A;
313
314 /* set h/w channel */
315 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
316 DPRINTF(sc, ATH_DBG_FATAL,
317 "%s: Unable to set channel\n",
318 __func__);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700319 /* Start ANI */
320 mod_timer(&sc->sc_ani.timer,
321 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
322
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530323 } else {
324 DPRINTF(sc, ATH_DBG_CONFIG,
325 "%s: Bss Info DISSOC\n", __func__);
326 sc->sc_curaid = 0;
327 }
328}
329
330void ath_get_beaconconfig(struct ath_softc *sc,
331 int if_id,
332 struct ath_beacon_config *conf)
333{
334 struct ieee80211_hw *hw = sc->hw;
335
336 /* fill in beacon config data */
337
338 conf->beacon_interval = hw->conf.beacon_int;
339 conf->listen_interval = 100;
340 conf->dtim_count = 1;
341 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
342}
343
344void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
Sujith528f0c62008-10-29 10:14:26 +0530345 struct ath_xmit_status *tx_status)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530346{
347 struct ieee80211_hw *hw = sc->hw;
348 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
349
350 DPRINTF(sc, ATH_DBG_XMIT,
351 "%s: TX complete: skb: %p\n", __func__, skb);
352
353 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
354 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
Sujitha8efee42008-11-18 09:07:30 +0530355 if (tx_info->rate_driver_data[0] != NULL) {
356 kfree(tx_info->rate_driver_data[0]);
357 tx_info->rate_driver_data[0] = NULL;
358 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530359 }
360
361 if (tx_status->flags & ATH_TX_BAR) {
362 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
363 tx_status->flags &= ~ATH_TX_BAR;
364 }
365
Johannes Berge6a98542008-10-21 12:40:02 +0200366 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530367 /* Frame was ACKed */
368 tx_info->flags |= IEEE80211_TX_STAT_ACK;
369 }
370
Johannes Berge6a98542008-10-21 12:40:02 +0200371 tx_info->status.rates[0].count = tx_status->retries + 1;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530372
373 ieee80211_tx_status(hw, skb);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530374}
375
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530376/********************************/
377/* LED functions */
378/********************************/
379
380static void ath_led_brightness(struct led_classdev *led_cdev,
381 enum led_brightness brightness)
382{
383 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
384 struct ath_softc *sc = led->sc;
385
386 switch (brightness) {
387 case LED_OFF:
388 if (led->led_type == ATH_LED_ASSOC ||
389 led->led_type == ATH_LED_RADIO)
390 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
391 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
392 (led->led_type == ATH_LED_RADIO) ? 1 :
393 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
394 break;
395 case LED_FULL:
396 if (led->led_type == ATH_LED_ASSOC)
397 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
398 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
399 break;
400 default:
401 break;
402 }
403}
404
405static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
406 char *trigger)
407{
408 int ret;
409
410 led->sc = sc;
411 led->led_cdev.name = led->name;
412 led->led_cdev.default_trigger = trigger;
413 led->led_cdev.brightness_set = ath_led_brightness;
414
415 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
416 if (ret)
417 DPRINTF(sc, ATH_DBG_FATAL,
418 "Failed to register led:%s", led->name);
419 else
420 led->registered = 1;
421 return ret;
422}
423
424static void ath_unregister_led(struct ath_led *led)
425{
426 if (led->registered) {
427 led_classdev_unregister(&led->led_cdev);
428 led->registered = 0;
429 }
430}
431
432static void ath_deinit_leds(struct ath_softc *sc)
433{
434 ath_unregister_led(&sc->assoc_led);
435 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
436 ath_unregister_led(&sc->tx_led);
437 ath_unregister_led(&sc->rx_led);
438 ath_unregister_led(&sc->radio_led);
439 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
440}
441
442static void ath_init_leds(struct ath_softc *sc)
443{
444 char *trigger;
445 int ret;
446
447 /* Configure gpio 1 for output */
448 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
449 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
450 /* LED off, active low */
451 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
452
453 trigger = ieee80211_get_radio_led_name(sc->hw);
454 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
455 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
456 ret = ath_register_led(sc, &sc->radio_led, trigger);
457 sc->radio_led.led_type = ATH_LED_RADIO;
458 if (ret)
459 goto fail;
460
461 trigger = ieee80211_get_assoc_led_name(sc->hw);
462 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
463 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
464 ret = ath_register_led(sc, &sc->assoc_led, trigger);
465 sc->assoc_led.led_type = ATH_LED_ASSOC;
466 if (ret)
467 goto fail;
468
469 trigger = ieee80211_get_tx_led_name(sc->hw);
470 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
471 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
472 ret = ath_register_led(sc, &sc->tx_led, trigger);
473 sc->tx_led.led_type = ATH_LED_TX;
474 if (ret)
475 goto fail;
476
477 trigger = ieee80211_get_rx_led_name(sc->hw);
478 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
479 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
480 ret = ath_register_led(sc, &sc->rx_led, trigger);
481 sc->rx_led.led_type = ATH_LED_RX;
482 if (ret)
483 goto fail;
484
485 return;
486
487fail:
488 ath_deinit_leds(sc);
489}
490
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530491#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Sujith9c84b792008-10-29 10:17:13 +0530492
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530493/*******************/
494/* Rfkill */
495/*******************/
496
497static void ath_radio_enable(struct ath_softc *sc)
498{
499 struct ath_hal *ah = sc->sc_ah;
500 int status;
501
502 spin_lock_bh(&sc->sc_resetlock);
503 if (!ath9k_hw_reset(ah, ah->ah_curchan,
504 sc->sc_ht_info.tx_chan_width,
505 sc->sc_tx_chainmask,
506 sc->sc_rx_chainmask,
507 sc->sc_ht_extprotspacing,
508 false, &status)) {
509 DPRINTF(sc, ATH_DBG_FATAL,
510 "%s: unable to reset channel %u (%uMhz) "
511 "flags 0x%x hal status %u\n", __func__,
512 ath9k_hw_mhz2ieee(ah,
513 ah->ah_curchan->channel,
514 ah->ah_curchan->channelFlags),
515 ah->ah_curchan->channel,
516 ah->ah_curchan->channelFlags, status);
517 }
518 spin_unlock_bh(&sc->sc_resetlock);
519
520 ath_update_txpow(sc);
521 if (ath_startrecv(sc) != 0) {
522 DPRINTF(sc, ATH_DBG_FATAL,
523 "%s: unable to restart recv logic\n", __func__);
524 return;
525 }
526
527 if (sc->sc_flags & SC_OP_BEACONS)
528 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
529
530 /* Re-Enable interrupts */
531 ath9k_hw_set_interrupts(ah, sc->sc_imask);
532
533 /* Enable LED */
534 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
535 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
536 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
537
538 ieee80211_wake_queues(sc->hw);
539}
540
541static void ath_radio_disable(struct ath_softc *sc)
542{
543 struct ath_hal *ah = sc->sc_ah;
544 int status;
545
546
547 ieee80211_stop_queues(sc->hw);
548
549 /* Disable LED */
550 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
551 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
552
553 /* Disable interrupts */
554 ath9k_hw_set_interrupts(ah, 0);
555
556 ath_draintxq(sc, false); /* clear pending tx frames */
557 ath_stoprecv(sc); /* turn off frame recv */
558 ath_flushrecv(sc); /* flush recv queue */
559
560 spin_lock_bh(&sc->sc_resetlock);
561 if (!ath9k_hw_reset(ah, ah->ah_curchan,
562 sc->sc_ht_info.tx_chan_width,
563 sc->sc_tx_chainmask,
564 sc->sc_rx_chainmask,
565 sc->sc_ht_extprotspacing,
566 false, &status)) {
567 DPRINTF(sc, ATH_DBG_FATAL,
568 "%s: unable to reset channel %u (%uMhz) "
569 "flags 0x%x hal status %u\n", __func__,
570 ath9k_hw_mhz2ieee(ah,
571 ah->ah_curchan->channel,
572 ah->ah_curchan->channelFlags),
573 ah->ah_curchan->channel,
574 ah->ah_curchan->channelFlags, status);
575 }
576 spin_unlock_bh(&sc->sc_resetlock);
577
578 ath9k_hw_phy_disable(ah);
579 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
580}
581
582static bool ath_is_rfkill_set(struct ath_softc *sc)
583{
584 struct ath_hal *ah = sc->sc_ah;
585
586 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
587 ah->ah_rfkill_polarity;
588}
589
590/* h/w rfkill poll function */
591static void ath_rfkill_poll(struct work_struct *work)
592{
593 struct ath_softc *sc = container_of(work, struct ath_softc,
594 rf_kill.rfkill_poll.work);
595 bool radio_on;
596
597 if (sc->sc_flags & SC_OP_INVALID)
598 return;
599
600 radio_on = !ath_is_rfkill_set(sc);
601
602 /*
603 * enable/disable radio only when there is a
604 * state change in RF switch
605 */
606 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
607 enum rfkill_state state;
608
609 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
610 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
611 : RFKILL_STATE_HARD_BLOCKED;
612 } else if (radio_on) {
613 ath_radio_enable(sc);
614 state = RFKILL_STATE_UNBLOCKED;
615 } else {
616 ath_radio_disable(sc);
617 state = RFKILL_STATE_HARD_BLOCKED;
618 }
619
620 if (state == RFKILL_STATE_HARD_BLOCKED)
621 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
622 else
623 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
624
625 rfkill_force_state(sc->rf_kill.rfkill, state);
626 }
627
628 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
629 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
630}
631
632/* s/w rfkill handler */
633static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
634{
635 struct ath_softc *sc = data;
636
637 switch (state) {
638 case RFKILL_STATE_SOFT_BLOCKED:
639 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
640 SC_OP_RFKILL_SW_BLOCKED)))
641 ath_radio_disable(sc);
642 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
643 return 0;
644 case RFKILL_STATE_UNBLOCKED:
645 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
646 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
647 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
648 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
649 "radio as it is disabled by h/w \n");
650 return -EPERM;
651 }
652 ath_radio_enable(sc);
653 }
654 return 0;
655 default:
656 return -EINVAL;
657 }
658}
659
660/* Init s/w rfkill */
661static int ath_init_sw_rfkill(struct ath_softc *sc)
662{
663 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
664 RFKILL_TYPE_WLAN);
665 if (!sc->rf_kill.rfkill) {
666 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
667 return -ENOMEM;
668 }
669
670 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
671 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
672 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
673 sc->rf_kill.rfkill->data = sc;
674 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
675 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
676 sc->rf_kill.rfkill->user_claim_unsupported = 1;
677
678 return 0;
679}
680
681/* Deinitialize rfkill */
682static void ath_deinit_rfkill(struct ath_softc *sc)
683{
684 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
685 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
686
687 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
688 rfkill_unregister(sc->rf_kill.rfkill);
689 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
690 sc->rf_kill.rfkill = NULL;
691 }
692}
Sujith9c84b792008-10-29 10:17:13 +0530693
694static int ath_start_rfkill_poll(struct ath_softc *sc)
695{
696 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
697 queue_delayed_work(sc->hw->workqueue,
698 &sc->rf_kill.rfkill_poll, 0);
699
700 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
701 if (rfkill_register(sc->rf_kill.rfkill)) {
702 DPRINTF(sc, ATH_DBG_FATAL,
703 "Unable to register rfkill\n");
704 rfkill_free(sc->rf_kill.rfkill);
705
706 /* Deinitialize the device */
Senthil Balasubramanian306efdd2008-11-13 18:00:37 +0530707 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +0530708 if (sc->pdev->irq)
709 free_irq(sc->pdev->irq, sc);
Sujith9c84b792008-10-29 10:17:13 +0530710 pci_iounmap(sc->pdev, sc->mem);
711 pci_release_region(sc->pdev, 0);
712 pci_disable_device(sc->pdev);
Sujith9757d552008-11-04 18:25:27 +0530713 ieee80211_free_hw(sc->hw);
Sujith9c84b792008-10-29 10:17:13 +0530714 return -EIO;
715 } else {
716 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
717 }
718 }
719
720 return 0;
721}
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530722#endif /* CONFIG_RFKILL */
723
Sujith9c84b792008-10-29 10:17:13 +0530724static void ath_detach(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530725{
726 struct ieee80211_hw *hw = sc->hw;
Sujith9c84b792008-10-29 10:17:13 +0530727 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530728
729 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
730
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530731#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530732 ath_deinit_rfkill(sc);
733#endif
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +0530734 ath_deinit_leds(sc);
735
736 ieee80211_unregister_hw(hw);
737
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530738 ath_rate_control_unregister();
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530739
740 ath_rx_cleanup(sc);
741 ath_tx_cleanup(sc);
742
Sujith9c84b792008-10-29 10:17:13 +0530743 tasklet_kill(&sc->intr_tq);
744 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530745
Sujith9c84b792008-10-29 10:17:13 +0530746 if (!(sc->sc_flags & SC_OP_INVALID))
747 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530748
Sujith9c84b792008-10-29 10:17:13 +0530749 /* cleanup tx queues */
750 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
751 if (ATH_TXQ_SETUP(sc, i))
752 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
753
754 ath9k_hw_detach(sc->sc_ah);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530755}
756
Sujith9c84b792008-10-29 10:17:13 +0530757static int ath_attach(u16 devid, struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530758{
759 struct ieee80211_hw *hw = sc->hw;
760 int error = 0;
761
762 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
763
764 error = ath_init(devid, sc);
765 if (error != 0)
766 return error;
767
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530768 /* get mac address from hardware and set in mac80211 */
769
770 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
771
Sujith9c84b792008-10-29 10:17:13 +0530772 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
773 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
774 IEEE80211_HW_SIGNAL_DBM |
775 IEEE80211_HW_AMPDU_AGGREGATION;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530776
Sujith9c84b792008-10-29 10:17:13 +0530777 hw->wiphy->interface_modes =
778 BIT(NL80211_IFTYPE_AP) |
779 BIT(NL80211_IFTYPE_STATION) |
780 BIT(NL80211_IFTYPE_ADHOC);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530781
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530782 hw->queues = 4;
Sujithe63835b2008-11-18 09:07:53 +0530783 hw->max_rates = 4;
784 hw->max_rate_tries = ATH_11N_TXMAXTRY;
Sujith528f0c62008-10-29 10:14:26 +0530785 hw->sta_data_size = sizeof(struct ath_node);
Sujith5640b082008-10-29 10:16:06 +0530786 hw->vif_data_size = sizeof(struct ath_vap);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530787
788 /* Register rate control */
789 hw->rate_control_algorithm = "ath9k_rate_control";
790 error = ath_rate_control_register();
791 if (error != 0) {
792 DPRINTF(sc, ATH_DBG_FATAL,
793 "%s: Unable to register rate control "
794 "algorithm:%d\n", __func__, error);
795 ath_rate_control_unregister();
796 goto bad;
797 }
798
Sujith9c84b792008-10-29 10:17:13 +0530799 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {
800 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
801 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
802 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
803 }
804
805 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &sc->sbands[IEEE80211_BAND_2GHZ];
806 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes))
807 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
808 &sc->sbands[IEEE80211_BAND_5GHZ];
809
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530810 /* initialize tx/rx engine */
811 error = ath_tx_init(sc, ATH_TXBUF);
812 if (error != 0)
813 goto detach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530814
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530815 error = ath_rx_init(sc, ATH_RXBUF);
816 if (error != 0)
817 goto detach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530818
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530819#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530820 /* Initialze h/w Rfkill */
821 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
822 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
823
824 /* Initialize s/w rfkill */
825 if (ath_init_sw_rfkill(sc))
826 goto detach;
827#endif
828
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530829 error = ieee80211_register_hw(hw);
830 if (error != 0) {
831 ath_rate_control_unregister();
832 goto bad;
833 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530834
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +0530835 /* Initialize LED control */
836 ath_init_leds(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530837
838 return 0;
839detach:
840 ath_detach(sc);
841bad:
842 return error;
843}
844
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700845static int ath9k_start(struct ieee80211_hw *hw)
846{
847 struct ath_softc *sc = hw->priv;
848 struct ieee80211_channel *curchan = hw->conf.channel;
849 int error = 0, pos;
850
851 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
852 "initial channel: %d MHz\n", __func__, curchan->center_freq);
853
Sujith7f959032008-10-29 10:18:39 +0530854 memset(&sc->sc_ht_info, 0, sizeof(struct ath_ht_info));
855
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700856 /* setup initial channel */
857
858 pos = ath_get_channel(sc, curchan);
859 if (pos == -1) {
860 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530861 error = -EINVAL;
862 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700863 }
864
865 sc->sc_ah->ah_channels[pos].chanmode =
866 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
867
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700868 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
869 if (error) {
870 DPRINTF(sc, ATH_DBG_FATAL,
871 "%s: Unable to complete ath_open\n", __func__);
Sujith9c84b792008-10-29 10:17:13 +0530872 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700873 }
874
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +0530875#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Sujith9c84b792008-10-29 10:17:13 +0530876 error = ath_start_rfkill_poll(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +0530877#endif
878
Sujith9c84b792008-10-29 10:17:13 +0530879exit:
880 return error;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700881}
882
883static int ath9k_tx(struct ieee80211_hw *hw,
884 struct sk_buff *skb)
885{
Jouni Malinen147583c2008-08-11 14:01:50 +0300886 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Sujith528f0c62008-10-29 10:14:26 +0530887 struct ath_softc *sc = hw->priv;
888 struct ath_tx_control txctl;
889 int hdrlen, padsize;
890
891 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +0300892
893 /*
894 * As a temporary workaround, assign seq# here; this will likely need
895 * to be cleaned up to work better with Beacon transmission and virtual
896 * BSSes.
897 */
898 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
899 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
900 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
901 sc->seq_no += 0x10;
902 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
903 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
904 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700905
906 /* Add the padding after the header if this is not already done */
907 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
908 if (hdrlen & 3) {
909 padsize = hdrlen % 4;
910 if (skb_headroom(skb) < padsize)
911 return -1;
912 skb_push(skb, padsize);
913 memmove(skb->data, skb->data + padsize, hdrlen);
914 }
915
Sujith528f0c62008-10-29 10:14:26 +0530916 /* Check if a tx queue is available */
917
918 txctl.txq = ath_test_get_txq(sc, skb);
919 if (!txctl.txq)
920 goto exit;
921
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700922 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
923 __func__,
924 skb);
925
Sujith528f0c62008-10-29 10:14:26 +0530926 if (ath_tx_start(sc, skb, &txctl) != 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700927 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
Sujith528f0c62008-10-29 10:14:26 +0530928 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700929 }
930
931 return 0;
Sujith528f0c62008-10-29 10:14:26 +0530932exit:
933 dev_kfree_skb_any(skb);
934 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700935}
936
937static void ath9k_stop(struct ieee80211_hw *hw)
938{
939 struct ath_softc *sc = hw->priv;
Sujith9c84b792008-10-29 10:17:13 +0530940
941 if (sc->sc_flags & SC_OP_INVALID) {
942 DPRINTF(sc, ATH_DBG_ANY, "%s: Device not present\n", __func__);
943 return;
944 }
945
946 ath_stop(sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700947
948 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700949}
950
951static int ath9k_add_interface(struct ieee80211_hw *hw,
952 struct ieee80211_if_init_conf *conf)
953{
954 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +0530955 struct ath_vap *avp = (void *)conf->vif->drv_priv;
956 int ic_opmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700957
958 /* Support only vap for now */
959
960 if (sc->sc_nvaps)
961 return -ENOBUFS;
962
963 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200964 case NL80211_IFTYPE_STATION:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700965 ic_opmode = ATH9K_M_STA;
966 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200967 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700968 ic_opmode = ATH9K_M_IBSS;
969 break;
Johannes Berg05c914f2008-09-11 00:01:58 +0200970 case NL80211_IFTYPE_AP:
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300971 ic_opmode = ATH9K_M_HOSTAP;
972 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700973 default:
974 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300975 "%s: Interface type %d not yet supported\n",
976 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700977 return -EOPNOTSUPP;
978 }
979
980 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
981 __func__,
982 ic_opmode);
983
Sujith5640b082008-10-29 10:16:06 +0530984 /* Set the VAP opmode */
985 avp->av_opmode = ic_opmode;
986 avp->av_bslot = -1;
987
988 if (ic_opmode == ATH9K_M_HOSTAP)
989 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
990
991 sc->sc_vaps[0] = conf->vif;
992 sc->sc_nvaps++;
993
994 /* Set the device opmode */
995 sc->sc_ah->ah_opmode = ic_opmode;
996
Luis R. Rodriguez6f255422008-10-03 15:45:27 -0700997 if (conf->type == NL80211_IFTYPE_AP) {
998 /* TODO: is this a suitable place to start ANI for AP mode? */
999 /* Start ANI */
1000 mod_timer(&sc->sc_ani.timer,
1001 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1002 }
1003
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001004 return 0;
1005}
1006
1007static void ath9k_remove_interface(struct ieee80211_hw *hw,
1008 struct ieee80211_if_init_conf *conf)
1009{
1010 struct ath_softc *sc = hw->priv;
Sujith5640b082008-10-29 10:16:06 +05301011 struct ath_vap *avp = (void *)conf->vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001012
1013 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1014
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001015#ifdef CONFIG_SLOW_ANT_DIV
1016 ath_slow_ant_div_stop(&sc->sc_antdiv);
1017#endif
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07001018 /* Stop ANI */
1019 del_timer_sync(&sc->sc_ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001020
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001021 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +05301022 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1023 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001024 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1025 ath_beacon_return(sc, avp);
1026 }
1027
Sujith672840a2008-08-11 14:05:08 +05301028 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001029
Sujith5640b082008-10-29 10:16:06 +05301030 sc->sc_vaps[0] = NULL;
1031 sc->sc_nvaps--;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001032}
1033
Johannes Berge8975582008-10-09 12:18:51 +02001034static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001035{
1036 struct ath_softc *sc = hw->priv;
1037 struct ieee80211_channel *curchan = hw->conf.channel;
Johannes Berge8975582008-10-09 12:18:51 +02001038 struct ieee80211_conf *conf = &hw->conf;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001039 int pos;
1040
1041 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1042 __func__,
1043 curchan->center_freq);
1044
Johannes Bergae5eb022008-10-14 16:58:37 +02001045 /* Update chainmask */
1046 ath_update_chainmask(sc, conf->ht.enabled);
1047
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001048 pos = ath_get_channel(sc, curchan);
1049 if (pos == -1) {
1050 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1051 return -EINVAL;
1052 }
1053
1054 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +05301055 (curchan->band == IEEE80211_BAND_2GHZ) ?
1056 CHANNEL_G : CHANNEL_A;
1057
Johannes Bergae5eb022008-10-14 16:58:37 +02001058 if (sc->sc_curaid && hw->conf.ht.enabled)
Sujith86b89ee2008-08-07 10:54:57 +05301059 sc->sc_ah->ah_channels[pos].chanmode =
1060 ath_get_extchanmode(sc, curchan);
1061
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07001062 if (changed & IEEE80211_CONF_CHANGE_POWER)
1063 sc->sc_config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001064
1065 /* set h/w channel */
1066 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1067 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1068 __func__);
1069
1070 return 0;
1071}
1072
1073static int ath9k_config_interface(struct ieee80211_hw *hw,
1074 struct ieee80211_vif *vif,
1075 struct ieee80211_if_conf *conf)
1076{
1077 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001078 struct ath_hal *ah = sc->sc_ah;
Sujith5640b082008-10-29 10:16:06 +05301079 struct ath_vap *avp = (void *)vif->drv_priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001080 u32 rfilt = 0;
1081 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001082
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001083 /* TODO: Need to decide which hw opmode to use for multi-interface
1084 * cases */
Johannes Berg05c914f2008-09-11 00:01:58 +02001085 if (vif->type == NL80211_IFTYPE_AP &&
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001086 ah->ah_opmode != ATH9K_M_HOSTAP) {
1087 ah->ah_opmode = ATH9K_M_HOSTAP;
1088 ath9k_hw_setopmode(ah);
1089 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1090 /* Request full reset to get hw opmode changed properly */
1091 sc->sc_flags |= SC_OP_FULL_RESET;
1092 }
1093
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001094 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1095 !is_zero_ether_addr(conf->bssid)) {
1096 switch (vif->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02001097 case NL80211_IFTYPE_STATION:
1098 case NL80211_IFTYPE_ADHOC:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001099 /* Set BSSID */
1100 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1101 sc->sc_curaid = 0;
1102 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1103 sc->sc_curaid);
1104
1105 /* Set aggregation protection mode parameters */
1106 sc->sc_config.ath_aggr_prot = 0;
1107
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001108 DPRINTF(sc, ATH_DBG_CONFIG,
Johannes Berge1749612008-10-27 15:59:26 -07001109 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001110 __func__, rfilt,
Johannes Berge1749612008-10-27 15:59:26 -07001111 sc->sc_curbssid, sc->sc_curaid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001112
1113 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301114 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001115
1116 break;
1117 default:
1118 break;
1119 }
1120 }
1121
1122 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Johannes Berg05c914f2008-09-11 00:01:58 +02001123 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1124 (vif->type == NL80211_IFTYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001125 /*
1126 * Allocate and setup the beacon frame.
1127 *
1128 * Stop any previous beacon DMA. This may be
1129 * necessary, for example, when an ibss merge
1130 * causes reconfiguration; we may be called
1131 * with beacon transmission active.
1132 */
1133 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1134
1135 error = ath_beacon_alloc(sc, 0);
1136 if (error != 0)
1137 return error;
1138
1139 ath_beacon_sync(sc, 0);
1140 }
1141
1142 /* Check for WLAN_CAPABILITY_PRIVACY ? */
Sujith5640b082008-10-29 10:16:06 +05301143 if ((avp->av_opmode != ATH9K_M_STA)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001144 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1145 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1146 ath9k_hw_keysetmac(sc->sc_ah,
1147 (u16)i,
1148 sc->sc_curbssid);
1149 }
1150
1151 /* Only legacy IBSS for now */
Johannes Berg05c914f2008-09-11 00:01:58 +02001152 if (vif->type == NL80211_IFTYPE_ADHOC)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001153 ath_update_chainmask(sc, 0);
1154
1155 return 0;
1156}
1157
1158#define SUPPORTED_FILTERS \
1159 (FIF_PROMISC_IN_BSS | \
1160 FIF_ALLMULTI | \
1161 FIF_CONTROL | \
1162 FIF_OTHER_BSS | \
1163 FIF_BCN_PRBRESP_PROMISC | \
1164 FIF_FCSFAIL)
1165
Sujith7dcfdcd2008-08-11 14:03:13 +05301166/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001167static void ath9k_configure_filter(struct ieee80211_hw *hw,
1168 unsigned int changed_flags,
1169 unsigned int *total_flags,
1170 int mc_count,
1171 struct dev_mc_list *mclist)
1172{
1173 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301174 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001175
1176 changed_flags &= SUPPORTED_FILTERS;
1177 *total_flags &= SUPPORTED_FILTERS;
1178
Sujith7dcfdcd2008-08-11 14:03:13 +05301179 sc->rx_filter = *total_flags;
1180 rfilt = ath_calcrxfilter(sc);
1181 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1182
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001183 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1184 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301185 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001186 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301187
1188 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1189 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001190}
1191
1192static void ath9k_sta_notify(struct ieee80211_hw *hw,
1193 struct ieee80211_vif *vif,
1194 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02001195 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001196{
1197 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001198
1199 switch (cmd) {
1200 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05301201 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001202 break;
1203 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05301204 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001205 break;
1206 default:
1207 break;
1208 }
1209}
1210
1211static int ath9k_conf_tx(struct ieee80211_hw *hw,
1212 u16 queue,
1213 const struct ieee80211_tx_queue_params *params)
1214{
1215 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301216 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001217 int ret = 0, qnum;
1218
1219 if (queue >= WME_NUM_AC)
1220 return 0;
1221
1222 qi.tqi_aifs = params->aifs;
1223 qi.tqi_cwmin = params->cw_min;
1224 qi.tqi_cwmax = params->cw_max;
1225 qi.tqi_burstTime = params->txop;
1226 qnum = ath_get_hal_qnum(queue, sc);
1227
1228 DPRINTF(sc, ATH_DBG_CONFIG,
1229 "%s: Configure tx [queue/halq] [%d/%d], "
1230 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1231 __func__,
1232 queue,
1233 qnum,
1234 params->aifs,
1235 params->cw_min,
1236 params->cw_max,
1237 params->txop);
1238
1239 ret = ath_txq_update(sc, qnum, &qi);
1240 if (ret)
1241 DPRINTF(sc, ATH_DBG_FATAL,
1242 "%s: TXQ Update failed\n", __func__);
1243
1244 return ret;
1245}
1246
1247static int ath9k_set_key(struct ieee80211_hw *hw,
1248 enum set_key_cmd cmd,
1249 const u8 *local_addr,
1250 const u8 *addr,
1251 struct ieee80211_key_conf *key)
1252{
1253 struct ath_softc *sc = hw->priv;
1254 int ret = 0;
1255
1256 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1257
1258 switch (cmd) {
1259 case SET_KEY:
1260 ret = ath_key_config(sc, addr, key);
1261 if (!ret) {
1262 set_bit(key->keyidx, sc->sc_keymap);
1263 key->hw_key_idx = key->keyidx;
1264 /* push IV and Michael MIC generation to stack */
1265 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301266 if (key->alg == ALG_TKIP)
1267 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001268 }
1269 break;
1270 case DISABLE_KEY:
1271 ath_key_delete(sc, key);
1272 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001273 break;
1274 default:
1275 ret = -EINVAL;
1276 }
1277
1278 return ret;
1279}
1280
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001281static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1282 struct ieee80211_vif *vif,
1283 struct ieee80211_bss_conf *bss_conf,
1284 u32 changed)
1285{
1286 struct ath_softc *sc = hw->priv;
1287
1288 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1289 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1290 __func__,
1291 bss_conf->use_short_preamble);
1292 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301293 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001294 else
Sujith672840a2008-08-11 14:05:08 +05301295 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001296 }
1297
1298 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1299 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1300 __func__,
1301 bss_conf->use_cts_prot);
1302 if (bss_conf->use_cts_prot &&
1303 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301304 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001305 else
Sujith672840a2008-08-11 14:05:08 +05301306 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001307 }
1308
1309 if (changed & BSS_CHANGED_HT) {
Johannes Bergae5eb022008-10-14 16:58:37 +02001310 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1311 __func__);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001312 ath9k_ht_conf(sc, bss_conf);
1313 }
1314
1315 if (changed & BSS_CHANGED_ASSOC) {
1316 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1317 __func__,
1318 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05301319 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001320 }
1321}
1322
1323static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1324{
1325 u64 tsf;
1326 struct ath_softc *sc = hw->priv;
1327 struct ath_hal *ah = sc->sc_ah;
1328
1329 tsf = ath9k_hw_gettsf64(ah);
1330
1331 return tsf;
1332}
1333
1334static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1335{
1336 struct ath_softc *sc = hw->priv;
1337 struct ath_hal *ah = sc->sc_ah;
1338
1339 ath9k_hw_reset_tsf(ah);
1340}
1341
1342static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1343 enum ieee80211_ampdu_mlme_action action,
Johannes Berg17741cd2008-09-11 00:02:02 +02001344 struct ieee80211_sta *sta,
1345 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001346{
1347 struct ath_softc *sc = hw->priv;
1348 int ret = 0;
1349
1350 switch (action) {
1351 case IEEE80211_AMPDU_RX_START:
Sujithdca3edb2008-10-29 10:19:01 +05301352 if (!(sc->sc_flags & SC_OP_RXAGGR))
1353 ret = -ENOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001354 break;
1355 case IEEE80211_AMPDU_RX_STOP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001356 break;
1357 case IEEE80211_AMPDU_TX_START:
Sujithb5aa9bf2008-10-29 10:13:31 +05301358 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001359 if (ret < 0)
1360 DPRINTF(sc, ATH_DBG_FATAL,
1361 "%s: Unable to start TX aggregation\n",
1362 __func__);
1363 else
Johannes Berg17741cd2008-09-11 00:02:02 +02001364 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001365 break;
1366 case IEEE80211_AMPDU_TX_STOP:
Sujithb5aa9bf2008-10-29 10:13:31 +05301367 ret = ath_tx_aggr_stop(sc, sta, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001368 if (ret < 0)
1369 DPRINTF(sc, ATH_DBG_FATAL,
1370 "%s: Unable to stop TX aggregation\n",
1371 __func__);
1372
Johannes Berg17741cd2008-09-11 00:02:02 +02001373 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001374 break;
Sujith8469cde2008-10-29 10:19:28 +05301375 case IEEE80211_AMPDU_TX_RESUME:
1376 ath_tx_aggr_resume(sc, sta, tid);
1377 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001378 default:
1379 DPRINTF(sc, ATH_DBG_FATAL,
1380 "%s: Unknown AMPDU action\n", __func__);
1381 }
1382
1383 return ret;
1384}
1385
Johannes Berg4233df62008-10-13 13:35:05 +02001386static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1387{
1388 return -EOPNOTSUPP;
1389}
1390
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001391static struct ieee80211_ops ath9k_ops = {
1392 .tx = ath9k_tx,
1393 .start = ath9k_start,
1394 .stop = ath9k_stop,
1395 .add_interface = ath9k_add_interface,
1396 .remove_interface = ath9k_remove_interface,
1397 .config = ath9k_config,
1398 .config_interface = ath9k_config_interface,
1399 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001400 .sta_notify = ath9k_sta_notify,
1401 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001402 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001403 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001404 .get_tsf = ath9k_get_tsf,
1405 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02001406 .ampdu_action = ath9k_ampdu_action,
1407 .set_frag_threshold = ath9k_no_fragmentation,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001408};
1409
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001410static struct {
1411 u32 version;
1412 const char * name;
1413} ath_mac_bb_names[] = {
1414 { AR_SREV_VERSION_5416_PCI, "5416" },
1415 { AR_SREV_VERSION_5416_PCIE, "5418" },
1416 { AR_SREV_VERSION_9100, "9100" },
1417 { AR_SREV_VERSION_9160, "9160" },
1418 { AR_SREV_VERSION_9280, "9280" },
1419 { AR_SREV_VERSION_9285, "9285" }
1420};
1421
1422static struct {
1423 u16 version;
1424 const char * name;
1425} ath_rf_names[] = {
1426 { 0, "5133" },
1427 { AR_RAD5133_SREV_MAJOR, "5133" },
1428 { AR_RAD5122_SREV_MAJOR, "5122" },
1429 { AR_RAD2133_SREV_MAJOR, "2133" },
1430 { AR_RAD2122_SREV_MAJOR, "2122" }
1431};
1432
1433/*
1434 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
1435 */
1436
1437static const char *
1438ath_mac_bb_name(u32 mac_bb_version)
1439{
1440 int i;
1441
1442 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
1443 if (ath_mac_bb_names[i].version == mac_bb_version) {
1444 return ath_mac_bb_names[i].name;
1445 }
1446 }
1447
1448 return "????";
1449}
1450
1451/*
1452 * Return the RF name. "????" is returned if the RF is unknown.
1453 */
1454
1455static const char *
1456ath_rf_name(u16 rf_version)
1457{
1458 int i;
1459
1460 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
1461 if (ath_rf_names[i].version == rf_version) {
1462 return ath_rf_names[i].name;
1463 }
1464 }
1465
1466 return "????";
1467}
1468
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001469static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1470{
1471 void __iomem *mem;
1472 struct ath_softc *sc;
1473 struct ieee80211_hw *hw;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001474 u8 csz;
1475 u32 val;
1476 int ret = 0;
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001477 struct ath_hal *ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001478
1479 if (pci_enable_device(pdev))
1480 return -EIO;
1481
Luis R. Rodriguez97b777d2008-11-13 19:11:57 -08001482 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1483
1484 if (ret) {
Luis R. Rodriguez1d450cf2008-11-13 19:11:56 -08001485 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
Luis R. Rodriguez97b777d2008-11-13 19:11:57 -08001486 goto bad;
1487 }
1488
1489 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1490
1491 if (ret) {
1492 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
1493 "DMA enable faled\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001494 goto bad;
1495 }
1496
1497 /*
1498 * Cache line size is used to size and align various
1499 * structures used to communicate with the hardware.
1500 */
1501 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1502 if (csz == 0) {
1503 /*
1504 * Linux 2.4.18 (at least) writes the cache line size
1505 * register as a 16-bit wide register which is wrong.
1506 * We must have this setup properly for rx buffer
1507 * DMA to work so force a reasonable value here if it
1508 * comes up zero.
1509 */
1510 csz = L1_CACHE_BYTES / sizeof(u32);
1511 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1512 }
1513 /*
1514 * The default setting of latency timer yields poor results,
1515 * set it to the value used by other systems. It may be worth
1516 * tweaking this setting more.
1517 */
1518 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1519
1520 pci_set_master(pdev);
1521
1522 /*
1523 * Disable the RETRY_TIMEOUT register (0x41) to keep
1524 * PCI Tx retries from interfering with C3 CPU state.
1525 */
1526 pci_read_config_dword(pdev, 0x40, &val);
1527 if ((val & 0x0000ff00) != 0)
1528 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1529
1530 ret = pci_request_region(pdev, 0, "ath9k");
1531 if (ret) {
1532 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1533 ret = -ENODEV;
1534 goto bad;
1535 }
1536
1537 mem = pci_iomap(pdev, 0, 0);
1538 if (!mem) {
1539 printk(KERN_ERR "PCI memory map error\n") ;
1540 ret = -EIO;
1541 goto bad1;
1542 }
1543
1544 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1545 if (hw == NULL) {
1546 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1547 goto bad2;
1548 }
1549
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001550 SET_IEEE80211_DEV(hw, &pdev->dev);
1551 pci_set_drvdata(pdev, hw);
1552
1553 sc = hw->priv;
1554 sc->hw = hw;
1555 sc->pdev = pdev;
1556 sc->mem = mem;
1557
1558 if (ath_attach(id->device, sc) != 0) {
1559 ret = -ENODEV;
1560 goto bad3;
1561 }
1562
1563 /* setup interrupt service routine */
1564
1565 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1566 printk(KERN_ERR "%s: request_irq failed\n",
1567 wiphy_name(hw->wiphy));
1568 ret = -EIO;
1569 goto bad4;
1570 }
1571
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001572 ah = sc->sc_ah;
1573 printk(KERN_INFO
1574 "%s: Atheros AR%s MAC/BB Rev:%x "
1575 "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001576 wiphy_name(hw->wiphy),
Benoit PAPILLAULT392dff82008-11-06 22:26:49 +01001577 ath_mac_bb_name(ah->ah_macVersion),
1578 ah->ah_macRev,
1579 ath_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),
1580 ah->ah_phyRev,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001581 (unsigned long)mem, pdev->irq);
1582
1583 return 0;
1584bad4:
1585 ath_detach(sc);
1586bad3:
1587 ieee80211_free_hw(hw);
1588bad2:
1589 pci_iounmap(pdev, mem);
1590bad1:
1591 pci_release_region(pdev, 0);
1592bad:
1593 pci_disable_device(pdev);
1594 return ret;
1595}
1596
1597static void ath_pci_remove(struct pci_dev *pdev)
1598{
1599 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1600 struct ath_softc *sc = hw->priv;
1601
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001602 ath_detach(sc);
Sujith9c84b792008-10-29 10:17:13 +05301603 if (pdev->irq)
1604 free_irq(pdev->irq, sc);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001605 pci_iounmap(pdev, sc->mem);
1606 pci_release_region(pdev, 0);
1607 pci_disable_device(pdev);
1608 ieee80211_free_hw(hw);
1609}
1610
1611#ifdef CONFIG_PM
1612
1613static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1614{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301615 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1616 struct ath_softc *sc = hw->priv;
1617
1618 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301619
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +05301620#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301621 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1622 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1623#endif
1624
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001625 pci_save_state(pdev);
1626 pci_disable_device(pdev);
1627 pci_set_power_state(pdev, 3);
1628
1629 return 0;
1630}
1631
1632static int ath_pci_resume(struct pci_dev *pdev)
1633{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301634 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1635 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001636 u32 val;
1637 int err;
1638
1639 err = pci_enable_device(pdev);
1640 if (err)
1641 return err;
1642 pci_restore_state(pdev);
1643 /*
1644 * Suspend/Resume resets the PCI configuration space, so we have to
1645 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1646 * PCI Tx retries from interfering with C3 CPU state
1647 */
1648 pci_read_config_dword(pdev, 0x40, &val);
1649 if ((val & 0x0000ff00) != 0)
1650 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1651
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301652 /* Enable LED */
1653 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1654 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1655 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1656
Senthil Balasubramaniane97275c2008-11-13 18:00:02 +05301657#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301658 /*
1659 * check the h/w rfkill state on resume
1660 * and start the rfkill poll timer
1661 */
1662 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1663 queue_delayed_work(sc->hw->workqueue,
1664 &sc->rf_kill.rfkill_poll, 0);
1665#endif
1666
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001667 return 0;
1668}
1669
1670#endif /* CONFIG_PM */
1671
1672MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1673
1674static struct pci_driver ath_pci_driver = {
1675 .name = "ath9k",
1676 .id_table = ath_pci_id_table,
1677 .probe = ath_pci_probe,
1678 .remove = ath_pci_remove,
1679#ifdef CONFIG_PM
1680 .suspend = ath_pci_suspend,
1681 .resume = ath_pci_resume,
1682#endif /* CONFIG_PM */
1683};
1684
1685static int __init init_ath_pci(void)
1686{
1687 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1688
1689 if (pci_register_driver(&ath_pci_driver) < 0) {
1690 printk(KERN_ERR
1691 "ath_pci: No devices found, driver not installed.\n");
1692 pci_unregister_driver(&ath_pci_driver);
1693 return -ENODEV;
1694 }
1695
1696 return 0;
1697}
1698module_init(init_ath_pci);
1699
1700static void __exit exit_ath_pci(void)
1701{
1702 pci_unregister_driver(&ath_pci_driver);
1703 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1704}
1705module_exit(exit_ath_pci);