blob: f82ef10a8361d4c5448f5f5b406c8f6a5ffccc75 [file] [log] [blame]
Chris Leechc13c8262006-05-23 17:18:44 -07001#
2# DMA engine configuration
3#
4
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07005menuconfig DMADEVICES
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08006 bool "DMA Engine support"
Dan Williams04ce9ab2009-06-03 14:22:28 -07007 depends on HAS_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07008 help
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08009 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
Dan Williams9c402f42008-06-27 01:21:11 -070012 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
Chris Leechc13c8262006-05-23 17:18:44 -070015
Linus Walleij6c664a82010-02-09 22:34:54 +010016config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
19 help
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
26 help
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
30
31
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070032if DMADEVICES
Chris Leechdb217332006-06-17 21:24:58 -070033
Chris Leech0bbd5f42006-05-23 17:35:34 -070034comment "DMA Devices"
35
Vinod Koulb3c567e2010-07-21 13:28:10 +053036config INTEL_MID_DMAC
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
38 depends on PCI && X86
39 select DMA_ENGINE
40 default n
41 help
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
44
45 Say Y here if you have such a chipset.
46
47 If unsure, say N.
48
Dan Williams138f4c32009-09-08 17:42:51 -070049config ASYNC_TX_DISABLE_CHANNEL_SWITCH
50 bool
51
Linus Walleije8689e62010-09-28 15:57:37 +020052config AMBA_PL08X
53 bool "ARM PrimeCell PL080 or PL081 support"
54 depends on ARM_AMBA && EXPERIMENTAL
55 select DMA_ENGINE
56 help
57 Platform has a PL08x DMAC device
58 which can provide DMA engine support
59
Chris Leech0bbd5f42006-05-23 17:35:34 -070060config INTEL_IOATDMA
61 tristate "Intel I/OAT DMA support"
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070062 depends on PCI && X86
63 select DMA_ENGINE
64 select DCA
Dan Williams138f4c32009-09-08 17:42:51 -070065 select ASYNC_TX_DISABLE_CHANNEL_SWITCH
Dan Williams7b3cc2b2009-11-19 17:10:37 -070066 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070068 help
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
71
72 Say Y here if you have such a chipset.
73
74 If unsure, say N.
Dan Williamsc2110922007-01-02 13:52:26 -070075
76config INTEL_IOP_ADMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070077 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070079 select DMA_ENGINE
80 help
81 Enable support for the Intel(R) IOP Series RAID engines.
Dan Williamsc2110922007-01-02 13:52:26 -070082
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070083config DW_DMAC
84 tristate "Synopsys DesignWare AHB DMA support"
85 depends on AVR32
86 select DMA_ENGINE
87 default y if CPU_AT32AP7000
88 help
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
91
Nicolas Ferredc78baa2009-07-03 19:24:33 +020092config AT_HDMAC
93 tristate "Atmel AHB DMA support"
Yegor Yefremovcd3abf92009-10-23 11:27:59 +010094 depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
Nicolas Ferredc78baa2009-07-03 19:24:33 +020095 select DMA_ENGINE
96 help
97 Support the Atmel AHB DMA controller. This can be integrated in
98 chips such as the Atmel AT91SAM9RL.
99
Zhang Wei173acc72008-03-01 07:42:48 -0700100config FSL_DMA
Timur Tabi77cd62e2008-09-26 17:00:11 -0700101 tristate "Freescale Elo and Elo Plus DMA support"
102 depends on FSL_SOC
Zhang Wei173acc72008-03-01 07:42:48 -0700103 select DMA_ENGINE
104 ---help---
Timur Tabi77cd62e2008-09-26 17:00:11 -0700105 Enable support for the Freescale Elo and Elo Plus DMA controllers.
106 The Elo is the DMA controller on some 82xx and 83xx parts, and the
107 Elo Plus is the DMA controller on 85xx and 86xx parts.
Zhang Wei173acc72008-03-01 07:42:48 -0700108
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000109config MPC512X_DMA
110 tristate "Freescale MPC512x built-in DMA engine support"
111 depends on PPC_MPC512x
112 select DMA_ENGINE
113 ---help---
114 Enable support for the Freescale MPC512x built-in DMA engine.
115
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700116config MV_XOR
117 bool "Marvell XOR engine support"
118 depends on PLAT_ORION
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700119 select DMA_ENGINE
120 ---help---
121 Enable support for the Marvell XOR engine.
122
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700123config MX3_IPU
124 bool "MX3x Image Processing Unit support"
125 depends on ARCH_MX3
126 select DMA_ENGINE
127 default y
128 help
129 If you plan to use the Image Processing unit in the i.MX3x, say
130 Y here. If unsure, select Y.
131
132config MX3_IPU_IRQS
133 int "Number of dynamically mapped interrupts for IPU"
134 depends on MX3_IPU
135 range 2 137
136 default 4
137 help
138 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
139 To avoid bloating the irq_desc[] array we allocate a sufficient
140 number of IRQ slots and map them dynamically to specific sources.
141
Atsushi Nemotoea76f0b2009-04-23 00:40:30 +0900142config TXX9_DMAC
143 tristate "Toshiba TXx9 SoC DMA support"
144 depends on MACH_TX49XX || MACH_TX39XX
145 select DMA_ENGINE
146 help
147 Support the TXx9 SoC internal DMA controller. This can be
148 integrated in chips such as the Toshiba TX4927/38/39.
149
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000150config SH_DMAE
151 tristate "Renesas SuperH DMAC support"
Magnus Damm927a7c92010-03-19 04:47:19 +0000152 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000153 depends on !SH_DMA_API
154 select DMA_ENGINE
155 help
156 Enable support for the Renesas SuperH DMA controllers.
157
Linus Walleij61f135b2009-11-19 19:49:17 +0100158config COH901318
159 bool "ST-Ericsson COH901318 DMA support"
160 select DMA_ENGINE
161 depends on ARCH_U300
162 help
163 Enable support for ST-Ericsson COH 901 318 DMA.
164
Linus Walleij8d318a52010-03-30 15:33:42 +0200165config STE_DMA40
166 bool "ST-Ericsson DMA40 support"
167 depends on ARCH_U8500
168 select DMA_ENGINE
169 help
170 Support for ST-Ericsson DMA40 controller
171
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700172config AMCC_PPC440SPE_ADMA
173 tristate "AMCC PPC440SPe ADMA support"
174 depends on 440SPe || 440SP
175 select DMA_ENGINE
176 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
177 help
178 Enable support for the AMCC PPC440SPe RAID engines.
179
Richard Röjforsde5d4452010-03-25 19:44:21 +0100180config TIMB_DMA
181 tristate "Timberdale FPGA DMA support"
182 depends on MFD_TIMBERDALE || HAS_IOMEM
183 select DMA_ENGINE
184 help
185 Enable support for the Timberdale FPGA DMA engine.
186
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700187config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
188 bool
189
Jassi Brarb3040e42010-05-23 20:28:19 -0700190config PL330_DMA
191 tristate "DMA API Driver for PL330"
192 select DMA_ENGINE
193 depends on PL330
194 help
195 Select if your platform has one or more PL330 DMACs.
196 You need to provide platform specific settings via
197 platform_data for a dma-pl330 device.
198
Yong Wang0c42bd02010-07-30 16:23:03 +0800199config PCH_DMA
200 tristate "Topcliff PCH DMA support"
201 depends on PCI && X86
202 select DMA_ENGINE
203 help
204 Enable support for the Topcliff PCH DMA engine.
205
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700206config DMA_ENGINE
207 bool
208
209comment "DMA Clients"
210 depends on DMA_ENGINE
211
212config NET_DMA
213 bool "Network: TCP receive copy offload"
214 depends on DMA_ENGINE && NET
Dan Williams9c402f42008-06-27 01:21:11 -0700215 default (INTEL_IOATDMA || FSL_DMA)
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700216 help
217 This enables the use of DMA engines in the network stack to
218 offload receive copy-to-user operations, freeing CPU cycles.
Dan Williams9c402f42008-06-27 01:21:11 -0700219
220 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
221 say N.
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700222
Dan Williams729b5d12009-03-25 09:13:25 -0700223config ASYNC_TX_DMA
224 bool "Async_tx: Offload support for the async_tx api"
Dan Williams9a8de632009-09-08 15:06:10 -0700225 depends on DMA_ENGINE
Dan Williams729b5d12009-03-25 09:13:25 -0700226 help
227 This allows the async_tx api to take advantage of offload engines for
228 memcpy, memset, xor, and raid6 p+q operations. If your platform has
229 a dma engine that can perform raid operations and you have enabled
230 MD_RAID456 say Y.
231
232 If unsure, say N.
233
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700234config DMATEST
235 tristate "DMA Test client"
236 depends on DMA_ENGINE
237 help
238 Simple DMA test client. Say N unless you're debugging a
239 DMA Device driver.
240
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700241endif