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buzbeecbd6d442012-11-17 14:11:25 -08001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
Brian Carlstromfc0e3212013-07-17 14:40:12 -070017#ifndef ART_COMPILER_DEX_COMPILER_ENUMS_H_
18#define ART_COMPILER_DEX_COMPILER_ENUMS_H_
buzbeecbd6d442012-11-17 14:11:25 -080019
20#include "dex_instruction.h"
21
22namespace art {
23
24enum RegisterClass {
25 kCoreReg,
26 kFPReg,
27 kAnyReg,
28};
29
30enum SpecialTargetRegister {
buzbee02031b12012-11-23 09:41:35 -080031 kSelf, // Thread pointer.
32 kSuspend, // Used to reduce suspend checks for some targets.
buzbeecbd6d442012-11-17 14:11:25 -080033 kLr,
34 kPc,
35 kSp,
36 kArg0,
37 kArg1,
38 kArg2,
39 kArg3,
40 kFArg0,
41 kFArg1,
42 kFArg2,
43 kFArg3,
44 kRet0,
45 kRet1,
46 kInvokeTgt,
Jeff Hao88474b42013-10-23 16:24:40 -070047 kHiddenArg,
48 kHiddenFpArg,
buzbeecbd6d442012-11-17 14:11:25 -080049 kCount
50};
51
52enum RegLocationType {
Brian Carlstrom7934ac22013-07-26 10:54:15 -070053 kLocDalvikFrame = 0, // Normal Dalvik register
buzbeecbd6d442012-11-17 14:11:25 -080054 kLocPhysReg,
55 kLocCompilerTemp,
56 kLocInvalid
57};
58
Bill Buzbeed61ba4b2014-01-13 21:44:01 +000059/**
60 * Support for vector registers. Initially used for x86 floats. This will be used
61 * to replace the assumption that a double takes up 2 single FP registers
62 */
63enum VectorLengthType {
64 kVectorNotUsed = 0, // This value is NOT in a vector register.
65 kVectorLength4, // The value occupies 4 bytes in a vector register.
66 kVectorLength8, // The value occupies 8 bytes in a vector register.
67 kVectorLength16 // The value occupies 16 bytes in a vector register (unused now).
68};
69
buzbeecbd6d442012-11-17 14:11:25 -080070enum BBType {
buzbee0d829482013-10-11 15:24:55 -070071 kNullBlock,
buzbeecbd6d442012-11-17 14:11:25 -080072 kEntryBlock,
73 kDalvikByteCode,
74 kExitBlock,
75 kExceptionHandling,
76 kDead,
77};
78
79/*
buzbeefa57c472012-11-21 12:06:18 -080080 * Def/Use encoding in 64-bit use_mask/def_mask. Low positions used for target-specific
buzbeecbd6d442012-11-17 14:11:25 -080081 * registers (and typically use the register number as the position). High positions
82 * reserved for common and abstract resources.
83 */
84
85enum ResourceEncodingPos {
86 kMustNotAlias = 63,
buzbee02031b12012-11-23 09:41:35 -080087 kHeapRef = 62, // Default memory reference type.
88 kLiteral = 61, // Literal pool memory reference.
89 kDalvikReg = 60, // Dalvik v_reg memory reference.
buzbeecbd6d442012-11-17 14:11:25 -080090 kFPStatus = 59,
91 kCCode = 58,
92 kLowestCommonResource = kCCode
93};
94
buzbee02031b12012-11-23 09:41:35 -080095// Shared pseudo opcodes - must be < 0.
buzbeecbd6d442012-11-17 14:11:25 -080096enum LIRPseudoOpcode {
buzbeea169e1d2012-12-05 14:26:44 -080097 kPseudoExportedPC = -16,
98 kPseudoSafepointPC = -15,
99 kPseudoIntrinsicRetry = -14,
100 kPseudoSuspendTarget = -13,
101 kPseudoThrowTarget = -12,
102 kPseudoCaseLabel = -11,
103 kPseudoMethodEntry = -10,
104 kPseudoMethodExit = -9,
105 kPseudoBarrier = -8,
buzbeecbd6d442012-11-17 14:11:25 -0800106 kPseudoEntryBlock = -7,
107 kPseudoExitBlock = -6,
108 kPseudoTargetLabel = -5,
109 kPseudoDalvikByteCodeBoundary = -4,
110 kPseudoPseudoAlign4 = -3,
111 kPseudoEHBlockLabel = -2,
112 kPseudoNormalBlockLabel = -1,
113};
114
115enum ExtendedMIROpcode {
116 kMirOpFirst = kNumPackedOpcodes,
117 kMirOpPhi = kMirOpFirst,
118 kMirOpCopy,
119 kMirOpFusedCmplFloat,
120 kMirOpFusedCmpgFloat,
121 kMirOpFusedCmplDouble,
122 kMirOpFusedCmpgDouble,
123 kMirOpFusedCmpLong,
124 kMirOpNop,
125 kMirOpNullCheck,
126 kMirOpRangeCheck,
127 kMirOpDivZeroCheck,
128 kMirOpCheck,
buzbeea169e1d2012-12-05 14:26:44 -0800129 kMirOpCheckPart2,
buzbeef662a7c2013-02-12 16:19:43 -0800130 kMirOpSelect,
buzbeecbd6d442012-11-17 14:11:25 -0800131 kMirOpLast,
132};
133
134enum MIROptimizationFlagPositons {
135 kMIRIgnoreNullCheck = 0,
136 kMIRNullCheckOnly,
137 kMIRIgnoreRangeCheck,
138 kMIRRangeCheckOnly,
Vladimir Markobfea9c22014-01-17 17:49:33 +0000139 kMIRIgnoreClInitCheck,
buzbee02031b12012-11-23 09:41:35 -0800140 kMIRInlined, // Invoke is inlined (ie dead).
141 kMIRInlinedPred, // Invoke is inlined via prediction.
142 kMIRCallee, // Instruction is inlined from callee.
buzbeecbd6d442012-11-17 14:11:25 -0800143 kMIRIgnoreSuspendCheck,
144 kMIRDup,
buzbee02031b12012-11-23 09:41:35 -0800145 kMIRMark, // Temporary node mark.
buzbeecbd6d442012-11-17 14:11:25 -0800146};
147
buzbee02031b12012-11-23 09:41:35 -0800148// For successor_block_list.
buzbeecbd6d442012-11-17 14:11:25 -0800149enum BlockListType {
150 kNotUsed = 0,
151 kCatch,
152 kPackedSwitch,
153 kSparseSwitch,
154};
155
156enum AssemblerStatus {
157 kSuccess,
158 kRetryAll,
159};
160
161enum OpSize {
buzbee695d13a2014-04-19 13:32:20 -0700162 kWord, // Natural word size of target (32/64).
163 k32,
164 k64,
165 kReference, // Object reference; compressed on 64-bit targets.
buzbeecbd6d442012-11-17 14:11:25 -0800166 kSingle,
167 kDouble,
168 kUnsignedHalf,
169 kSignedHalf,
170 kUnsignedByte,
171 kSignedByte,
172};
173
174std::ostream& operator<<(std::ostream& os, const OpSize& kind);
175
176enum OpKind {
177 kOpMov,
Razvan A Lupusorubd288c22013-12-20 17:27:23 -0800178 kOpCmov,
buzbeecbd6d442012-11-17 14:11:25 -0800179 kOpMvn,
180 kOpCmp,
181 kOpLsl,
182 kOpLsr,
183 kOpAsr,
184 kOpRor,
185 kOpNot,
186 kOpAnd,
187 kOpOr,
188 kOpXor,
189 kOpNeg,
190 kOpAdd,
191 kOpAdc,
192 kOpSub,
193 kOpSbc,
194 kOpRsub,
195 kOpMul,
196 kOpDiv,
197 kOpRem,
198 kOpBic,
199 kOpCmn,
200 kOpTst,
Vladimir Markoa8b4caf2013-10-24 15:08:57 +0100201 kOpRev,
202 kOpRevsh,
buzbeecbd6d442012-11-17 14:11:25 -0800203 kOpBkpt,
204 kOpBlx,
205 kOpPush,
206 kOpPop,
207 kOp2Char,
208 kOp2Short,
209 kOp2Byte,
210 kOpCondBr,
211 kOpUncondBr,
212 kOpBx,
213 kOpInvalid,
214};
215
Razvan A Lupusoru2c498d12014-01-29 16:02:57 -0800216enum MoveType {
217 kMov8GP, // Move 8-bit general purpose register.
218 kMov16GP, // Move 16-bit general purpose register.
219 kMov32GP, // Move 32-bit general purpose register.
220 kMov64GP, // Move 64-bit general purpose register.
221 kMov32FP, // Move 32-bit FP register.
222 kMov64FP, // Move 64-bit FP register.
223 kMovLo64FP, // Move low 32-bits of 64-bit FP register.
224 kMovHi64FP, // Move high 32-bits of 64-bit FP register.
225 kMovU128FP, // Move 128-bit FP register to/from possibly unaligned region.
226 kMov128FP = kMovU128FP,
227 kMovA128FP, // Move 128-bit FP register to/from region surely aligned to 16-bytes.
228 kMovLo128FP, // Move low 64-bits of 128-bit FP register.
229 kMovHi128FP, // Move high 64-bits of 128-bit FP register.
230};
231
buzbeecbd6d442012-11-17 14:11:25 -0800232std::ostream& operator<<(std::ostream& os, const OpKind& kind);
233
234enum ConditionCode {
235 kCondEq, // equal
236 kCondNe, // not equal
Vladimir Marko58af1f92013-12-19 13:31:15 +0000237 kCondCs, // carry set
238 kCondCc, // carry clear
Vladimir Marko459f4df2013-12-20 17:03:09 +0000239 kCondUlt, // unsigned less than
240 kCondUge, // unsigned greater than or same
buzbeecbd6d442012-11-17 14:11:25 -0800241 kCondMi, // minus
242 kCondPl, // plus, positive or zero
243 kCondVs, // overflow
244 kCondVc, // no overflow
245 kCondHi, // unsigned greater than
246 kCondLs, // unsigned lower or same
247 kCondGe, // signed greater than or equal
248 kCondLt, // signed less than
249 kCondGt, // signed greater than
250 kCondLe, // signed less than or equal
251 kCondAl, // always
252 kCondNv, // never
253};
254
255std::ostream& operator<<(std::ostream& os, const ConditionCode& kind);
256
257// Target specific condition encodings
258enum ArmConditionCode {
259 kArmCondEq = 0x0, // 0000
260 kArmCondNe = 0x1, // 0001
261 kArmCondCs = 0x2, // 0010
262 kArmCondCc = 0x3, // 0011
263 kArmCondMi = 0x4, // 0100
264 kArmCondPl = 0x5, // 0101
265 kArmCondVs = 0x6, // 0110
266 kArmCondVc = 0x7, // 0111
267 kArmCondHi = 0x8, // 1000
268 kArmCondLs = 0x9, // 1001
269 kArmCondGe = 0xa, // 1010
270 kArmCondLt = 0xb, // 1011
271 kArmCondGt = 0xc, // 1100
272 kArmCondLe = 0xd, // 1101
273 kArmCondAl = 0xe, // 1110
274 kArmCondNv = 0xf, // 1111
275};
276
277std::ostream& operator<<(std::ostream& os, const ArmConditionCode& kind);
278
279enum X86ConditionCode {
280 kX86CondO = 0x0, // overflow
281 kX86CondNo = 0x1, // not overflow
282
283 kX86CondB = 0x2, // below
284 kX86CondNae = kX86CondB, // not-above-equal
285 kX86CondC = kX86CondB, // carry
286
287 kX86CondNb = 0x3, // not-below
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700288 kX86CondAe = kX86CondNb, // above-equal
289 kX86CondNc = kX86CondNb, // not-carry
buzbeecbd6d442012-11-17 14:11:25 -0800290
291 kX86CondZ = 0x4, // zero
292 kX86CondEq = kX86CondZ, // equal
293
294 kX86CondNz = 0x5, // not-zero
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700295 kX86CondNe = kX86CondNz, // not-equal
buzbeecbd6d442012-11-17 14:11:25 -0800296
297 kX86CondBe = 0x6, // below-equal
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700298 kX86CondNa = kX86CondBe, // not-above
buzbeecbd6d442012-11-17 14:11:25 -0800299
300 kX86CondNbe = 0x7, // not-below-equal
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700301 kX86CondA = kX86CondNbe, // above
buzbeecbd6d442012-11-17 14:11:25 -0800302
303 kX86CondS = 0x8, // sign
304 kX86CondNs = 0x9, // not-sign
305
306 kX86CondP = 0xa, // 8-bit parity even
307 kX86CondPE = kX86CondP,
308
309 kX86CondNp = 0xb, // 8-bit parity odd
310 kX86CondPo = kX86CondNp,
311
312 kX86CondL = 0xc, // less-than
313 kX86CondNge = kX86CondL, // not-greater-equal
314
315 kX86CondNl = 0xd, // not-less-than
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700316 kX86CondGe = kX86CondNl, // not-greater-equal
buzbeecbd6d442012-11-17 14:11:25 -0800317
318 kX86CondLe = 0xe, // less-than-equal
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700319 kX86CondNg = kX86CondLe, // not-greater
buzbeecbd6d442012-11-17 14:11:25 -0800320
321 kX86CondNle = 0xf, // not-less-than
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700322 kX86CondG = kX86CondNle, // greater
buzbeecbd6d442012-11-17 14:11:25 -0800323};
324
325std::ostream& operator<<(std::ostream& os, const X86ConditionCode& kind);
326
327enum ThrowKind {
Brian Carlstrom7fff5442014-04-17 23:11:17 -0700328 kThrowArrayBounds,
329 kThrowConstantArrayBounds,
buzbeecbd6d442012-11-17 14:11:25 -0800330 kThrowNoSuchMethod,
buzbeecbd6d442012-11-17 14:11:25 -0800331};
332
buzbeecbd6d442012-11-17 14:11:25 -0800333enum DividePattern {
334 DivideNone,
335 Divide3,
336 Divide5,
337 Divide7,
338};
339
340std::ostream& operator<<(std::ostream& os, const DividePattern& pattern);
341
Razvan A Lupusoru99ad7232014-02-25 17:41:08 -0800342/**
343 * @brief Memory barrier types (see "The JSR-133 Cookbook for Compiler Writers").
344 * @details Without context sensitive analysis, the most conservative set of barriers
345 * must be issued to ensure the Java Memory Model. Thus the recipe is as follows:
346 * -# Use StoreStore barrier before volatile store.
347 * -# Use StoreLoad barrier after volatile store.
348 * -# Use LoadLoad and LoadStore barrier after each volatile load.
349 * -# Use StoreStore barrier after all stores but before return from any constructor whose
350 * class has final fields.
351 */
buzbee1bc37c62012-11-20 13:35:41 -0800352enum MemBarrierKind {
353 kLoadStore,
354 kLoadLoad,
355 kStoreStore,
356 kStoreLoad
357};
358
359std::ostream& operator<<(std::ostream& os, const MemBarrierKind& kind);
360
buzbee02031b12012-11-23 09:41:35 -0800361enum OpFeatureFlags {
362 kIsBranch = 0,
363 kNoOperand,
364 kIsUnaryOp,
365 kIsBinaryOp,
366 kIsTertiaryOp,
367 kIsQuadOp,
368 kIsQuinOp,
369 kIsSextupleOp,
370 kIsIT,
371 kMemLoad,
372 kMemStore,
Brian Carlstrom7934ac22013-07-26 10:54:15 -0700373 kPCRelFixup, // x86 FIXME: add NEEDS_FIXUP to instruction attributes.
buzbee02031b12012-11-23 09:41:35 -0800374 kRegDef0,
375 kRegDef1,
Razvan A Lupusoru99ad7232014-02-25 17:41:08 -0800376 kRegDef2,
buzbee02031b12012-11-23 09:41:35 -0800377 kRegDefA,
378 kRegDefD,
379 kRegDefFPCSList0,
380 kRegDefFPCSList2,
381 kRegDefList0,
382 kRegDefList1,
383 kRegDefList2,
384 kRegDefLR,
385 kRegDefSP,
386 kRegUse0,
387 kRegUse1,
388 kRegUse2,
389 kRegUse3,
390 kRegUse4,
391 kRegUseA,
392 kRegUseC,
393 kRegUseD,
Vladimir Marko70b797d2013-12-03 15:25:24 +0000394 kRegUseB,
buzbee02031b12012-11-23 09:41:35 -0800395 kRegUseFPCSList0,
396 kRegUseFPCSList2,
397 kRegUseList0,
398 kRegUseList1,
399 kRegUseLR,
400 kRegUsePC,
401 kRegUseSP,
402 kSetsCCodes,
Serguei Katkove90501d2014-03-12 15:56:54 +0700403 kUsesCCodes,
buzbee9da5c102014-03-28 12:59:18 -0700404 kUseFpStack,
405 kUseHi,
406 kUseLo,
407 kDefHi,
408 kDefLo
buzbee02031b12012-11-23 09:41:35 -0800409};
410
buzbeef662a7c2013-02-12 16:19:43 -0800411enum SelectInstructionKind {
412 kSelectNone,
413 kSelectConst,
414 kSelectMove,
415 kSelectGoto
416};
417
buzbeea5abf702013-04-12 14:39:29 -0700418std::ostream& operator<<(std::ostream& os, const SelectInstructionKind& kind);
419
buzbeeb48819d2013-09-14 16:15:25 -0700420// LIR fixup kinds for Arm
421enum FixupKind {
422 kFixupNone,
423 kFixupLabel, // For labels we just adjust the offset.
Vladimir Marko306f0172014-01-07 18:21:20 +0000424 kFixupLoad, // Mostly for immediates.
buzbeeb48819d2013-09-14 16:15:25 -0700425 kFixupVLoad, // FP load which *may* be pc-relative.
426 kFixupCBxZ, // Cbz, Cbnz.
427 kFixupPushPop, // Not really pc relative, but changes size based on args.
428 kFixupCondBranch, // Conditional branch
429 kFixupT1Branch, // Thumb1 Unconditional branch
430 kFixupT2Branch, // Thumb2 Unconditional branch
431 kFixupBlx1, // Blx1 (start of Blx1/Blx2 pair).
432 kFixupBl1, // Bl1 (start of Bl1/Bl2 pair).
433 kFixupAdr, // Adr.
434 kFixupMovImmLST, // kThumb2MovImm16LST.
435 kFixupMovImmHST, // kThumb2MovImm16HST.
436 kFixupAlign4, // Align to 4-byte boundary.
437};
438
439std::ostream& operator<<(std::ostream& os, const FixupKind& kind);
440
buzbeecbd6d442012-11-17 14:11:25 -0800441} // namespace art
442
Brian Carlstromfc0e3212013-07-17 14:40:12 -0700443#endif // ART_COMPILER_DEX_COMPILER_ENUMS_H_