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gerrit-public.fairphone.software / fp2-dev / platform / external / llvm / 0c123df48933e54afa23f03be410383791e0bdf4 / . / docs / CommandGuide / llc.pod
blob: 98450935ed014c3dc861c9c2f5f7d2097c824566 [file] [log] [blame]
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]1=pod
2
3=head1 NAME
4
5llc - LLVM static compiler
6
7=head1 SYNOPSIS
8
Misha Brukmanc08937a2004-07-02 16:06:19 +0000[diff] [blame]9B<llc> [I<options>] [I<filename>]
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]10
11=head1 DESCRIPTION
12
13The B<llc> command compiles LLVM bytecode into assembly language for a
14specified architecture. The assembly language output can then be passed through
15a native assembler and linker to generate native code.
16
Chris Lattner0c123df2004-12-09 21:16:40 +0000[diff] [blame^]17The choice of architecture for the output assembly code is automatically
18determined from the input bytecode file, unless a B<-m> option is used to override
19the default.
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]20
21=head1 OPTIONS
22
23If I<filename> is - or omitted, B<llc> reads LLVM bytecode from standard input.
24Otherwise, it will read LLVM bytecode from I<filename>.
25
26If the B<-o> option is omitted, then B<llc> will send its output to standard
27output if the input is from standard input. If the B<-o> option specifies -,
28then the output will also be sent to standard output.
29
30If no B<-o> option is specified and an input file other than - is specified,
31then B<llc> creates the output filename by taking the input filename,
32removing any existing F<.bc> extension, and adding a F<.s> suffix.
33
34Other B<llc> options are as follows:
35
36=over
37
38=item B<-f>
39
40Overwrite output files. By default, B<llc> will refuse to overwrite
41an output file which already exists.
42
43=item B<-march>=I<arch>
44
45Specify the architecture for which to generate assembly. Valid
46architectures are:
47
48=over
49
50=item I<x86>
51
52Intel IA-32 (Pentium and above)
53
Misha Brukman0d65a1f2004-11-15 20:22:49 +0000[diff] [blame]54=item I<ppc32>
55
5632-bit PowerPC (MacOS X, 32-bit ABI)
57
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]58=item I<sparcv9>
59
6064-bit SPARC V9
61
62=item I<c>
63
64Emit C code, not assembly
65
66=back
67
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]68=item B<--disable-fp-elim>
69
70Disable frame pointer elimination optimization.
71
Chris Lattner0c123df2004-12-09 21:16:40 +0000[diff] [blame^]72=item B<--enable-correct-eh-support>
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]73
Chris Lattner0c123df2004-12-09 21:16:40 +0000[diff] [blame^]74Instruct the B<lowerinvoke> pass to insert code for correct exception handling
75support. This is expensive and is by default omitted for efficiency.
76
77=item B<--help>
78
79Print a summary of command line options.
80
81=item B<--stats>
82
83Print statistics recorded by code-generation passes.
84
85=item B<--time-passes>
86
87Record the amount of time needed for each pass and print a report to standard
88error.
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]89
90=item B<--print-machineinstrs>
91
Chris Lattner0c123df2004-12-09 21:16:40 +0000[diff] [blame^]92Print generated machine code between compilation phases (useful for debugging).
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]93
94=item B<--regalloc>=I<allocator>
95
96Specify the register allocator to use. The default I<allocator> is I<local>.
97Valid register allocators are:
98
99=over
100
101=item I<simple>
102
103Very simple "always spill" register allocator
104
105=item I<local>
106
107Local register allocator
108
109=item I<linearscan>
110
Alkis Evlogimenosc8dec2c2004-07-21 08:18:50 +0000[diff] [blame]111Linear scan global register allocator
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]112
Misha Brukman1e635c32004-07-21 12:53:14 +0000[diff] [blame]113=item I<iterativescan>
Alkis Evlogimenos910d0d62004-07-21 08:24:35 +0000[diff] [blame]114
115Iterative scan global register allocator
116
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]117=back
118
119=item B<--spiller>=I<spiller>
120
121Specify the spiller to use for register allocators that support it. Currently
122this option is used only by the linear scan register allocator. The default
123I<spiller> is I<local>. Valid spillers are:
124
125=over
126
127=item I<simple>
128
129Simple spiller
130
131=item I<local>
132
133Local spiller
134
135=back
136
137=back
138
Chris Lattner0c123df2004-12-09 21:16:40 +0000[diff] [blame^]139=head2 Intel IA-32-specific Options
140
141=over
142
143=item B<--x86-asm-syntax=att|intel>
144
145Specify whether to emit assembly code in AT&T syntax (the default) or intel
146syntax.
147
148=back
149
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]150=head2 SPARCV9-specific Options
151
152=over
153
154=item B<--disable-peephole>
155
156Disable peephole optimization pass.
157
158=item B<--disable-sched>
159
160Disable local scheduling pass.
161
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]162=back
163
164=head1 EXIT STATUS
165
166If B<llc> succeeds, it will exit with 0. Otherwise, if an error occurs,
167it will exit with a non-zero value.
168
169=head1 SEE ALSO
170
Misha Brukmanc08937a2004-07-02 16:06:19 +0000[diff] [blame]171L<lli|lli>
Brian Gaekee993d202004-05-14 19:50:33 +0000[diff] [blame]172
173=head1 AUTHORS
174
175Maintained by the LLVM Team (L<http://llvm.cs.uiuc.edu>).
176
177=cut