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Chris Lattner97f06932009-10-19 20:20:46 +00001//===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===//
2//
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
Rafael Espindola7bc59bc2006-05-14 22:18:28 +00006// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains a printer that converts from our internal representation
11// of machine-dependent LLVM code to GAS-format ARM assembly language.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner95b2c7d2006-12-19 22:59:26 +000015#define DEBUG_TYPE "asm-printer"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000016#include "ARM.h"
Anton Korobeynikov88ce6672009-05-23 19:51:20 +000017#include "ARMBuildAttrs.h"
Evan Chenga8e29892007-01-19 07:51:42 +000018#include "ARMAddressingModes.h"
19#include "ARMConstantPoolValue.h"
Jim Grosbach7ac16092010-10-01 22:39:28 +000020#include "InstPrinter/ARMInstPrinter.h"
Chris Lattner97f06932009-10-19 20:20:46 +000021#include "ARMMachineFunctionInfo.h"
22#include "ARMMCInstLower.h"
23#include "ARMTargetMachine.h"
Jason W Kim17b443d2010-10-11 23:01:44 +000024#include "ARMTargetObjectFile.h"
Dale Johannesen3f282aa2010-04-26 20:07:31 +000025#include "llvm/Analysis/DebugInfo.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000026#include "llvm/Constants.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000027#include "llvm/Module.h"
Benjamin Kramere55b15f2009-12-28 12:27:56 +000028#include "llvm/Type.h"
Dan Gohmancf20ac42009-08-13 01:36:44 +000029#include "llvm/Assembly/Writer.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000030#include "llvm/CodeGen/AsmPrinter.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000031#include "llvm/CodeGen/MachineModuleInfoImpls.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000032#include "llvm/CodeGen/MachineFunctionPass.h"
Evan Chenga8e29892007-01-19 07:51:42 +000033#include "llvm/CodeGen/MachineJumpTableInfo.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000034#include "llvm/MC/MCAsmInfo.h"
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000035#include "llvm/MC/MCAssembler.h"
Chris Lattnerb0f294c2009-10-19 18:38:33 +000036#include "llvm/MC/MCContext.h"
Bill Wendlingbecd83e2010-03-09 00:40:17 +000037#include "llvm/MC/MCExpr.h"
Chris Lattner97f06932009-10-19 20:20:46 +000038#include "llvm/MC/MCInst.h"
Chris Lattnerf9bdedd2009-08-10 18:15:01 +000039#include "llvm/MC/MCSectionMachO.h"
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000040#include "llvm/MC/MCObjectStreamer.h"
Chris Lattner6c2f9e12009-08-19 05:49:37 +000041#include "llvm/MC/MCStreamer.h"
Chris Lattner325d3dc2009-09-13 17:14:04 +000042#include "llvm/MC/MCSymbol.h"
Chris Lattnerd62f1b42010-03-12 21:19:23 +000043#include "llvm/Target/Mangler.h"
Rafael Espindolab01c4bb2006-07-27 11:38:51 +000044#include "llvm/Target/TargetData.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000045#include "llvm/Target/TargetMachine.h"
Evan Cheng5be54b02007-01-19 19:25:36 +000046#include "llvm/Target/TargetOptions.h"
Daniel Dunbar51b198a2009-07-15 20:24:03 +000047#include "llvm/Target/TargetRegistry.h"
Evan Chengc324ecb2009-07-24 18:19:46 +000048#include "llvm/ADT/SmallPtrSet.h"
Jim Grosbachc40d9f92009-09-01 18:49:12 +000049#include "llvm/ADT/SmallString.h"
Bob Wilson54c78ef2009-11-06 23:33:28 +000050#include "llvm/ADT/StringExtras.h"
Chris Lattner97f06932009-10-19 20:20:46 +000051#include "llvm/Support/CommandLine.h"
Devang Patel59135f42010-08-04 22:39:39 +000052#include "llvm/Support/Debug.h"
Torok Edwin30464702009-07-08 20:55:50 +000053#include "llvm/Support/ErrorHandling.h"
Chris Lattnerb23569a2010-04-04 08:18:47 +000054#include "llvm/Support/raw_ostream.h"
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000055#include <cctype>
Rafael Espindola7bc59bc2006-05-14 22:18:28 +000056using namespace llvm;
57
Jim Grosbach91729002010-07-21 23:03:52 +000058namespace llvm {
59 namespace ARM {
60 enum DW_ISA {
61 DW_ISA_ARM_thumb = 1,
62 DW_ISA_ARM_arm = 2
63 };
64 }
65}
66
Chris Lattner95b2c7d2006-12-19 22:59:26 +000067namespace {
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000068
69 // Per section and per symbol attributes are not supported.
70 // To implement them we would need the ability to delay this emission
71 // until the assembly file is fully parsed/generated as only then do we
72 // know the symbol and section numbers.
73 class AttributeEmitter {
74 public:
75 virtual void MaybeSwitchVendor(StringRef Vendor) = 0;
76 virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0;
77 virtual void Finish() = 0;
Rafael Espindola4921e232010-10-25 18:38:32 +000078 virtual ~AttributeEmitter() {}
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000079 };
80
81 class AsmAttributeEmitter : public AttributeEmitter {
82 MCStreamer &Streamer;
83
84 public:
85 AsmAttributeEmitter(MCStreamer &Streamer_) : Streamer(Streamer_) {}
86 void MaybeSwitchVendor(StringRef Vendor) { }
87
88 void EmitAttribute(unsigned Attribute, unsigned Value) {
89 Streamer.EmitRawText("\t.eabi_attribute " +
90 Twine(Attribute) + ", " + Twine(Value));
91 }
92
93 void Finish() { }
94 };
95
96 class ObjectAttributeEmitter : public AttributeEmitter {
97 MCObjectStreamer &Streamer;
Rafael Espindolacecbc3d2010-10-25 17:50:35 +000098 StringRef CurrentVendor;
99 SmallString<64> Contents;
100
101 public:
102 ObjectAttributeEmitter(MCObjectStreamer &Streamer_) :
103 Streamer(Streamer_), CurrentVendor("") { }
104
105 void MaybeSwitchVendor(StringRef Vendor) {
106 assert(!Vendor.empty() && "Vendor cannot be empty.");
107
108 if (CurrentVendor.empty())
109 CurrentVendor = Vendor;
110 else if (CurrentVendor == Vendor)
111 return;
112 else
113 Finish();
114
115 CurrentVendor = Vendor;
116
Rafael Espindola33363842010-10-25 22:26:55 +0000117 assert(Contents.size() == 0);
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000118 }
119
120 void EmitAttribute(unsigned Attribute, unsigned Value) {
121 // FIXME: should be ULEB
122 Contents += Attribute;
123 Contents += Value;
124 }
125
126 void Finish() {
Rafael Espindola33363842010-10-25 22:26:55 +0000127 const size_t ContentsSize = Contents.size();
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000128
Rafael Espindola33363842010-10-25 22:26:55 +0000129 // Vendor size + Vendor name + '\0'
130 const size_t VendorHeaderSize = 4 + CurrentVendor.size() + 1;
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000131
Rafael Espindola33363842010-10-25 22:26:55 +0000132 // Tag + Tag Size
133 const size_t TagHeaderSize = 1 + 4;
134
135 Streamer.EmitIntValue(VendorHeaderSize + TagHeaderSize + ContentsSize, 4);
136 Streamer.EmitBytes(CurrentVendor, 0);
137 Streamer.EmitIntValue(0, 1); // '\0'
138
139 Streamer.EmitIntValue(ARMBuildAttrs::File, 1);
140 Streamer.EmitIntValue(TagHeaderSize + ContentsSize, 4);
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000141
142 Streamer.EmitBytes(Contents, 0);
Rafael Espindola33363842010-10-25 22:26:55 +0000143
144 Contents.clear();
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000145 }
146 };
147
Chris Lattner4a071d62009-10-19 17:59:19 +0000148 class ARMAsmPrinter : public AsmPrinter {
Evan Chenga8e29892007-01-19 07:51:42 +0000149
150 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
151 /// make the right decision when printing asm code for different targets.
152 const ARMSubtarget *Subtarget;
153
154 /// AFI - Keep a pointer to ARMFunctionInfo for the current
Evan Cheng6d63a722008-09-18 07:27:23 +0000155 /// MachineFunction.
Evan Chenga8e29892007-01-19 07:51:42 +0000156 ARMFunctionInfo *AFI;
157
Evan Cheng6d63a722008-09-18 07:27:23 +0000158 /// MCP - Keep a pointer to constantpool entries of the current
159 /// MachineFunction.
160 const MachineConstantPool *MCP;
161
Bill Wendling57f0db82009-02-24 08:30:20 +0000162 public:
Chris Lattnerb23569a2010-04-04 08:18:47 +0000163 explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
164 : AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL) {
Bill Wendling57f0db82009-02-24 08:30:20 +0000165 Subtarget = &TM.getSubtarget<ARMSubtarget>();
166 }
167
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000168 virtual const char *getPassName() const {
169 return "ARM Assembly Printer";
170 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000171
Chris Lattner35c33bd2010-04-04 04:47:45 +0000172 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
Evan Chenga8e29892007-01-19 07:51:42 +0000173 const char *Modifier = 0);
Bob Wilson54c78ef2009-11-06 23:33:28 +0000174
Evan Cheng055b0312009-06-29 07:51:04 +0000175 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000176 unsigned AsmVariant, const char *ExtraCode,
177 raw_ostream &O);
Evan Cheng055b0312009-06-29 07:51:04 +0000178 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
Bob Wilson224c2442009-05-19 05:53:42 +0000179 unsigned AsmVariant,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000180 const char *ExtraCode, raw_ostream &O);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000181
Jim Grosbach2317e402010-09-30 01:57:53 +0000182 void EmitJumpTable(const MachineInstr *MI);
183 void EmitJump2Table(const MachineInstr *MI);
Chris Lattnera786cea2010-01-28 01:10:34 +0000184 virtual void EmitInstruction(const MachineInstr *MI);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000185 bool runOnMachineFunction(MachineFunction &F);
Jim Grosbachb0739b72010-09-02 01:02:06 +0000186
Chris Lattnera2406192010-01-28 00:19:24 +0000187 virtual void EmitConstantPool() {} // we emit constant pools customly!
Chris Lattner953ebb72010-01-27 23:58:11 +0000188 virtual void EmitFunctionEntryLabel();
Bob Wilson812209a2009-09-30 22:06:26 +0000189 void EmitStartOfAsmFile(Module &M);
Chris Lattner4a071d62009-10-19 17:59:19 +0000190 void EmitEndOfAsmFile(Module &M);
Evan Chenga8e29892007-01-19 07:51:42 +0000191
Jason W Kimdef9ac42010-10-06 22:36:46 +0000192 private:
193 // Helpers for EmitStartOfAsmFile() and EmitEndOfAsmFile()
194 void emitAttributes();
Jason W Kimdef9ac42010-10-06 22:36:46 +0000195
Jason W Kim17b443d2010-10-11 23:01:44 +0000196 // Helper for ELF .o only
197 void emitARMAttributeSection();
198
Jason W Kimdef9ac42010-10-06 22:36:46 +0000199 public:
Jim Grosbach2d0f53b2010-09-28 17:05:56 +0000200 void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
201
Devang Patel59135f42010-08-04 22:39:39 +0000202 MachineLocation getDebugValueLocation(const MachineInstr *MI) const {
203 MachineLocation Location;
204 assert (MI->getNumOperands() == 4 && "Invalid no. of machine operands!");
205 // Frame address. Currently handles register +- offset only.
206 if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm())
207 Location.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm());
208 else {
209 DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n");
210 }
211 return Location;
212 }
213
Jim Grosbach91729002010-07-21 23:03:52 +0000214 virtual unsigned getISAEncoding() {
215 // ARM/Darwin adds ISA to the DWARF info for each function.
216 if (!Subtarget->isTargetDarwin())
217 return 0;
218 return Subtarget->isThumb() ?
219 llvm::ARM::DW_ISA_ARM_thumb : llvm::ARM::DW_ISA_ARM_arm;
220 }
221
Chris Lattner0890cf12010-01-25 19:51:38 +0000222 MCSymbol *GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
223 const MachineBasicBlock *MBB) const;
224 MCSymbol *GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const;
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000225
Jim Grosbach433a5782010-09-24 20:47:58 +0000226 MCSymbol *GetARMSJLJEHLabel(void) const;
227
Evan Cheng711b6dc2008-08-08 06:56:16 +0000228 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
229 /// the .s file.
Evan Chenga8e29892007-01-19 07:51:42 +0000230 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
Chris Lattner9d7efd32010-04-04 07:05:53 +0000231 SmallString<128> Str;
232 raw_svector_ostream OS(Str);
233 EmitMachineConstantPoolValue(MCPV, OS);
234 OutStreamer.EmitRawText(OS.str());
235 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000236
Chris Lattner9d7efd32010-04-04 07:05:53 +0000237 void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV,
238 raw_ostream &O) {
Chris Lattnerea3cb402010-01-20 07:33:29 +0000239 switch (TM.getTargetData()->getTypeAllocSize(MCPV->getType())) {
240 case 1: O << MAI->getData8bitsDirective(0); break;
241 case 2: O << MAI->getData16bitsDirective(0); break;
242 case 4: O << MAI->getData32bitsDirective(0); break;
243 default: assert(0 && "Unknown CPV size");
244 }
Evan Chenga8e29892007-01-19 07:51:42 +0000245
Evan Cheng711b6dc2008-08-08 06:56:16 +0000246 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
Jim Grosbach3fb2b1e2009-09-01 01:57:56 +0000247
248 if (ACPV->isLSDA()) {
Chris Lattner9d7efd32010-04-04 07:05:53 +0000249 O << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber();
Bob Wilson28989a82009-11-02 16:59:06 +0000250 } else if (ACPV->isBlockAddress()) {
Chris Lattner0752cda2010-04-05 16:32:14 +0000251 O << *GetBlockAddressSymbol(ACPV->getBlockAddress());
Bob Wilson28989a82009-11-02 16:59:06 +0000252 } else if (ACPV->isGlobalValue()) {
Dan Gohman46510a72010-04-15 01:51:59 +0000253 const GlobalValue *GV = ACPV->getGV();
Evan Chenge4e4ed32009-08-28 23:18:09 +0000254 bool isIndirect = Subtarget->isTargetDarwin() &&
Evan Cheng63476a82009-09-03 07:04:02 +0000255 Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
Evan Chenge4e4ed32009-08-28 23:18:09 +0000256 if (!isIndirect)
Chris Lattnerd62f1b42010-03-12 21:19:23 +0000257 O << *Mang->getSymbol(GV);
Evan Chenge4e4ed32009-08-28 23:18:09 +0000258 else {
259 // FIXME: Remove this when Darwin transition to @GOT like syntax.
Chris Lattner7a2ba942010-01-16 18:37:32 +0000260 MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
Chris Lattner10b318b2010-01-17 21:43:43 +0000261 O << *Sym;
Jim Grosbachb0739b72010-09-02 01:02:06 +0000262
Chris Lattnerb8f64a72009-10-19 18:49:14 +0000263 MachineModuleInfoMachO &MMIMachO =
264 MMI->getObjFileInfo<MachineModuleInfoMachO>();
Bill Wendlingcebae362010-03-10 22:34:10 +0000265 MachineModuleInfoImpl::StubValueTy &StubSym =
Chris Lattnerb8f64a72009-10-19 18:49:14 +0000266 GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(Sym) :
267 MMIMachO.getGVStubEntry(Sym);
Bill Wendlingcebae362010-03-10 22:34:10 +0000268 if (StubSym.getPointer() == 0)
269 StubSym = MachineModuleInfoImpl::
Chris Lattnerd62f1b42010-03-12 21:19:23 +0000270 StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
Evan Chenge4e4ed32009-08-28 23:18:09 +0000271 }
Bob Wilson28989a82009-11-02 16:59:06 +0000272 } else {
273 assert(ACPV->isExtSymbol() && "unrecognized constant pool value");
Chris Lattner10b318b2010-01-17 21:43:43 +0000274 O << *GetExternalSymbolSymbol(ACPV->getSymbol());
Bob Wilson28989a82009-11-02 16:59:06 +0000275 }
Jim Grosbache9952212009-09-04 01:38:51 +0000276
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000277 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
Lauro Ramos Venancio64f4fa52007-04-27 13:54:47 +0000278 if (ACPV->getPCAdjustment() != 0) {
Chris Lattner33adcfb2009-08-22 21:43:10 +0000279 O << "-(" << MAI->getPrivateGlobalPrefix() << "PC"
Evan Chenge7e0d622009-11-06 22:24:13 +0000280 << getFunctionNumber() << "_" << ACPV->getLabelId()
Lauro Ramos Venancio64f4fa52007-04-27 13:54:47 +0000281 << "+" << (unsigned)ACPV->getPCAdjustment();
282 if (ACPV->mustAddCurrentAddress())
283 O << "-.";
Chris Lattner8b378752010-01-15 23:26:49 +0000284 O << ')';
Lauro Ramos Venancio64f4fa52007-04-27 13:54:47 +0000285 }
Evan Chenga8e29892007-01-19 07:51:42 +0000286 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000287 };
288} // end of anonymous namespace
289
Chris Lattner953ebb72010-01-27 23:58:11 +0000290void ARMAsmPrinter::EmitFunctionEntryLabel() {
291 if (AFI->isThumbFunction()) {
Chris Lattner9d7efd32010-04-04 07:05:53 +0000292 OutStreamer.EmitRawText(StringRef("\t.code\t16"));
Chris Lattner0752cda2010-04-05 16:32:14 +0000293 if (!Subtarget->isTargetDarwin())
Chris Lattner9d7efd32010-04-04 07:05:53 +0000294 OutStreamer.EmitRawText(StringRef("\t.thumb_func"));
Chris Lattner0752cda2010-04-05 16:32:14 +0000295 else {
296 // This needs to emit to a temporary string to get properly quoted
297 // MCSymbols when they have spaces in them.
298 SmallString<128> Tmp;
299 raw_svector_ostream OS(Tmp);
300 OS << "\t.thumb_func\t" << *CurrentFnSym;
301 OutStreamer.EmitRawText(OS.str());
302 }
Chris Lattner953ebb72010-01-27 23:58:11 +0000303 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000304
Chris Lattner953ebb72010-01-27 23:58:11 +0000305 OutStreamer.EmitLabel(CurrentFnSym);
306}
307
Jim Grosbach2317e402010-09-30 01:57:53 +0000308/// runOnMachineFunction - This uses the EmitInstruction()
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000309/// method to print assembly for each instruction.
310///
311bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
Evan Chenga8e29892007-01-19 07:51:42 +0000312 AFI = MF.getInfo<ARMFunctionInfo>();
Evan Cheng6d63a722008-09-18 07:27:23 +0000313 MCP = MF.getConstantPool();
Rafael Espindola4b442b52006-05-23 02:48:20 +0000314
Chris Lattnerd49fe1b2010-01-28 01:28:58 +0000315 return AsmPrinter::runOnMachineFunction(MF);
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000316}
317
Evan Cheng055b0312009-06-29 07:51:04 +0000318void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
Chris Lattner35c33bd2010-04-04 04:47:45 +0000319 raw_ostream &O, const char *Modifier) {
Evan Cheng055b0312009-06-29 07:51:04 +0000320 const MachineOperand &MO = MI->getOperand(OpNum);
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000321 unsigned TF = MO.getTargetFlags();
322
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000323 switch (MO.getType()) {
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000324 default:
325 assert(0 && "<unknown operand type>");
Bob Wilson5bafff32009-06-22 23:27:02 +0000326 case MachineOperand::MO_Register: {
327 unsigned Reg = MO.getReg();
Chris Lattner8bc86cb2009-10-19 20:59:55 +0000328 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
Jim Grosbach35636282010-10-06 21:22:32 +0000329 assert(!MO.getSubReg() && "Subregs should be eliminated!");
330 O << ARMInstPrinter::getRegisterName(Reg);
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000331 break;
Bob Wilson5bafff32009-06-22 23:27:02 +0000332 }
Evan Chenga8e29892007-01-19 07:51:42 +0000333 case MachineOperand::MO_Immediate: {
Evan Cheng5adb66a2009-09-28 09:14:39 +0000334 int64_t Imm = MO.getImm();
Anton Korobeynikov632606c2009-10-08 20:43:22 +0000335 O << '#';
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000336 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
Jim Grosbach4dea9412010-10-06 16:51:55 +0000337 (TF == ARMII::MO_LO16))
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000338 O << ":lower16:";
339 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
Jim Grosbach4dea9412010-10-06 16:51:55 +0000340 (TF == ARMII::MO_HI16))
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000341 O << ":upper16:";
Anton Korobeynikov632606c2009-10-08 20:43:22 +0000342 O << Imm;
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000343 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000344 }
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000345 case MachineOperand::MO_MachineBasicBlock:
Chris Lattner1b2eb0e2010-03-13 21:04:28 +0000346 O << *MO.getMBB()->getSymbol();
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000347 return;
Rafael Espindola84b19be2006-07-16 01:02:57 +0000348 case MachineOperand::MO_GlobalAddress: {
Dan Gohman46510a72010-04-15 01:51:59 +0000349 const GlobalValue *GV = MO.getGlobal();
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000350 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
351 (TF & ARMII::MO_LO16))
352 O << ":lower16:";
353 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
354 (TF & ARMII::MO_HI16))
355 O << ":upper16:";
Chris Lattnerd62f1b42010-03-12 21:19:23 +0000356 O << *Mang->getSymbol(GV);
Anton Korobeynikov7751ad92008-11-22 16:15:34 +0000357
Chris Lattner0c08d092010-04-03 22:28:33 +0000358 printOffset(MO.getOffset(), O);
Jim Grosbach1d6111c2010-10-06 21:36:43 +0000359 if (TF == ARMII::MO_PLT)
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000360 O << "(PLT)";
Evan Chenga8e29892007-01-19 07:51:42 +0000361 break;
Rafael Espindola84b19be2006-07-16 01:02:57 +0000362 }
Evan Chenga8e29892007-01-19 07:51:42 +0000363 case MachineOperand::MO_ExternalSymbol: {
Chris Lattner10b318b2010-01-17 21:43:43 +0000364 O << *GetExternalSymbolSymbol(MO.getSymbolName());
Jim Grosbach1d6111c2010-10-06 21:36:43 +0000365 if (TF == ARMII::MO_PLT)
Lauro Ramos Venancio0ae4a332007-04-22 00:04:12 +0000366 O << "(PLT)";
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000367 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000368 }
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000369 case MachineOperand::MO_ConstantPoolIndex:
Chris Lattner1b46f432010-01-23 07:00:21 +0000370 O << *GetCPISymbol(MO.getIndex());
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000371 break;
Evan Chenga8e29892007-01-19 07:51:42 +0000372 case MachineOperand::MO_JumpTableIndex:
Chris Lattner1b46f432010-01-23 07:00:21 +0000373 O << *GetJTISymbol(MO.getIndex());
Evan Chenga8e29892007-01-19 07:51:42 +0000374 break;
Rafael Espindola2f99b6b2006-05-25 12:57:06 +0000375 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000376}
377
Evan Cheng055b0312009-06-29 07:51:04 +0000378//===--------------------------------------------------------------------===//
379
Chris Lattner0890cf12010-01-25 19:51:38 +0000380MCSymbol *ARMAsmPrinter::
381GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
382 const MachineBasicBlock *MBB) const {
383 SmallString<60> Name;
384 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix()
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000385 << getFunctionNumber() << '_' << uid << '_' << uid2
Chris Lattner0890cf12010-01-25 19:51:38 +0000386 << "_set_" << MBB->getNumber();
Chris Lattner9b97a732010-03-30 18:10:53 +0000387 return OutContext.GetOrCreateSymbol(Name.str());
Chris Lattner0890cf12010-01-25 19:51:38 +0000388}
389
390MCSymbol *ARMAsmPrinter::
391GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const {
392 SmallString<60> Name;
393 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI"
Chris Lattner281e7762010-01-25 23:28:03 +0000394 << getFunctionNumber() << '_' << uid << '_' << uid2;
Chris Lattner9b97a732010-03-30 18:10:53 +0000395 return OutContext.GetOrCreateSymbol(Name.str());
Chris Lattnerbfcb0962010-01-25 19:39:52 +0000396}
397
Jim Grosbach433a5782010-09-24 20:47:58 +0000398
399MCSymbol *ARMAsmPrinter::GetARMSJLJEHLabel(void) const {
400 SmallString<60> Name;
401 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "SJLJEH"
402 << getFunctionNumber();
403 return OutContext.GetOrCreateSymbol(Name.str());
404}
405
Evan Cheng055b0312009-06-29 07:51:04 +0000406bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000407 unsigned AsmVariant, const char *ExtraCode,
408 raw_ostream &O) {
Evan Chenga8e29892007-01-19 07:51:42 +0000409 // Does this asm operand have a single letter operand modifier?
410 if (ExtraCode && ExtraCode[0]) {
411 if (ExtraCode[1] != 0) return true; // Unknown modifier.
Anton Korobeynikov8e9ece72009-08-08 23:10:41 +0000412
Evan Chenga8e29892007-01-19 07:51:42 +0000413 switch (ExtraCode[0]) {
414 default: return true; // Unknown modifier.
Bob Wilson9b4b00a2009-07-09 23:54:51 +0000415 case 'a': // Print as a memory address.
416 if (MI->getOperand(OpNum).isReg()) {
Jim Grosbach2f24c4e2010-09-30 15:25:22 +0000417 O << "["
418 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
419 << "]";
Bob Wilson9b4b00a2009-07-09 23:54:51 +0000420 return false;
421 }
422 // Fallthrough
423 case 'c': // Don't print "#" before an immediate operand.
Bob Wilson4f38b382009-08-21 21:58:55 +0000424 if (!MI->getOperand(OpNum).isImm())
425 return true;
Jim Grosbach2317e402010-09-30 01:57:53 +0000426 O << MI->getOperand(OpNum).getImm();
Bob Wilson8f343462009-04-06 21:46:51 +0000427 return false;
Evan Chenge21e3962007-04-04 00:13:29 +0000428 case 'P': // Print a VFP double precision register.
Evan Chengd831cda2009-12-08 23:06:22 +0000429 case 'q': // Print a NEON quad precision register.
Chris Lattner35c33bd2010-04-04 04:47:45 +0000430 printOperand(MI, OpNum, O);
Evan Cheng23a95702007-03-08 22:42:46 +0000431 return false;
Evan Chenga8e29892007-01-19 07:51:42 +0000432 case 'Q':
Bob Wilsond984eb62010-05-27 20:23:42 +0000433 case 'R':
Bob Wilsond984eb62010-05-27 20:23:42 +0000434 case 'H':
Evan Cheng12616722010-05-27 23:45:31 +0000435 report_fatal_error("llvm does not support 'Q', 'R', and 'H' modifiers!");
Bob Wilsond984eb62010-05-27 20:23:42 +0000436 return true;
Evan Cheng84f60b72010-05-27 22:08:38 +0000437 }
Evan Chenga8e29892007-01-19 07:51:42 +0000438 }
Jim Grosbache9952212009-09-04 01:38:51 +0000439
Chris Lattner35c33bd2010-04-04 04:47:45 +0000440 printOperand(MI, OpNum, O);
Evan Chenga8e29892007-01-19 07:51:42 +0000441 return false;
442}
443
Bob Wilson224c2442009-05-19 05:53:42 +0000444bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
Evan Cheng055b0312009-06-29 07:51:04 +0000445 unsigned OpNum, unsigned AsmVariant,
Chris Lattnerc75c0282010-04-04 05:29:35 +0000446 const char *ExtraCode,
447 raw_ostream &O) {
Bob Wilson224c2442009-05-19 05:53:42 +0000448 if (ExtraCode && ExtraCode[0])
449 return true; // Unknown modifier.
Bob Wilson765cc0b2009-10-13 20:50:28 +0000450
451 const MachineOperand &MO = MI->getOperand(OpNum);
452 assert(MO.isReg() && "unexpected inline asm memory operand");
Jim Grosbach2317e402010-09-30 01:57:53 +0000453 O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]";
Bob Wilson224c2442009-05-19 05:53:42 +0000454 return false;
455}
456
Bob Wilson812209a2009-09-30 22:06:26 +0000457void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
Bob Wilson0fb34682009-09-30 00:23:42 +0000458 if (Subtarget->isTargetDarwin()) {
459 Reloc::Model RelocM = TM.getRelocationModel();
460 if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) {
461 // Declare all the text sections up front (before the DWARF sections
462 // emitted by AsmPrinter::doInitialization) so the assembler will keep
463 // them together at the beginning of the object file. This helps
464 // avoid out-of-range branches that are due a fundamental limitation of
465 // the way symbol offsets are encoded with the current Darwin ARM
466 // relocations.
Jim Grosbachb0739b72010-09-02 01:02:06 +0000467 const TargetLoweringObjectFileMachO &TLOFMacho =
Dan Gohman0d805c32010-04-17 16:44:48 +0000468 static_cast<const TargetLoweringObjectFileMachO &>(
469 getObjFileLowering());
Bob Wilson29e06692009-09-30 22:25:37 +0000470 OutStreamer.SwitchSection(TLOFMacho.getTextSection());
471 OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
472 OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection());
473 if (RelocM == Reloc::DynamicNoPIC) {
474 const MCSection *sect =
Chris Lattner22772212010-04-08 20:40:11 +0000475 OutContext.getMachOSection("__TEXT", "__symbol_stub4",
476 MCSectionMachO::S_SYMBOL_STUBS,
477 12, SectionKind::getText());
Bob Wilson29e06692009-09-30 22:25:37 +0000478 OutStreamer.SwitchSection(sect);
479 } else {
480 const MCSection *sect =
Chris Lattner22772212010-04-08 20:40:11 +0000481 OutContext.getMachOSection("__TEXT", "__picsymbolstub4",
482 MCSectionMachO::S_SYMBOL_STUBS,
483 16, SectionKind::getText());
Bob Wilson29e06692009-09-30 22:25:37 +0000484 OutStreamer.SwitchSection(sect);
485 }
Bob Wilson63db5942010-07-30 19:55:47 +0000486 const MCSection *StaticInitSect =
487 OutContext.getMachOSection("__TEXT", "__StaticInit",
488 MCSectionMachO::S_REGULAR |
489 MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
490 SectionKind::getText());
491 OutStreamer.SwitchSection(StaticInitSect);
Bob Wilson0fb34682009-09-30 00:23:42 +0000492 }
493 }
494
Jim Grosbache5165492009-11-09 00:11:35 +0000495 // Use unified assembler syntax.
Jason W Kimafd1cc22010-09-30 02:45:56 +0000496 OutStreamer.EmitAssemblerFlag(MCAF_SyntaxUnified);
Anton Korobeynikovd61eca52009-06-17 23:43:18 +0000497
Anton Korobeynikov88ce6672009-05-23 19:51:20 +0000498 // Emit ARM Build Attributes
499 if (Subtarget->isTargetELF()) {
Anton Korobeynikov88ce6672009-05-23 19:51:20 +0000500
Jason W Kimdef9ac42010-10-06 22:36:46 +0000501 emitAttributes();
Anton Korobeynikov88ce6672009-05-23 19:51:20 +0000502 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000503}
504
Anton Korobeynikov0f3cc652008-08-07 09:54:23 +0000505
Chris Lattner4a071d62009-10-19 17:59:19 +0000506void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
Evan Cheng5be54b02007-01-19 19:25:36 +0000507 if (Subtarget->isTargetDarwin()) {
Chris Lattnerf61159b2009-08-03 22:18:15 +0000508 // All darwin targets use mach-o.
Dan Gohman0d805c32010-04-17 16:44:48 +0000509 const TargetLoweringObjectFileMachO &TLOFMacho =
510 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000511 MachineModuleInfoMachO &MMIMacho =
512 MMI->getObjFileInfo<MachineModuleInfoMachO>();
Jim Grosbache9952212009-09-04 01:38:51 +0000513
Evan Chenga8e29892007-01-19 07:51:42 +0000514 // Output non-lazy-pointers for external and common global variables.
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000515 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList();
Bill Wendlingcebae362010-03-10 22:34:10 +0000516
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000517 if (!Stubs.empty()) {
Chris Lattnerff4bc462009-08-10 01:39:42 +0000518 // Switch with ".non_lazy_symbol_pointer" directive.
Chris Lattner6c2f9e12009-08-19 05:49:37 +0000519 OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
Chris Lattnerc076a972009-08-10 18:01:34 +0000520 EmitAlignment(2);
Chris Lattnerb0f294c2009-10-19 18:38:33 +0000521 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000522 // L_foo$stub:
523 OutStreamer.EmitLabel(Stubs[i].first);
524 // .indirect_symbol _foo
Bill Wendling52a50e52010-03-11 01:18:13 +0000525 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
526 OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol);
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000527
Bill Wendling52a50e52010-03-11 01:18:13 +0000528 if (MCSym.getInt())
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000529 // External to current translation unit.
530 OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/);
531 else
532 // Internal to current translation unit.
Bill Wendling5e1b55d2010-03-31 18:47:10 +0000533 //
Jim Grosbach1b935a32010-09-22 16:45:13 +0000534 // When we place the LSDA into the TEXT section, the type info
535 // pointers need to be indirect and pc-rel. We accomplish this by
536 // using NLPs; however, sometimes the types are local to the file.
537 // We need to fill in the value for the NLP in those cases.
Bill Wendling52a50e52010-03-11 01:18:13 +0000538 OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(),
539 OutContext),
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000540 4/*size*/, 0/*addrspace*/);
Evan Chengae94e592008-12-05 01:06:39 +0000541 }
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000542
543 Stubs.clear();
544 OutStreamer.AddBlankLine();
Evan Chenga8e29892007-01-19 07:51:42 +0000545 }
546
Chris Lattnere4d9ea82009-10-19 18:44:38 +0000547 Stubs = MMIMacho.GetHiddenGVStubList();
548 if (!Stubs.empty()) {
Chris Lattner6c2f9e12009-08-19 05:49:37 +0000549 OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
Chris Lattnerf3231de2009-08-10 18:02:16 +0000550 EmitAlignment(2);
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000551 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
552 // L_foo$stub:
553 OutStreamer.EmitLabel(Stubs[i].first);
554 // .long _foo
Bill Wendlingcebae362010-03-10 22:34:10 +0000555 OutStreamer.EmitValue(MCSymbolRefExpr::
556 Create(Stubs[i].second.getPointer(),
557 OutContext),
Bill Wendlingbecd83e2010-03-09 00:40:17 +0000558 4/*size*/, 0/*addrspace*/);
559 }
Bill Wendlingcf6f28d2010-03-09 00:43:34 +0000560
561 Stubs.clear();
562 OutStreamer.AddBlankLine();
Evan Chengae94e592008-12-05 01:06:39 +0000563 }
564
Evan Chenga8e29892007-01-19 07:51:42 +0000565 // Funny Darwin hack: This flag tells the linker that no global symbols
566 // contain code that falls through to other global symbols (e.g. the obvious
567 // implementation of multiple entry points). If this doesn't occur, the
568 // linker can safely perform dead code stripping. Since LLVM never
569 // generates code that does this, it is always safe to set.
Chris Lattnera5ad93a2010-01-23 06:39:22 +0000570 OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
Rafael Espindolab01c4bb2006-07-27 11:38:51 +0000571 }
Rafael Espindola7bc59bc2006-05-14 22:18:28 +0000572}
Anton Korobeynikov0bd89712008-08-17 13:55:10 +0000573
Chris Lattner97f06932009-10-19 20:20:46 +0000574//===----------------------------------------------------------------------===//
Jason W Kimdef9ac42010-10-06 22:36:46 +0000575// Helper routines for EmitStartOfAsmFile() and EmitEndOfAsmFile()
576// FIXME:
577// The following seem like one-off assembler flags, but they actually need
Jim Grosbachfa7fb642010-10-06 22:46:47 +0000578// to appear in the .ARM.attributes section in ELF.
Jason W Kimdef9ac42010-10-06 22:36:46 +0000579// Instead of subclassing the MCELFStreamer, we do the work here.
580
581void ARMAsmPrinter::emitAttributes() {
Jim Grosbachfa7fb642010-10-06 22:46:47 +0000582
Jason W Kim17b443d2010-10-11 23:01:44 +0000583 emitARMAttributeSection();
584
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000585 AttributeEmitter *AttrEmitter;
586 if (OutStreamer.hasRawTextSupport())
587 AttrEmitter = new AsmAttributeEmitter(OutStreamer);
588 else {
589 MCObjectStreamer &O = static_cast<MCObjectStreamer&>(OutStreamer);
590 AttrEmitter = new ObjectAttributeEmitter(O);
591 }
592
593 AttrEmitter->MaybeSwitchVendor("aeabi");
594
Jason W Kimdef9ac42010-10-06 22:36:46 +0000595 std::string CPUString = Subtarget->getCPUString();
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000596 if (OutStreamer.hasRawTextSupport()) {
597 if (CPUString != "generic")
598 OutStreamer.EmitRawText(StringRef("\t.cpu ") + CPUString);
599 } else {
600 assert(CPUString == "generic" && "Unsupported .cpu attribute for ELF/.o");
601 // FIXME: Why these defaults?
602 AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
603 AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 1);
604 AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 1);
605 }
Jason W Kimdef9ac42010-10-06 22:36:46 +0000606
607 // FIXME: Emit FPU type
608 if (Subtarget->hasVFP2())
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000609 AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 2);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000610
611 // Signal various FP modes.
612 if (!UnsafeFPMath) {
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000613 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 1);
614 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000615 }
616
617 if (NoInfsFPMath && NoNaNsFPMath)
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000618 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000619 else
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000620 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 3);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000621
622 // 8-bytes alignment stuff.
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000623 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1);
624 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000625
626 // Hard float. Use both S and D registers and conform to AAPCS-VFP.
627 if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) {
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000628 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_HardFP_use, 3);
629 AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_VFP_args, 1);
Jason W Kimdef9ac42010-10-06 22:36:46 +0000630 }
631 // FIXME: Should we signal R9 usage?
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000632
633 AttrEmitter->EmitAttribute(ARMBuildAttrs::DIV_use, 1);
634
635 AttrEmitter->Finish();
636 delete AttrEmitter;
Jason W Kimdef9ac42010-10-06 22:36:46 +0000637}
638
Jason W Kim17b443d2010-10-11 23:01:44 +0000639void ARMAsmPrinter::emitARMAttributeSection() {
640 // <format-version>
641 // [ <section-length> "vendor-name"
642 // [ <file-tag> <size> <attribute>*
643 // | <section-tag> <size> <section-number>* 0 <attribute>*
644 // | <symbol-tag> <size> <symbol-number>* 0 <attribute>*
645 // ]+
646 // ]*
647
648 if (OutStreamer.hasRawTextSupport())
649 return;
650
651 const ARMElfTargetObjectFile &TLOFELF =
652 static_cast<const ARMElfTargetObjectFile &>
653 (getObjFileLowering());
654
655 OutStreamer.SwitchSection(TLOFELF.getAttributesSection());
Jason W Kim17b443d2010-10-11 23:01:44 +0000656
Rafael Espindolacecbc3d2010-10-25 17:50:35 +0000657 // Format version
658 OutStreamer.EmitIntValue(0x41, 1);
Jason W Kim17b443d2010-10-11 23:01:44 +0000659}
660
Jason W Kimdef9ac42010-10-06 22:36:46 +0000661//===----------------------------------------------------------------------===//
Chris Lattner97f06932009-10-19 20:20:46 +0000662
Jim Grosbach988ce092010-09-18 00:05:05 +0000663static MCSymbol *getPICLabel(const char *Prefix, unsigned FunctionNumber,
664 unsigned LabelId, MCContext &Ctx) {
665
666 MCSymbol *Label = Ctx.GetOrCreateSymbol(Twine(Prefix)
667 + "PC" + Twine(FunctionNumber) + "_" + Twine(LabelId));
668 return Label;
669}
670
Jim Grosbacha2244cb2010-09-22 17:39:48 +0000671void ARMAsmPrinter::EmitJumpTable(const MachineInstr *MI) {
672 unsigned Opcode = MI->getOpcode();
673 int OpNum = 1;
674 if (Opcode == ARM::BR_JTadd)
675 OpNum = 2;
676 else if (Opcode == ARM::BR_JTm)
677 OpNum = 3;
678
679 const MachineOperand &MO1 = MI->getOperand(OpNum);
680 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
681 unsigned JTI = MO1.getIndex();
682
683 // Emit a label for the jump table.
684 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
685 OutStreamer.EmitLabel(JTISymbol);
686
687 // Emit each entry of the table.
688 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
689 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
690 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
691
692 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
693 MachineBasicBlock *MBB = JTBBs[i];
694 // Construct an MCExpr for the entry. We want a value of the form:
695 // (BasicBlockAddr - TableBeginAddr)
696 //
697 // For example, a table with entries jumping to basic blocks BB0 and BB1
698 // would look like:
699 // LJTI_0_0:
700 // .word (LBB0 - LJTI_0_0)
701 // .word (LBB1 - LJTI_0_0)
702 const MCExpr *Expr = MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext);
703
704 if (TM.getRelocationModel() == Reloc::PIC_)
705 Expr = MCBinaryExpr::CreateSub(Expr, MCSymbolRefExpr::Create(JTISymbol,
706 OutContext),
707 OutContext);
708 OutStreamer.EmitValue(Expr, 4);
709 }
710}
711
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000712void ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) {
713 unsigned Opcode = MI->getOpcode();
714 int OpNum = (Opcode == ARM::t2BR_JT) ? 2 : 1;
715 const MachineOperand &MO1 = MI->getOperand(OpNum);
716 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
717 unsigned JTI = MO1.getIndex();
718
719 // Emit a label for the jump table.
720 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
721 OutStreamer.EmitLabel(JTISymbol);
722
723 // Emit each entry of the table.
724 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
725 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
726 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000727 unsigned OffsetWidth = 4;
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000728 if (MI->getOpcode() == ARM::t2TBB)
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000729 OffsetWidth = 1;
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000730 else if (MI->getOpcode() == ARM::t2TBH)
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000731 OffsetWidth = 2;
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000732
733 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
734 MachineBasicBlock *MBB = JTBBs[i];
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000735 const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::Create(MBB->getSymbol(),
736 OutContext);
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000737 // If this isn't a TBB or TBH, the entries are direct branch instructions.
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000738 if (OffsetWidth == 4) {
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000739 MCInst BrInst;
740 BrInst.setOpcode(ARM::t2B);
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000741 BrInst.addOperand(MCOperand::CreateExpr(MBBSymbolExpr));
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000742 OutStreamer.EmitInstruction(BrInst);
743 continue;
744 }
745 // Otherwise it's an offset from the dispatch instruction. Construct an
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000746 // MCExpr for the entry. We want a value of the form:
747 // (BasicBlockAddr - TableBeginAddr) / 2
748 //
749 // For example, a TBB table with entries jumping to basic blocks BB0 and BB1
750 // would look like:
751 // LJTI_0_0:
752 // .byte (LBB0 - LJTI_0_0) / 2
753 // .byte (LBB1 - LJTI_0_0) / 2
754 const MCExpr *Expr =
755 MCBinaryExpr::CreateSub(MBBSymbolExpr,
756 MCSymbolRefExpr::Create(JTISymbol, OutContext),
757 OutContext);
758 Expr = MCBinaryExpr::CreateDiv(Expr, MCConstantExpr::Create(2, OutContext),
759 OutContext);
760 OutStreamer.EmitValue(Expr, OffsetWidth);
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000761 }
Jim Grosbach205a5fa2010-09-22 17:15:35 +0000762
763 // Make sure the instruction that follows TBB is 2-byte aligned.
764 // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
765 if (MI->getOpcode() == ARM::t2TBB)
766 EmitAlignment(1);
Jim Grosbach882ef2b2010-09-21 23:28:16 +0000767}
768
Jim Grosbach2d0f53b2010-09-28 17:05:56 +0000769void ARMAsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
770 raw_ostream &OS) {
771 unsigned NOps = MI->getNumOperands();
772 assert(NOps==4);
773 OS << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
774 // cast away const; DIetc do not take const operands for some reason.
775 DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
776 OS << V.getName();
777 OS << " <- ";
778 // Frame address. Currently handles register +- offset only.
779 assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm());
780 OS << '['; printOperand(MI, 0, OS); OS << '+'; printOperand(MI, 1, OS);
781 OS << ']';
782 OS << "+";
783 printOperand(MI, NOps-2, OS);
784}
785
Jim Grosbachb454cda2010-09-29 15:23:40 +0000786void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
Chris Lattner96bc2172009-10-20 00:52:47 +0000787 ARMMCInstLower MCInstLowering(OutContext, *Mang, *this);
Chris Lattner97f06932009-10-19 20:20:46 +0000788 switch (MI->getOpcode()) {
Chris Lattnerc6b8a992009-10-20 05:58:02 +0000789 case ARM::t2MOVi32imm:
790 assert(0 && "Should be lowered by thumb2it pass");
Chris Lattner4d152222009-10-19 22:23:04 +0000791 default: break;
Jim Grosbach2d0f53b2010-09-28 17:05:56 +0000792 case ARM::DBG_VALUE: {
793 if (isVerbose() && OutStreamer.hasRawTextSupport()) {
794 SmallString<128> TmpStr;
795 raw_svector_ostream OS(TmpStr);
796 PrintDebugValueComment(MI, OS);
797 OutStreamer.EmitRawText(StringRef(OS.str()));
798 }
799 return;
800 }
Jim Grosbachfbd18732010-09-17 23:41:53 +0000801 case ARM::tPICADD: {
802 // This is a pseudo op for a label + instruction sequence, which looks like:
803 // LPC0:
804 // add r0, pc
805 // This adds the address of LPC0 to r0.
806
807 // Emit the label.
Jim Grosbach988ce092010-09-18 00:05:05 +0000808 OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(),
809 getFunctionNumber(), MI->getOperand(2).getImm(),
810 OutContext));
Jim Grosbachfbd18732010-09-17 23:41:53 +0000811
812 // Form and emit the add.
813 MCInst AddInst;
814 AddInst.setOpcode(ARM::tADDhirr);
815 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
816 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
817 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
818 // Add predicate operands.
819 AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
820 AddInst.addOperand(MCOperand::CreateReg(0));
821 OutStreamer.EmitInstruction(AddInst);
822 return;
823 }
Jim Grosbacha3fbadf2010-09-30 19:53:58 +0000824 case ARM::PICADD: {
Chris Lattner4d152222009-10-19 22:23:04 +0000825 // This is a pseudo op for a label + instruction sequence, which looks like:
826 // LPC0:
827 // add r0, pc, r0
828 // This adds the address of LPC0 to r0.
Jim Grosbachb0739b72010-09-02 01:02:06 +0000829
Chris Lattner4d152222009-10-19 22:23:04 +0000830 // Emit the label.
Jim Grosbach988ce092010-09-18 00:05:05 +0000831 OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(),
832 getFunctionNumber(), MI->getOperand(2).getImm(),
833 OutContext));
Jim Grosbachb0739b72010-09-02 01:02:06 +0000834
Jim Grosbachf3f09522010-09-14 21:05:34 +0000835 // Form and emit the add.
Chris Lattner4d152222009-10-19 22:23:04 +0000836 MCInst AddInst;
837 AddInst.setOpcode(ARM::ADDrr);
838 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
839 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
840 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
Jim Grosbach5b46d622010-09-14 21:28:17 +0000841 // Add predicate operands.
842 AddInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
843 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
844 // Add 's' bit operand (always reg0 for this)
845 AddInst.addOperand(MCOperand::CreateReg(0));
Chris Lattner850d2e22010-02-03 01:16:28 +0000846 OutStreamer.EmitInstruction(AddInst);
Chris Lattner4d152222009-10-19 22:23:04 +0000847 return;
848 }
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000849 case ARM::PICSTR:
850 case ARM::PICSTRB:
851 case ARM::PICSTRH:
852 case ARM::PICLDR:
853 case ARM::PICLDRB:
854 case ARM::PICLDRH:
855 case ARM::PICLDRSB:
856 case ARM::PICLDRSH: {
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000857 // This is a pseudo op for a label + instruction sequence, which looks like:
858 // LPC0:
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000859 // OP r0, [pc, r0]
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000860 // The LCP0 label is referenced by a constant pool entry in order to get
861 // a PC-relative address at the ldr instruction.
862
863 // Emit the label.
Jim Grosbach988ce092010-09-18 00:05:05 +0000864 OutStreamer.EmitLabel(getPICLabel(MAI->getPrivateGlobalPrefix(),
865 getFunctionNumber(), MI->getOperand(2).getImm(),
866 OutContext));
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000867
868 // Form and emit the load
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000869 unsigned Opcode;
870 switch (MI->getOpcode()) {
871 default:
872 llvm_unreachable("Unexpected opcode!");
873 case ARM::PICSTR: Opcode = ARM::STR; break;
874 case ARM::PICSTRB: Opcode = ARM::STRB; break;
875 case ARM::PICSTRH: Opcode = ARM::STRH; break;
Jim Grosbach3e556122010-10-26 22:37:02 +0000876 case ARM::PICLDR: Opcode = ARM::LDRrs; break;
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000877 case ARM::PICLDRB: Opcode = ARM::LDRB; break;
878 case ARM::PICLDRH: Opcode = ARM::LDRH; break;
879 case ARM::PICLDRSB: Opcode = ARM::LDRSB; break;
880 case ARM::PICLDRSH: Opcode = ARM::LDRSH; break;
881 }
882 MCInst LdStInst;
883 LdStInst.setOpcode(Opcode);
884 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
885 LdStInst.addOperand(MCOperand::CreateReg(ARM::PC));
886 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
887 LdStInst.addOperand(MCOperand::CreateImm(0));
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000888 // Add predicate operands.
Jim Grosbacha28abbe2010-09-17 16:25:52 +0000889 LdStInst.addOperand(MCOperand::CreateImm(MI->getOperand(3).getImm()));
890 LdStInst.addOperand(MCOperand::CreateReg(MI->getOperand(4).getReg()));
891 OutStreamer.EmitInstruction(LdStInst);
Jim Grosbachb74ca9d2010-09-16 17:43:25 +0000892
893 return;
894 }
Jim Grosbacha3fbadf2010-09-30 19:53:58 +0000895 case ARM::CONSTPOOL_ENTRY: {
Chris Lattnera70e6442009-10-19 22:33:05 +0000896 /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
897 /// in the function. The first operand is the ID# for this instruction, the
898 /// second is the index into the MachineConstantPool that this is, the third
899 /// is the size in bytes of this constant pool entry.
900 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
901 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
902
903 EmitAlignment(2);
Chris Lattner1b46f432010-01-23 07:00:21 +0000904 OutStreamer.EmitLabel(GetCPISymbol(LabelId));
Chris Lattnera70e6442009-10-19 22:33:05 +0000905
906 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
907 if (MCPE.isMachineConstantPoolEntry())
908 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
909 else
910 EmitGlobalConstant(MCPE.Val.ConstVal);
Jim Grosbachb0739b72010-09-02 01:02:06 +0000911
Chris Lattnera70e6442009-10-19 22:33:05 +0000912 return;
913 }
Jim Grosbacha3fbadf2010-09-30 19:53:58 +0000914 case ARM::MOVi2pieces: {
915 // FIXME: We'd like to remove the asm string in the .td file, but the
Chris Lattner017d9472009-10-20 00:40:56 +0000916 // This is a hack that lowers as a two instruction sequence.
917 unsigned DstReg = MI->getOperand(0).getReg();
918 unsigned ImmVal = (unsigned)MI->getOperand(1).getImm();
919
920 unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal);
921 unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal);
Jim Grosbachb0739b72010-09-02 01:02:06 +0000922
Chris Lattner017d9472009-10-20 00:40:56 +0000923 {
924 MCInst TmpInst;
925 TmpInst.setOpcode(ARM::MOVi);
926 TmpInst.addOperand(MCOperand::CreateReg(DstReg));
927 TmpInst.addOperand(MCOperand::CreateImm(SOImmValV1));
Jim Grosbachb0739b72010-09-02 01:02:06 +0000928
Chris Lattner017d9472009-10-20 00:40:56 +0000929 // Predicate.
930 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
931 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Chris Lattner233917c2009-10-20 00:46:11 +0000932
933 TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out
Chris Lattner850d2e22010-02-03 01:16:28 +0000934 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner017d9472009-10-20 00:40:56 +0000935 }
936
937 {
938 MCInst TmpInst;
939 TmpInst.setOpcode(ARM::ORRri);
940 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
941 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // inreg
942 TmpInst.addOperand(MCOperand::CreateImm(SOImmValV2)); // so_imm
943 // Predicate.
944 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
945 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Jim Grosbachb0739b72010-09-02 01:02:06 +0000946
Chris Lattner017d9472009-10-20 00:40:56 +0000947 TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out
Chris Lattner850d2e22010-02-03 01:16:28 +0000948 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner017d9472009-10-20 00:40:56 +0000949 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000950 return;
Chris Lattner017d9472009-10-20 00:40:56 +0000951 }
Jim Grosbacha3fbadf2010-09-30 19:53:58 +0000952 case ARM::MOVi32imm: {
953 // FIXME: We'd like to remove the asm string in the .td file, but the
Chris Lattner161dcbf2009-10-20 01:11:37 +0000954 // This is a hack that lowers as a two instruction sequence.
955 unsigned DstReg = MI->getOperand(0).getReg();
Rafael Espindola18c10212010-05-12 05:16:34 +0000956 const MachineOperand &MO = MI->getOperand(1);
957 MCOperand V1, V2;
958 if (MO.isImm()) {
959 unsigned ImmVal = (unsigned)MI->getOperand(1).getImm();
960 V1 = MCOperand::CreateImm(ImmVal & 65535);
961 V2 = MCOperand::CreateImm(ImmVal >> 16);
962 } else if (MO.isGlobal()) {
Jim Grosbachc686e332010-09-17 18:25:25 +0000963 MCSymbol *Symbol = MCInstLowering.GetGlobalAddressSymbol(MO.getGlobal());
Rafael Espindola18c10212010-05-12 05:16:34 +0000964 const MCSymbolRefExpr *SymRef1 =
Duncan Sands34727662010-07-12 08:16:59 +0000965 MCSymbolRefExpr::Create(Symbol,
966 MCSymbolRefExpr::VK_ARM_LO16, OutContext);
Rafael Espindola18c10212010-05-12 05:16:34 +0000967 const MCSymbolRefExpr *SymRef2 =
Duncan Sands34727662010-07-12 08:16:59 +0000968 MCSymbolRefExpr::Create(Symbol,
969 MCSymbolRefExpr::VK_ARM_HI16, OutContext);
Rafael Espindola18c10212010-05-12 05:16:34 +0000970 V1 = MCOperand::CreateExpr(SymRef1);
971 V2 = MCOperand::CreateExpr(SymRef2);
972 } else {
Jim Grosbachf0633e42010-09-22 20:55:15 +0000973 // FIXME: External symbol?
Rafael Espindola18c10212010-05-12 05:16:34 +0000974 MI->dump();
975 llvm_unreachable("cannot handle this operand");
976 }
977
Chris Lattner161dcbf2009-10-20 01:11:37 +0000978 {
979 MCInst TmpInst;
980 TmpInst.setOpcode(ARM::MOVi16);
981 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
Rafael Espindola18c10212010-05-12 05:16:34 +0000982 TmpInst.addOperand(V1); // lower16(imm)
Jim Grosbachb0739b72010-09-02 01:02:06 +0000983
Chris Lattner161dcbf2009-10-20 01:11:37 +0000984 // Predicate.
985 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
986 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Jim Grosbachb0739b72010-09-02 01:02:06 +0000987
Chris Lattner850d2e22010-02-03 01:16:28 +0000988 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner161dcbf2009-10-20 01:11:37 +0000989 }
Jim Grosbachb0739b72010-09-02 01:02:06 +0000990
Chris Lattner161dcbf2009-10-20 01:11:37 +0000991 {
992 MCInst TmpInst;
993 TmpInst.setOpcode(ARM::MOVTi16);
994 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
995 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // srcreg
Rafael Espindola18c10212010-05-12 05:16:34 +0000996 TmpInst.addOperand(V2); // upper16(imm)
Jim Grosbachb0739b72010-09-02 01:02:06 +0000997
Chris Lattner161dcbf2009-10-20 01:11:37 +0000998 // Predicate.
999 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1000 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
Jim Grosbachb0739b72010-09-02 01:02:06 +00001001
Chris Lattner850d2e22010-02-03 01:16:28 +00001002 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner161dcbf2009-10-20 01:11:37 +00001003 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001004
Chris Lattner161dcbf2009-10-20 01:11:37 +00001005 return;
1006 }
Jim Grosbach882ef2b2010-09-21 23:28:16 +00001007 case ARM::t2TBB:
1008 case ARM::t2TBH:
1009 case ARM::t2BR_JT: {
1010 // Lower and emit the instruction itself, then the jump table following it.
1011 MCInst TmpInst;
1012 MCInstLowering.Lower(MI, TmpInst);
1013 OutStreamer.EmitInstruction(TmpInst);
Jim Grosbach882ef2b2010-09-21 23:28:16 +00001014 EmitJump2Table(MI);
1015 return;
1016 }
1017 case ARM::tBR_JTr:
1018 case ARM::BR_JTr:
1019 case ARM::BR_JTm:
Jim Grosbacha2244cb2010-09-22 17:39:48 +00001020 case ARM::BR_JTadd: {
1021 // Lower and emit the instruction itself, then the jump table following it.
1022 MCInst TmpInst;
1023 MCInstLowering.Lower(MI, TmpInst);
1024 OutStreamer.EmitInstruction(TmpInst);
1025 EmitJumpTable(MI);
1026 return;
1027 }
Jim Grosbach2e6ae132010-09-23 18:05:37 +00001028 case ARM::TRAP: {
1029 // Non-Darwin binutils don't yet support the "trap" mnemonic.
1030 // FIXME: Remove this special case when they do.
1031 if (!Subtarget->isTargetDarwin()) {
Jim Grosbach78890f42010-10-01 23:21:38 +00001032 //.long 0xe7ffdefe @ trap
Jim Grosbachb2dda4b2010-09-23 19:42:17 +00001033 uint32_t Val = 0xe7ffdefeUL;
Jim Grosbach2e6ae132010-09-23 18:05:37 +00001034 OutStreamer.AddComment("trap");
1035 OutStreamer.EmitIntValue(Val, 4);
1036 return;
1037 }
1038 break;
1039 }
1040 case ARM::tTRAP: {
1041 // Non-Darwin binutils don't yet support the "trap" mnemonic.
1042 // FIXME: Remove this special case when they do.
1043 if (!Subtarget->isTargetDarwin()) {
Jim Grosbach78890f42010-10-01 23:21:38 +00001044 //.short 57086 @ trap
Benjamin Kramerc8ab9eb2010-09-23 18:57:26 +00001045 uint16_t Val = 0xdefe;
Jim Grosbach2e6ae132010-09-23 18:05:37 +00001046 OutStreamer.AddComment("trap");
1047 OutStreamer.EmitIntValue(Val, 2);
1048 return;
1049 }
1050 break;
1051 }
Jim Grosbach433a5782010-09-24 20:47:58 +00001052 case ARM::t2Int_eh_sjlj_setjmp:
1053 case ARM::t2Int_eh_sjlj_setjmp_nofp:
Jim Grosbacha3fbadf2010-09-30 19:53:58 +00001054 case ARM::tInt_eh_sjlj_setjmp: {
Jim Grosbach433a5782010-09-24 20:47:58 +00001055 // Two incoming args: GPR:$src, GPR:$val
1056 // mov $val, pc
1057 // adds $val, #7
1058 // str $val, [$src, #4]
1059 // movs r0, #0
1060 // b 1f
1061 // movs r0, #1
1062 // 1:
1063 unsigned SrcReg = MI->getOperand(0).getReg();
1064 unsigned ValReg = MI->getOperand(1).getReg();
1065 MCSymbol *Label = GetARMSJLJEHLabel();
1066 {
1067 MCInst TmpInst;
1068 TmpInst.setOpcode(ARM::tMOVgpr2tgpr);
1069 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1070 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1071 // 's' bit operand
1072 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1073 OutStreamer.AddComment("eh_setjmp begin");
1074 OutStreamer.EmitInstruction(TmpInst);
1075 }
1076 {
1077 MCInst TmpInst;
1078 TmpInst.setOpcode(ARM::tADDi3);
1079 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1080 // 's' bit operand
1081 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1082 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1083 TmpInst.addOperand(MCOperand::CreateImm(7));
1084 // Predicate.
1085 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1086 TmpInst.addOperand(MCOperand::CreateReg(0));
1087 OutStreamer.EmitInstruction(TmpInst);
1088 }
1089 {
1090 MCInst TmpInst;
1091 TmpInst.setOpcode(ARM::tSTR);
1092 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1093 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1094 // The offset immediate is #4. The operand value is scaled by 4 for the
1095 // tSTR instruction.
1096 TmpInst.addOperand(MCOperand::CreateImm(1));
1097 TmpInst.addOperand(MCOperand::CreateReg(0));
1098 // Predicate.
1099 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1100 TmpInst.addOperand(MCOperand::CreateReg(0));
1101 OutStreamer.EmitInstruction(TmpInst);
1102 }
1103 {
1104 MCInst TmpInst;
1105 TmpInst.setOpcode(ARM::tMOVi8);
1106 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1107 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1108 TmpInst.addOperand(MCOperand::CreateImm(0));
1109 // Predicate.
1110 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1111 TmpInst.addOperand(MCOperand::CreateReg(0));
1112 OutStreamer.EmitInstruction(TmpInst);
1113 }
1114 {
1115 const MCExpr *SymbolExpr = MCSymbolRefExpr::Create(Label, OutContext);
1116 MCInst TmpInst;
1117 TmpInst.setOpcode(ARM::tB);
1118 TmpInst.addOperand(MCOperand::CreateExpr(SymbolExpr));
1119 OutStreamer.EmitInstruction(TmpInst);
1120 }
1121 {
1122 MCInst TmpInst;
1123 TmpInst.setOpcode(ARM::tMOVi8);
1124 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1125 TmpInst.addOperand(MCOperand::CreateReg(ARM::CPSR));
1126 TmpInst.addOperand(MCOperand::CreateImm(1));
1127 // Predicate.
1128 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1129 TmpInst.addOperand(MCOperand::CreateReg(0));
1130 OutStreamer.AddComment("eh_setjmp end");
1131 OutStreamer.EmitInstruction(TmpInst);
1132 }
1133 OutStreamer.EmitLabel(Label);
1134 return;
1135 }
1136
Jim Grosbach45390082010-09-23 23:33:56 +00001137 case ARM::Int_eh_sjlj_setjmp_nofp:
Jim Grosbacha3fbadf2010-09-30 19:53:58 +00001138 case ARM::Int_eh_sjlj_setjmp: {
Jim Grosbach45390082010-09-23 23:33:56 +00001139 // Two incoming args: GPR:$src, GPR:$val
1140 // add $val, pc, #8
1141 // str $val, [$src, #+4]
1142 // mov r0, #0
1143 // add pc, pc, #0
1144 // mov r0, #1
1145 unsigned SrcReg = MI->getOperand(0).getReg();
1146 unsigned ValReg = MI->getOperand(1).getReg();
1147
1148 {
1149 MCInst TmpInst;
1150 TmpInst.setOpcode(ARM::ADDri);
1151 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1152 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1153 TmpInst.addOperand(MCOperand::CreateImm(8));
1154 // Predicate.
1155 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1156 TmpInst.addOperand(MCOperand::CreateReg(0));
1157 // 's' bit operand (always reg0 for this).
1158 TmpInst.addOperand(MCOperand::CreateReg(0));
1159 OutStreamer.AddComment("eh_setjmp begin");
1160 OutStreamer.EmitInstruction(TmpInst);
1161 }
1162 {
1163 MCInst TmpInst;
1164 TmpInst.setOpcode(ARM::STR);
1165 TmpInst.addOperand(MCOperand::CreateReg(ValReg));
1166 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1167 TmpInst.addOperand(MCOperand::CreateReg(0));
1168 TmpInst.addOperand(MCOperand::CreateImm(4));
1169 // Predicate.
1170 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1171 TmpInst.addOperand(MCOperand::CreateReg(0));
1172 OutStreamer.EmitInstruction(TmpInst);
1173 }
1174 {
1175 MCInst TmpInst;
1176 TmpInst.setOpcode(ARM::MOVi);
1177 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1178 TmpInst.addOperand(MCOperand::CreateImm(0));
1179 // Predicate.
1180 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1181 TmpInst.addOperand(MCOperand::CreateReg(0));
1182 // 's' bit operand (always reg0 for this).
1183 TmpInst.addOperand(MCOperand::CreateReg(0));
1184 OutStreamer.EmitInstruction(TmpInst);
1185 }
1186 {
1187 MCInst TmpInst;
1188 TmpInst.setOpcode(ARM::ADDri);
1189 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1190 TmpInst.addOperand(MCOperand::CreateReg(ARM::PC));
1191 TmpInst.addOperand(MCOperand::CreateImm(0));
1192 // Predicate.
1193 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1194 TmpInst.addOperand(MCOperand::CreateReg(0));
1195 // 's' bit operand (always reg0 for this).
1196 TmpInst.addOperand(MCOperand::CreateReg(0));
1197 OutStreamer.EmitInstruction(TmpInst);
1198 }
1199 {
1200 MCInst TmpInst;
1201 TmpInst.setOpcode(ARM::MOVi);
1202 TmpInst.addOperand(MCOperand::CreateReg(ARM::R0));
1203 TmpInst.addOperand(MCOperand::CreateImm(1));
1204 // Predicate.
1205 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1206 TmpInst.addOperand(MCOperand::CreateReg(0));
1207 // 's' bit operand (always reg0 for this).
1208 TmpInst.addOperand(MCOperand::CreateReg(0));
1209 OutStreamer.AddComment("eh_setjmp end");
1210 OutStreamer.EmitInstruction(TmpInst);
1211 }
1212 return;
1213 }
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001214 case ARM::Int_eh_sjlj_longjmp: {
1215 // ldr sp, [$src, #8]
1216 // ldr $scratch, [$src, #4]
1217 // ldr r7, [$src]
1218 // bx $scratch
1219 unsigned SrcReg = MI->getOperand(0).getReg();
1220 unsigned ScratchReg = MI->getOperand(1).getReg();
1221 {
1222 MCInst TmpInst;
Jim Grosbach3e556122010-10-26 22:37:02 +00001223 TmpInst.setOpcode(ARM::LDRi12);
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001224 TmpInst.addOperand(MCOperand::CreateReg(ARM::SP));
1225 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001226 TmpInst.addOperand(MCOperand::CreateImm(8));
1227 // Predicate.
1228 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1229 TmpInst.addOperand(MCOperand::CreateReg(0));
1230 OutStreamer.EmitInstruction(TmpInst);
1231 }
1232 {
1233 MCInst TmpInst;
Jim Grosbach3e556122010-10-26 22:37:02 +00001234 TmpInst.setOpcode(ARM::LDRi12);
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001235 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1236 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001237 TmpInst.addOperand(MCOperand::CreateImm(4));
1238 // Predicate.
1239 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1240 TmpInst.addOperand(MCOperand::CreateReg(0));
1241 OutStreamer.EmitInstruction(TmpInst);
1242 }
1243 {
1244 MCInst TmpInst;
Jim Grosbach3e556122010-10-26 22:37:02 +00001245 TmpInst.setOpcode(ARM::LDRi12);
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001246 TmpInst.addOperand(MCOperand::CreateReg(ARM::R7));
1247 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
Jim Grosbach5acb3de2010-09-27 21:47:04 +00001248 TmpInst.addOperand(MCOperand::CreateImm(0));
1249 // Predicate.
1250 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1251 TmpInst.addOperand(MCOperand::CreateReg(0));
1252 OutStreamer.EmitInstruction(TmpInst);
1253 }
1254 {
1255 MCInst TmpInst;
1256 TmpInst.setOpcode(ARM::BRIND);
1257 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1258 // Predicate.
1259 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1260 TmpInst.addOperand(MCOperand::CreateReg(0));
1261 OutStreamer.EmitInstruction(TmpInst);
1262 }
1263 return;
1264 }
Jim Grosbach385cc5e2010-09-27 22:28:11 +00001265 case ARM::tInt_eh_sjlj_longjmp: {
1266 // ldr $scratch, [$src, #8]
1267 // mov sp, $scratch
1268 // ldr $scratch, [$src, #4]
1269 // ldr r7, [$src]
1270 // bx $scratch
1271 unsigned SrcReg = MI->getOperand(0).getReg();
1272 unsigned ScratchReg = MI->getOperand(1).getReg();
1273 {
1274 MCInst TmpInst;
1275 TmpInst.setOpcode(ARM::tLDR);
1276 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1277 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1278 // The offset immediate is #8. The operand value is scaled by 4 for the
1279 // tSTR instruction.
1280 TmpInst.addOperand(MCOperand::CreateImm(2));
1281 TmpInst.addOperand(MCOperand::CreateReg(0));
1282 // Predicate.
1283 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1284 TmpInst.addOperand(MCOperand::CreateReg(0));
1285 OutStreamer.EmitInstruction(TmpInst);
1286 }
1287 {
1288 MCInst TmpInst;
1289 TmpInst.setOpcode(ARM::tMOVtgpr2gpr);
1290 TmpInst.addOperand(MCOperand::CreateReg(ARM::SP));
1291 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1292 // Predicate.
1293 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1294 TmpInst.addOperand(MCOperand::CreateReg(0));
1295 OutStreamer.EmitInstruction(TmpInst);
1296 }
1297 {
1298 MCInst TmpInst;
1299 TmpInst.setOpcode(ARM::tLDR);
1300 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1301 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1302 TmpInst.addOperand(MCOperand::CreateImm(1));
1303 TmpInst.addOperand(MCOperand::CreateReg(0));
1304 // Predicate.
1305 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1306 TmpInst.addOperand(MCOperand::CreateReg(0));
1307 OutStreamer.EmitInstruction(TmpInst);
1308 }
1309 {
1310 MCInst TmpInst;
1311 TmpInst.setOpcode(ARM::tLDR);
1312 TmpInst.addOperand(MCOperand::CreateReg(ARM::R7));
1313 TmpInst.addOperand(MCOperand::CreateReg(SrcReg));
1314 TmpInst.addOperand(MCOperand::CreateImm(0));
1315 TmpInst.addOperand(MCOperand::CreateReg(0));
1316 // Predicate.
1317 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1318 TmpInst.addOperand(MCOperand::CreateReg(0));
1319 OutStreamer.EmitInstruction(TmpInst);
1320 }
1321 {
1322 MCInst TmpInst;
1323 TmpInst.setOpcode(ARM::tBX_RET_vararg);
1324 TmpInst.addOperand(MCOperand::CreateReg(ScratchReg));
1325 // Predicate.
1326 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
1327 TmpInst.addOperand(MCOperand::CreateReg(0));
1328 OutStreamer.EmitInstruction(TmpInst);
1329 }
1330 return;
1331 }
Chris Lattner97f06932009-10-19 20:20:46 +00001332 }
Jim Grosbachb0739b72010-09-02 01:02:06 +00001333
Chris Lattner97f06932009-10-19 20:20:46 +00001334 MCInst TmpInst;
1335 MCInstLowering.Lower(MI, TmpInst);
Chris Lattner850d2e22010-02-03 01:16:28 +00001336 OutStreamer.EmitInstruction(TmpInst);
Chris Lattner97f06932009-10-19 20:20:46 +00001337}
Daniel Dunbar2685a292009-10-20 05:15:36 +00001338
1339//===----------------------------------------------------------------------===//
1340// Target Registry Stuff
1341//===----------------------------------------------------------------------===//
1342
1343static MCInstPrinter *createARMMCInstPrinter(const Target &T,
1344 unsigned SyntaxVariant,
Chris Lattnerd3740872010-04-04 05:04:31 +00001345 const MCAsmInfo &MAI) {
Daniel Dunbar2685a292009-10-20 05:15:36 +00001346 if (SyntaxVariant == 0)
Jim Grosbach74d7e6c2010-09-17 21:33:25 +00001347 return new ARMInstPrinter(MAI);
Daniel Dunbar2685a292009-10-20 05:15:36 +00001348 return 0;
1349}
1350
1351// Force static initialization.
1352extern "C" void LLVMInitializeARMAsmPrinter() {
1353 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1354 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);
1355
1356 TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter);
1357 TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter);
1358}
1359