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5 <title>Writing an LLVM backend</title>
6 <link rel="stylesheet" href="llvm.css" type="text/css">
7</head>
8
9<body>
10
11<div class="doc_title">
12 Writing an LLVM backend
13</div>
14
15<ol>
16 <li><a href="#intro">Introduction</a>
17 <li><a href="#backends">Writing a backend</a>
18 <ol>
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]19 <li><a href="#machine">Machine backends</a>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]20 <ol>
21 <li><a href="#machineTOC">Outline</a></li>
22 <li><a href="#machineDetails">Implementation details</a></li>
23 </ol></li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]24 <li><a href="#lang">Language backends</a></li>
25 </ol></li>
26 <li><a href="#related">Related reading material</a>
27</ol>
28
29<div class="doc_author">
30 <p>Written by <a href="http://misha.brukman.net">Misha Brukman</a></p>
31</div>
32
33<!-- *********************************************************************** -->
34<div class="doc_section">
35 <a name="intro">Introduction</a>
36</div>
37<!-- *********************************************************************** -->
38
39<div class="doc_text">
40
41<p>This document describes techniques for writing backends for LLVM which
42convert the LLVM representation to machine assembly code or other languages.</p>
43
44</div>
45
46<!-- *********************************************************************** -->
47<div class="doc_section">
48 <a name="backends">Writing a backend</a>
49</div>
50<!-- *********************************************************************** -->
51
52<!-- ======================================================================= -->
53<div class="doc_subsection">
54 <a name="machine">Machine backends</a>
55</div>
56
57<!-- _______________________________________________________________________ -->
58<div class="doc_subsubsection">
59 <a name="machineTOC">Outline</a>
60</div>
61
62<div class="doc_text">
63
64<p>In general, you want to follow the format of X86 or PowerPC (in
65<tt>lib/Target</tt>).</p>
66
67<p>To create a static compiler (one that emits text assembly), you need to
68implement the following:</p>
69
70<ul>
71<li>Describe the register set
72 <ul>
73 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
74 the register set and register classes</li>
75 <li>Implement a subclass of <tt><a
76 href="CodeGenerator.html#mregisterinfo">MRegisterInfo</a></tt></li>
77 </ul></li>
78<li>Describe the instruction set
79 <ul>
80 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
81 the instruction set</li>
82 <li>Implement a subclass of <tt><a
83 href="CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></tt></li>
84 </ul></li>
85<li>Describe the target machine
86 <ul>
87 <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of
88 the target that describes the pointer size and references the instruction
89 set</li>
90 <li>Implement a subclass of <tt><a
91 href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, which
92 configures <tt><a href="CodeGenerator.html#targetdata">TargetData</a></tt>
93 correctly</li>
Misha Brukman93d416f2004-12-27 19:05:16 +0000[diff] [blame]94 <li>Register your new target using the <tt>RegisterTarget</tt>
95 template:<br><br>
96<div class="doc_code"><pre>
97RegisterTarget&lt;<em>MyTargetMachine</em>&gt; M("short_name", " Target name");
98</pre></div>
99 <br>Here, <em>MyTargetMachine</em> is the name of your implemented
100 subclass of <tt><a
101 href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>,
102 <em>short_name</em> is the option that will be active following
103 <tt>-march=</tt> to select a target in llc and lli, and the last string
104 is the description of your target to appear in <tt>-help</tt>
105 listing.</li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]106 </ul></li>
107<li>Implement the assembly printer for the architecture. Usually, if you have
108described the instruction set with the assembly printer generator in mind, that
109step can be almost automated.</li>
110</ul>
111
Misha Brukman4937c9d2005-05-17 02:27:30 +0000[diff] [blame^]112<p>You also need to write an instruction selector for your platform. The
113recommended method is the pattern-matching instruction selector. You can see
114examples in other targets: <tt>lib/Target/*/*ISelPattern.cpp</tt>. The former
115method for writing instruction selectors (<b>not</b> recommended) is
116encapsulated in <tt>lib/Target/*/*ISelSimple.cpp</tt>, which are
117<tt>InstVisitor</tt>-based translators, generating code for an LLVM instruction
118at a time. Creating an instruction selector is perhaps the most time-consuming
119part of creating a back-end.</p>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]120
121<p>To create a JIT for your platform:</p>
122
123<ul>
124<li>Create a subclass of <tt><a
125 href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li>
126<li>Create a machine code emitter that will be used to emit binary code
127 directly into memory, given <tt>MachineInstr</tt>s</li>
128</ul>
129
130<p>Note that <tt>lib/target/Skeleton</tt> is a clean skeleton for a new target,
131so you might want to start with that and adapt it for your target, and if you
132are wondering how things are done, peek in the X86 or PowerPC target.</p>
133
134<p>The Skeleton target is non-functional but provides the basic building blocks
135you will need for your endeavor.</p>
136
137</div>
138
139<!-- _______________________________________________________________________ -->
140<div class="doc_subsubsection">
141 <a name="machineDetails">Implementation details</a>
142</div>
143
144<div class="doc_text">
145
146<ul>
147
148<li><p><b>TableGen register info description</b> - describe a class which
149will store the register's number in the binary encoding of the instruction
150(e.g., for JIT purposes).</p>
151
152<p>You also need to define register classes to contain these registers, such as
153the integer register class and floating-point register class, so that you can
154allocate virtual registers to instructions from these sets, and let the
155target-independent register allocator automatically choose the actual
156architected registers.</p>
157
158<div class="doc_code">
159<pre>
160// class Register is defined in Target.td
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]161<b>class</b> <em>Target</em>Reg&lt;string name&gt; : Register&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]162 <b>let</b> Namespace = "<em>Target</em>";
163}
164
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]165<b>class</b> IntReg&lt;<b>bits</b>&lt;5&gt; num, string name&gt; : <em>Target</em>Reg&lt;name&gt; {
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]166 <b>field</b> <b>bits</b>&lt;5&gt; Num = num;
167}
168
Chris Lattner7a2fd892004-09-18 06:28:07 +0000[diff] [blame]169<b>def</b> R0 : IntReg&lt;0, "%R0"&gt;;
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]170...
171
172// class RegisterClass is defined in Target.td
173<b>def</b> IReg : RegisterClass&lt;i64, 64, [R0, ... ]&gt;;
174</pre>
175</div>
176</li>
177
178<li><p><b>TableGen instruction info description</b> - break up instructions into
179classes, usually that's already done by the manufacturer (see instruction
180manual). Define a class for each instruction category. Define each opcode as a
181subclass of the category, with appropriate parameters such as the fixed binary
182encoding of opcodes and extended opcodes, and map the register bits to the bits
183of the instruction which they are encoded in (for the JIT). Also specify how
184the instruction should be printed so it can use the automatic assembly printer,
185e.g.:</p>
186
187<div class="doc_code">
188<pre>
189// class Instruction is defined in Target.td
190<b>class</b> Form&lt;<b>bits</b>&lt;6&gt; opcode, <b>dag</b> OL, <b>string</b> asmstr&gt; : Instruction {
191 <b>field</b> <b>bits</b>&lt;42&gt; Inst;
192
193 <b>let</b> Namespace = "<em>Target</em>";
194 <b>let</b> Inst{0-6} = opcode;
195 <b>let</b> OperandList = OL;
196 <b>let</b> AsmString = asmstr;
197}
198
199<b>def</b> ADD : Form&lt;42, (ops IReg:$rD, IReg:$rA, IReg:$rB), "add $rD, $rA, $rB"&gt;;
200</pre>
201</div>
202</li>
203
204</ul>
205
206</div>
207
208<!-- ======================================================================= -->
209<div class="doc_subsection">
210 <a name="lang">Language backends</a>
211</div>
212
213<div class="doc_text">
214
215<p>For now, just take a look at <tt>lib/Target/CBackend</tt> for an example of
216how the C backend is written.</p>
217
218</div>
219
220<!-- *********************************************************************** -->
221<div class="doc_section">
222 <a name="related">Related reading material</a>
223</div>
224<!-- *********************************************************************** -->
225
226<div class="doc_text">
227
228<ul>
229<li><a href="CodeGenerator.html">Code generator</a> -
230 describes some of the classes in code generation at a high level, but
Misha Brukmana3bfc6f2005-05-17 02:12:32 +0000[diff] [blame]231 it is not (yet) complete</li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]232<li><a href="TableGenFundamentals.html">TableGen fundamentals</a> -
Misha Brukmana3bfc6f2005-05-17 02:12:32 +0000[diff] [blame]233 describes how to use TableGen to describe your target information
234 succinctly</li>
235<li><a href="HowToSubmitABug.html#codegen">Debugging code generation with
236 bugpoint</a> - shows bugpoint usage scenarios to simplify backend
237 development</li>
Misha Brukman8eb67192004-09-06 22:58:13 +0000[diff] [blame]238</ul>
239
240</div>
241
242<!-- *********************************************************************** -->
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