| Misha Brukman | 8eb6719 | 2004-09-06 22:58:13 +0000 | [diff] [blame] | 1 | <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" | 
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 | 3 | <html> | 
 | 4 | <head> | 
 | 5 |   <title>Writing an LLVM backend</title> | 
 | 6 |   <link rel="stylesheet" href="llvm.css" type="text/css"> | 
 | 7 | </head> | 
 | 8 |  | 
 | 9 | <body> | 
 | 10 |  | 
 | 11 | <div class="doc_title"> | 
 | 12 |   Writing an LLVM backend | 
 | 13 | </div> | 
 | 14 |  | 
 | 15 | <ol> | 
 | 16 |   <li><a href="#intro">Introduction</a> | 
 | 17 |   <li><a href="#backends">Writing a backend</a> | 
 | 18 |   <ol> | 
| Chris Lattner | 7a2fd89 | 2004-09-18 06:28:07 +0000 | [diff] [blame] | 19 |     <li><a href="#machine">Machine backends</a> | 
| Misha Brukman | 8eb6719 | 2004-09-06 22:58:13 +0000 | [diff] [blame] | 20 |     <ol> | 
 | 21 |       <li><a href="#machineTOC">Outline</a></li> | 
 | 22 |       <li><a href="#machineDetails">Implementation details</a></li> | 
 | 23 |     </ol></li>   | 
| Misha Brukman | 8eb6719 | 2004-09-06 22:58:13 +0000 | [diff] [blame] | 24 |     <li><a href="#lang">Language backends</a></li> | 
 | 25 |   </ol></li> | 
 | 26 |   <li><a href="#related">Related reading material</a> | 
 | 27 | </ol> | 
 | 28 |  | 
 | 29 | <div class="doc_author">     | 
 | 30 |   <p>Written by <a href="http://misha.brukman.net">Misha Brukman</a></p> | 
 | 31 | </div> | 
 | 32 |  | 
 | 33 | <!-- *********************************************************************** --> | 
 | 34 | <div class="doc_section"> | 
 | 35 |   <a name="intro">Introduction</a> | 
 | 36 | </div> | 
 | 37 | <!-- *********************************************************************** --> | 
 | 38 |  | 
 | 39 | <div class="doc_text"> | 
 | 40 |  | 
 | 41 | <p>This document describes techniques for writing backends for LLVM which | 
 | 42 | convert the LLVM representation to machine assembly code or other languages.</p> | 
 | 43 |  | 
 | 44 | </div> | 
 | 45 |  | 
 | 46 | <!-- *********************************************************************** --> | 
 | 47 | <div class="doc_section"> | 
 | 48 |   <a name="backends">Writing a backend</a> | 
 | 49 | </div> | 
 | 50 | <!-- *********************************************************************** --> | 
 | 51 |  | 
 | 52 | <!-- ======================================================================= --> | 
 | 53 | <div class="doc_subsection"> | 
 | 54 |   <a name="machine">Machine backends</a> | 
 | 55 | </div> | 
 | 56 |      | 
 | 57 | <!-- _______________________________________________________________________ --> | 
 | 58 | <div class="doc_subsubsection"> | 
 | 59 |   <a name="machineTOC">Outline</a> | 
 | 60 | </div> | 
 | 61 |  | 
 | 62 | <div class="doc_text"> | 
 | 63 |  | 
 | 64 | <p>In general, you want to follow the format of X86 or PowerPC (in | 
 | 65 | <tt>lib/Target</tt>).</p> | 
 | 66 |  | 
 | 67 | <p>To create a static compiler (one that emits text assembly), you need to | 
 | 68 | implement the following:</p> | 
 | 69 |  | 
 | 70 | <ul> | 
 | 71 | <li>Describe the register set | 
 | 72 |   <ul> | 
 | 73 |   <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of | 
 | 74 |       the register set and register classes</li> | 
 | 75 |   <li>Implement a subclass of <tt><a | 
 | 76 |       href="CodeGenerator.html#mregisterinfo">MRegisterInfo</a></tt></li> | 
 | 77 |   </ul></li> | 
 | 78 | <li>Describe the instruction set | 
 | 79 |   <ul> | 
 | 80 |   <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of | 
 | 81 |       the instruction set</li> | 
 | 82 |   <li>Implement a subclass of <tt><a | 
 | 83 |       href="CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></tt></li> | 
 | 84 |   </ul></li> | 
 | 85 | <li>Describe the target machine | 
 | 86 |   <ul> | 
 | 87 |   <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of | 
 | 88 |       the target that describes the pointer size and references the instruction | 
 | 89 |       set</li> | 
 | 90 |   <li>Implement a subclass of <tt><a | 
 | 91 |       href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, which | 
 | 92 |       configures <tt><a href="CodeGenerator.html#targetdata">TargetData</a></tt> | 
 | 93 |       correctly</li> | 
| Misha Brukman | 93d416f | 2004-12-27 19:05:16 +0000 | [diff] [blame^] | 94 |   <li>Register your new target using the <tt>RegisterTarget</tt> | 
 | 95 |   template:<br><br> | 
 | 96 | <div class="doc_code"><pre> | 
 | 97 | RegisterTarget<<em>MyTargetMachine</em>> M("short_name", "  Target name"); | 
 | 98 | </pre></div> | 
 | 99 |       <br>Here, <em>MyTargetMachine</em> is the name of your implemented | 
 | 100 |       subclass of <tt><a | 
 | 101 |       href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, | 
 | 102 |       <em>short_name</em> is the option that will be active following | 
 | 103 |       <tt>-march=</tt> to select a target in llc and lli, and the last string | 
 | 104 |       is the description of your target to appear in <tt>-help</tt> | 
 | 105 |       listing.</li> | 
| Misha Brukman | 8eb6719 | 2004-09-06 22:58:13 +0000 | [diff] [blame] | 106 |   </ul></li> | 
 | 107 | <li>Implement the assembly printer for the architecture.  Usually, if you have | 
 | 108 | described the instruction set with the assembly printer generator in mind, that | 
 | 109 | step can be almost automated.</li> | 
 | 110 | </ul> | 
 | 111 |  | 
 | 112 | <p>Now, for static code generation you also need to write an instruction | 
 | 113 | selector for your platform: see <tt>lib/Target/*/*ISelSimple.cpp</tt> which | 
 | 114 | is no longer "simple" but it gives you the idea: you have to be able to create | 
 | 115 | MachineInstrs for any given LLVM instruction using the <tt>InstVisitor</tt> | 
 | 116 | pattern, and produce a <tt>MachineFunction</tt> with | 
 | 117 | <tt>MachineBasicBlock</tt>s full of <tt><a | 
 | 118 | href="CodeGenerator.html#machineinstr">MachineInstr</a></tt>s for a | 
 | 119 | corresponding LLVM Function.  Creating an instruction selector is perhaps the | 
 | 120 | most time-consuming part of creating a back-end.</p>  | 
 | 121 |  | 
 | 122 | <p>To create a JIT for your platform:</p> | 
 | 123 |  | 
 | 124 | <ul> | 
 | 125 | <li>Create a subclass of <tt><a | 
 | 126 |     href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li> | 
 | 127 | <li>Create a machine code emitter that will be used to emit binary code | 
 | 128 |     directly into memory, given <tt>MachineInstr</tt>s</li> | 
 | 129 | </ul> | 
 | 130 |  | 
 | 131 | <p>Note that <tt>lib/target/Skeleton</tt> is a clean skeleton for a new target, | 
 | 132 | so you might want to start with that and adapt it for your target, and if you | 
 | 133 | are wondering how things are done, peek in the X86 or PowerPC target.</p> | 
 | 134 |  | 
 | 135 | <p>The Skeleton target is non-functional but provides the basic building blocks | 
 | 136 | you will need for your endeavor.</p> | 
 | 137 |  | 
 | 138 | </div> | 
 | 139 |  | 
 | 140 | <!-- _______________________________________________________________________ --> | 
 | 141 | <div class="doc_subsubsection"> | 
 | 142 |   <a name="machineDetails">Implementation details</a> | 
 | 143 | </div> | 
 | 144 |  | 
 | 145 | <div class="doc_text"> | 
 | 146 |  | 
 | 147 | <ul> | 
 | 148 |  | 
 | 149 | <li><p><b>TableGen register info description</b> - describe a class which | 
 | 150 | will store the register's number in the binary encoding of the instruction | 
 | 151 | (e.g., for JIT purposes).</p> | 
 | 152 |  | 
 | 153 | <p>You also need to define register classes to contain these registers, such as | 
 | 154 | the integer register class and floating-point register class, so that you can | 
 | 155 | allocate virtual registers to instructions from these sets, and let the | 
 | 156 | target-independent register allocator automatically choose the actual | 
 | 157 | architected registers.</p> | 
 | 158 |  | 
 | 159 | <div class="doc_code"> | 
 | 160 | <pre> | 
 | 161 | // class Register is defined in Target.td | 
| Chris Lattner | 7a2fd89 | 2004-09-18 06:28:07 +0000 | [diff] [blame] | 162 | <b>class</b> <em>Target</em>Reg<string name> : Register<name> { | 
| Misha Brukman | 8eb6719 | 2004-09-06 22:58:13 +0000 | [diff] [blame] | 163 |   <b>let</b> Namespace = "<em>Target</em>"; | 
 | 164 | } | 
 | 165 |  | 
| Chris Lattner | 7a2fd89 | 2004-09-18 06:28:07 +0000 | [diff] [blame] | 166 | <b>class</b> IntReg<<b>bits</b><5> num, string name> : <em>Target</em>Reg<name> { | 
| Misha Brukman | 8eb6719 | 2004-09-06 22:58:13 +0000 | [diff] [blame] | 167 |   <b>field</b> <b>bits</b><5> Num = num; | 
 | 168 | } | 
 | 169 |  | 
| Chris Lattner | 7a2fd89 | 2004-09-18 06:28:07 +0000 | [diff] [blame] | 170 | <b>def</b> R0 : IntReg<0, "%R0">; | 
| Misha Brukman | 8eb6719 | 2004-09-06 22:58:13 +0000 | [diff] [blame] | 171 | ... | 
 | 172 |  | 
 | 173 | // class RegisterClass is defined in Target.td | 
 | 174 | <b>def</b> IReg : RegisterClass<i64, 64, [R0, ... ]>; | 
 | 175 | </pre> | 
 | 176 | </div> | 
 | 177 | </li> | 
 | 178 |  | 
 | 179 | <li><p><b>TableGen instruction info description</b> - break up instructions into | 
 | 180 | classes, usually that's already done by the manufacturer (see instruction | 
 | 181 | manual).  Define a class for each instruction category.  Define each opcode as a | 
 | 182 | subclass of the category, with appropriate parameters such as the fixed binary | 
 | 183 | encoding of opcodes and extended opcodes, and map the register bits to the bits | 
 | 184 | of the instruction which they are encoded in (for the JIT).  Also specify how | 
 | 185 | the instruction should be printed so it can use the automatic assembly printer, | 
 | 186 | e.g.:</p> | 
 | 187 |  | 
 | 188 | <div class="doc_code"> | 
 | 189 | <pre> | 
 | 190 | // class Instruction is defined in Target.td | 
 | 191 | <b>class</b> Form<<b>bits</b><6> opcode, <b>dag</b> OL, <b>string</b> asmstr> : Instruction { | 
 | 192 |   <b>field</b> <b>bits</b><42> Inst; | 
 | 193 |  | 
 | 194 |   <b>let</b> Namespace = "<em>Target</em>"; | 
 | 195 |   <b>let</b> Inst{0-6} = opcode; | 
 | 196 |   <b>let</b> OperandList = OL; | 
 | 197 |   <b>let</b> AsmString = asmstr; | 
 | 198 | } | 
 | 199 |  | 
 | 200 | <b>def</b> ADD : Form<42, (ops IReg:$rD, IReg:$rA, IReg:$rB), "add $rD, $rA, $rB">; | 
 | 201 | </pre> | 
 | 202 | </div> | 
 | 203 | </li> | 
 | 204 |  | 
 | 205 | </ul> | 
 | 206 |  | 
 | 207 | </div> | 
 | 208 |  | 
 | 209 | <!-- ======================================================================= --> | 
 | 210 | <div class="doc_subsection"> | 
 | 211 |   <a name="lang">Language backends</a> | 
 | 212 | </div> | 
 | 213 |  | 
 | 214 | <div class="doc_text"> | 
 | 215 |  | 
 | 216 | <p>For now, just take a look at <tt>lib/Target/CBackend</tt> for an example of | 
 | 217 | how the C backend is written.</p> | 
 | 218 |  | 
 | 219 | </div> | 
 | 220 |  | 
 | 221 | <!-- *********************************************************************** --> | 
 | 222 | <div class="doc_section"> | 
 | 223 |   <a name="related">Related reading material</a> | 
 | 224 | </div> | 
 | 225 | <!-- *********************************************************************** --> | 
 | 226 |  | 
 | 227 | <div class="doc_text"> | 
 | 228 |  | 
 | 229 | <ul> | 
 | 230 | <li><a href="CodeGenerator.html">Code generator</a> - | 
 | 231 |     describes some of the classes in code generation at a high level, but | 
 | 232 |     it is not (yet) complete.</li> | 
 | 233 | <li><a href="TableGenFundamentals.html">TableGen fundamentals</a> - | 
 | 234 |     describes how to use TableGen to describe your target information succinctly | 
 | 235 | </li> | 
 | 236 | </ul> | 
 | 237 |  | 
 | 238 | </div> | 
 | 239 |  | 
 | 240 | <!-- *********************************************************************** --> | 
 | 241 |  | 
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 | 249 |   <a href="http://misha.brukman.net">Misha Brukman</a><br> | 
 | 250 |   <a href="http://llvm.cs.uiuc.edu">The LLVM Compiler Infrastructure</a> | 
 | 251 |   <br> | 
 | 252 |   Last modified: $Date$ | 
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