Anton Korobeynikov | f2c3e17 | 2009-05-03 12:57:15 +0000 | [diff] [blame] | 1 | //===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the MSP430 implementation of the TargetInstrInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "MSP430.h" |
| 15 | #include "MSP430InstrInfo.h" |
| 16 | #include "MSP430TargetMachine.h" |
| 17 | #include "MSP430GenInstrInfo.inc" |
| 18 | #include "llvm/Function.h" |
Anton Korobeynikov | aa29915 | 2009-05-03 13:09:57 +0000 | [diff] [blame^] | 19 | #include "llvm/CodeGen/MachineFrameInfo.h" |
Anton Korobeynikov | f2c3e17 | 2009-05-03 12:57:15 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 21 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
Anton Korobeynikov | aa29915 | 2009-05-03 13:09:57 +0000 | [diff] [blame^] | 22 | #include "llvm/CodeGen/PseudoSourceValue.h" |
Anton Korobeynikov | f2c3e17 | 2009-05-03 12:57:15 +0000 | [diff] [blame] | 23 | |
| 24 | using namespace llvm; |
| 25 | |
| 26 | MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm) |
| 27 | : TargetInstrInfoImpl(MSP430Insts, array_lengthof(MSP430Insts)), |
Anton Korobeynikov | b561264 | 2009-05-03 13:07:54 +0000 | [diff] [blame] | 28 | RI(tm, *this), TM(tm) {} |
Anton Korobeynikov | 1df221f | 2009-05-03 13:02:04 +0000 | [diff] [blame] | 29 | |
Anton Korobeynikov | aa29915 | 2009-05-03 13:09:57 +0000 | [diff] [blame^] | 30 | void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, |
| 31 | MachineBasicBlock::iterator MI, |
| 32 | unsigned SrcReg, bool isKill, int FrameIdx, |
| 33 | const TargetRegisterClass *RC) const { |
| 34 | DebugLoc DL = DebugLoc::getUnknownLoc(); |
| 35 | if (MI != MBB.end()) DL = MI->getDebugLoc(); |
| 36 | |
| 37 | if (RC == &MSP430::GR16RegClass) |
| 38 | BuildMI(MBB, MI, DL, get(MSP430::MOV16mr)) |
| 39 | .addFrameIndex(FrameIdx).addImm(0) |
| 40 | .addReg(SrcReg, false, false, isKill); |
| 41 | else if (RC == &MSP430::GR8RegClass) |
| 42 | BuildMI(MBB, MI, DL, get(MSP430::MOV8mr)) |
| 43 | .addFrameIndex(FrameIdx).addImm(0) |
| 44 | .addReg(SrcReg, false, false, isKill); |
| 45 | else |
| 46 | assert(0 && "Cannot store this register to stack slot!"); |
| 47 | } |
| 48 | |
| 49 | void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, |
| 50 | MachineBasicBlock::iterator MI, |
| 51 | unsigned DestReg, int FrameIdx, |
| 52 | const TargetRegisterClass *RC) const{ |
| 53 | DebugLoc DL = DebugLoc::getUnknownLoc(); |
| 54 | if (MI != MBB.end()) DL = MI->getDebugLoc(); |
| 55 | |
| 56 | if (RC == &MSP430::GR16RegClass) |
| 57 | BuildMI(MBB, MI, DL, get(MSP430::MOV16rm)) |
| 58 | .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0); |
| 59 | else if (RC == &MSP430::GR8RegClass) |
| 60 | BuildMI(MBB, MI, DL, get(MSP430::MOV8rm)) |
| 61 | .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0); |
| 62 | else |
| 63 | assert(0 && "Cannot store this register to stack slot!"); |
| 64 | } |
| 65 | |
Anton Korobeynikov | 1df221f | 2009-05-03 13:02:04 +0000 | [diff] [blame] | 66 | bool MSP430InstrInfo::copyRegToReg(MachineBasicBlock &MBB, |
| 67 | MachineBasicBlock::iterator I, |
| 68 | unsigned DestReg, unsigned SrcReg, |
| 69 | const TargetRegisterClass *DestRC, |
| 70 | const TargetRegisterClass *SrcRC) const { |
Anton Korobeynikov | 1df221f | 2009-05-03 13:02:04 +0000 | [diff] [blame] | 71 | DebugLoc DL = DebugLoc::getUnknownLoc(); |
| 72 | if (I != MBB.end()) DL = I->getDebugLoc(); |
| 73 | |
Anton Korobeynikov | 51c31d6 | 2009-05-03 13:05:42 +0000 | [diff] [blame] | 74 | if (DestRC == SrcRC) { |
| 75 | unsigned Opc; |
| 76 | if (DestRC == &MSP430::GR16RegClass) { |
| 77 | Opc = MSP430::MOV16rr; |
| 78 | } else if (DestRC == &MSP430::GR8RegClass) { |
| 79 | Opc = MSP430::MOV8rr; |
| 80 | } else { |
| 81 | return false; |
| 82 | } |
| 83 | |
| 84 | BuildMI(MBB, I, DL, get(Opc), DestReg).addReg(SrcReg); |
| 85 | return true; |
| 86 | } |
| 87 | |
| 88 | return false; |
Anton Korobeynikov | 1df221f | 2009-05-03 13:02:04 +0000 | [diff] [blame] | 89 | } |
| 90 | |
| 91 | bool |
| 92 | MSP430InstrInfo::isMoveInstr(const MachineInstr& MI, |
| 93 | unsigned &SrcReg, unsigned &DstReg, |
| 94 | unsigned &SrcSubIdx, unsigned &DstSubIdx) const { |
| 95 | SrcSubIdx = DstSubIdx = 0; // No sub-registers yet. |
| 96 | |
| 97 | switch (MI.getOpcode()) { |
| 98 | default: |
| 99 | return false; |
Anton Korobeynikov | 51c31d6 | 2009-05-03 13:05:42 +0000 | [diff] [blame] | 100 | case MSP430::MOV8rr: |
Anton Korobeynikov | 1df221f | 2009-05-03 13:02:04 +0000 | [diff] [blame] | 101 | case MSP430::MOV16rr: |
Anton Korobeynikov | 51c31d6 | 2009-05-03 13:05:42 +0000 | [diff] [blame] | 102 | assert(MI.getNumOperands() >= 2 && |
Anton Korobeynikov | 1df221f | 2009-05-03 13:02:04 +0000 | [diff] [blame] | 103 | MI.getOperand(0).isReg() && |
| 104 | MI.getOperand(1).isReg() && |
| 105 | "invalid register-register move instruction"); |
| 106 | SrcReg = MI.getOperand(1).getReg(); |
| 107 | DstReg = MI.getOperand(0).getReg(); |
| 108 | return true; |
| 109 | } |
| 110 | } |