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Anton Korobeynikovf2c3e172009-05-03 12:57:15 +00001//===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the MSP430 implementation of the TargetInstrInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "MSP430.h"
15#include "MSP430InstrInfo.h"
16#include "MSP430TargetMachine.h"
17#include "MSP430GenInstrInfo.inc"
18#include "llvm/Function.h"
Anton Korobeynikovaa299152009-05-03 13:09:57 +000019#include "llvm/CodeGen/MachineFrameInfo.h"
Anton Korobeynikovf2c3e172009-05-03 12:57:15 +000020#include "llvm/CodeGen/MachineInstrBuilder.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
Anton Korobeynikovaa299152009-05-03 13:09:57 +000022#include "llvm/CodeGen/PseudoSourceValue.h"
Anton Korobeynikovf2c3e172009-05-03 12:57:15 +000023
24using namespace llvm;
25
26MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
27 : TargetInstrInfoImpl(MSP430Insts, array_lengthof(MSP430Insts)),
Anton Korobeynikovb5612642009-05-03 13:07:54 +000028 RI(tm, *this), TM(tm) {}
Anton Korobeynikov1df221f2009-05-03 13:02:04 +000029
Anton Korobeynikovaa299152009-05-03 13:09:57 +000030void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
31 MachineBasicBlock::iterator MI,
32 unsigned SrcReg, bool isKill, int FrameIdx,
33 const TargetRegisterClass *RC) const {
34 DebugLoc DL = DebugLoc::getUnknownLoc();
35 if (MI != MBB.end()) DL = MI->getDebugLoc();
36
37 if (RC == &MSP430::GR16RegClass)
38 BuildMI(MBB, MI, DL, get(MSP430::MOV16mr))
39 .addFrameIndex(FrameIdx).addImm(0)
40 .addReg(SrcReg, false, false, isKill);
41 else if (RC == &MSP430::GR8RegClass)
42 BuildMI(MBB, MI, DL, get(MSP430::MOV8mr))
43 .addFrameIndex(FrameIdx).addImm(0)
44 .addReg(SrcReg, false, false, isKill);
45 else
46 assert(0 && "Cannot store this register to stack slot!");
47}
48
49void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
50 MachineBasicBlock::iterator MI,
51 unsigned DestReg, int FrameIdx,
52 const TargetRegisterClass *RC) const{
53 DebugLoc DL = DebugLoc::getUnknownLoc();
54 if (MI != MBB.end()) DL = MI->getDebugLoc();
55
56 if (RC == &MSP430::GR16RegClass)
57 BuildMI(MBB, MI, DL, get(MSP430::MOV16rm))
58 .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
59 else if (RC == &MSP430::GR8RegClass)
60 BuildMI(MBB, MI, DL, get(MSP430::MOV8rm))
61 .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
62 else
63 assert(0 && "Cannot store this register to stack slot!");
64}
65
Anton Korobeynikov1df221f2009-05-03 13:02:04 +000066bool MSP430InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
67 MachineBasicBlock::iterator I,
68 unsigned DestReg, unsigned SrcReg,
69 const TargetRegisterClass *DestRC,
70 const TargetRegisterClass *SrcRC) const {
Anton Korobeynikov1df221f2009-05-03 13:02:04 +000071 DebugLoc DL = DebugLoc::getUnknownLoc();
72 if (I != MBB.end()) DL = I->getDebugLoc();
73
Anton Korobeynikov51c31d62009-05-03 13:05:42 +000074 if (DestRC == SrcRC) {
75 unsigned Opc;
76 if (DestRC == &MSP430::GR16RegClass) {
77 Opc = MSP430::MOV16rr;
78 } else if (DestRC == &MSP430::GR8RegClass) {
79 Opc = MSP430::MOV8rr;
80 } else {
81 return false;
82 }
83
84 BuildMI(MBB, I, DL, get(Opc), DestReg).addReg(SrcReg);
85 return true;
86 }
87
88 return false;
Anton Korobeynikov1df221f2009-05-03 13:02:04 +000089}
90
91bool
92MSP430InstrInfo::isMoveInstr(const MachineInstr& MI,
93 unsigned &SrcReg, unsigned &DstReg,
94 unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
95 SrcSubIdx = DstSubIdx = 0; // No sub-registers yet.
96
97 switch (MI.getOpcode()) {
98 default:
99 return false;
Anton Korobeynikov51c31d62009-05-03 13:05:42 +0000100 case MSP430::MOV8rr:
Anton Korobeynikov1df221f2009-05-03 13:02:04 +0000101 case MSP430::MOV16rr:
Anton Korobeynikov51c31d62009-05-03 13:05:42 +0000102 assert(MI.getNumOperands() >= 2 &&
Anton Korobeynikov1df221f2009-05-03 13:02:04 +0000103 MI.getOperand(0).isReg() &&
104 MI.getOperand(1).isReg() &&
105 "invalid register-register move instruction");
106 SrcReg = MI.getOperand(1).getReg();
107 DstReg = MI.getOperand(0).getReg();
108 return true;
109 }
110}