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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattnerb74e83c2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner4cc662b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000025#include "Support/Debug.h"
26#include "Support/Statistic.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000027#include <iostream>
Chris Lattneref09c632004-01-31 21:27:19 +000028using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +000029
Chris Lattnerb74e83c2002-12-16 16:15:28 +000030namespace {
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +000031 Statistic<> NumStores("ra-local", "Number of stores added");
32 Statistic<> NumLoads ("ra-local", "Number of loads added");
33 Statistic<> NumFused ("ra-local", "Number of reloads fused into instructions");
Chris Lattner580f9be2002-12-28 20:40:43 +000034 class RA : public MachineFunctionPass {
35 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000036 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000037 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000038 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000039
Chris Lattnerb8822ad2003-08-04 23:36:39 +000040 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
41 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000042 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000043
44 // Virt2PhysRegMap - This map contains entries for each virtual register
Chris Lattnerecea5632004-02-09 02:12:04 +000045 // that is currently available in a physical register. This is "logically"
46 // a map from virtual register numbers to physical register numbers.
47 // Instead of using a map, however, which is slow, we use a vector. The
48 // index is the VREG number - FirstVirtualRegister. If the entry is zero,
49 // then it is logically "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000050 //
Chris Lattnerecea5632004-02-09 02:12:04 +000051 std::vector<unsigned> Virt2PhysRegMap;
52
53 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
Alkis Evlogimenos859a18b2004-02-15 21:37:17 +000054 assert(MRegisterInfo::isVirtualRegister(VirtReg) &&"Illegal VREG #");
Chris Lattnerecea5632004-02-09 02:12:04 +000055 assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
56 && "VirtReg not in map!");
57 return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
58 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000059
Chris Lattner64667b62004-02-09 01:26:13 +000060 // PhysRegsUsed - This array is effectively a map, containing entries for
61 // each physical register that currently has a value (ie, it is in
62 // Virt2PhysRegMap). The value mapped to is the virtual register
63 // corresponding to the physical register (the inverse of the
64 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
65 // because it is used by a future instruction. If the entry for a physical
66 // register is -1, then the physical register is "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000067 //
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000068 std::vector<int> PhysRegsUsed;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000069
70 // PhysRegsUseOrder - This contains a list of the physical registers that
71 // currently have a virtual register value in them. This list provides an
72 // ordering of registers, imposing a reallocation order. This list is only
73 // used if all registers are allocated and we have to spill one, in which
74 // case we spill the least recently used register. Entries at the front of
75 // the list are the least recently used registers, entries at the back are
76 // the most recently used.
77 //
78 std::vector<unsigned> PhysRegsUseOrder;
79
Chris Lattner91a452b2003-01-13 00:25:40 +000080 // VirtRegModified - This bitset contains information about which virtual
81 // registers need to be spilled back to memory when their registers are
82 // scavenged. If a virtual register has simply been rematerialized, there
83 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000084 //
Chris Lattner91a452b2003-01-13 00:25:40 +000085 std::vector<bool> VirtRegModified;
86
87 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattneref09c632004-01-31 21:27:19 +000088 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000089 Reg -= MRegisterInfo::FirstVirtualRegister;
90 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
91 VirtRegModified[Reg] = Val;
92 }
93
94 bool isVirtRegModified(unsigned Reg) const {
Chris Lattneref09c632004-01-31 21:27:19 +000095 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000096 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000097 && "Illegal virtual register!");
Chris Lattner91a452b2003-01-13 00:25:40 +000098 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
99 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000100
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000101 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattner82bee0f2002-12-18 08:14:26 +0000102 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner0eb172c2002-12-24 00:04:55 +0000103 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
104
105 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000106 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
107 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
108 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
109 // Add it to the end of the list
110 PhysRegsUseOrder.push_back(RegMatch);
111 if (RegMatch == Reg)
112 return; // Found an exact match, exit early
113 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000114 }
115
116 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000117 virtual const char *getPassName() const {
118 return "Local Register Allocator";
119 }
120
Chris Lattner91a452b2003-01-13 00:25:40 +0000121 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
Chris Lattner56ddada2004-02-17 17:49:10 +0000122 AU.addRequired<LiveVariables>();
Chris Lattner91a452b2003-01-13 00:25:40 +0000123 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos4c080862003-12-18 22:40:24 +0000124 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattner91a452b2003-01-13 00:25:40 +0000125 MachineFunctionPass::getAnalysisUsage(AU);
126 }
127
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000128 private:
129 /// runOnMachineFunction - Register allocate the whole function
130 bool runOnMachineFunction(MachineFunction &Fn);
131
132 /// AllocateBasicBlock - Register allocate the specified basic block.
133 void AllocateBasicBlock(MachineBasicBlock &MBB);
134
Chris Lattner82bee0f2002-12-18 08:14:26 +0000135
Chris Lattner82bee0f2002-12-18 08:14:26 +0000136 /// areRegsEqual - This method returns true if the specified registers are
137 /// related to each other. To do this, it checks to see if they are equal
138 /// or if the first register is in the alias set of the second register.
139 ///
140 bool areRegsEqual(unsigned R1, unsigned R2) const {
141 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000142 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
143 *AliasSet; ++AliasSet) {
144 if (*AliasSet == R1) return true;
145 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000146 return false;
147 }
148
Chris Lattner580f9be2002-12-28 20:40:43 +0000149 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000150 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000151 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000152
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000153 /// removePhysReg - This method marks the specified physical register as no
154 /// longer being in use.
155 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000156 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000157
158 /// spillVirtReg - This method spills the value specified by PhysReg into
159 /// the virtual register slot specified by VirtReg. It then updates the RA
160 /// data structures to indicate the fact that PhysReg is now available.
161 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000162 void spillVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000163 unsigned VirtReg, unsigned PhysReg);
164
Chris Lattnerc21be922002-12-16 17:44:42 +0000165 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000166 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
167 /// true, then the request is ignored if the physical register does not
168 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000169 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000170 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000171 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000172
Chris Lattner91a452b2003-01-13 00:25:40 +0000173 /// assignVirtToPhysReg - This method updates local state so that we know
174 /// that PhysReg is the proper container for VirtReg now. The physical
175 /// register must not be used for anything else when this is called.
176 ///
177 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
178
179 /// liberatePhysReg - Make sure the specified physical register is available
180 /// for use. If there is currently a value in it, it is either moved out of
181 /// the way or spilled to memory.
182 ///
183 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000184 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000185
Chris Lattnerae640432002-12-17 02:50:10 +0000186 /// isPhysRegAvailable - Return true if the specified physical register is
187 /// free and available for use. This also includes checking to see if
188 /// aliased registers are all free...
189 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000190 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000191
192 /// getFreeReg - Look to see if there is a free register available in the
193 /// specified register class. If not, return 0.
194 ///
195 unsigned getFreeReg(const TargetRegisterClass *RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000196
Chris Lattner91a452b2003-01-13 00:25:40 +0000197 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000198 /// register. If all compatible physical registers are used, this method
199 /// spills the last used virtual register to the stack, and uses that
200 /// register.
201 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000202 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000203 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000204
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000205 /// reloadVirtReg - This method transforms the specified specified virtual
206 /// register use to refer to a physical register. This method may do this
207 /// in one of several ways: if the register is available in a physical
208 /// register already, it uses that physical register. If the value is not
209 /// in a physical register, and if there are physical registers available,
210 /// it loads it into a register. If register pressure is high, and it is
211 /// possible, it tries to fold the load of the virtual register into the
212 /// instruction itself. It avoids doing this if register pressure is low to
213 /// improve the chance that subsequent instructions can use the reloaded
214 /// value. This method returns the modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000215 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000216 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
217 unsigned OpNum);
218
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000219
220 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
221 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000222 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000223}
224
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000225/// getStackSpaceFor - This allocates space for the specified virtual register
226/// to be held on the stack.
227int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
228 // Find the location Reg would belong...
229 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000230
Chris Lattner580f9be2002-12-28 20:40:43 +0000231 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000232 return I->second; // Already has space allocated?
233
Chris Lattner580f9be2002-12-28 20:40:43 +0000234 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000235 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000236
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000237 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000238 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
239 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000240}
241
Chris Lattnerae640432002-12-17 02:50:10 +0000242
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000243/// removePhysReg - This method marks the specified physical register as no
Chris Lattner82bee0f2002-12-18 08:14:26 +0000244/// longer being in use.
245///
246void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000247 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattner82bee0f2002-12-18 08:14:26 +0000248
249 std::vector<unsigned>::iterator It =
250 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000251 if (It != PhysRegsUseOrder.end())
252 PhysRegsUseOrder.erase(It);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000253}
254
Chris Lattner91a452b2003-01-13 00:25:40 +0000255
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000256/// spillVirtReg - This method spills the value specified by PhysReg into the
257/// virtual register slot specified by VirtReg. It then updates the RA data
258/// structures to indicate the fact that PhysReg is now available.
259///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000260void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000261 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000262 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000263 " Must not have appropriate kill for the register or use exists beyond"
264 " the intended one.");
265 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
266 std::cerr << " containing %reg" << VirtReg;
267 if (!isVirtRegModified(VirtReg))
268 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000269
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000270 // Otherwise, there is a virtual register corresponding to this physical
271 // register. We only need to spill it into its stack slot if it has been
272 // modified.
273 if (isVirtRegModified(VirtReg)) {
274 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
275 int FrameIndex = getStackSpaceFor(VirtReg, RC);
276 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
277 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000278 ++NumStores; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000279 }
Chris Lattnerecea5632004-02-09 02:12:04 +0000280
281 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000282
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000283 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000284 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000285}
286
Chris Lattnerae640432002-12-17 02:50:10 +0000287
Chris Lattner91a452b2003-01-13 00:25:40 +0000288/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000289/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
290/// then the request is ignored if the physical register does not contain a
291/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000292///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000293void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000294 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner64667b62004-02-09 01:26:13 +0000295 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
296 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
297 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000298 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000299 // If the selected register aliases any other registers, we must make
300 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000301 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner64667b62004-02-09 01:26:13 +0000302 *AliasSet; ++AliasSet)
303 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
304 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
305 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000306 }
307}
308
309
310/// assignVirtToPhysReg - This method updates local state so that we know
311/// that PhysReg is the proper container for VirtReg now. The physical
312/// register must not be used for anything else when this is called.
313///
314void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000315 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000316 // Update information to note the fact that this register was just used, and
317 // it holds VirtReg.
318 PhysRegsUsed[PhysReg] = VirtReg;
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000319 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattner91a452b2003-01-13 00:25:40 +0000320 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
321}
322
323
Chris Lattnerae640432002-12-17 02:50:10 +0000324/// isPhysRegAvailable - Return true if the specified physical register is free
325/// and available for use. This also includes checking to see if aliased
326/// registers are all free...
327///
328bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner64667b62004-02-09 01:26:13 +0000329 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattnerae640432002-12-17 02:50:10 +0000330
331 // If the selected register aliases any other allocated registers, it is
332 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000333 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
334 *AliasSet; ++AliasSet)
Chris Lattner64667b62004-02-09 01:26:13 +0000335 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000336 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000337 return true;
338}
339
340
Chris Lattner91a452b2003-01-13 00:25:40 +0000341/// getFreeReg - Look to see if there is a free register available in the
342/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000343///
Chris Lattner91a452b2003-01-13 00:25:40 +0000344unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000345 // Get iterators defining the range of registers that are valid to allocate in
346 // this class, which also specifies the preferred allocation order.
347 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
348 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000349
Chris Lattner91a452b2003-01-13 00:25:40 +0000350 for (; RI != RE; ++RI)
351 if (isPhysRegAvailable(*RI)) { // Is reg unused?
352 assert(*RI != 0 && "Cannot use register!");
353 return *RI; // Found an unused register!
354 }
355 return 0;
356}
357
358
359/// liberatePhysReg - Make sure the specified physical register is available for
360/// use. If there is currently a value in it, it is either moved out of the way
361/// or spilled to memory.
362///
363void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000364 unsigned PhysReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000365 // FIXME: This code checks to see if a register is available, but it really
366 // wants to know if a reg is available BEFORE the instruction executes. If
367 // called after killed operands are freed, it runs the risk of reallocating a
368 // used operand...
369#if 0
370 if (isPhysRegAvailable(PhysReg)) return; // Already available...
371
372 // Check to see if the register is directly used, not indirectly used through
373 // aliases. If aliased registers are the ones actually used, we cannot be
374 // sure that we will be able to save the whole thing if we do a reg-reg copy.
Chris Lattner64667b62004-02-09 01:26:13 +0000375 if (PhysRegsUsed[PhysReg] != -1) {
376 // The virtual register held...
377 unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
Chris Lattner91a452b2003-01-13 00:25:40 +0000378
379 // Check to see if there is a compatible register available. If so, we can
380 // move the value into the new register...
381 //
382 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
383 if (unsigned NewReg = getFreeReg(RC)) {
384 // Emit the code to copy the value...
385 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000386
Chris Lattner91a452b2003-01-13 00:25:40 +0000387 // Update our internal state to indicate that PhysReg is available and Reg
388 // isn't.
Chris Lattnerecea5632004-02-09 02:12:04 +0000389 getVirt2PhysRegMapSlot[VirtReg] = 0;
Chris Lattner91a452b2003-01-13 00:25:40 +0000390 removePhysReg(PhysReg); // Free the physreg
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000391
Chris Lattner91a452b2003-01-13 00:25:40 +0000392 // Move reference over to new register...
393 assignVirtToPhysReg(VirtReg, NewReg);
394 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000395 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000396 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000397#endif
398 spillPhysReg(MBB, I, PhysReg);
399}
400
401
402/// getReg - Find a physical register to hold the specified virtual
403/// register. If all compatible physical registers are used, this method spills
404/// the last used virtual register to the stack, and uses that register.
405///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000406unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000407 unsigned VirtReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000408 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
409
410 // First check to see if we have a free register of the requested type...
411 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000412
Chris Lattnerae640432002-12-17 02:50:10 +0000413 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000414 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000415 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000416
417 // Loop over all of the preallocated registers from the least recently used
418 // to the most recently used. When we find one that is capable of holding
419 // our register, use it.
420 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000421 assert(i != PhysRegsUseOrder.size() &&
422 "Couldn't find a register of the appropriate class!");
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000423
Chris Lattnerae640432002-12-17 02:50:10 +0000424 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000425
426 // We can only use this register if it holds a virtual register (ie, it
427 // can be spilled). Do not use it if it is an explicitly allocated
428 // physical register!
Chris Lattner64667b62004-02-09 01:26:13 +0000429 assert(PhysRegsUsed[R] != -1 &&
Chris Lattner41822c72003-08-23 23:49:42 +0000430 "PhysReg in PhysRegsUseOrder, but is not allocated?");
431 if (PhysRegsUsed[R]) {
432 // If the current register is compatible, use it.
433 if (RegInfo->getRegClass(R) == RC) {
434 PhysReg = R;
435 break;
436 } else {
437 // If one of the registers aliased to the current register is
438 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000439 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
440 *AliasSet; ++AliasSet) {
441 if (RegInfo->getRegClass(*AliasSet) == RC) {
442 PhysReg = *AliasSet; // Take an aliased register
443 break;
444 }
445 }
Chris Lattner41822c72003-08-23 23:49:42 +0000446 }
Chris Lattnerae640432002-12-17 02:50:10 +0000447 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000448 }
449
Chris Lattnerae640432002-12-17 02:50:10 +0000450 assert(PhysReg && "Physical register not assigned!?!?");
451
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000452 // At this point PhysRegsUseOrder[i] is the least recently used register of
453 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000454 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000455 }
456
457 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000458 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000459 return PhysReg;
460}
461
Chris Lattnerae640432002-12-17 02:50:10 +0000462
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000463/// reloadVirtReg - This method transforms the specified specified virtual
464/// register use to refer to a physical register. This method may do this in
465/// one of several ways: if the register is available in a physical register
466/// already, it uses that physical register. If the value is not in a physical
467/// register, and if there are physical registers available, it loads it into a
468/// register. If register pressure is high, and it is possible, it tries to
469/// fold the load of the virtual register into the instruction itself. It
470/// avoids doing this if register pressure is low to improve the chance that
471/// subsequent instructions can use the reloaded value. This method returns the
472/// modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000473///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000474MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
475 unsigned OpNum) {
476 unsigned VirtReg = MI->getOperand(OpNum).getReg();
477
478 // If the virtual register is already available, just update the instruction
479 // and return.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000480 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000481 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
482 MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
483 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000484 }
485
Chris Lattner1e3812c2004-02-17 04:08:37 +0000486 // Otherwise, we need to fold it into the current instruction, or reload it.
487 // If we have registers available to hold the value, use them.
Chris Lattnerff863ba2002-12-25 05:05:46 +0000488 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000489 unsigned PhysReg = getFreeReg(RC);
Chris Lattner11390e72004-02-17 08:09:40 +0000490 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000491
Chris Lattner11390e72004-02-17 08:09:40 +0000492 if (PhysReg) { // Register is available, allocate it!
493 assignVirtToPhysReg(VirtReg, PhysReg);
494 } else { // No registers available.
495 // If we can fold this spill into this instruction, do so now.
496 MachineBasicBlock::iterator MII = MI;
497 if (RegInfo->foldMemoryOperand(MII, OpNum, FrameIndex)) {
498 ++NumFused;
Chris Lattnerd368c612004-02-19 18:34:02 +0000499 // Since we changed the address of MI, make sure to update live variables
500 // to know that the new instruction has the properties of the old one.
501 LV->instructionChanged(MI, MII);
Chris Lattner11390e72004-02-17 08:09:40 +0000502 return MII;
Chris Lattner1e3812c2004-02-17 04:08:37 +0000503 }
504
505 // It looks like we can't fold this virtual register load into this
506 // instruction. Force some poor hapless value out of the register file to
507 // make room for the new register, and reload it.
508 PhysReg = getReg(MBB, MI, VirtReg);
509 }
510
Chris Lattner91a452b2003-01-13 00:25:40 +0000511 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
512
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000513 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
514 << RegInfo->getName(PhysReg) << "\n");
515
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000516 // Add move instruction(s)
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000517 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000518 ++NumLoads; // Update statistics
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000519
520 MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
521 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000522}
523
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000524
525
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000526void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
527 // loop over each instruction
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000528 MachineBasicBlock::iterator MI = MBB.begin();
529 for (; MI != MBB.end(); ++MI) {
Chris Lattner3501fea2003-01-14 22:00:31 +0000530 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000531 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
532 std::cerr << " Regs have values: ";
Chris Lattner64667b62004-02-09 01:26:13 +0000533 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
534 if (PhysRegsUsed[i] != -1)
535 std::cerr << "[" << RegInfo->getName(i)
536 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000537 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000538
Chris Lattnerae640432002-12-17 02:50:10 +0000539 // Loop over the implicit uses, making sure that they are at the head of the
540 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000541 for (const unsigned *ImplicitUses = TID.ImplicitUses;
542 *ImplicitUses; ++ImplicitUses)
Chris Lattnerecea5632004-02-09 02:12:04 +0000543 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000544
Brian Gaeke53b99a02003-08-15 21:19:25 +0000545 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000546 // incoming values if we are out of registers. Note that we completely
547 // ignore physical register uses here. We assume that if an explicit
548 // physical register is referenced by the instruction, that it is guaranteed
549 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000550 //
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000551 for (unsigned i = 0; i != MI->getNumOperands(); ++i)
Alkis Evlogimenos4d7af652003-12-14 13:24:17 +0000552 if (MI->getOperand(i).isUse() &&
Chris Lattner1cbe4d02004-02-10 21:12:22 +0000553 !MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000554 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg()))
555 MI = reloadVirtReg(MBB, MI, i);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000556
Chris Lattner56ddada2004-02-17 17:49:10 +0000557 // If this instruction is the last user of anything in registers, kill the
558 // value, freeing the register being used, so it doesn't need to be
559 // spilled to memory.
560 //
561 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
562 KE = LV->killed_end(MI); KI != KE; ++KI) {
563 unsigned VirtReg = KI->second;
564 unsigned PhysReg = VirtReg;
565 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
566 // If the virtual register was never materialized into a register, it
567 // might not be in the map, but it won't hurt to zero it out anyway.
568 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
569 PhysReg = PhysRegSlot;
570 PhysRegSlot = 0;
571 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000572
Chris Lattner56ddada2004-02-17 17:49:10 +0000573 if (PhysReg) {
574 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
575 << "[%reg" << VirtReg <<"], removing it from live set\n");
576 removePhysReg(PhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000577 }
578 }
579
580 // Loop over all of the operands of the instruction, spilling registers that
581 // are defined, and marking explicit destinations in the PhysRegsUsed map.
582 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner3d878d82004-02-10 20:41:10 +0000583 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
584 MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenosbe766c72004-02-13 21:01:20 +0000585 unsigned Reg = MI->getOperand(i).getReg();
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000586 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000587 PhysRegsUsed[Reg] = 0; // It is free and reserved now
588 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000589 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
590 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000591 PhysRegsUseOrder.push_back(*AliasSet);
592 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000593 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000594 }
595
596 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000597 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
598 *ImplicitDefs; ++ImplicitDefs) {
599 unsigned Reg = *ImplicitDefs;
Chris Lattner11390e72004-02-17 08:09:40 +0000600 spillPhysReg(MBB, MI, Reg, true);
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000601 PhysRegsUseOrder.push_back(Reg);
602 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000603 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
604 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000605 PhysRegsUseOrder.push_back(*AliasSet);
606 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000607 }
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000608 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000609
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000610 // Okay, we have allocated all of the source operands and spilled any values
611 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000612 // implicit defs and assign them to a register, spilling incoming values if
613 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000614 //
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000615 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner1cbe4d02004-02-10 21:12:22 +0000616 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
617 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenosbe766c72004-02-13 21:01:20 +0000618 unsigned DestVirtReg = MI->getOperand(i).getReg();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000619 unsigned DestPhysReg;
620
Alkis Evlogimenos9af9dbd2003-12-18 13:08:52 +0000621 // If DestVirtReg already has a value, use it.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000622 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000623 DestPhysReg = getReg(MBB, MI, DestVirtReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000624 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000625 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
626 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000627
Chris Lattner56ddada2004-02-17 17:49:10 +0000628 // If this instruction defines any registers that are immediately dead,
629 // kill them now.
630 //
631 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
632 KE = LV->dead_end(MI); KI != KE; ++KI) {
633 unsigned VirtReg = KI->second;
634 unsigned PhysReg = VirtReg;
635 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
636 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
637 PhysReg = PhysRegSlot;
638 assert(PhysReg != 0);
639 PhysRegSlot = 0;
640 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000641
Chris Lattner56ddada2004-02-17 17:49:10 +0000642 if (PhysReg) {
643 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
644 << " [%reg" << VirtReg
645 << "] is never used, removing it frame live list\n");
646 removePhysReg(PhysReg);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000647 }
648 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000649 }
650
651 // Rewind the iterator to point to the first flow control instruction...
Chris Lattner3501fea2003-01-14 22:00:31 +0000652 const TargetInstrInfo &TII = TM->getInstrInfo();
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000653 MI = MBB.end();
654 while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode()));
655 ++MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000656
657 // Spill all physical registers holding virtual registers now.
Chris Lattner64667b62004-02-09 01:26:13 +0000658 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
659 if (PhysRegsUsed[i] != -1)
660 if (unsigned VirtReg = PhysRegsUsed[i])
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000661 spillVirtReg(MBB, MI, VirtReg, i);
Chris Lattner64667b62004-02-09 01:26:13 +0000662 else
663 removePhysReg(i);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000664
Chris Lattnerecea5632004-02-09 02:12:04 +0000665#ifndef NDEBUG
666 bool AllOk = true;
667 for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
668 if (unsigned PR = Virt2PhysRegMap[i]) {
669 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
670 AllOk = false;
671 }
672 assert(AllOk && "Virtual registers still in phys regs?");
673#endif
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000674
Chris Lattner128c2aa2003-08-17 18:01:15 +0000675 // Clear any physical register which appear live at the end of the basic
676 // block, but which do not hold any virtual registers. e.g., the stack
677 // pointer.
678 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000679}
680
Chris Lattner86c69a62002-12-17 03:16:10 +0000681
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000682/// runOnMachineFunction - Register allocate the whole function
683///
684bool RA::runOnMachineFunction(MachineFunction &Fn) {
685 DEBUG(std::cerr << "Machine Function " << "\n");
686 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000687 TM = &Fn.getTarget();
688 RegInfo = TM->getRegisterInfo();
Chris Lattner56ddada2004-02-17 17:49:10 +0000689 LV = &getAnalysis<LiveVariables>();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000690
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000691 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
Chris Lattner64667b62004-02-09 01:26:13 +0000692
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000693 // initialize the virtual->physical register map to have a 'null'
694 // mapping for all virtual registers
695 Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0);
Chris Lattnerecea5632004-02-09 02:12:04 +0000696
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000697 // Loop over all of the basic blocks, eliminating virtual register references
698 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
699 MBB != MBBe; ++MBB)
700 AllocateBasicBlock(*MBB);
701
Chris Lattner580f9be2002-12-28 20:40:43 +0000702 StackSlotForVirtReg.clear();
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000703 PhysRegsUsed.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000704 VirtRegModified.clear();
Chris Lattnerecea5632004-02-09 02:12:04 +0000705 Virt2PhysRegMap.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000706 return true;
707}
708
Chris Lattneref09c632004-01-31 21:27:19 +0000709FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000710 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000711}