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Chris Lattner847da552010-07-20 18:25:19 +00001//===-- EDDisassembler.h - LLVM Enhanced Disassembler -----------*- C++ -*-===//
Sean Callananee5dfd42010-02-01 08:49:35 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interface for the Enhanced Disassembly library's
11// disassembler class. The disassembler is responsible for vending individual
12// instructions according to a given architecture and disassembly syntax.
13//
14//===----------------------------------------------------------------------===//
15
Chris Lattner847da552010-07-20 18:25:19 +000016#ifndef LLVM_EDDISASSEMBLER_H
17#define LLVM_EDDISASSEMBLER_H
Sean Callananee5dfd42010-02-01 08:49:35 +000018
Chris Lattnera4f15d62010-07-20 18:59:58 +000019#include "EDInfo.h"
Sean Callananee5dfd42010-02-01 08:49:35 +000020
Sean Callananee5dfd42010-02-01 08:49:35 +000021#include "llvm/ADT/OwningPtr.h"
22#include "llvm/ADT/Triple.h"
23#include "llvm/Support/raw_ostream.h"
Michael J. Spencer1f6efa32010-11-29 18:16:10 +000024#include "llvm/Support/Mutex.h"
Sean Callananee5dfd42010-02-01 08:49:35 +000025
26#include <map>
27#include <set>
Sean Callananee5dfd42010-02-01 08:49:35 +000028#include <vector>
29
30namespace llvm {
31class AsmLexer;
32class AsmToken;
33class MCContext;
34class MCAsmInfo;
35class MCAsmLexer;
36class AsmParser;
37class TargetAsmLexer;
38class TargetAsmParser;
39class MCDisassembler;
40class MCInstPrinter;
41class MCInst;
42class MCParsedAsmOperand;
43class MCStreamer;
Evan Chengebdeeab2011-07-08 01:53:10 +000044class MCSubtargetInfo;
Sean Callananee5dfd42010-02-01 08:49:35 +000045template <typename T> class SmallVectorImpl;
46class SourceMgr;
47class Target;
Daniel Dunbar02612432010-07-19 00:33:43 +000048class TargetMachine;
Sean Callananee5dfd42010-02-01 08:49:35 +000049class TargetRegisterInfo;
Sean Callanan9899f702010-04-13 21:21:57 +000050
51struct EDInstInfo;
Chris Lattner847da552010-07-20 18:25:19 +000052struct EDInst;
53struct EDOperand;
54struct EDToken;
55
56typedef int (*EDByteReaderCallback)(uint8_t *byte, uint64_t address, void *arg);
Sean Callananee5dfd42010-02-01 08:49:35 +000057
58/// EDDisassembler - Encapsulates a disassembler for a single architecture and
59/// disassembly syntax. Also manages the static disassembler registry.
60struct EDDisassembler {
Chris Lattner847da552010-07-20 18:25:19 +000061 typedef enum {
62 /*! @constant kEDAssemblySyntaxX86Intel Intel syntax for i386 and x86_64. */
63 kEDAssemblySyntaxX86Intel = 0,
64 /*! @constant kEDAssemblySyntaxX86ATT AT&T syntax for i386 and x86_64. */
65 kEDAssemblySyntaxX86ATT = 1,
66 kEDAssemblySyntaxARMUAL = 2
67 } AssemblySyntax;
68
69
Sean Callananee5dfd42010-02-01 08:49:35 +000070 ////////////////////
71 // Static members //
72 ////////////////////
73
74 /// CPUKey - Encapsulates the descriptor of an architecture/disassembly-syntax
75 /// pair
76 struct CPUKey {
77 /// The architecture type
78 llvm::Triple::ArchType Arch;
79
80 /// The assembly syntax
Chris Lattner847da552010-07-20 18:25:19 +000081 AssemblySyntax Syntax;
Sean Callananee5dfd42010-02-01 08:49:35 +000082
83 /// operator== - Equality operator
84 bool operator==(const CPUKey &key) const {
85 return (Arch == key.Arch &&
86 Syntax == key.Syntax);
87 }
88
89 /// operator< - Less-than operator
90 bool operator<(const CPUKey &key) const {
Sean Callanan7a387e42011-03-12 03:27:54 +000091 return ((Arch < key.Arch) ||
92 ((Arch == key.Arch) && Syntax < (key.Syntax)));
Sean Callananee5dfd42010-02-01 08:49:35 +000093 }
94 };
95
96 typedef std::map<CPUKey, EDDisassembler*> DisassemblerMap_t;
97
98 /// True if the disassembler registry has been initialized; false if not
99 static bool sInitialized;
100 /// A map from disassembler specifications to disassemblers. Populated
101 /// lazily.
102 static DisassemblerMap_t sDisassemblers;
103
104 /// getDisassembler - Returns the specified disassemble, or NULL on failure
105 ///
106 /// @arg arch - The desired architecture
107 /// @arg syntax - The desired disassembly syntax
108 static EDDisassembler *getDisassembler(llvm::Triple::ArchType arch,
Chris Lattner847da552010-07-20 18:25:19 +0000109 AssemblySyntax syntax);
Sean Callananee5dfd42010-02-01 08:49:35 +0000110
111 /// getDisassembler - Returns the disassembler for a given combination of
112 /// CPU type, CPU subtype, and assembly syntax, or NULL on failure
113 ///
114 /// @arg str - The string representation of the architecture triple, e.g.,
115 /// "x86_64-apple-darwin"
116 /// @arg syntax - The disassembly syntax for the required disassembler
117 static EDDisassembler *getDisassembler(llvm::StringRef str,
Chris Lattner847da552010-07-20 18:25:19 +0000118 AssemblySyntax syntax);
Sean Callananee5dfd42010-02-01 08:49:35 +0000119
120 /// initialize - Initializes the disassembler registry and the LLVM backend
121 static void initialize();
122
123 ////////////////////////
124 // Per-object members //
125 ////////////////////////
126
Sean Callanan8f993b82010-04-08 00:48:21 +0000127 /// True only if the object has been successfully initialized
Sean Callananee5dfd42010-02-01 08:49:35 +0000128 bool Valid;
Sean Callanan8f993b82010-04-08 00:48:21 +0000129 /// True if the disassembler can provide semantic information
130 bool HasSemantics;
Sean Callananee5dfd42010-02-01 08:49:35 +0000131
Sean Callanan8f993b82010-04-08 00:48:21 +0000132 /// The stream to write errors to
133 llvm::raw_ostream &ErrorStream;
Sean Callananee5dfd42010-02-01 08:49:35 +0000134
135 /// The architecture/syntax pair for the current architecture
136 CPUKey Key;
137 /// The LLVM target corresponding to the disassembler
138 const llvm::Target *Tgt;
Chris Lattner847da552010-07-20 18:25:19 +0000139 /// The target machine instance.
Daniel Dunbar02612432010-07-19 00:33:43 +0000140 llvm::OwningPtr<llvm::TargetMachine> TargetMachine;
Sean Callananee5dfd42010-02-01 08:49:35 +0000141 /// The assembly information for the target architecture
142 llvm::OwningPtr<const llvm::MCAsmInfo> AsmInfo;
143 /// The disassembler for the target architecture
144 llvm::OwningPtr<const llvm::MCDisassembler> Disassembler;
145 /// The output string for the instruction printer; must be guarded with
146 /// PrinterMutex
147 llvm::OwningPtr<std::string> InstString;
148 /// The output stream for the disassembler; must be guarded with
149 /// PrinterMutex
150 llvm::OwningPtr<llvm::raw_string_ostream> InstStream;
151 /// The instruction printer for the target architecture; must be guarded with
152 /// PrinterMutex when printing
153 llvm::OwningPtr<llvm::MCInstPrinter> InstPrinter;
154 /// The mutex that guards the instruction printer's printing functions, which
155 /// use a shared stream
156 llvm::sys::Mutex PrinterMutex;
157 /// The array of instruction information provided by the TableGen backend for
158 /// the target architecture
Sean Callanan9899f702010-04-13 21:21:57 +0000159 const llvm::EDInstInfo *InstInfos;
Sean Callananee5dfd42010-02-01 08:49:35 +0000160 /// The target-specific lexer for use in tokenizing strings, in
161 /// target-independent and target-specific portions
162 llvm::OwningPtr<llvm::AsmLexer> GenericAsmLexer;
163 llvm::OwningPtr<llvm::TargetAsmLexer> SpecificAsmLexer;
164 /// The guard for the above
165 llvm::sys::Mutex ParserMutex;
166 /// The LLVM number used for the target disassembly syntax variant
167 int LLVMSyntaxVariant;
168
169 typedef std::vector<std::string> regvec_t;
170 typedef std::map<std::string, unsigned> regrmap_t;
171
172 /// A vector of registers for quick mapping from LLVM register IDs to names
173 regvec_t RegVec;
174 /// A map of registers for quick mapping from register names to LLVM IDs
175 regrmap_t RegRMap;
176
177 /// A set of register IDs for aliases of the stack pointer for the current
178 /// architecture
179 std::set<unsigned> stackPointers;
180 /// A set of register IDs for aliases of the program counter for the current
181 /// architecture
182 std::set<unsigned> programCounters;
183
184 /// Constructor - initializes a disassembler with all the necessary objects,
185 /// which come pre-allocated from the registry accessor function
186 ///
187 /// @arg key - the architecture and disassembly syntax for the
188 /// disassembler
189 EDDisassembler(CPUKey& key);
190
191 /// valid - reports whether there was a failure in the constructor.
192 bool valid() {
193 return Valid;
194 }
195
Sean Callanan8f993b82010-04-08 00:48:21 +0000196 /// hasSemantics - reports whether the disassembler can provide operands and
197 /// tokens.
198 bool hasSemantics() {
199 return HasSemantics;
200 }
201
Sean Callananee5dfd42010-02-01 08:49:35 +0000202 ~EDDisassembler();
203
204 /// createInst - creates and returns an instruction given a callback and
205 /// memory address, or NULL on failure
206 ///
207 /// @arg byteReader - A callback function that provides machine code bytes
208 /// @arg address - The address of the first byte of the instruction,
209 /// suitable for passing to byteReader
210 /// @arg arg - An opaque argument for byteReader
211 EDInst *createInst(EDByteReaderCallback byteReader,
212 uint64_t address,
213 void *arg);
214
215 /// initMaps - initializes regVec and regRMap using the provided register
216 /// info
217 ///
218 /// @arg registerInfo - the register information to use as a source
219 void initMaps(const llvm::TargetRegisterInfo &registerInfo);
220 /// nameWithRegisterID - Returns the name (owned by the EDDisassembler) of a
221 /// register for a given register ID, or NULL on failure
222 ///
223 /// @arg registerID - the ID of the register to be queried
224 const char *nameWithRegisterID(unsigned registerID) const;
225 /// registerIDWithName - Returns the ID of a register for a given register
226 /// name, or (unsigned)-1 on failure
227 ///
228 /// @arg name - The name of the register
229 unsigned registerIDWithName(const char *name) const;
230
231 /// registerIsStackPointer - reports whether a register ID is an alias for the
232 /// stack pointer register
233 ///
234 /// @arg registerID - The LLVM register ID
235 bool registerIsStackPointer(unsigned registerID);
236 /// registerIsStackPointer - reports whether a register ID is an alias for the
237 /// stack pointer register
238 ///
239 /// @arg registerID - The LLVM register ID
240 bool registerIsProgramCounter(unsigned registerID);
241
242 /// printInst - prints an MCInst to a string, returning 0 on success, or -1
243 /// otherwise
244 ///
245 /// @arg str - A reference to a string which is filled in with the string
246 /// representation of the instruction
247 /// @arg inst - A reference to the MCInst to be printed
248 int printInst(std::string& str,
249 llvm::MCInst& inst);
250
251 /// parseInst - extracts operands and tokens from a string for use in
252 /// tokenizing the string. Returns 0 on success, or -1 otherwise.
253 ///
254 /// @arg operands - A reference to a vector that will be filled in with the
255 /// parsed operands
256 /// @arg tokens - A reference to a vector that will be filled in with the
257 /// tokens
258 /// @arg str - The string representation of the instruction
259 int parseInst(llvm::SmallVectorImpl<llvm::MCParsedAsmOperand*> &operands,
260 llvm::SmallVectorImpl<llvm::AsmToken> &tokens,
261 const std::string &str);
262
263 /// llvmSyntaxVariant - returns the LLVM syntax variant for this disassembler
264 int llvmSyntaxVariant() const;
265};
266
Chris Lattner847da552010-07-20 18:25:19 +0000267} // end namespace llvm
268
Sean Callananee5dfd42010-02-01 08:49:35 +0000269#endif