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Steve Blocka7e24c12009-10-30 11:49:00 +00001// Copyright 2009 the V8 project authors. All rights reserved.
2// Redistribution and use in source and binary forms, with or without
3// modification, are permitted provided that the following conditions are
4// met:
5//
6// * Redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer.
8// * Redistributions in binary form must reproduce the above
9// copyright notice, this list of conditions and the following
10// disclaimer in the documentation and/or other materials provided
11// with the distribution.
12// * Neither the name of Google Inc. nor the names of its
13// contributors may be used to endorse or promote products derived
14// from this software without specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
28
29// Declares a Simulator for ARM instructions if we are not generating a native
30// ARM binary. This Simulator allows us to run and debug ARM code generation on
31// regular desktop machines.
32// V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro,
33// which will start execution in the Simulator or forwards to the real entry
34// on a ARM HW platform.
35
36#ifndef V8_ARM_SIMULATOR_ARM_H_
37#define V8_ARM_SIMULATOR_ARM_H_
38
39#include "allocation.h"
40
41#if defined(__arm__)
42
43// When running without a simulator we call the entry directly.
44#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
45 (entry(p0, p1, p2, p3, p4))
46
47// The stack limit beyond which we will throw stack overflow errors in
48// generated code. Because generated code on arm uses the C stack, we
49// just use the C stack limit.
50class SimulatorStack : public v8::internal::AllStatic {
51 public:
52 static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) {
53 return c_limit;
54 }
Steve Blockd0582a62009-12-15 09:54:21 +000055
56 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
57 return try_catch_address;
58 }
59
60 static inline void UnregisterCTryCatch() { }
Steve Blocka7e24c12009-10-30 11:49:00 +000061};
62
63
64// Call the generated regexp code directly. The entry function pointer should
Leon Clarkee46be812010-01-19 14:06:41 +000065// expect eight int/pointer sized arguments and return an int.
Leon Clarked91b9f72010-01-27 17:25:45 +000066#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6) \
67 entry(p0, p1, p2, p3, p4, p5, p6)
Steve Blocka7e24c12009-10-30 11:49:00 +000068
Steve Blockd0582a62009-12-15 09:54:21 +000069#define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
70 reinterpret_cast<TryCatch*>(try_catch_address)
71
72
Steve Blocka7e24c12009-10-30 11:49:00 +000073#else // defined(__arm__)
74
75// When running with the simulator transition into simulated execution at this
76// point.
77#define CALL_GENERATED_CODE(entry, p0, p1, p2, p3, p4) \
78 reinterpret_cast<Object*>( \
79 assembler::arm::Simulator::current()->Call(FUNCTION_ADDR(entry), 5, \
80 p0, p1, p2, p3, p4))
81
Leon Clarked91b9f72010-01-27 17:25:45 +000082#define CALL_GENERATED_REGEXP_CODE(entry, p0, p1, p2, p3, p4, p5, p6) \
Steve Blocka7e24c12009-10-30 11:49:00 +000083 assembler::arm::Simulator::current()->Call( \
Leon Clarked91b9f72010-01-27 17:25:45 +000084 FUNCTION_ADDR(entry), 7, p0, p1, p2, p3, p4, p5, p6)
Steve Blocka7e24c12009-10-30 11:49:00 +000085
Steve Blockd0582a62009-12-15 09:54:21 +000086#define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
87 try_catch_address == NULL ? \
88 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address))
89
90
Steve Blocka7e24c12009-10-30 11:49:00 +000091#include "constants-arm.h"
Steve Block6ded16b2010-05-10 14:33:55 +010092#include "hashmap.h"
Steve Blocka7e24c12009-10-30 11:49:00 +000093
94
95namespace assembler {
96namespace arm {
97
Steve Block6ded16b2010-05-10 14:33:55 +010098class CachePage {
99 public:
100 static const int LINE_VALID = 0;
101 static const int LINE_INVALID = 1;
102
103 static const int kPageShift = 12;
104 static const int kPageSize = 1 << kPageShift;
105 static const int kPageMask = kPageSize - 1;
106 static const int kLineShift = 2; // The cache line is only 4 bytes right now.
107 static const int kLineLength = 1 << kLineShift;
108 static const int kLineMask = kLineLength - 1;
109
110 CachePage() {
111 memset(&validity_map_, LINE_INVALID, sizeof(validity_map_));
112 }
113
114 char* ValidityByte(int offset) {
115 return &validity_map_[offset >> kLineShift];
116 }
117
118 char* CachedData(int offset) {
119 return &data_[offset];
120 }
121
122 private:
123 char data_[kPageSize]; // The cached data.
124 static const int kValidityMapSize = kPageSize >> kLineShift;
125 char validity_map_[kValidityMapSize]; // One byte per line.
126};
127
128
Steve Blocka7e24c12009-10-30 11:49:00 +0000129class Simulator {
130 public:
131 friend class Debugger;
Steve Blocka7e24c12009-10-30 11:49:00 +0000132 enum Register {
133 no_reg = -1,
134 r0 = 0, r1, r2, r3, r4, r5, r6, r7,
135 r8, r9, r10, r11, r12, r13, r14, r15,
136 num_registers,
137 sp = 13,
138 lr = 14,
Steve Blockd0582a62009-12-15 09:54:21 +0000139 pc = 15,
140 s0 = 0, s1, s2, s3, s4, s5, s6, s7,
141 s8, s9, s10, s11, s12, s13, s14, s15,
142 s16, s17, s18, s19, s20, s21, s22, s23,
143 s24, s25, s26, s27, s28, s29, s30, s31,
144 num_s_registers = 32,
145 d0 = 0, d1, d2, d3, d4, d5, d6, d7,
146 d8, d9, d10, d11, d12, d13, d14, d15,
147 num_d_registers = 16
Steve Blocka7e24c12009-10-30 11:49:00 +0000148 };
149
150 Simulator();
151 ~Simulator();
152
153 // The currently executing Simulator instance. Potentially there can be one
154 // for each native thread.
155 static Simulator* current();
156
157 // Accessors for register state. Reading the pc value adheres to the ARM
158 // architecture specification and is off by a 8 from the currently executing
159 // instruction.
160 void set_register(int reg, int32_t value);
161 int32_t get_register(int reg) const;
162
Steve Blockd0582a62009-12-15 09:54:21 +0000163 // Support for VFP.
164 void set_s_register(int reg, unsigned int value);
165 unsigned int get_s_register(int reg) const;
166 void set_d_register_from_double(int dreg, const double& dbl);
167 double get_double_from_d_register(int dreg);
168 void set_s_register_from_float(int sreg, const float dbl);
169 float get_float_from_s_register(int sreg);
170 void set_s_register_from_sinteger(int reg, const int value);
171 int get_sinteger_from_s_register(int reg);
172
Steve Blocka7e24c12009-10-30 11:49:00 +0000173 // Special case of set_register and get_register to access the raw PC value.
174 void set_pc(int32_t value);
175 int32_t get_pc() const;
176
177 // Accessor to the internal simulator stack area.
178 uintptr_t StackLimit() const;
179
180 // Executes ARM instructions until the PC reaches end_sim_pc.
181 void Execute();
182
183 // Call on program start.
184 static void Initialize();
185
186 // V8 generally calls into generated JS code with 5 parameters and into
187 // generated RegExp code with 7 parameters. This is a convenience function,
188 // which sets up the simulator state and grabs the result on return.
189 int32_t Call(byte* entry, int argument_count, ...);
190
Steve Blockd0582a62009-12-15 09:54:21 +0000191 // Push an address onto the JS stack.
192 uintptr_t PushAddress(uintptr_t address);
193
194 // Pop an address from the JS stack.
195 uintptr_t PopAddress();
196
Steve Block6ded16b2010-05-10 14:33:55 +0100197 // ICache checking.
198 static void FlushICache(void* start, size_t size);
199
Steve Blocka7e24c12009-10-30 11:49:00 +0000200 private:
201 enum special_values {
202 // Known bad pc value to ensure that the simulator does not execute
203 // without being properly setup.
204 bad_lr = -1,
205 // A pc value used to signal the simulator to stop execution. Generally
206 // the lr is set to this value on transition from native C code to
207 // simulated execution, so that the simulator can "return" to the native
208 // C code.
209 end_sim_pc = -2
210 };
211
212 // Unsupported instructions use Format to print an error and stop execution.
213 void Format(Instr* instr, const char* format);
214
215 // Checks if the current instruction should be executed based on its
216 // condition bits.
217 bool ConditionallyExecute(Instr* instr);
218
219 // Helper functions to set the conditional flags in the architecture state.
220 void SetNZFlags(int32_t val);
221 void SetCFlag(bool val);
222 void SetVFlag(bool val);
223 bool CarryFrom(int32_t left, int32_t right);
224 bool BorrowFrom(int32_t left, int32_t right);
225 bool OverflowFrom(int32_t alu_out,
226 int32_t left,
227 int32_t right,
228 bool addition);
229
Steve Blockd0582a62009-12-15 09:54:21 +0000230 // Support for VFP.
231 void Compute_FPSCR_Flags(double val1, double val2);
232 void Copy_FPSCR_to_APSR();
233
Steve Blocka7e24c12009-10-30 11:49:00 +0000234 // Helper functions to decode common "addressing" modes
235 int32_t GetShiftRm(Instr* instr, bool* carry_out);
236 int32_t GetImm(Instr* instr, bool* carry_out);
237 void HandleRList(Instr* instr, bool load);
238 void SoftwareInterrupt(Instr* instr);
239
240 // Read and write memory.
241 inline uint8_t ReadBU(int32_t addr);
242 inline int8_t ReadB(int32_t addr);
243 inline void WriteB(int32_t addr, uint8_t value);
244 inline void WriteB(int32_t addr, int8_t value);
245
246 inline uint16_t ReadHU(int32_t addr, Instr* instr);
247 inline int16_t ReadH(int32_t addr, Instr* instr);
248 // Note: Overloaded on the sign of the value.
249 inline void WriteH(int32_t addr, uint16_t value, Instr* instr);
250 inline void WriteH(int32_t addr, int16_t value, Instr* instr);
251
252 inline int ReadW(int32_t addr, Instr* instr);
253 inline void WriteW(int32_t addr, int value, Instr* instr);
254
255 // Executing is handled based on the instruction type.
256 void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one
257 void DecodeType2(Instr* instr);
258 void DecodeType3(Instr* instr);
259 void DecodeType4(Instr* instr);
260 void DecodeType5(Instr* instr);
261 void DecodeType6(Instr* instr);
262 void DecodeType7(Instr* instr);
263 void DecodeUnconditional(Instr* instr);
264
Steve Blockd0582a62009-12-15 09:54:21 +0000265 // Support for VFP.
266 void DecodeTypeVFP(Instr* instr);
267 void DecodeType6CoprocessorIns(Instr* instr);
268
Steve Block6ded16b2010-05-10 14:33:55 +0100269 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instr* instr);
270 void DecodeVCMP(Instr* instr);
271 void DecodeVCVTBetweenDoubleAndSingle(Instr* instr);
272 void DecodeVCVTBetweenFloatingPointAndInteger(Instr* instr);
273
Steve Blocka7e24c12009-10-30 11:49:00 +0000274 // Executes one instruction.
275 void InstructionDecode(Instr* instr);
276
Steve Block6ded16b2010-05-10 14:33:55 +0100277 // ICache.
278 static void CheckICache(Instr* instr);
279 static void FlushOnePage(intptr_t start, int size);
280 static CachePage* GetCachePage(void* page);
281
Steve Blocka7e24c12009-10-30 11:49:00 +0000282 // Runtime call support.
283 static void* RedirectExternalReference(void* external_function,
284 bool fp_return);
285
286 // For use in calls that take two double values, constructed from r0, r1, r2
287 // and r3.
288 void GetFpArgs(double* x, double* y);
289 void SetFpResult(const double& result);
290 void TrashCallerSaveRegisters();
291
Steve Blockd0582a62009-12-15 09:54:21 +0000292 // Architecture state.
Steve Blocka7e24c12009-10-30 11:49:00 +0000293 int32_t registers_[16];
294 bool n_flag_;
295 bool z_flag_;
296 bool c_flag_;
297 bool v_flag_;
298
Steve Blockd0582a62009-12-15 09:54:21 +0000299 // VFP architecture state.
300 unsigned int vfp_register[num_s_registers];
301 bool n_flag_FPSCR_;
302 bool z_flag_FPSCR_;
303 bool c_flag_FPSCR_;
304 bool v_flag_FPSCR_;
305
306 // VFP FP exception flags architecture state.
307 bool inv_op_vfp_flag_;
308 bool div_zero_vfp_flag_;
309 bool overflow_vfp_flag_;
310 bool underflow_vfp_flag_;
311 bool inexact_vfp_flag_;
312
313 // Simulator support.
Steve Blocka7e24c12009-10-30 11:49:00 +0000314 char* stack_;
315 bool pc_modified_;
316 int icount_;
317 static bool initialized_;
318
Steve Block6ded16b2010-05-10 14:33:55 +0100319 // Icache simulation
320 static v8::internal::HashMap* i_cache_;
321
Steve Blockd0582a62009-12-15 09:54:21 +0000322 // Registered breakpoints.
Steve Blocka7e24c12009-10-30 11:49:00 +0000323 Instr* break_pc_;
324 instr_t break_instr_;
325};
326
327} } // namespace assembler::arm
328
329
330// The simulator has its own stack. Thus it has a different stack limit from
331// the C-based native code. Setting the c_limit to indicate a very small
332// stack cause stack overflow errors, since the simulator ignores the input.
333// This is unlikely to be an issue in practice, though it might cause testing
334// trouble down the line.
335class SimulatorStack : public v8::internal::AllStatic {
336 public:
337 static inline uintptr_t JsLimitFromCLimit(uintptr_t c_limit) {
338 return assembler::arm::Simulator::current()->StackLimit();
339 }
Steve Blockd0582a62009-12-15 09:54:21 +0000340
341 static inline uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
342 assembler::arm::Simulator* sim = assembler::arm::Simulator::current();
343 return sim->PushAddress(try_catch_address);
344 }
345
346 static inline void UnregisterCTryCatch() {
347 assembler::arm::Simulator::current()->PopAddress();
348 }
Steve Blocka7e24c12009-10-30 11:49:00 +0000349};
350
351
352#endif // defined(__arm__)
353
354#endif // V8_ARM_SIMULATOR_ARM_H_