blob: 94ed19cf2ca01749488022b47051f1d6174e792f [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmann86eb1c62012-05-30 09:25:51 -070034#include <cutils/log.h>
35#include <hardware/gralloc.h>
36#include <hardware/hardware.h>
37#include <hardware/hwcomposer.h>
38#include <hardware_legacy/uevent.h>
39#include <utils/Vector.h>
40
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070041#include <sync/sync.h>
42
Greg Hackmann86eb1c62012-05-30 09:25:51 -070043#include "ion.h"
44#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070045#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070046#include "exynos_format.h"
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -070047#include "videodev2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070048
Greg Hackmannf6f2e542012-07-16 16:10:27 -070049struct hwc_callback_entry {
50 void (*callback)(void *, private_handle_t *);
51 void *data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052};
53typedef android::Vector<struct hwc_callback_entry> hwc_callback_queue_t;
54
Greg Hackmann31991d52012-07-13 13:23:11 -070055const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070056const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmann31991d52012-07-13 13:23:11 -070057const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann49e51082012-07-31 09:50:38 -070058const size_t NUM_GSC_UNITS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070059const size_t GSC_W_ALIGNMENT = 16;
60const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann49e51082012-07-31 09:50:38 -070061const int CAMERA_GSC_IDX = 2;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070062
Erik Gilling87e707e2012-06-29 17:35:13 -070063struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070064
Greg Hackmann9130e702012-07-30 14:53:04 -070065struct exynos5_gsc_map_t {
66 enum {
67 GSC_NONE = 0,
68 GSC_M2M,
69 // TODO: GSC_LOCAL_PATH
70 } mode;
71 int idx;
72};
73
Greg Hackmann86eb1c62012-05-30 09:25:51 -070074struct exynos5_hwc_post_data_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070075 exynos5_hwc_composer_device_1_t *pdev;
76 int overlay_map[NUM_HW_WINDOWS];
Greg Hackmann9130e702012-07-30 14:53:04 -070077 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
Greg Hackmannf6f2e542012-07-16 16:10:27 -070078 hwc_layer_1_t overlays[NUM_HW_WINDOWS];
79 int num_overlays;
80 size_t fb_window;
81 int fence;
82 pthread_mutex_t completion_lock;
83 pthread_cond_t completion;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070084};
85
Greg Hackmann9130e702012-07-30 14:53:04 -070086const size_t NUM_GSC_DST_BUFS = 2;
87struct exynos5_gsc_data_t {
88 void *gsc;
89 exynos_gsc_img src_cfg;
90 exynos_gsc_img dst_cfg;
91 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
92 size_t current_buf;
93};
94
Erik Gilling87e707e2012-06-29 17:35:13 -070095struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070096 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070097
Greg Hackmannf6f2e542012-07-16 16:10:27 -070098 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -070099 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700100 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700101
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700102 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700103 alloc_device_t *alloc_device;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700104 hwc_procs_t *procs;
105 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700106
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700107 int hdmi_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 bool hdmi_hpd;
109 bool hdmi_mirroring;
110 void *hdmi_gsc;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700111 exynos_gsc_img hdmi_cfg;
Greg Hackmann9130e702012-07-30 14:53:04 -0700112
113 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700114};
115
Greg Hackmann9130e702012-07-30 14:53:04 -0700116static void dump_handle(private_handle_t *h)
117{
118 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u",
119 h->format, h->width, h->height, h->stride);
120}
121
Erik Gilling87e707e2012-06-29 17:35:13 -0700122static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700123{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700124 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
125 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
126 l->compositionType, l->flags, l->handle, l->transform,
127 l->blending,
128 l->sourceCrop.left,
129 l->sourceCrop.top,
130 l->sourceCrop.right,
131 l->sourceCrop.bottom,
132 l->displayFrame.left,
133 l->displayFrame.top,
134 l->displayFrame.right,
135 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700136
Greg Hackmann9130e702012-07-30 14:53:04 -0700137 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
138 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700139}
140
141static void dump_config(s3c_fb_win_config &c)
142{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700143 ALOGV("\tstate = %u", c.state);
144 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
145 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
146 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700147 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700148 c.fd, c.offset, c.stride,
149 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700150 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700151 }
152 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
153 ALOGV("\t\tcolor = %u", c.color);
154 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700155}
156
Greg Hackmann9130e702012-07-30 14:53:04 -0700157static void dump_gsc_img(exynos_gsc_img &c)
158{
159 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
160 c.x, c.y, c.w, c.h, c.fw, c.fh);
161 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
162 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
163}
164
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700165inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
166inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700167template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
168template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
169
170static bool is_transformed(const hwc_layer_1_t &layer)
171{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700172 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700173}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700174
Greg Hackmann9130e702012-07-30 14:53:04 -0700175static bool is_rotated(const hwc_layer_1_t &layer)
176{
177 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
178 (layer.transform & HAL_TRANSFORM_ROT_180);
179}
180
Erik Gilling87e707e2012-06-29 17:35:13 -0700181static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700182{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700183 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
184 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700185}
186
187static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
188{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700189 switch (format) {
190 case HAL_PIXEL_FORMAT_RGBA_8888:
191 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
192 case HAL_PIXEL_FORMAT_RGBX_8888:
193 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
194 case HAL_PIXEL_FORMAT_RGBA_5551:
195 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700196
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700197 default:
198 return S3C_FB_PIXEL_FORMAT_MAX;
199 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700200}
201
202static bool exynos5_format_is_supported(int format)
203{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700204 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700205}
206
207static bool exynos5_format_is_supported_by_gscaler(int format)
208{
Greg Hackmann9130e702012-07-30 14:53:04 -0700209 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700210 case HAL_PIXEL_FORMAT_RGBX_8888:
211 case HAL_PIXEL_FORMAT_RGB_565:
212 case HAL_PIXEL_FORMAT_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700213 case HAL_PIXEL_FORMAT_YCbCr_420_P:
214 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
215 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_SP:
216 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
217 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP:
218 case HAL_PIXEL_FORMAT_YCbCr_422_I:
219 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_I:
220 case HAL_PIXEL_FORMAT_YCbCr_422_P:
221 case HAL_PIXEL_FORMAT_CbYCrY_422_I:
222 case HAL_PIXEL_FORMAT_CUSTOM_CbYCrY_422_I:
223 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
224 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_SP:
225 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
226 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_420_SP:
227 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
228 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP_TILED:
229 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_I:
230 case HAL_PIXEL_FORMAT_CUSTOM_CrYCbY_422_I:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700231 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700232
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700233 default:
234 return false;
235 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700236}
237
Greg Hackmann296668e2012-08-14 15:51:40 -0700238static bool exynos5_format_is_ycrcb(int format)
239{
240 return format == HAL_PIXEL_FORMAT_YV12;
241}
242
Greg Hackmann9130e702012-07-30 14:53:04 -0700243static bool exynos5_format_requires_gscaler(int format)
244{
245 return exynos5_format_is_supported_by_gscaler(format) &&
246 format != HAL_PIXEL_FORMAT_RGBX_8888;
247}
248
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700249static uint8_t exynos5_format_to_bpp(int format)
250{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700251 switch (format) {
252 case HAL_PIXEL_FORMAT_RGBA_8888:
253 case HAL_PIXEL_FORMAT_RGBX_8888:
254 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700255
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700256 case HAL_PIXEL_FORMAT_RGBA_5551:
257 case HAL_PIXEL_FORMAT_RGBA_4444:
258 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700259
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700260 default:
261 ALOGW("unrecognized pixel format %u", format);
262 return 0;
263 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700264}
265
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700266static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
267 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700268{
269 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
270
271 int max_w = is_rotated(layer) ? 2048 : 4800;
272 int max_h = is_rotated(layer) ? 2048 : 3344;
273
274 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
275 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
276 // HAL_TRANSFORM_ROT_180
277
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700278 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
279 int dest_w, dest_h;
280 if (rot90or270) {
281 dest_w = HEIGHT(layer.displayFrame);
282 dest_h = WIDTH(layer.displayFrame);
283 } else {
284 dest_w = WIDTH(layer.displayFrame);
285 dest_h = HEIGHT(layer.displayFrame);
286 }
287 int max_downscale = local_path ? 4 : 16;
288 const int max_upscale = 8;
289
Greg Hackmann9130e702012-07-30 14:53:04 -0700290 return exynos5_format_is_supported_by_gscaler(format) &&
291 handle->stride <= max_w &&
292 handle->stride % GSC_W_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700293 src_w <= dest_w * max_downscale &&
294 dest_w <= src_w * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700295 handle->height <= max_h &&
296 handle->height % GSC_H_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700297 src_h <= dest_h * max_downscale &&
298 dest_h <= src_h * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700299 // per 46.2
300 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
301 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
302 // per 46.3.1.6
303}
304
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700305int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
306{
307 struct v4l2_dv_preset preset;
308 struct v4l2_dv_enum_preset enum_preset;
309 exynos_gsc_img *info = &dev->hdmi_cfg;
310 int index = 0;
311 bool found = false;
312 int ret;
313
314 if (ioctl(dev->hdmi_fd, VIDIOC_G_DV_PRESET, &preset) < 0) {
315 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
316 return -1;
317 }
318
319 while (true) {
320 enum_preset.index = index++;
321 ret = ioctl(dev->hdmi_fd, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
322
323 if (ret < 0) {
324 if (errno == EINVAL)
325 break;
326 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
327 return -1;
328 }
329
330 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
331 __func__, enum_preset.index, enum_preset.preset,
332 enum_preset.width, enum_preset.height, enum_preset.name);
333
334 if (preset.preset == enum_preset.preset) {
335 info->w = enum_preset.width;
336 info->h = enum_preset.height;
337 info->fw = enum_preset.width;
338 info->fh = enum_preset.height;
339 info->format = HAL_PIXEL_FORMAT_YV12;
340 found = true;
341 }
342 }
343
344 return found ? 0 : -1;
345}
346
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700347static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
348{
349 switch (blending) {
350 case HWC_BLENDING_NONE:
351 return S3C_FB_BLENDING_NONE;
352 case HWC_BLENDING_PREMULT:
353 return S3C_FB_BLENDING_PREMULT;
354 case HWC_BLENDING_COVERAGE:
355 return S3C_FB_BLENDING_COVERAGE;
356
357 default:
358 return S3C_FB_BLENDING_MAX;
359 }
360}
361
362static bool exynos5_blending_is_supported(int32_t blending)
363{
364 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
365}
366
Benoit Gobycdd61b32012-07-09 12:09:59 -0700367static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
368{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700369 if (dev->hdmi_mirroring)
370 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700371
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700372 exynos_gsc_img src_info;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700373 int src_w = 2560;
374 int src_h = 1600;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700375
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700376 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
377 if (!dev->hdmi_gsc) {
378 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
379 return -ENODEV;
380 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700381
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700382 memset(&src_info, 0, sizeof(src_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700383
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700384 src_info.w = src_w;
385 src_info.h = src_h;
386 src_info.fw = src_w;
387 src_info.fh = src_h;
388 src_info.format = HAL_PIXEL_FORMAT_BGRA_8888;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700389
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700390 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_info, &dev->hdmi_cfg);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700391 if (ret < 0) {
392 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
393 exynos_gsc_destroy(dev->hdmi_gsc);
394 dev->hdmi_gsc = NULL;
395 return ret;
396 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700397
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700398 dev->hdmi_mirroring = true;
399 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700400}
401
402static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
403{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700404 if (!dev->hdmi_mirroring)
405 return;
406 exynos_gsc_destroy(dev->hdmi_gsc);
407 dev->hdmi_gsc = NULL;
408 dev->hdmi_mirroring = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700409}
410
411static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *fb)
412{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700413 exynos_gsc_img src_info;
414 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700415
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700416 memset(&src_info, 0, sizeof(src_info));
417 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700418
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700419 src_info.yaddr = fb->fd;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700420
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700421 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
422 if (ret < 0) {
423 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
424 return ret;
425 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700426
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700427 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700428}
429
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700430bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
431{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700432 if (layer.flags & HWC_SKIP_LAYER) {
433 ALOGV("\tlayer %u: skipping", i);
434 return false;
435 }
436
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700437 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700438
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700439 if (!handle) {
440 ALOGV("\tlayer %u: handle is NULL", i);
441 return false;
442 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700443 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700444 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700445 ALOGV("\tlayer %u: gscaler required but not supported", i);
446 return false;
447 }
448 } else {
449 if (!exynos5_format_is_supported(handle->format)) {
450 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
451 return false;
452 }
453 if (is_scaled(layer)) {
454 ALOGV("\tlayer %u: scaling not supported", i);
455 return false;
456 }
457 if (is_transformed(layer)) {
458 ALOGV("\tlayer %u: transformations not supported", i);
459 return false;
460 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700461 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700462 if (!exynos5_blending_is_supported(layer.blending)) {
463 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700464 return false;
465 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700466
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700467 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700468}
469
Greg Hackmann31991d52012-07-13 13:23:11 -0700470inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
471{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700472 return !(r1.left > r2.right ||
473 r1.right < r2.left ||
474 r1.top > r2.bottom ||
475 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700476}
477
478inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
479{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700480 hwc_rect i;
481 i.top = max(r1.top, r2.top);
482 i.bottom = min(r1.bottom, r2.bottom);
483 i.left = max(r1.left, r2.left);
484 i.right = min(r1.right, r2.right);
485 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700486}
487
Jesse Halle94046d2012-07-31 14:34:08 -0700488static int exynos5_prepare(hwc_composer_device_1_t *dev,
489 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700490{
Jesse Halle94046d2012-07-31 14:34:08 -0700491 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700492 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700493
Jesse Halle94046d2012-07-31 14:34:08 -0700494 ALOGV("preparing %u layers", displays[0]->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700495
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700496 exynos5_hwc_composer_device_1_t *pdev =
497 (exynos5_hwc_composer_device_1_t *)dev;
498 memset(pdev->bufs.overlays, 0, sizeof(pdev->bufs.overlays));
Greg Hackmann9130e702012-07-30 14:53:04 -0700499 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700500
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700501 bool force_fb = false;
502 if (pdev->hdmi_hpd) {
503 hdmi_enable(pdev);
504 force_fb = true;
505 } else {
506 hdmi_disable(pdev);
507 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700508
Erik Gilling87e707e2012-06-29 17:35:13 -0700509 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
510 pdev->bufs.overlay_map[i] = -1;
511
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700512 bool fb_needed = false;
513 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700514
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700515 // find unsupported overlays
Jesse Halle94046d2012-07-31 14:34:08 -0700516 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
517 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700518
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700519 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
520 ALOGV("\tlayer %u: background supported", i);
Jesse Halle94046d2012-07-31 14:34:08 -0700521 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700522 continue;
523 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700524
Jesse Halle94046d2012-07-31 14:34:08 -0700525 if (exynos5_supports_overlay(displays[0]->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700526 ALOGV("\tlayer %u: overlay supported", i);
527 layer.compositionType = HWC_OVERLAY;
Jesse Halle94046d2012-07-31 14:34:08 -0700528 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700529 continue;
530 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700531
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700532 if (!fb_needed) {
533 first_fb = i;
534 fb_needed = true;
535 }
536 last_fb = i;
537 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700538
Jesse Halle94046d2012-07-31 14:34:08 -0700539 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700540 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700541
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700542 // can't composite overlays sandwiched between framebuffers
543 if (fb_needed)
544 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700545 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700546
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700547 // Incrementally try to add our supported layers to hardware windows.
548 // If adding a layer would violate a hardware constraint, force it
549 // into the framebuffer and try again. (Revisiting the entire list is
550 // necessary because adding a layer to the framebuffer can cause other
551 // windows to retroactively violate constraints.)
552 bool changed;
553 do {
554 android::Vector<hwc_rect> rects;
555 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700556 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700557
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700558 if (fb_needed) {
559 hwc_rect_t fb_rect;
560 fb_rect.top = fb_rect.left = 0;
561 fb_rect.right = pdev->gralloc_module->xres - 1;
562 fb_rect.bottom = pdev->gralloc_module->yres - 1;
563 pixels_left = MAX_PIXELS - pdev->gralloc_module->xres *
564 pdev->gralloc_module->yres;
565 windows_left = NUM_HW_WINDOWS - 1;
566 rects.push_back(fb_rect);
567 }
568 else {
569 pixels_left = MAX_PIXELS;
570 windows_left = NUM_HW_WINDOWS;
571 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700572 if (pdev->hdmi_mirroring)
573 gsc_left--;
574
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700575 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700576
Jesse Halle94046d2012-07-31 14:34:08 -0700577 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
578 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700579 if (layer.flags & HWC_SKIP_LAYER)
580 continue;
581
582 private_handle_t *handle = private_handle_t::dynamicCast(
583 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700584
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700585 // we've already accounted for the framebuffer above
586 if (layer.compositionType == HWC_FRAMEBUFFER)
587 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700588
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700589 // only layer 0 can be HWC_BACKGROUND, so we can
590 // unconditionally allow it without extra checks
591 if (layer.compositionType == HWC_BACKGROUND) {
592 windows_left--;
593 continue;
594 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700595
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700596 size_t pixels_needed = WIDTH(layer.displayFrame) *
597 HEIGHT(layer.displayFrame);
598 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9130e702012-07-30 14:53:04 -0700599 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
600 if (gsc_required)
601 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700602
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700603 // hwc_rect_t right and bottom values are normally exclusive;
604 // the intersection logic is simpler if we make them inclusive
605 hwc_rect_t visible_rect = layer.displayFrame;
606 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700607
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700608 // no more than 2 layers can overlap on a given pixel
609 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
610 if (intersect(visible_rect, overlaps.itemAt(j)))
611 can_compose = false;
612 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700613
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700614 if (!can_compose) {
615 layer.compositionType = HWC_FRAMEBUFFER;
616 if (!fb_needed) {
617 first_fb = last_fb = i;
618 fb_needed = true;
619 }
620 else {
621 first_fb = min(i, first_fb);
622 last_fb = max(i, last_fb);
623 }
624 changed = true;
625 break;
626 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700627
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700628 for (size_t j = 0; j < rects.size(); j++) {
629 const hwc_rect_t &other_rect = rects.itemAt(j);
630 if (intersect(visible_rect, other_rect))
631 overlaps.push_back(intersection(visible_rect, other_rect));
632 }
633 rects.push_back(visible_rect);
634 pixels_left -= pixels_needed;
635 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700636 if (gsc_required)
637 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700638 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700639
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700640 if (changed)
641 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700642 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700643 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700644
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700645 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700646 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700647
Jesse Halle94046d2012-07-31 14:34:08 -0700648 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
649 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700650
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700651 if (fb_needed && i == first_fb) {
652 ALOGV("assigning framebuffer to window %u\n",
653 nextWindow);
654 nextWindow++;
655 continue;
656 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700657
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700658 if (layer.compositionType != HWC_FRAMEBUFFER) {
659 ALOGV("assigning layer %u to window %u", i, nextWindow);
660 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700661 if (layer.compositionType == HWC_OVERLAY) {
662 private_handle_t *handle =
663 private_handle_t::dynamicCast(layer.handle);
664 if (exynos5_format_requires_gscaler(handle->format)) {
665 ALOGV("\tusing gscaler %u", nextGsc);
666 pdev->bufs.gsc_map[i].mode =
667 exynos5_gsc_map_t::GSC_M2M;
668 pdev->bufs.gsc_map[i].idx = nextGsc++;
Greg Hackmann49e51082012-07-31 09:50:38 -0700669 if (nextGsc == CAMERA_GSC_IDX)
670 nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700671 }
672 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700673 nextWindow++;
674 }
675 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700676
Greg Hackmann9130e702012-07-30 14:53:04 -0700677 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
678 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
679 if (pdev->gsc[i].dst_buf[j])
680 pdev->alloc_device->free(pdev->alloc_device,
681 pdev->gsc[i].dst_buf[j]);
682 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
683 }
684
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700685 if (fb_needed)
686 pdev->bufs.fb_window = first_fb;
687 else
688 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700689
Greg Hackmann9130e702012-07-30 14:53:04 -0700690 return 0;
691}
692
693static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
694{
695 return c1.x != c2.x ||
696 c1.y != c2.y ||
697 c1.w != c2.w ||
698 c1.h != c2.h ||
699 c1.format != c2.format ||
700 c1.rot != c2.rot ||
701 c1.cacheable != c2.cacheable ||
702 c1.drmMode != c2.drmMode;
703}
704
705static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
706{
707 return gsc_dst_cfg_changed(c1, c2) ||
708 c1.fw != c2.fw ||
709 c1.fh != c2.fh;
710}
711
712static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
713 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
714 int gsc_idx)
715{
716 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
717
718 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
719 buffer_handle_t dst_buf;
720 private_handle_t *dst_handle;
721 int ret = 0;
722
723 exynos_gsc_img src_cfg, dst_cfg;
724 memset(&src_cfg, 0, sizeof(src_cfg));
725 memset(&dst_cfg, 0, sizeof(dst_cfg));
726
727 src_cfg.x = layer.sourceCrop.left;
728 src_cfg.y = layer.sourceCrop.top;
729 src_cfg.w = WIDTH(layer.sourceCrop);
730 src_cfg.fw = src_handle->stride;
731 src_cfg.h = HEIGHT(layer.sourceCrop);
732 src_cfg.fh = src_handle->height;
733 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700734 if (exynos5_format_is_ycrcb(src_handle->format)) {
735 src_cfg.uaddr = src_handle->fd2;
736 src_cfg.vaddr = src_handle->fd1;
737 } else {
738 src_cfg.uaddr = src_handle->fd1;
739 src_cfg.vaddr = src_handle->fd2;
740 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700741 src_cfg.format = src_handle->format;
742
743 dst_cfg.x = 0;
744 dst_cfg.y = 0;
745 dst_cfg.w = WIDTH(layer.displayFrame);
746 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -0700747 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -0700748 dst_cfg.rot = layer.transform;
749
750 ALOGV("source configuration:");
751 dump_gsc_img(src_cfg);
752
753 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
754 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
755 int dst_stride;
756 int usage = GRALLOC_USAGE_SW_READ_NEVER |
757 GRALLOC_USAGE_SW_WRITE_NEVER |
758 GRALLOC_USAGE_HW_COMPOSER;
759 // TODO: add GRALLOC_USAGE_PROTECTED if source buffer is also protected
760
761 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
762 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
763
764 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
765 if (gsc_data->dst_buf[i]) {
766 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
767 gsc_data->dst_buf[i] = NULL;
768 }
769
770 int ret = alloc_device->alloc(alloc_device, w, h,
771 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
772 &dst_stride);
773 if (ret < 0) {
774 ALOGE("failed to allocate destination buffer: %s",
775 strerror(-ret));
776 goto err_alloc;
777 }
778 }
779
780 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700781 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700782
Greg Hackmann9130e702012-07-30 14:53:04 -0700783 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
784 dst_handle = private_handle_t::dynamicCast(dst_buf);
785
786 dst_cfg.fw = dst_handle->stride;
787 dst_cfg.fh = dst_handle->height;
788 dst_cfg.yaddr = dst_handle->fd;
789
790 ALOGV("destination configuration:");
791 dump_gsc_img(dst_cfg);
792
793 gsc_data->gsc = exynos_gsc_create_exclusive(gsc_idx, GSC_M2M_MODE,
794 GSC_DUMMY);
795 if (!gsc_data->gsc) {
796 ALOGE("failed to create gscaler handle");
797 ret = -1;
798 goto err_alloc;
799 }
800
801 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
802 if (ret < 0) {
803 ALOGE("failed to configure gscaler %u", gsc_idx);
804 goto err_gsc_config;
805 }
806
807 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
808 if (ret < 0) {
809 ALOGE("failed to run gscaler %u", gsc_idx);
810 goto err_gsc_config;
811 }
812
813 gsc_data->src_cfg = src_cfg;
814 gsc_data->dst_cfg = dst_cfg;
815
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700816 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700817
818err_gsc_config:
819 exynos_gsc_destroy(gsc_data->gsc);
820 gsc_data->gsc = NULL;
821err_alloc:
822 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
823 if (gsc_data->dst_buf[i]) {
824 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
825 gsc_data->dst_buf[i] = NULL;
826 }
827 }
828 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700829}
830
831static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700832 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700833 int32_t blending, s3c_fb_win_config &cfg)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700834{
835 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
836 cfg.fd = handle->fd;
837 cfg.x = displayFrame.left;
838 cfg.y = displayFrame.top;
839 cfg.w = WIDTH(displayFrame);
840 cfg.h = HEIGHT(displayFrame);
841 cfg.format = exynos5_format_to_s3c_format(handle->format);
842 uint8_t bpp = exynos5_format_to_bpp(handle->format);
843 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
844 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700845 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700846}
847
Erik Gilling87e707e2012-06-29 17:35:13 -0700848static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700849 const private_module_t *gralloc_module)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700850{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700851 if (layer->compositionType == HWC_BACKGROUND) {
852 hwc_color_t color = layer->backgroundColor;
853 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
854 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
855 cfg.x = 0;
856 cfg.y = 0;
857 cfg.w = gralloc_module->xres;
858 cfg.h = gralloc_module->yres;
859 return;
860 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700861
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700862 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700863 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
864 layer->blending, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700865}
866
867static void exynos5_post_callback(void *data, private_handle_t *fb)
868{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700869 exynos5_hwc_post_data_t *pdata = (exynos5_hwc_post_data_t *)data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700870
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700871 struct s3c_fb_win_config_data win_data;
872 struct s3c_fb_win_config *config = win_data.config;
873 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -0700874
875 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
876 if ( pdata->overlay_map[i] != -1) {
877 hwc_layer_1_t &layer = pdata->overlays[i];
878 private_handle_t *handle =
879 private_handle_t::dynamicCast(layer.handle);
880
881 if (layer.acquireFenceFd != -1) {
882 int err = sync_wait(layer.acquireFenceFd, 100);
883 if (err != 0)
884 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
885 i, strerror(errno));
886 close(layer.acquireFenceFd);
887 }
888
889 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
890 int gsc_idx = pdata->gsc_map[i].idx;
891 exynos5_config_gsc_m2m(layer, pdata->pdev->alloc_device,
892 &pdata->pdev->gsc[gsc_idx], gsc_idx);
893 }
894 }
895 }
896
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700897 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
898 if (i == pdata->fb_window) {
899 hwc_rect_t rect = { 0, 0, fb->width, fb->height };
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700900 int32_t blending = (i == 0) ? HWC_BLENDING_NONE :
901 HWC_BLENDING_PREMULT;
902 exynos5_config_handle(fb, rect, rect, blending, config[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700903 } else if ( pdata->overlay_map[i] != -1) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700904 hwc_layer_1_t &layer = pdata->overlays[i];
905 private_handle_t *handle =
906 private_handle_t::dynamicCast(layer.handle);
907
908 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
909 int gsc_idx = pdata->gsc_map[i].idx;
910 exynos5_gsc_data_t &gsc = pdata->pdev->gsc[gsc_idx];
911
912 if (!gsc.gsc) {
913 ALOGE("failed to queue gscaler %u input for layer %u",
914 gsc_idx, i);
915 continue;
916 }
917
918 int err = exynos_gsc_stop_exclusive(gsc.gsc);
919 exynos_gsc_destroy(gsc.gsc);
920 gsc.gsc = NULL;
921 if (err < 0) {
922 ALOGE("failed to dequeue gscaler output for layer %u", i);
923 continue;
924 }
925
926 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
927 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
928 private_handle_t *dst_handle =
929 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -0700930 hwc_rect_t sourceCrop = { 0, 0,
931 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
932 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700933 layer.displayFrame, layer.blending, config[i]);
Greg Hackmann9130e702012-07-30 14:53:04 -0700934 }
935 else {
936 exynos5_config_overlay(&layer, config[i],
937 pdata->pdev->gralloc_module);
Erik Gilling87e707e2012-06-29 17:35:13 -0700938 }
939 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700940 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
941 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
942 config[i].blending = S3C_FB_BLENDING_NONE;
943 }
944
Greg Hackmann9130e702012-07-30 14:53:04 -0700945 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700946 dump_config(config[i]);
947 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700948
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700949 int ret = ioctl(pdata->pdev->fd, S3CFB_WIN_CONFIG, &win_data);
950 if (ret < 0)
951 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %d", errno);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700952
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700953 if (pdata->pdev->hdmi_mirroring)
954 hdmi_output(pdata->pdev, fb);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700955
Erik Gilling87e707e2012-06-29 17:35:13 -0700956 pthread_mutex_lock(&pdata->completion_lock);
957 pdata->fence = win_data.fence;
958 pthread_cond_signal(&pdata->completion);
959 pthread_mutex_unlock(&pdata->completion_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700960}
961
Jesse Halle94046d2012-07-31 14:34:08 -0700962static int exynos5_set(struct hwc_composer_device_1 *dev,
963 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700964{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700965 exynos5_hwc_composer_device_1_t *pdev =
966 (exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700967
Jesse Halle94046d2012-07-31 14:34:08 -0700968 if (!numDisplays || !displays || !displays[0] || !displays[0]->dpy || !displays[0]->sur)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700969 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700970
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700971 hwc_callback_queue_t *queue = NULL;
972 pthread_mutex_t *lock = NULL;
973 exynos5_hwc_post_data_t *data = NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700974
Jesse Halle94046d2012-07-31 14:34:08 -0700975 if (displays[0]->numHwLayers) {
Erik Gilling87e707e2012-06-29 17:35:13 -0700976 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
977 if (pdev->bufs.overlay_map[i] != -1) {
978 pdev->bufs.overlays[i] =
Jesse Halle94046d2012-07-31 14:34:08 -0700979 displays[0]->hwLayers[pdev->bufs.overlay_map[i]];
Erik Gilling87e707e2012-06-29 17:35:13 -0700980 }
981 }
982
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700983 data = (exynos5_hwc_post_data_t *)
984 malloc(sizeof(exynos5_hwc_post_data_t));
985 memcpy(data, &pdev->bufs, sizeof(pdev->bufs));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700986
Erik Gilling87e707e2012-06-29 17:35:13 -0700987 data->fence = -1;
988 pthread_mutex_init(&data->completion_lock, NULL);
989 pthread_cond_init(&data->completion, NULL);
990
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700991 if (pdev->bufs.fb_window == NO_FB_NEEDED) {
992 exynos5_post_callback(data, NULL);
993 } else {
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700994
Erik Gilling87e707e2012-06-29 17:35:13 -0700995 struct hwc_callback_entry entry;
996 entry.callback = exynos5_post_callback;
997 entry.data = data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700998
Erik Gilling87e707e2012-06-29 17:35:13 -0700999 queue = reinterpret_cast<hwc_callback_queue_t *>(
1000 pdev->gralloc_module->queue);
1001 lock = const_cast<pthread_mutex_t *>(
1002 &pdev->gralloc_module->queue_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001003
Erik Gilling87e707e2012-06-29 17:35:13 -07001004 pthread_mutex_lock(lock);
1005 queue->push_front(entry);
1006 pthread_mutex_unlock(lock);
1007
Jesse Halle94046d2012-07-31 14:34:08 -07001008 EGLBoolean success = eglSwapBuffers((EGLDisplay)displays[0]->dpy,
1009 (EGLSurface)displays[0]->sur);
Erik Gilling87e707e2012-06-29 17:35:13 -07001010 if (!success) {
1011 ALOGE("HWC_EGL_ERROR");
Jesse Halle94046d2012-07-31 14:34:08 -07001012 if (displays[0]) {
Erik Gilling87e707e2012-06-29 17:35:13 -07001013 pthread_mutex_lock(lock);
1014 queue->removeAt(0);
1015 pthread_mutex_unlock(lock);
1016 free(data);
1017 }
1018 return HWC_EGL_ERROR;
1019 }
1020 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001021 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001022
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001023
Erik Gilling87e707e2012-06-29 17:35:13 -07001024 pthread_mutex_lock(&data->completion_lock);
1025 while (data->fence == -1)
1026 pthread_cond_wait(&data->completion, &data->completion_lock);
1027 pthread_mutex_unlock(&data->completion_lock);
1028
1029 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1030 if (pdev->bufs.overlay_map[i] != -1) {
1031 int dup_fd = dup(data->fence);
1032 if (dup_fd < 0)
1033 ALOGW("release fence dup failed: %s", strerror(errno));
Jesse Halle94046d2012-07-31 14:34:08 -07001034 displays[0]->hwLayers[pdev->bufs.overlay_map[i]].releaseFenceFd = dup_fd;
Erik Gilling87e707e2012-06-29 17:35:13 -07001035 }
1036 }
1037 close(data->fence);
1038 free(data);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001039 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001040}
1041
Erik Gilling87e707e2012-06-29 17:35:13 -07001042static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001043 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001044{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001045 struct exynos5_hwc_composer_device_1_t* pdev =
1046 (struct exynos5_hwc_composer_device_1_t*)dev;
1047 pdev->procs = const_cast<hwc_procs_t *>(procs);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001048}
1049
Erik Gilling87e707e2012-06-29 17:35:13 -07001050static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001051{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001052 struct exynos5_hwc_composer_device_1_t *pdev =
1053 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001054
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001055 switch (what) {
1056 case HWC_BACKGROUND_LAYER_SUPPORTED:
1057 // we support the background layer
1058 value[0] = 1;
1059 break;
1060 case HWC_VSYNC_PERIOD:
1061 // vsync period in nanosecond
1062 value[0] = 1000000000.0 / pdev->gralloc_module->fps;
1063 break;
1064 default:
1065 // unsupported query
1066 return -EINVAL;
1067 }
1068 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001069}
1070
Jesse Halle94046d2012-07-31 14:34:08 -07001071static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1072 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001073{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001074 struct exynos5_hwc_composer_device_1_t *pdev =
1075 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001076
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001077 switch (event) {
1078 case HWC_EVENT_VSYNC:
1079 __u32 val = !!enabled;
1080 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1081 if (err < 0) {
1082 ALOGE("vsync ioctl failed");
1083 return -errno;
1084 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001085
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001086 return 0;
1087 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001088
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001089 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001090}
1091
Benoit Gobycdd61b32012-07-09 12:09:59 -07001092static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001093 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001094{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001095 const char *s = buff;
1096 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001097
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001098 while (*s) {
1099 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1100 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001101
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001102 s += strlen(s) + 1;
1103 if (s - buff >= len)
1104 break;
1105 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001106
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001107 if (pdev->hdmi_hpd) {
1108 if (hdmi_get_config(pdev)) {
1109 ALOGE("Error reading HDMI configuration");
1110 pdev->hdmi_hpd = false;
1111 return;
1112 }
1113 }
1114
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001115 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001116 if (pdev->hdmi_hpd)
1117 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_cfg.h, pdev->hdmi_cfg.w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001118
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001119 if (pdev->procs && pdev->procs->invalidate)
1120 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001121}
1122
Greg Hackmann29724852012-07-23 15:31:10 -07001123static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001124{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001125 if (!pdev->procs || !pdev->procs->vsync)
1126 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001127
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001128 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1129 if (err < 0) {
1130 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1131 return;
1132 }
1133
Greg Hackmann29724852012-07-23 15:31:10 -07001134 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001135 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001136 if (err < 0) {
1137 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1138 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001139 }
Greg Hackmann29724852012-07-23 15:31:10 -07001140 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001141
Greg Hackmann29724852012-07-23 15:31:10 -07001142 errno = 0;
1143 uint64_t timestamp = strtoull(buf, NULL, 0);
1144 if (!errno)
1145 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001146}
1147
1148static void *hwc_vsync_thread(void *data)
1149{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001150 struct exynos5_hwc_composer_device_1_t *pdev =
1151 (struct exynos5_hwc_composer_device_1_t *)data;
1152 char uevent_desc[4096];
1153 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001154
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001155 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001156
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001157 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001158
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001159 char temp[4096];
1160 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1161 if (err < 0) {
1162 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1163 return NULL;
1164 }
1165
Greg Hackmann29724852012-07-23 15:31:10 -07001166 struct pollfd fds[2];
1167 fds[0].fd = pdev->vsync_fd;
1168 fds[0].events = POLLPRI;
1169 fds[1].fd = uevent_get_fd();
1170 fds[1].events = POLLIN;
1171
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001172 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001173 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001174
Greg Hackmann29724852012-07-23 15:31:10 -07001175 if (err > 0) {
1176 if (fds[0].revents & POLLPRI) {
1177 handle_vsync_event(pdev);
1178 }
1179 else if (fds[1].revents & POLLIN) {
1180 int len = uevent_next_event(uevent_desc,
1181 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001182
Greg Hackmann29724852012-07-23 15:31:10 -07001183 bool hdmi = !strcmp(uevent_desc,
1184 "change@/devices/virtual/switch/hdmi");
1185 if (hdmi)
1186 handle_hdmi_uevent(pdev, uevent_desc, len);
1187 }
1188 }
1189 else if (err == -1) {
1190 if (errno == EINTR)
1191 break;
1192 ALOGE("error in vsync thread: %s", strerror(errno));
1193 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001194 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001195
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001196 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001197}
1198
Jesse Halle94046d2012-07-31 14:34:08 -07001199static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001200{
1201 struct exynos5_hwc_composer_device_1_t *pdev =
1202 (struct exynos5_hwc_composer_device_1_t *)dev;
1203
1204 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1205 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1206 if (err < 0) {
1207 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1208 return -errno;
1209 }
1210
1211 return 0;
1212}
1213
Erik Gilling87e707e2012-06-29 17:35:13 -07001214struct hwc_methods_1 exynos5_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001215 eventControl: exynos5_eventControl,
Colin Cross00359a82012-07-12 17:54:17 -07001216 blank: exynos5_blank,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001217};
1218
1219static int exynos5_close(hw_device_t* device);
1220
1221static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001222 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001223{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001224 int ret;
1225 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001226
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001227 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1228 return -EINVAL;
1229 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001230
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001231 struct exynos5_hwc_composer_device_1_t *dev;
1232 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1233 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001234
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001235 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1236 (const struct hw_module_t **)&dev->gralloc_module)) {
1237 ALOGE("failed to get gralloc hw module");
1238 ret = -EINVAL;
1239 goto err_get_module;
1240 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001241
Greg Hackmann9130e702012-07-30 14:53:04 -07001242 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1243 &dev->alloc_device)) {
1244 ALOGE("failed to open gralloc");
1245 ret = -EINVAL;
1246 goto err_get_module;
1247 }
1248
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001249 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1250 if (dev->fd < 0) {
1251 ALOGE("failed to open framebuffer");
1252 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001253 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001254 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001255
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001256 dev->hdmi_fd = open("/dev/video16", O_RDWR);
1257 if (dev->hdmi_fd < 0) {
1258 ALOGE("failed to open hdmi device");
1259 ret = dev->hdmi_fd;
1260 goto err_ioctl;
1261 }
1262
Greg Hackmann29724852012-07-23 15:31:10 -07001263 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1264 if (dev->vsync_fd < 0) {
1265 ALOGE("failed to open vsync attribute");
1266 ret = dev->vsync_fd;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001267 goto err_hdmi;
Greg Hackmann29724852012-07-23 15:31:10 -07001268 }
1269
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001270 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1271 if (sw_fd) {
1272 char val;
1273 if (read(sw_fd, &val, 1) == 1 && val == '1')
1274 dev->hdmi_hpd = true;
1275 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001276
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001277 dev->base.common.tag = HARDWARE_DEVICE_TAG;
1278 dev->base.common.version = HWC_DEVICE_API_VERSION_1_0;
1279 dev->base.common.module = const_cast<hw_module_t *>(module);
1280 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001281
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001282 dev->base.prepare = exynos5_prepare;
1283 dev->base.set = exynos5_set;
1284 dev->base.registerProcs = exynos5_registerProcs;
1285 dev->base.query = exynos5_query;
1286 dev->base.methods = &exynos5_methods;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001287
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001288 dev->bufs.pdev = dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001289
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001290 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001291
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001292 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1293 if (ret) {
1294 ALOGE("failed to start vsync thread: %s", strerror(ret));
1295 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001296 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001297 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001298
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001299 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001300
Greg Hackmann29724852012-07-23 15:31:10 -07001301err_vsync:
1302 close(dev->vsync_fd);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001303err_hdmi:
1304 close(dev->hdmi_fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001305err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001306 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001307err_open_fb:
1308 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001309err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001310 free(dev);
1311 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001312}
1313
1314static int exynos5_close(hw_device_t *device)
1315{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001316 struct exynos5_hwc_composer_device_1_t *dev =
1317 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001318 pthread_kill(dev->vsync_thread, SIGTERM);
1319 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001320 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1321 if (dev->gsc[i].gsc)
1322 exynos_gsc_destroy(dev->gsc[i].gsc);
1323 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1324 if (dev->gsc[i].dst_buf[j])
1325 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1326 }
1327 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001328 close(dev->vsync_fd);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001329 close(dev->hdmi_fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001330 close(dev->fd);
1331 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001332}
1333
1334static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001335 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001336};
1337
1338hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001339 common: {
1340 tag: HARDWARE_MODULE_TAG,
1341 module_api_version: HWC_MODULE_API_VERSION_0_1,
1342 hal_api_version: HARDWARE_HAL_API_VERSION,
1343 id: HWC_HARDWARE_MODULE_ID,
1344 name: "Samsung exynos5 hwcomposer module",
1345 author: "Google",
1346 methods: &exynos5_hwc_module_methods,
1347 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001348};