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Channagoud Kadabif8ad8e72015-01-06 15:10:13 -08001/* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
Channagoud Kadabied60a8b2014-06-27 15:35:09 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <platform/irqs.h>
32#include <platform/gpio.h>
33#include <reg.h>
34#include <target.h>
35#include <platform.h>
36#include <dload_util.h>
37#include <uart_dm.h>
38#include <mmc.h>
39#include <spmi.h>
40#include <board.h>
41#include <smem.h>
42#include <baseband.h>
Sridhar Parasuramd75ade52015-03-09 15:45:16 -070043#include <regulator.h>
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070044#include <dev/keys.h>
45#include <pm8x41.h>
46#include <crypto5_wrapper.h>
47#include <clock.h>
48#include <partition_parser.h>
49#include <scm.h>
50#include <platform/clock.h>
51#include <platform/gpio.h>
52#include <platform/timer.h>
53#include <stdlib.h>
54#include <ufs.h>
55#include <boot_device.h>
56#include <qmp_phy.h>
Channagoud Kadabi7d308202014-12-22 12:07:04 -080057#include <sdhci_msm.h>
58#include <qusb2_phy.h>
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -080059#include <rpmb.h>
Sridhar Parasuram9f28f672015-03-17 15:40:47 -070060#include <rpm-glink.h>
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -070061#if ENABLE_WBC
62#include <pm_app_smbchg.h>
63#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070064
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -080065#define CE_INSTANCE 1
66#define CE_EE 1
67#define CE_FIFO_SIZE 64
68#define CE_READ_PIPE 3
69#define CE_WRITE_PIPE 2
70#define CE_READ_PIPE_LOCK_GRP 0
71#define CE_WRITE_PIPE_LOCK_GRP 0
72#define CE_ARRAY_SIZE 20
73
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070074#define PMIC_ARB_CHANNEL_NUM 0
75#define PMIC_ARB_OWNER_ID 0
76
77static void set_sdc_power_ctrl(void);
78static uint32_t mmc_pwrctl_base[] =
79 { MSM_SDC1_BASE, MSM_SDC2_BASE };
80
81static uint32_t mmc_sdhci_base[] =
82 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
83
84static uint32_t mmc_sdc_pwrctl_irq[] =
85 { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
86
87struct mmc_device *dev;
88struct ufs_dev ufs_device;
89
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070090void target_early_init(void)
91{
92#if WITH_DEBUG_UART
Channagoud Kadabi35503c42014-11-14 16:22:43 -080093 uart_dm_init(8, 0, BLSP2_UART1_BASE);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070094#endif
95}
96
97/* Return 1 if vol_up pressed */
Amit Blay6a3e88b2015-06-23 22:25:06 +030098int target_volume_up()
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070099{
100 uint8_t status = 0;
101 struct pm8x41_gpio gpio;
102
103 /* Configure the GPIO */
104 gpio.direction = PM_GPIO_DIR_IN;
105 gpio.function = 0;
106 gpio.pull = PM_GPIO_PULL_UP_30;
107 gpio.vin_sel = 2;
108
109 pm8x41_gpio_config(2, &gpio);
110
111 /* Wait for the pmic gpio config to take effect */
112 thread_sleep(1);
113
114 /* Get status of P_GPIO_5 */
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800115 pm8x41_gpio_get(2, &status);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700116
117 return !status; /* active low */
118}
119
120/* Return 1 if vol_down pressed */
121uint32_t target_volume_down()
122{
123 return pm8x41_resin_status();
124}
125
126static void target_keystatus()
127{
128 keys_init();
129
130 if(target_volume_down())
131 keys_post_event(KEY_VOLUMEDOWN, 1);
132
133 if(target_volume_up())
134 keys_post_event(KEY_VOLUMEUP, 1);
135}
136
137void target_uninit(void)
138{
139 if (platform_boot_dev_isemmc())
140 {
141 mmc_put_card_to_sleep(dev);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700142 }
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800143
144 if (is_sec_app_loaded())
145 {
146 if (unload_sec_app() < 0)
147 {
148 dprintf(CRITICAL, "Failed to unload App for rpmb\n");
149 ASSERT(0);
150 }
151 }
152
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700153#if ENABLE_WBC
Channagoud Kadabi22165612015-07-22 14:04:37 -0700154 if (board_hardware_id() == HW_PLATFORM_MTP)
155 pm_appsbl_set_dcin_suspend(1);
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700156#endif
157
Sridhar Parasuram9f28f672015-03-17 15:40:47 -0700158 /* Tear down glink channels */
159 rpm_glink_uninit();
160
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800161 if (rpmb_uninit() < 0)
162 {
163 dprintf(CRITICAL, "RPMB uninit failed\n");
164 ASSERT(0);
165 }
166
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700167}
168
169static void set_sdc_power_ctrl()
170{
171 /* Drive strength configs for sdc pins */
172 struct tlmm_cfgs sdc1_hdrv_cfg[] =
173 {
174 { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
175 { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
176 { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
177 };
178
179 /* Pull configs for sdc pins */
180 struct tlmm_cfgs sdc1_pull_cfg[] =
181 {
182 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
183 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
184 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
185 };
186
187 struct tlmm_cfgs sdc1_rclk_cfg[] =
188 {
189 { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
190 };
191
192 /* Set the drive strength & pull control values */
193 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
194 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
195 tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg));
196}
197
198void target_sdc_init()
199{
200 struct mmc_config_data config = {0};
201
202 /* Set drive strength & pull ctrl values */
203 set_sdc_power_ctrl();
204
205 config.bus_width = DATA_BUS_WIDTH_8BIT;
206 config.max_clk_rate = MMC_CLK_192MHZ;
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800207 config.hs400_support = 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700208
209 /* Try slot 1*/
210 config.slot = 1;
211 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
212 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
213 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
214
215 if (!(dev = mmc_init(&config)))
216 {
217 /* Try slot 2 */
218 config.slot = 2;
219 config.max_clk_rate = MMC_CLK_200MHZ;
220 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
221 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
222 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
223
224 if (!(dev = mmc_init(&config)))
225 {
226 dprintf(CRITICAL, "mmc init failed!");
227 ASSERT(0);
228 }
229 }
230}
231
232void *target_mmc_device()
233{
234 if (platform_boot_dev_isemmc())
235 return (void *) dev;
236 else
237 return (void *) &ufs_device;
238}
239
240void target_init(void)
241{
242 dprintf(INFO, "target_init()\n");
243
Sridhar Parasuram1d224322015-06-15 11:03:40 -0700244 pmic_info_populate();
245
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700246 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
247
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700248 /* Initialize Glink */
249 rpm_glink_init();
250
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700251 target_keystatus();
252
253 if (target_use_signed_kernel())
254 target_crypto_init_params();
255
256 platform_read_boot_config();
257
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800258#ifdef MMC_SDHCI_SUPPORT
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700259 if (platform_boot_dev_isemmc())
260 {
261 target_sdc_init();
262 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800263#endif
264#ifdef UFS_SUPPORT
265 if (!platform_boot_dev_isemmc())
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700266 {
267 ufs_device.base = UFS_BASE;
268 ufs_init(&ufs_device);
269 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800270#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700271
272 /* Storage initialization is complete, read the partition table info */
Channagoud Kadabi58a273b2015-02-10 12:56:22 -0800273 mmc_read_partition_table(0);
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800274
Channagoud Kadabi1171d8d2015-07-30 19:12:44 -0700275#if ENABLE_WBC
276 /* Look for battery voltage and make sure we have enough to bootup
277 * Otherwise initiate battery charging
278 * Charging should happen as early as possible, any other driver
279 * initialization before this should consider the power impact
280 */
281 if (board_hardware_id() == HW_PLATFORM_MTP)
282 pm_appsbl_chg_check_weak_battery_status(1);
283#endif
284
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800285 if (rpmb_init() < 0)
286 {
287 dprintf(CRITICAL, "RPMB init failed\n");
288 ASSERT(0);
289 }
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700290}
291
292unsigned board_machtype(void)
293{
294 return LINUX_MACHTYPE_UNKNOWN;
295}
296
297/* Detect the target type */
298void target_detect(struct board_data *board)
299{
300 /* This is filled from board.c */
301}
302
Dhaval Patelb95039c2015-03-16 11:14:06 -0700303static uint8_t splash_override;
304/* Returns 1 if target supports continuous splash screen. */
305int target_cont_splash_screen()
306{
307 uint8_t splash_screen = 0;
308 if(!splash_override) {
309 switch(board_hardware_id())
310 {
311 case HW_PLATFORM_SURF:
312 case HW_PLATFORM_MTP:
313 case HW_PLATFORM_FLUID:
314 dprintf(SPEW, "Target_cont_splash=1\n");
315 splash_screen = 1;
316 break;
317 default:
318 dprintf(SPEW, "Target_cont_splash=0\n");
319 splash_screen = 0;
320 }
321 }
322 return splash_screen;
323}
324
325void target_force_cont_splash_disable(uint8_t override)
326{
327 splash_override = override;
328}
329
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700330/* Detect the modem type */
331void target_baseband_detect(struct board_data *board)
332{
333 uint32_t platform;
334
335 platform = board->platform;
336
337 switch(platform) {
Channagoud Kadabi439df822015-05-26 11:14:16 -0700338 case APQ8096:
339 board->baseband = BASEBAND_APQ;
340 break;
Channagoud Kadabi4a4c05e2015-03-30 15:18:58 -0700341 case MSM8996:
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800342 if (board->platform_version == 0x10000)
343 board->baseband = BASEBAND_APQ;
344 else
345 board->baseband = BASEBAND_MSM;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700346 break;
347 default:
348 dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
349 ASSERT(0);
350 };
351}
352unsigned target_baseband()
353{
354 return board_baseband();
355}
356
357void target_serialno(unsigned char *buf)
358{
359 unsigned int serialno;
360 if (target_is_emmc_boot()) {
361 serialno = mmc_get_psn();
362 snprintf((char *)buf, 13, "%x", serialno);
363 }
364}
365
366unsigned check_reboot_mode(void)
367{
368 uint32_t restart_reason = 0;
369 uint32_t restart_reason_addr;
370
371 restart_reason_addr = RESTART_REASON_ADDR;
372
373 /* Read reboot reason and scrub it */
374 restart_reason = readl(restart_reason_addr);
375 writel(0x00, restart_reason_addr);
376
377 return restart_reason;
378}
379
380void reboot_device(unsigned reboot_reason)
381{
382 uint8_t reset_type = 0;
383
384 /* Write the reboot reason */
385 writel(reboot_reason, RESTART_REASON_ADDR);
386
387 if(reboot_reason)
388 reset_type = PON_PSHOLD_WARM_RESET;
389 else
390 reset_type = PON_PSHOLD_HARD_RESET;
391
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700392 pm8994_reset_configure(reset_type);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700393
394 /* Drop PS_HOLD for MSM */
395 writel(0x00, MPM2_MPM_PS_HOLD);
396
397 mdelay(5000);
398
399 dprintf(CRITICAL, "Rebooting failed\n");
400}
401
402int emmc_recovery_init(void)
403{
404 return _emmc_recovery_init();
405}
406
407void target_usb_phy_reset()
408{
409 usb30_qmp_phy_reset();
410 qusb2_phy_reset();
411}
412
413target_usb_iface_t* target_usb30_init()
414{
415 target_usb_iface_t *t_usb_iface;
416
417 t_usb_iface = calloc(1, sizeof(target_usb_iface_t));
418 ASSERT(t_usb_iface);
419
420 t_usb_iface->phy_init = usb30_qmp_phy_init;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700421 t_usb_iface->phy_reset = target_usb_phy_reset;
422 t_usb_iface->clock_init = clock_usb30_init;
423 t_usb_iface->vbus_override = 1;
424
425 return t_usb_iface;
426}
427
428/* identify the usb controller to be used for the target */
429const char * target_usb_controller()
430{
431 return "dwc";
432}
433
434uint32_t target_override_pll()
435{
Channagoud Kadabi1e5144b2015-04-28 17:15:05 -0700436 if (board_soc_version() >= 0x20000)
437 return 0;
438 else
439 return 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700440}
441
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -0800442crypto_engine_type board_ce_type(void)
443{
444 return CRYPTO_ENGINE_TYPE_SW;
445}
446
447/* Set up params for h/w CE. */
448void target_crypto_init_params()
449{
450 struct crypto_init_params ce_params;
451
452 /* Set up base addresses and instance. */
453 ce_params.crypto_instance = CE_INSTANCE;
454 ce_params.crypto_base = MSM_CE_BASE;
455 ce_params.bam_base = MSM_CE_BAM_BASE;
456
457 /* Set up BAM config. */
458 ce_params.bam_ee = CE_EE;
459 ce_params.pipes.read_pipe = CE_READ_PIPE;
460 ce_params.pipes.write_pipe = CE_WRITE_PIPE;
461 ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
462 ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
463
464 /* Assign buffer sizes. */
465 ce_params.num_ce = CE_ARRAY_SIZE;
466 ce_params.read_fifo_size = CE_FIFO_SIZE;
467 ce_params.write_fifo_size = CE_FIFO_SIZE;
468
469 /* BAM is initialized by TZ for this platform.
470 * Do not do it again as the initialization address space
471 * is locked.
472 */
473 ce_params.do_bam_init = 0;
474
475 crypto_init_params(&ce_params);
476}
Channagoud Kadabi083290f2015-03-13 14:18:38 -0700477
478unsigned target_pause_for_battery_charge(void)
479{
480 uint8_t pon_reason = pm8x41_get_pon_reason();
481 uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
482 dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
483 pon_reason, is_cold_boot);
484 /* In case of fastboot reboot,adb reboot or if we see the power key
485 * pressed we do not want go into charger mode.
486 * fastboot reboot is warm boot with PON hard reset bit not set
487 * adb reboot is a cold boot with PON hard reset bit set
488 */
489 if (is_cold_boot &&
490 (!(pon_reason & HARD_RST)) &&
491 (!(pon_reason & KPDPWR_N)) &&
492 ((pon_reason & PON1)))
493 return 1;
494 else
495 return 0;
496}
Channagoud Kadabi23edc0c2015-03-27 18:31:32 -0700497
498int set_download_mode(enum dload_mode mode)
499{
500 int ret = 0;
501 ret = scm_dload_mode(mode);
502
503 return ret;
504}
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700505
506void shutdown_device()
507{
508 dprintf(CRITICAL, "Going down for shutdown.\n");
509
510 /* Configure PMIC for shutdown. */
511 pm8994_reset_configure(PON_PSHOLD_SHUTDOWN);
512
513 /* Drop PS_HOLD for MSM */
514 writel(0x00, MPM2_MPM_PS_HOLD);
515
516 mdelay(5000);
517
518 dprintf(CRITICAL, "Shutdown failed\n");
519
520 ASSERT(0);
521}