blob: 57310a10afbaa6a6ac5ca35530723b1ed51bfc46 [file] [log] [blame]
Shashank Mittal402d0972010-09-29 10:09:52 -07001/*
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -07002 * * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Shashank Mittal402d0972010-09-29 10:09:52 -07003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
13 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
14 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <kernel/thread.h>
32#include <i2c_qup.h>
Wentao Xu8d6150c2011-06-22 11:03:18 -040033#include <platform.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070034#include <platform/iomap.h>
Amol Jadic52c8a32011-07-12 11:27:04 -070035#include <platform/gpio.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070036#include <platform/clock.h>
37#include <platform/pmic.h>
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -070038#include <platform/pmic_pwm.h>
Wentao Xu8d6150c2011-06-22 11:03:18 -040039#include <platform/machtype.h>
40#include <platform/timer.h>
Amol Jadic52c8a32011-07-12 11:27:04 -070041#include <gsbi.h>
Wentao Xu8d6150c2011-06-22 11:03:18 -040042#include <dev/lcdc.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070043
44#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
45
46static struct qup_i2c_dev *dev = NULL;
Greg Griscod2471ef2011-07-14 13:00:42 -070047void gpio_tlmm_config(uint32_t gpio, uint8_t func,
48 uint8_t dir, uint8_t pull,
49 uint8_t drvstr, uint32_t enable);
Shashank Mittal402d0972010-09-29 10:09:52 -070050
51uint8_t expander_read(uint8_t addr)
52{
53 uint8_t ret = 0;
54 /* Create a i2c_msg buffer, that is used to put the controller into read
55 mode and then to read some data. */
56 struct i2c_msg msg_buf[] = {
57 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_WR, 1, &addr},
58 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_RD, 1, &ret}
59 };
60
61 qup_i2c_xfer(dev, msg_buf, 2);
62
63 return ret;
64}
65
66uint8_t expander_write(uint8_t addr, uint8_t val)
67{
68 uint8_t data_buf[] = { addr, val };
69
70 /* Create a i2c_msg buffer, that is used to put the controller into write
71 mode and then to write some data. */
72 struct i2c_msg msg_buf[] = { {CORE_GPIO_EXPANDER_I2C_ADDRESS,
73 I2C_M_WR, 2, data_buf}
74 };
75
76 qup_i2c_xfer(dev, msg_buf, 1);
77
78 /* Double check that the write worked. */
79 if (val != expander_read(addr)) {
80 return -1;
81 }
82
83 return 0;
84}
85
Shashank Mittal402d0972010-09-29 10:09:52 -070086void panel_backlight(int on)
87{
88}
89
90static int display_common_power(int on)
91{
92}
93
94static int lcd_power_on()
95{
96 uint8_t buffer = 0x0, mask = 0x0, prev_val = 0x0;
97 int ret = 0;
98
99 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800100 /* Not updating reference voltage */
Shashank Mittal402d0972010-09-29 10:09:52 -0700101 buffer = (0x80); /* Write mode */
102 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
103 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
104
105 if ((ret = pm8901_test_bank_read(&prev_val,
106 PM8901_LDO_TEST_BANK(2),
107 PM8901_LDO_L2_TEST_BANK))) {
108 return ret;
109 }
110 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
111 prev_val))) {
112 return ret;
113 }
114
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800115 /* Enable LDO L2 at Max Voltage (should be around 3.3v) */
116 buffer = (0x0 << PM8901_LDO_CTL_ENABLE__S);
117 /* Disable Pull Down */
118 buffer |= (0x1 << PM8901_LDO_CTL_PULL_DOWN__S);
119 /* Put LDO into normal mode instead of low power mode */
120 buffer |= (0x0 << PM8901_LDO_CTL_MODE__S);
Wentao Xu8d6150c2011-06-22 11:03:18 -0400121
122 /* Set voltage programming to 3.3V or 2.85V(8660 fluid) */
123 if (board_machtype() == LINUX_MACHTYPE_8660_FLUID)
124 buffer |= (0xB);
125 else
126 buffer |= (0xF);
127
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800128 mask = buffer | LDO_CTL_ENABLE_MASK |
129 LDO_CTL_PULL_DOWN_MASK |
130 LDO_CTL_NORMAL_POWER_MODE_MASK | LDO_CTL_VOLTAGE_SET_MASK;
131
132 /* Do a normal read here, as to not destroy the value in LDO control */
133 if ((ret = pm8901_read(&prev_val, 1, PM8901_LDO_L2))) {
134 return ret;
135 }
Wentao Xu8d6150c2011-06-22 11:03:18 -0400136 /* Configure the LDO2 for 3.3V or 2.85V(8660 fluid) */
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800137 ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2, prev_val);
138
Shashank Mittal402d0972010-09-29 10:09:52 -0700139 /* Configure LDO L2 TEST Bank 4, for High Range Mode */
140 buffer = (0x80); /* Write mode */
141 buffer |= (PM8901_LDO_TEST_BANK(4)); /* Test Bank 4 */
142 buffer |= (0x01); /* Put into High Range Mode */
143 mask = buffer | LDO_TEST_OUTPUT_RANGE_MASK;
144
145 if ((ret = pm8901_test_bank_read(&prev_val,
146 PM8901_LDO_TEST_BANK(4),
147 PM8901_LDO_L2_TEST_BANK))) {
148 return ret;
149 }
150 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
151 prev_val))) {
152 return ret;
153 }
154
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800155 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
Shashank Mittal402d0972010-09-29 10:09:52 -0700156 buffer = (0x80); /* Write mode */
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800157 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
158 buffer |= (1<<1); /* For fine step 50 mV */
159 buffer |= (1<<3); /* to update reference voltage */
160 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
161 mask |= (1<<2); /* Setting mask to make ref voltage as 1.25 V */
Shashank Mittal402d0972010-09-29 10:09:52 -0700162
163 if ((ret = pm8901_test_bank_read(&prev_val,
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800164 PM8901_LDO_TEST_BANK(2),
Shashank Mittal402d0972010-09-29 10:09:52 -0700165 PM8901_LDO_L2_TEST_BANK))) {
166 return ret;
167 }
168 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
169 prev_val))) {
170 return ret;
171 }
172
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800173 /* Enable PMR for LDO L2 */
174 buffer = 0x7F;
175 mask = 0x7F;
176 if ((ret = pm8901_read(&prev_val, 1, PM8901_PMR_7))) {
Shashank Mittal402d0972010-09-29 10:09:52 -0700177 return ret;
178 }
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800179 ret = pm8901_vreg_write(&buffer, mask, PM8901_PMR_7, prev_val);
Shashank Mittal402d0972010-09-29 10:09:52 -0700180 return ret;
181}
182
183/* Configures the GPIO that are needed to enable LCD.
184 * This function also configures the PMIC for PWM control of the LCD backlight.
185 */
186static void lcd_gpio_cfg(uint8_t on)
187{
188 uint32_t func;
189 uint32_t pull;
190 uint32_t dir;
191 uint32_t enable = 0; /* not used in gpio_tlmm_config */
192 uint32_t drv;
193 if (on) {
194 func = 1; /* Configure GPIO for LCDC function */
195 pull = GPIO_NO_PULL;
196 dir = 1; /* doesn't matter since it is not configured as
197 GPIO */
198 drv = GPIO_16MA;
199 } else {
200 /* As discussed in the MSM8660 FFA HW SW Control Doc configure these
201 GPIO as input and pull down. */
202 func = 0; /* GPIO */
203 pull = GPIO_PULL_DOWN;
204 dir = 0; /* Input */
205 drv = 0; /* does not matter configured as input */
206 }
207
208 gpio_tlmm_config(0, func, dir, pull, drv, enable); /* lcdc_pclk */
209 gpio_tlmm_config(1, func, dir, pull, drv, enable); /* lcdc_hsync */
210 gpio_tlmm_config(2, func, dir, pull, drv, enable); /* lcdc_vsync */
211 gpio_tlmm_config(3, func, dir, pull, drv, enable); /* lcdc_den */
212 gpio_tlmm_config(4, func, dir, pull, drv, enable); /* lcdc_red7 */
213 gpio_tlmm_config(5, func, dir, pull, drv, enable); /* lcdc_red6 */
214 gpio_tlmm_config(6, func, dir, pull, drv, enable); /* lcdc_red5 */
215 gpio_tlmm_config(7, func, dir, pull, drv, enable); /* lcdc_red4 */
216 gpio_tlmm_config(8, func, dir, pull, drv, enable); /* lcdc_red3 */
217 gpio_tlmm_config(9, func, dir, pull, drv, enable); /* lcdc_red2 */
218 gpio_tlmm_config(10, func, dir, pull, drv, enable); /* lcdc_red1 */
219 gpio_tlmm_config(11, func, dir, pull, drv, enable); /* lcdc_red0 */
220 gpio_tlmm_config(12, func, dir, pull, drv, enable); /* lcdc_rgn7 */
221 gpio_tlmm_config(13, func, dir, pull, drv, enable); /* lcdc_rgn6 */
222 gpio_tlmm_config(14, func, dir, pull, drv, enable); /* lcdc_rgn5 */
223 gpio_tlmm_config(15, func, dir, pull, drv, enable); /* lcdc_rgn4 */
224 gpio_tlmm_config(16, func, dir, pull, drv, enable); /* lcdc_rgn3 */
225 gpio_tlmm_config(17, func, dir, pull, drv, enable); /* lcdc_rgn2 */
226 gpio_tlmm_config(18, func, dir, pull, drv, enable); /* lcdc_rgn1 */
227 gpio_tlmm_config(19, func, dir, pull, drv, enable); /* lcdc_rgn0 */
228 gpio_tlmm_config(20, func, dir, pull, drv, enable); /* lcdc_blu7 */
229 gpio_tlmm_config(21, func, dir, pull, drv, enable); /* lcdc_blu6 */
230 gpio_tlmm_config(22, func, dir, pull, drv, enable); /* lcdc_blu5 */
231 gpio_tlmm_config(23, func, dir, pull, drv, enable); /* lcdc_blu4 */
232 gpio_tlmm_config(24, func, dir, pull, drv, enable); /* lcdc_blu3 */
233 gpio_tlmm_config(25, func, dir, pull, drv, enable); /* lcdc_blu2 */
234 gpio_tlmm_config(26, func, dir, pull, drv, enable); /* lcdc_blu1 */
235 gpio_tlmm_config(27, func, dir, pull, drv, enable); /* lcdc_blu0 */
236}
237
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700238/* API to set backlight level configuring PWM in PM8058 */
239
240int panel_set_backlight(uint8_t bt_level)
Shashank Mittal402d0972010-09-29 10:09:52 -0700241{
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700242 int rc = -1;
243 uint32_t duty_us, period_us;
Shashank Mittal402d0972010-09-29 10:09:52 -0700244
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700245 if((bt_level <= 0) || (bt_level > 15))
246 {
247 dprintf(CRITICAL, "Error in brightness level (1-15 allowed)\n");
248 goto bail_out;
249 }
250
251 duty_us = bt_level*PWM_DUTY_LEVEL;
252 period_us = PWM_PERIOD_USEC;
253 rc = pm_pwm_config(0, duty_us, period_us);
254 if(rc)
255 {
256 dprintf(CRITICAL, "Error in pwm_config0\n");
257 goto bail_out;
258 }
259
260 duty_us = PWM_PERIOD_USEC - (bt_level*PWM_DUTY_LEVEL);
261 period_us = PWM_PERIOD_USEC;
262 rc = pm_pwm_config(1, duty_us, period_us);
263 if(rc)
264 {
265 dprintf(CRITICAL, "Error in pwm_config1\n");
266 goto bail_out;
267 }
268
269 rc = pm_pwm_enable(0);
270 if(rc)
271 {
272 dprintf(CRITICAL, "Error in pwm_enable0\n");
273 goto bail_out;
274 }
275
276 rc = pm_pwm_enable(1);
277 if(rc)
278 dprintf(CRITICAL, "Error in pwm_enable1\n");
279
280bail_out:
281 return rc;
282}
283
284void bl_gpio_init(void)
285{
286 /* Configure PM8058 GPIO24 as a PWM driver (LPG ch0) for chain 1 of 6 LEDs */
287 pm8058_write_one(0x81, GPIO24_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
Shashank Mittal402d0972010-09-29 10:09:52 -0700288 selection enabled */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700289 pm8058_write_one(0x98, GPIO24_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
Shashank Mittal402d0972010-09-29 10:09:52 -0700290 CMOS, Don't Invert Output */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700291 pm8058_write_one(0xAA, GPIO24_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
292 pm8058_write_one(0xB4, GPIO24_GPIO_CNTRL); /* Write, Bank3, high drv
Shashank Mittal402d0972010-09-29 10:09:52 -0700293 strength */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700294 pm8058_write_one(0xC6, GPIO24_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV1
Shashank Mittal402d0972010-09-29 10:09:52 -0700295 (Spec. Fnc 2) */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700296 pm8058_write_one(0xD8, GPIO24_GPIO_CNTRL); /* Write, Bank5, Interrupt
Shashank Mittal402d0972010-09-29 10:09:52 -0700297 polarity noninversion */
298
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700299 /* Configure PM8058 GPIO25 as a PWM driver (LPG ch1) for chain 2 of 5 LEDs */
300 pm8058_write_one(0x81, GPIO25_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
Shashank Mittal402d0972010-09-29 10:09:52 -0700301 selection enabled */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700302 pm8058_write_one(0x98, GPIO25_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
Shashank Mittal402d0972010-09-29 10:09:52 -0700303 CMOS, Don't Invert Output */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700304 pm8058_write_one(0xAA, GPIO25_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
305 pm8058_write_one(0xB4, GPIO25_GPIO_CNTRL); /* Write, Bank3, high drv
Shashank Mittal402d0972010-09-29 10:09:52 -0700306 strength */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700307 pm8058_write_one(0xC6, GPIO25_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV2
Shashank Mittal402d0972010-09-29 10:09:52 -0700308 (Spec. Fnc 2) */
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700309 pm8058_write_one(0xD8, GPIO25_GPIO_CNTRL); /* Write, Bank5, Interrupt
Shashank Mittal402d0972010-09-29 10:09:52 -0700310 polarity noninversion */
Shashank Mittal402d0972010-09-29 10:09:52 -0700311}
312
313void board_lcd_enable(void)
314{
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700315 int rc = -1;
Amol Jadic52c8a32011-07-12 11:27:04 -0700316 dev = qup_i2c_init(GSBI_ID_8, 100000, 24000000);
Shashank Mittal402d0972010-09-29 10:09:52 -0700317
318 /* Make sure dev is created and initialized properly */
319 if (!dev) {
320 while (1) ;
321 return;
322 }
323
324 /* Store current value of these registers as to not destroy their previous
325 state. */
326 uint8_t open_drain_a = expander_read(GPIO_EXPANDER_REG_OPEN_DRAIN_A);
327 uint8_t dir_b = expander_read(GPIO_EXPANDER_REG_DIR_B);
328 uint8_t dir_a = expander_read(GPIO_EXPANDER_REG_DIR_A);
329 uint8_t data_b = expander_read(GPIO_EXPANDER_REG_DATA_B);
330 uint8_t data_a = expander_read(GPIO_EXPANDER_REG_DATA_A);
331
332 /* Set the LVDS_SHUTDOWN_N to open drain and output low. */
333 dprintf(INFO, "Enable lvds_shutdown_n line for Open Drain.\n");
334 expander_write(GPIO_EXPANDER_REG_OPEN_DRAIN_A, 0x04 | open_drain_a);
335
336 dprintf(INFO, "Enable lvds_shutdown_n line for output.\n");
337 expander_write(GPIO_EXPANDER_REG_DIR_A, ~0x04 & dir_a);
338
339 dprintf(INFO, "Drive the LVDS_SHUTDOWN_N pin high here.\n");
340 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
341
342 /* Turn on the VREG_L2B to 3.3V. */
343
344 /* Power on the appropiate PMIC LDO power rails */
345 if (lcd_power_on())
346 return;
347
348 /* Enable the GPIO as LCDC mode LCD. */
349 lcd_gpio_cfg(1);
350
351 /* Arbitrary delay */
352 udelay(20000);
353
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700354 /* Set the GPIOs needed for backlight */
355 bl_gpio_init();
356 /* Set backlight level with API (to 8 by default) */
357 rc = panel_set_backlight(8);
358 if(rc)
359 dprintf(CRITICAL,"Error in setting panel backlight\n");
Shashank Mittal402d0972010-09-29 10:09:52 -0700360
361 dprintf(INFO, "Enable BACKLIGHT_EN line for output.\n");
362 expander_write(GPIO_EXPANDER_REG_DIR_B, ~0x10 & dir_b);
363
364 dprintf(INFO, "Drive BACKLIGHT_EN to high\n");
365 expander_write(GPIO_EXPANDER_REG_DATA_B, 0x10 | data_b);
366
367}
368
Shashank Mittal402d0972010-09-29 10:09:52 -0700369void lcdc_on(void)
370{
371 board_lcd_enable();
372}
Wentao Xu8d6150c2011-06-22 11:03:18 -0400373
374void auo_board_lcd_enable(void)
375{
376 /* Make sure dev is created and initialized properly */
377 dev = qup_i2c_init(GSBI_ID_8, 100000, 24000000);
378 if (!dev) {
379 dprintf(CRITICAL, "Error in qup_i2c_init\n");
380 while (1) ;
381 }
382
383 /* Setup RESX_N */
384 uint8_t open_drain_a = expander_read(GPIO_EXPANDER_REG_OPEN_DRAIN_A);
385 uint8_t dir_a = expander_read(GPIO_EXPANDER_REG_DIR_A);
386 uint8_t data_a = expander_read(GPIO_EXPANDER_REG_DATA_A);
387
388 expander_write(GPIO_EXPANDER_REG_DIR_A, ~0x04 & dir_a);
389 expander_write(GPIO_EXPANDER_REG_DATA_A, ~0x04 & data_a);
390
391 /* Power on the appropiate PMIC LDO power rails */
392 if (lcd_power_on())
393 return;
394
395 /* Toggle RESX_N */
396 mdelay(20);
397 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
398 mdelay(1);
399 expander_write(GPIO_EXPANDER_REG_DATA_A, ~0x04 & data_a);
400 mdelay(1);
401 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
402 mdelay(25);
403
404 /* Enable the gpios for LCD */
405 lcd_gpio_cfg(1);
406
407 auo_lcdc_init();
408}
409
410void panel_poweron(void)
411{
412 if (board_machtype() == LINUX_MACHTYPE_8660_FLUID)
413 {
414 auo_board_lcd_enable();
415 }
416 else
417 {
418 panel_backlight(1);
419 lcdc_on();
420 }
421}
422
423struct lcdc_timing_parameters *get_lcd_timing(void)
424{
425 if (board_machtype() == LINUX_MACHTYPE_8660_FLUID)
426 return auo_timing_param();
427 else
428 return DEFAULT_LCD_TIMING;
429}