Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 2 | |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation. nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
Channagoud Kadabi | 4517eb1 | 2015-09-02 18:43:13 -0700 | [diff] [blame] | 28 | #include <arch/defines.h> |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 29 | #include <platform/iomap.h> |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 30 | #include <qusb2_phy.h> |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 31 | #include <reg.h> |
| 32 | #include <bits.h> |
| 33 | #include <debug.h> |
Veera Sundaram Sankaran | 0018151 | 2014-12-09 11:23:39 -0800 | [diff] [blame] | 34 | #include <qtimer.h> |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 35 | |
Channagoud Kadabi | 12b9693 | 2014-09-23 15:18:11 -0700 | [diff] [blame] | 36 | __WEAK int platform_is_msm8994() |
| 37 | { |
| 38 | return 0; |
| 39 | } |
| 40 | |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 41 | __WEAK int platform_is_msm8996() |
| 42 | { |
| 43 | return 0; |
| 44 | } |
| 45 | |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 46 | void qusb2_phy_reset(void) |
| 47 | { |
| 48 | uint32_t val; |
Channagoud Kadabi | d1e2cc2 | 2015-08-13 12:48:37 -0700 | [diff] [blame] | 49 | /* Default tune value */ |
| 50 | uint8_t tune2 = 0xB3; |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 51 | |
Channagoud Kadabi | b2ae951 | 2015-09-24 15:17:53 -0700 | [diff] [blame] | 52 | /* Disable the ref clock before phy reset */ |
| 53 | #if GCC_RX2_USB2_CLKREF_EN |
| 54 | writel((readl(GCC_RX2_USB2_CLKREF_EN) & ~0x1), GCC_RX2_USB2_CLKREF_EN); |
| 55 | dmb(); |
| 56 | #endif |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 57 | /* Block Reset */ |
| 58 | val = readl(GCC_QUSB2_PHY_BCR) | BIT(0); |
| 59 | writel(val, GCC_QUSB2_PHY_BCR); |
| 60 | udelay(10); |
| 61 | writel(val & ~BIT(0), GCC_QUSB2_PHY_BCR); |
| 62 | |
Channagoud Kadabi | 4517eb1 | 2015-09-02 18:43:13 -0700 | [diff] [blame] | 63 | /* configure the abh2 phy to wait state */ |
| 64 | writel(0x11, PERIPH_SS_AHB2PHY_TOP_CFG); |
| 65 | dmb(); |
| 66 | |
Tanya Finkel | e7aa427 | 2014-08-08 23:41:34 +0300 | [diff] [blame] | 67 | /* set CLAMP_N_EN and stay with disabled USB PHY */ |
| 68 | writel(0x23, QUSB2PHY_PORT_POWERDOWN); |
| 69 | |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 70 | if (platform_is_msm8996()) |
| 71 | { |
| 72 | writel(0xF8, QUSB2PHY_PORT_TUNE1); |
Channagoud Kadabi | d1e2cc2 | 2015-08-13 12:48:37 -0700 | [diff] [blame] | 73 | /* Upper nibble of tune2 register should be updated based on the fuse value. |
| 74 | * Read the bits 21..24 from fuse and update the upper nibble with this value |
| 75 | */ |
| 76 | #if QFPROM_CORR_CALIB_ROW12_MSB |
| 77 | uint8_t fuse_val = (readl(QFPROM_CORR_CALIB_ROW12_MSB) & 0x1E00000) >> 21; |
| 78 | /* If fuse value is non zero then update the upper nibble with the fuse value |
| 79 | * otherwise use the default value |
| 80 | */ |
| 81 | if (fuse_val) |
| 82 | tune2 = (tune2 & 0x0f) | (fuse_val << 4); |
| 83 | #endif |
| 84 | writel(tune2, QUSB2PHY_PORT_TUNE2); |
Channagoud Kadabi | f0d9ef0 | 2015-09-24 14:52:02 -0700 | [diff] [blame] | 85 | writel(0x83, QUSB2PHY_PORT_TUNE3); |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 86 | writel(0xC0, QUSB2PHY_PORT_TUNE4); |
| 87 | writel(0x30, QUSB2PHY_PLL_TUNE); |
| 88 | writel(0x79, QUSB2PHY_PLL_USER_CTL1); |
| 89 | writel(0x21, QUSB2PHY_PLL_USER_CTL2); |
| 90 | writel(0x14, QUSB2PHY_PORT_TEST2); |
Channagoud Kadabi | f0d9ef0 | 2015-09-24 14:52:02 -0700 | [diff] [blame] | 91 | writel(0x80, QUSB2PHY_PLL_TEST); |
| 92 | writel(0x9F, QUSB2PHY_PLL_AUTOPGM_CTL1); |
| 93 | writel(0x00, QUSB2PHY_PLL_PWR_CTL); |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 94 | } |
| 95 | else |
| 96 | { |
| 97 | /* Set HS impedance to 42ohms */ |
| 98 | writel(0xA0, QUSB2PHY_PORT_TUNE1); |
Tanya Finkel | e7aa427 | 2014-08-08 23:41:34 +0300 | [diff] [blame] | 99 | |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 100 | /* Set TX current to 19mA, TX SR and TX bias current to 1, 1 */ |
| 101 | writel(0xA5, QUSB2PHY_PORT_TUNE2); |
Tanya Finkel | e7aa427 | 2014-08-08 23:41:34 +0300 | [diff] [blame] | 102 | |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 103 | /* Increase autocalibration bias circuit settling time |
| 104 | * and enable utocalibration */ |
| 105 | writel(0x81, QUSB2PHY_PORT_TUNE3); |
Tanya Finkel | e7aa427 | 2014-08-08 23:41:34 +0300 | [diff] [blame] | 106 | |
Channagoud Kadabi | 7164ddf | 2015-04-09 16:27:36 -0700 | [diff] [blame] | 107 | writel(0x85, QUSB2PHY_PORT_TUNE4); |
| 108 | } |
| 109 | |
Tanya Finkel | e7aa427 | 2014-08-08 23:41:34 +0300 | [diff] [blame] | 110 | /* Wait for tuning params to take effect right before re-enabling power*/ |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 111 | udelay(10); |
| 112 | |
Tanya Finkel | e7aa427 | 2014-08-08 23:41:34 +0300 | [diff] [blame] | 113 | /* Disable the PHY */ |
| 114 | writel(0x23, QUSB2PHY_PORT_POWERDOWN); |
| 115 | /* Enable ULPI mode */ |
Channagoud Kadabi | 12b9693 | 2014-09-23 15:18:11 -0700 | [diff] [blame] | 116 | if (platform_is_msm8994()) |
| 117 | writel(0x0, QUSB2PHY_PORT_UTMI_CTRL2); |
Tanya Finkel | e7aa427 | 2014-08-08 23:41:34 +0300 | [diff] [blame] | 118 | /* Enable PHY */ |
| 119 | /* set CLAMP_N_EN and USB PHY is enabled*/ |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 120 | writel(0x22, QUSB2PHY_PORT_POWERDOWN); |
Channagoud Kadabi | b2ae951 | 2015-09-24 15:17:53 -0700 | [diff] [blame] | 121 | udelay(150); |
| 122 | |
| 123 | /* Check PLL status */ |
| 124 | if (!(readl(QUSB2PHY_PLL_STATUS) & QUSB2PHY_PLL_LOCK)) |
| 125 | { |
| 126 | dprintf(CRITICAL, "QUSB2PHY failed to lock: %d", readl(QUSB2PHY_PLL_STATUS)); |
| 127 | } |
| 128 | |
| 129 | #if GCC_RX2_USB2_CLKREF_EN |
| 130 | writel((readl(GCC_RX2_USB2_CLKREF_EN) | 0x1), GCC_RX2_USB2_CLKREF_EN); |
| 131 | dmb(); |
| 132 | #endif |
Joonwoo Park | 8ef6919 | 2014-06-09 16:54:15 -0700 | [diff] [blame] | 133 | } |