blob: 8d607d9207a8345db6bae82a0bd50c060d1dcfe8 [file] [log] [blame]
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
39
40extern void clock_init_mmc(uint32_t);
41extern void clock_config_mmc(uint32_t, uint32_t);
42
43/* data access time unit in ns */
44static const uint32_t taac_unit[] =
45{
46 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
47};
48
49/* data access time value x 10 */
50static const uint32_t taac_value[] =
51{
52 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
53};
54
55/* data transfer rate in kbit/s */
56static const uint32_t xfer_rate_unit[] =
57{
58 100, 1000, 10000, 100000, 0, 0, 0, 0
59};
60
61/* data transfer rate value x 10*/
62static const uint32_t xfer_rate_value[] =
63{
64 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
65};
66
67/*
68 * Function: mmc decode and save csd
69 * Arg : Card structure & raw csd
70 * Return : 0 on Success, 1 on Failure
71 * Flow : Decodes CSD response received from the card.
72 * Note that we have defined only few of the CSD elements
73 * in csd structure. We'll only decode those values.
74 */
75static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
76{
77 uint32_t mmc_sizeof = 0;
78 uint32_t mmc_unit = 0;
79 uint32_t mmc_value = 0;
80 uint32_t mmc_temp = 0;
81 uint32_t *raw_csd = card->raw_csd;
82
83 struct mmc_csd mmc_csd;
84
85 mmc_sizeof = sizeof(uint32_t) * 8;
86
87 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
88
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070089 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070090 /* Parse CSD according to SD card spec. */
91
92 /* CSD register is little bit differnet for CSD version 2.0 High
93 * Capacity and CSD version 1.0/2.0 Standard memory cards.
94 * In Version 2.0 some of the fields have fixed values and it's
95 * not necessary for host to refer these fields in CSD sent by
96 * card
97 */
98
99 if (mmc_csd.cmmc_structure == 1) {
100 /* CSD Version 2.0 */
101 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
102 /* Fixed value is 9 = 2^9 = 512 */
103 mmc_csd.write_blk_len = 512;
104 /* Fixed value is 9 = 512 */
105 mmc_csd.read_blk_len = 512;
106 /* Fixed value: 010b */
107 mmc_csd.r2w_factor = 0x2;
108 /* Not there in version 2.0 */
109 mmc_csd.c_size_mult = 0;
110 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
111 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
112 * 100;
113
114 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
115 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
116 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
117 / 10;
118
119 mmc_csd.erase_blk_len = 1;
120 mmc_csd.read_blk_misalign = 0;
121 mmc_csd.write_blk_misalign = 0;
122 mmc_csd.read_blk_partial = 0;
123 mmc_csd.write_blk_partial = 0;
124
125 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
126 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
127 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
128 xfer_rate_unit[mmc_unit]) / 10;
129
130 mmc_csd.wp_grp_size = 0x0;
131 mmc_csd.wp_grp_enable = 0x0;
132 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
133 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
134
135 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700136 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700137 } else {
138 /* CSD Version 1.0 */
139 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
140
141 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
142 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
143 (1 << mmc_temp) : 512;
144
145 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
146 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
147 (1 << mmc_temp) : 512;
148
149 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
150 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
151 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
152 / 10;
153
154 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
155 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
156 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
157 xfer_rate_unit[mmc_unit]) / 10;
158
159 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
160 * 100;
161
162 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
163 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
164
165 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
166 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
167 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
168 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
169 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
170
171 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
172 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
173 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
174 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
175 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
176 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
177
178 /* Calculate the card capacity */
179 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700180 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700181 }
182 } else {
183 /* Parse CSD according to MMC card spec. */
184 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
185 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
186 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
187 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
188 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
189 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
190 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
191 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
192
193 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
194 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
195 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
196
197 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
198 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
199 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
200 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
201
202 /* Ignore -- no use of this value. */
203 mmc_csd.tran_speed = 0x00;
204
205 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
206 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
207 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
208 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
209 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
210 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
211
212 /* Calculate the card capcity */
213 if (mmc_csd.c_size != 0xFFF) {
214 /* For cards less than or equal to 2GB */
215 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700216 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700217 } else {
218 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
219 * is used to calculate the size.
220 */
221 uint64_t sec_count;
222
223 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
224 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
226 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700227 card->capacity = sec_count * MMC_BLK_SZ;
228 }
229 }
230
231 /* save the information in card structure */
232 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
233 sizeof(struct mmc_csd));
234
vijay kumar697dbfd2014-04-24 17:12:49 +0530235 /* Calculate the wp grp size */
236 if (card->ext_csd[MMC_ERASE_GRP_DEF])
237 card->wp_grp_size = MMC_HC_ERASE_MULT * card->ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
238 else
239 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
240 * (card->csd.erase_grp_mult + 1);
241
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700242 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700243 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700244 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700245 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
246 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
247 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
248 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
249 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
250 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
251 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
252 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
253 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
254 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
255 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
256 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
257 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
258 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
vijay kumar697dbfd2014-04-24 17:12:49 +0530259 dprintf(SPEW, "wp_grp_size: %u\n", card->wp_grp_size);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700260 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
261
262 return 0;
263}
264
265/*
266 * Function: mmc decode & save cid
267 * Arg : card structure & raw cid
268 * Return : 0 on Success, 1 on Failure
269 * Flow : Decode CID sent by the card.
270 */
271static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
272 uint32_t *raw_cid)
273{
274 struct mmc_cid mmc_cid;
275 uint32_t mmc_sizeof = 0;
276 int i = 0;
277
278 if (!raw_cid) {
279 return 1;
280 }
281
282 mmc_sizeof = sizeof(uint32_t) * 8;
283
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700284 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700285 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
286 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
287
288 for (i = 0; i < 5; i++) {
289 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
290 (104 - 8 * (i + 1)),
291 8,
292 mmc_sizeof);
293 }
294 mmc_cid.pnm[5] = 0;
295 mmc_cid.pnm[6] = 0;
296
297 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700298 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700299 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
300 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
301 mmc_cid.year += 2000;
302 } else {
303 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
304 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
305
306 for (i = 0; i < 6; i++) {
307 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
308 8, mmc_sizeof);
309 }
310 mmc_cid.pnm[6] = 0;
311
312 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700313 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700314 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
315 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
316 mmc_cid.year += 1997;
317 }
318
319 /* save it in card database */
320 memcpy((struct mmc_cid *)&card->cid,
321 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
322
323 dprintf(SPEW, "Decoded CID fields:\n");
324 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
325 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
326 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
327 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
328 (mmc_cid.prv & 0xF));
329 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
330 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
331
332 return 0;
333}
334
335/*
336 * Function: mmc reset cards
337 * Arg : host structure
338 * Return : 0 on Success, 1 on Failure
339 * Flow : Reset all the cards to idle condition (CMD 0)
340 */
341static uint8_t mmc_reset_card(struct sdhci_host *host)
342{
343 struct mmc_command cmd;
344
345 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
346
347 cmd.cmd_index = CMD0_GO_IDLE_STATE;
348 cmd.argument = 0;
349 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
350 cmd.resp_type = SDHCI_CMD_RESP_NONE;
351
352 /* send command */
353 return sdhci_send_command(host, &cmd);
354}
355
356/*
357 * Function: mmc operations command
358 * Arg : host & card structure
359 * Return : 0 on Success, 1 on Failure
360 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
361 */
362static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
363{
364 struct mmc_command cmd;
365 uint32_t mmc_resp = 0;
366 uint32_t mmc_ret = 0;
367 uint32_t mmc_retry = 0;
368
369 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
370
371 /* CMD1 format:
372 * [31] Busy bit
373 * [30:29] Access mode
374 * [28:24] reserved
375 * [23:15] 2.7-3.6
376 * [14:8] 2.0-2.6
377 * [7] 1.7-1.95
378 * [6:0] reserved
379 */
380
381 cmd.cmd_index = CMD1_SEND_OP_COND;
382 cmd.argument = card->ocr;
383 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
384 cmd.resp_type = SDHCI_CMD_RESP_R3;
385
386 do {
387 mmc_ret = sdhci_send_command(host, &cmd);
388 if (mmc_ret)
389 return mmc_ret;
390
391 /* Command returned success, now it's time to examine response */
392 mmc_resp = cmd.resp[0];
393
394 /* Check the response for busy status */
395 if (!(mmc_resp & MMC_OCR_BUSY)) {
396 mmc_retry++;
397 mdelay(1);
398 continue;
399 } else
400 break;
401 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
402
403 /* If we reached here after max retries, we failed to get OCR */
404 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
405 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
406 return 1;
407 }
408
409 /* Response contains card's ocr. Update card's information */
410 card->ocr = mmc_resp;
411
412 if (mmc_resp & MMC_OCR_SEC_MODE)
413 card->type = MMC_TYPE_MMCHC;
414 else
415 card->type = MMC_TYPE_STD_MMC;
416
417 return 0;
418}
419
420/*
421 * Function: mmc send cid
422 * Arg : host & card structure
423 * Return : 0 on Success, 1 on Failure
424 * Flow : Request any card to send its uniquie card identification
425 * (CID) number (CMD2).
426 */
427static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
428{
429 struct mmc_command cmd;
430 uint32_t mmc_ret = 0;
431
432 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
433
434 /* CMD2 Format:
435 * [31:0] stuff bits
436 */
437 cmd.cmd_index = CMD2_ALL_SEND_CID;
438 cmd.argument = 0;
439 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
440 cmd.resp_type = SDHCI_CMD_RESP_R2;
441
442 /* send command */
443 mmc_ret = sdhci_send_command(host, &cmd);
444 if (mmc_ret) {
445 return mmc_ret;
446 }
447
448 /* Response contains card's 128 bits CID register */
449 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
450 if (mmc_ret) {
451 return mmc_ret;
452 }
453
454 return 0;
455}
456
457/*
458 * Function: mmc send relative address
459 * Arg : host & card structure
460 * Return : 0 on Success, 1 on Failure
461 * Flow : Ask card to send it's relative card address (RCA).
462 * This RCA number is shorter than CID and is used by
463 * the host to address the card in future (CMD3)
464 */
465static uint32_t mmc_send_relative_address(struct sdhci_host *host,
466 struct mmc_card *card)
467{
468 struct mmc_command cmd;
469 uint32_t mmc_ret = 0;
470
471 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
472
473 /* CMD3 Format:
474 * [31:0] stuff bits
475 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700476 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700477 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
478 cmd.argument = 0;
479 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
480 cmd.resp_type = SDHCI_CMD_RESP_R6;
481
482 /* send command */
483 mmc_ret = sdhci_send_command(host, &cmd);
484 if (mmc_ret)
485 return mmc_ret;
486
487 /* For sD, card will send RCA. Store it */
488 card->rca = (cmd.resp[0] >> 16);
489 } else {
490 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
491 cmd.argument = (MMC_RCA << 16);
492 card->rca = (cmd.argument >> 16);
493 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
494 cmd.resp_type = SDHCI_CMD_RESP_R6;
495
496 /* send command */
497 mmc_ret = sdhci_send_command(host, &cmd);
498 if (mmc_ret)
499 return mmc_ret;
500 }
501
502 return 0;
503}
504
505/*
506 * Function: mmc send csd
507 * Arg : host, card structure & o/p arg to store csd
508 * Return : 0 on Success, 1 on Failure
509 * Flow : Requests card to send it's CSD register's contents. (CMD9)
510 */
511static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
512{
513 struct mmc_command cmd;
514 uint32_t mmc_arg = 0;
515 uint32_t mmc_ret = 0;
516
517 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
518
519 /* CMD9 Format:
520 * [31:16] RCA
521 * [15:0] stuff bits
522 */
523 mmc_arg |= card->rca << 16;
524
525 cmd.cmd_index = CMD9_SEND_CSD;
526 cmd.argument = mmc_arg;
527 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
528 cmd.resp_type = SDHCI_CMD_RESP_R2;
529
530 /* send command */
531 mmc_ret = sdhci_send_command(host, &cmd);
532 if (mmc_ret)
533 return mmc_ret;
534
535 /* response contains the card csd */
536 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
537
538 return 0;
539}
540
541/*
542 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700543 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700544 * Return : 0 on Success, 1 on Failure
545 * Flow : Selects a card by sending CMD7 to the card with its RCA.
546 * If RCA field is set as 0 ( or any other address ),
547 * the card will be de-selected. (CMD7)
548 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700549static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700550{
551 struct mmc_command cmd;
552 uint32_t mmc_arg = 0;
553 uint32_t mmc_ret = 0;
554
555 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
556
557 /* CMD7 Format:
558 * [31:16] RCA
559 * [15:0] stuff bits
560 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700561 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700562
563 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
564 cmd.argument = mmc_arg;
565 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
566
567 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700568 if (card->rca) {
569 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700570 cmd.resp_type = SDHCI_CMD_RESP_R1B;
571 else
572 cmd.resp_type = SDHCI_CMD_RESP_R1;
573 } else
574 cmd.resp_type = SDHCI_CMD_RESP_NONE;
575
576 /* send command */
577 mmc_ret = sdhci_send_command(host, &cmd);
578 if (mmc_ret)
579 return mmc_ret;
580
581 return 0;
582}
583
584/*
585 * Function: mmc set block len
586 * Arg : host, card structure & block length
587 * Return : 0 on Success, 1 on Failure
588 * Flow : Send command to set block length.
589 */
590static uint32_t mmc_set_block_len(struct sdhci_host *host,
591 struct mmc_card *card,
592 uint32_t block_len)
593{
594 struct mmc_command cmd;
595 uint32_t mmc_ret = 0;
596
597 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
598
599 /* CMD16 Format:
600 * [31:0] block length
601 */
602
603 cmd.cmd_index = CMD16_SET_BLOCKLEN;
604 cmd.argument = block_len;
605 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
606 cmd.resp_type = SDHCI_CMD_RESP_R1;
607
608 /* send command */
609 mmc_ret = sdhci_send_command(host, &cmd);
610 if (mmc_ret)
611 return mmc_ret;
612
613 /*
614 * If blocklength is larger than 512 bytes,
615 * the card sets BLOCK_LEN_ERROR bit.
616 */
617 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
618 dprintf(CRITICAL, "The block length is not supported by the card\n");
619 return 1;
620 }
621
622 return 0;
623}
624
625/*
626 * Function: mmc get card status
627 * Arg : host, card structure & o/p argument card status
628 * Return : 0 on Success, 1 on Failure
629 * Flow : Get the current status of the card
630 */
631static uint32_t mmc_get_card_status(struct sdhci_host *host,
632 struct mmc_card *card, uint32_t *status)
633{
634 struct mmc_command cmd;
635 uint32_t mmc_ret = 0;
636
637 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
638
639 /* CMD13 Format:
640 * [31:16] RCA
641 * [15:0] stuff bits
642 */
643 cmd.cmd_index = CMD13_SEND_STATUS;
644 cmd.argument = card->rca << 16;
645 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
646 cmd.resp_type = SDHCI_CMD_RESP_R1;
647
648 /* send command */
649 mmc_ret = sdhci_send_command(host, &cmd);
650 if (mmc_ret)
651 return mmc_ret;
652
653 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
654 if ((cmd.resp[0] >> 31) & 0x01)
655 return 1;
656
657 *status = cmd.resp[0];
658 return 0;
659}
660
661/*
662 * Function: mmc get ext csd
663 * Arg : host, card structure & array to hold ext attributes
664 * Return : 0 on Success, 1 on Failure
665 * Flow : Send ext csd command & get the card attributes
666 */
667static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
668{
669 struct mmc_command cmd;
670 uint32_t mmc_ret = 0;
671
672 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
673
674 ASSERT(card->ext_csd);
675
676 memset(card->ext_csd, 0, sizeof(card->ext_csd));
677
678 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
679
680 /* CMD8 */
681 cmd.cmd_index = CMD8_SEND_EXT_CSD;
682 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
683 cmd.resp_type = SDHCI_CMD_RESP_R1;
684 cmd.data.data_ptr = card->ext_csd;
685 cmd.data.num_blocks = 1;
686 cmd.data_present = 0x1;
687 cmd.trans_mode = SDHCI_MMC_READ;
688
689 /* send command */
690 mmc_ret = sdhci_send_command(host, &cmd);
691 if (mmc_ret)
692 return mmc_ret;
693
694 return mmc_ret;
695}
696
697/*
698 * Function: mmc switch command
699 * Arg : Host, card structure, access mode, index & value to be set
700 * Return : 0 on Success, 1 on Failure
701 * Flow : Send switch command to the card to set the ext attribute @ index
702 */
703static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
704 uint32_t access, uint32_t index, uint32_t value)
705{
706
707 struct mmc_command cmd;
708 uint32_t mmc_ret = 0;
709 uint32_t mmc_status;
710
711 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
712
713 /* CMD6 Format:
714 * [31:26] set to 0
715 * [25:24] access
716 * [23:16] index
717 * [15:8] value
718 * [7:3] set to 0
719 * [2:0] cmd set
720 */
721 cmd.cmd_index = CMD6_SWITCH_FUNC;
722 cmd.argument |= (access << 24);
723 cmd.argument |= (index << 16);
724 cmd.argument |= (value << 8);
725 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
726 cmd.resp_type = SDHCI_CMD_RESP_R1B;
727
728 mmc_ret = sdhci_send_command(host, &cmd);
729 if (mmc_ret) {
730 dprintf(CRITICAL, "CMD6 send failed\n");
731 return mmc_ret;
732 }
733
734 /* Check if the card completed the switch command processing */
735 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
736 if (mmc_ret) {
737 dprintf(CRITICAL, "Get card status failed\n");
738 return mmc_ret;
739 }
740
741 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700742 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state %x\n", mmc_status);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700743 mmc_ret = 1;
744 }
745
746 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
747 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
748 mmc_ret = 1;
749 }
750
751 return mmc_ret;
752}
753
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700754bool mmc_set_drv_type(struct sdhci_host *host, struct mmc_card *card, uint8_t drv_type)
755{
756 uint32_t ret = 0;
757 bool drv_type_changed = false;
758
759 uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
760
761 if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type))
762 ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
763 if (!ret)
764 drv_type_changed = true;
765
766 return drv_type_changed;
767}
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700768/*
769 * Function: mmc set bus width
770 * Arg : Host, card structure & width
771 * Return : 0 on Success, 1 on Failure
772 * Flow : Send switch command to set bus width
773 */
774static uint32_t mmc_set_bus_width(struct sdhci_host *host,
775 struct mmc_card *card,
776 uint32_t width)
777{
778 uint32_t mmc_ret = 0;
779
780 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
781 MMC_EXT_MMC_BUS_WIDTH, width);
782
783 if (mmc_ret) {
784 dprintf(CRITICAL, "Switch cmd failed\n");
785 return mmc_ret;
786 }
787
788 return 0;
789}
790
791
792/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700793 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700794 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700795 * Return : 1 if hs400 mode is supported, 0 otherwise
796 * Flow : Check the ext csd attributes of the card
797 */
798static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
799{
800 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
801 return 1;
802 else
803 return 0;
804}
805
806/*
807 * Function: mmc card supports hs200 mode
808 * Arg : None
809 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700810 * Flow : Check the ext csd attributes of the card
811 */
812static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
813{
814 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
815 return 1;
816 else
817 return 0;
818}
819
820/*
821 * Function: mmc card supports ddr mode
822 * Arg : None
823 * Return : 1 if DDR mode is supported, 0 otherwise
824 * Flow : Check the ext csd attributes of the card
825 */
826static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
827{
828 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
829 return 1;
830 else
831 return 0;
832}
833
834/*
835 * Function : Enable HS200 mode
836 * Arg : Host, card structure and bus width
837 * Return : 0 on Success, 1 on Failure
838 * Flow :
839 * - Set the bus width to 4/8 bit SDR as supported by the target & host
840 * - Set the HS_TIMING on ext_csd 185 for the card
841 */
842static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
843 struct mmc_card *card, uint32_t width)
844{
845 uint32_t mmc_ret = 0;
846
Channagoud Kadabie632e252014-03-31 15:26:00 -0700847 DBG("\n Enabling HS200 Mode Start\n");
848
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700849 /* Set 4/8 bit SDR bus width */
850 mmc_ret = mmc_set_bus_width(host, card, width);
851 if (mmc_ret) {
852 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
853 card->rca);
854 return mmc_ret;
855 }
856
857 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
858 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
859
860 if (mmc_ret) {
861 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
862 return mmc_ret;
863 }
864
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800865 /* Enable SDR104 mode in controller */
866 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
867
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700868 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800869 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700870 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700871 /* Save the timing value, before changing the clock */
872 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700873 /*
874 * Set the MCI_CLK divider before changing the sdcc core
875 * core clk to ensure card receives no more than 200 MHZ
876 * clock frequency
877 */
878 sdhci_msm_set_mci_clk(host);
879 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700880 }
881 else
882 {
883 /* Save the timing value, before changing the clock */
884 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
885 }
886
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700887 /* Execute Tuning for hs200 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700888 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700889 dprintf(CRITICAL, "Tuning for hs200 failed\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700890
Channagoud Kadabie632e252014-03-31 15:26:00 -0700891 DBG("\n Enabling HS200 Mode Done\n");
892
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700893 return mmc_ret;
894}
895
896/*
897 * Function: mmc set ddr mode
898 * Arg : Host & card structure
899 * Return : 0 on Success, 1 on Failure
900 * Flow : Set bus width for ddr mode & set controller in DDR mode
901*/
902static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
903{
904 uint8_t mmc_ret = 0;
905
Channagoud Kadabie632e252014-03-31 15:26:00 -0700906 DBG("\n Enabling DDR Mode Start\n");
907
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700908 /* Set width for 8 bit DDR mode by default */
909 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
910
911 if (mmc_ret) {
912 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
913 card->rca);
914 return mmc_ret;
915 }
916
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700917 /* Save the timing value, before changing the clock */
918 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
919
920 /* Set the DDR mode in controller */
921 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700922
Channagoud Kadabie632e252014-03-31 15:26:00 -0700923 DBG("\n Enabling DDR Mode Done\n");
924
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700925 return 0;
926}
927
928/*
929 * Function: mmc set high speed interface
930 * Arg : Host & card structure
931 * Return : None
932 * Flow : Sets the sdcc clock & clock divider in the host controller
933 * Adjust the interface speed to optimal speed
934 */
935static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
936 struct mmc_card *card)
937{
938 uint32_t mmc_ret = 0;
939
940 /* Setting HS_TIMING in EXT_CSD (CMD6) */
941 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
942 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
943
944 if (mmc_ret) {
945 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
946 return mmc_ret;
947 }
948
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700949 /* Save the timing value, before changing the clock */
950 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
951
952 /* Set the SDR25 mode in controller */
953 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
954
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700955 return 0;
956}
957
958/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700959 * Function : Enable HS400 mode
960 * Arg : Host, card structure and bus width
961 * Return : 0 on Success, 1 on Failure
962 * Flow :
963 * - Set the bus width to 8 bit DDR
964 * - Set the HS_TIMING on ext_csd 185 for the card
965 */
966uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
967 struct mmc_card *card, uint32_t width)
968{
969 uint32_t mmc_ret = 0;
970
971 /*
972 * Emmc 5.0 spec does not allow changing to hs400 mode directly
973 * Need to follow the sequence to change to hs400 mode
974 * 1. Enable HS200 mode, perform tuning
975 * 2. Change to high speed mode
976 * 3. Enable DDR mode
977 * 4. Enable HS400 mode & execute tuning
978 */
979
Channagoud Kadabie632e252014-03-31 15:26:00 -0700980 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700981 /* HS400 mode is supported only in DDR 8-bit */
982 if (width != DATA_BUS_WIDTH_8BIT)
983 {
984 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
985 return 1;
986 }
987
988 /* 1.Enable HS200 mode */
989 mmc_ret = mmc_set_hs200_mode(host, card, width);
990
991 if (mmc_ret)
992 {
993 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
994 return mmc_ret;
995 }
996
997 /* 2. Enable High speed mode */
998 /* This is needed to set the clock to a low value &
999 * so that we can switch to hs_timing --> 0x1 */
1000 /* Save the timing value, before changing the clock */
1001 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
1002 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
1003
1004 /* 3. Set HS_TIMING to 0x1 */
1005 mmc_ret = mmc_set_hs_interface(host, card);
1006 if (mmc_ret)
1007 {
1008 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
1009 return mmc_ret;
1010 }
1011
1012 /*4. Enable DDR mode */
1013 mmc_ret = mmc_set_ddr_mode(host, card);
1014 if (mmc_ret)
1015 {
1016 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
1017 return mmc_ret;
1018 }
1019
1020 /*5. Set hs400 timing */
1021 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1022
1023 if (mmc_ret)
1024 {
1025 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1026 return mmc_ret;
1027 }
1028
1029 /* 6. Enable SDR104 mode in controller */
1030 /* Save the timing value, before changing the clock */
1031 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1032 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001033 /*
1034 * Enable HS400 mode
1035 */
1036 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001037
1038 /* 7. Execute Tuning for hs400 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -07001039 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001040 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1041
Channagoud Kadabie632e252014-03-31 15:26:00 -07001042 DBG("\n Enabling HS400 Mode Done\n");
1043
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001044 return mmc_ret;
1045}
1046
1047/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001048 * Function: mmc_host_init
1049 * Arg : mmc device structure
1050 * Return : 0 on success, 1 on Failure
1051 * Flow : Initialize the host contoller
1052 * Set the clock rate to 400 KHZ for init
1053 */
1054static uint8_t mmc_host_init(struct mmc_device *dev)
1055{
1056 uint8_t mmc_ret = 0;
1057
1058 struct sdhci_host *host;
1059 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001060 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001061
1062 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001063
1064 host = &dev->host;
1065 cfg = &dev->config;
1066
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001067 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1068
1069 host->base = cfg->sdhc_base;
1070 host->sdhc_event = &sdhc_event;
Aparna Mallavarapue1cdd302014-03-07 07:12:44 +05301071 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001072
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001073 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1074 ASSERT(data);
1075
1076 data->sdhc_event = &sdhc_event;
1077 data->pwrctl_base = cfg->pwrctl_base;
1078 data->pwr_irq = cfg->pwr_irq;
1079 data->slot = cfg->slot;
1080
1081 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001082
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001083 /* Initialize any clocks needed for SDC controller */
1084 clock_init_mmc(cfg->slot);
1085
1086 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1087
Channagoud Kadabie632e252014-03-31 15:26:00 -07001088 /* Configure the CDC clocks needed for emmc storage
1089 * we use slot '1' for emmc
1090 */
1091 if (cfg->slot == 1)
1092 clock_config_cdc(cfg->slot);
1093
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001094 /*
1095 * MSM specific sdhc init
1096 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001097 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001098
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001099 /*
1100 * Initialize the controller, read the host capabilities
1101 * set power on mode
1102 */
1103 sdhci_init(host);
1104
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001105 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001106 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1107
1108 return mmc_ret;
1109}
1110
1111/*
1112 * Function: mmc identify card
1113 * Arg : host & card structure
1114 * Return : 0 on Success, 1 on Failure
1115 * Flow : Performs card identification process:
1116 * 1. Get card's unique identification number (CID)
1117 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1118 * 3. Select the card to put it in TRAN state
1119 */
1120static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1121{
1122 uint32_t mmc_return = 0;
1123 uint32_t raw_csd[4];
1124
1125 /* Ask card to send its unique card identification (CID) number (CMD2) */
1126 mmc_return = mmc_all_send_cid(host, card);
1127 if (mmc_return) {
1128 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1129 return mmc_return;
1130 }
1131
1132 /* Ask card to send a relative card address (RCA) (CMD3) */
1133 mmc_return = mmc_send_relative_address(host, card);
1134 if (mmc_return) {
1135 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1136 return mmc_return;
1137 }
1138
1139 /* Get card's CSD register (CMD9) */
1140 mmc_return = mmc_send_csd(host, card);
1141 if (mmc_return) {
1142 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1143 return mmc_return;
1144 }
1145
1146 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001147 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001148 if (mmc_return) {
1149 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1150 return mmc_return;
1151 }
1152
1153 /* Set the card status as active */
1154 card->status = MMC_STATUS_ACTIVE;
1155
1156 return 0;
1157}
1158
1159/*
1160 * Function: mmc_reset_card_and_send_op
1161 * Arg : Host & Card structure
1162 * Return : 0 on Success, 1 on Failure
1163 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1164 * verify operating voltage and set the card in ready state.
1165 */
1166static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1167{
1168 uint32_t mmc_return = 0;
1169
1170 /* 1. Card Reset - CMD0 */
1171 mmc_return = mmc_reset_card(host);
1172 if (mmc_return) {
1173 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1174 return mmc_return;
1175 }
1176
1177 /* 2. Card Initialization process */
1178
1179 /*
1180 * Send CMD1 to identify and reject cards that do not match host's VDD range
1181 * profile. Cards sends its OCR register in response.
1182 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001183
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001184 mmc_return = mmc_send_op_cond(host, card);
1185
1186 /* OCR is not received, init could not complete */
1187 if (mmc_return) {
1188 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1189 return mmc_return;
1190 }
1191
1192 return 0;
1193}
1194
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001195static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1196{
1197 struct mmc_command cmd = {0};
1198
1199 cmd.cmd_index = CMD55_APP_CMD;
1200 cmd.argument = (card->rca << 16);
1201 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1202 cmd.resp_type = SDHCI_CMD_RESP_R1;
1203
1204 if (sdhci_send_command(host, &cmd))
1205 {
1206 dprintf(CRITICAL, "Failed Sending CMD55\n");
1207 return 1;
1208 }
1209 return 0;
1210}
1211
1212uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1213{
1214 uint8_t i;
1215 uint32_t mmc_ret;
1216 struct mmc_command cmd;
1217
1218 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1219
1220 /* Use the SD card RCA 0x0 during init */
1221 card->rca = SD_CARD_RCA;
1222
1223 /* Send CMD8 for voltage check*/
1224 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1225 {
1226 cmd.cmd_index = CMD8_SEND_IF_COND;
1227 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1228 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1229 cmd.resp_type = SDHCI_CMD_RESP_R7;
1230
1231 if (sdhci_send_command(host, &cmd))
1232 {
1233 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1234 return 1;
1235 }
1236 else
1237 {
1238 /* If the command response echos the voltage back */
1239 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1240 break;
1241 }
1242 /* As per SDCC the spec try for max three times with
1243 * 1 ms delay
1244 */
1245 mdelay(1);
1246 }
1247
1248 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1249 {
1250 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1251 return 1;
1252 }
1253
1254 /* Send ACMD41 for OCR */
1255 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1256 {
1257 /* Send APP_CMD before ACMD41*/
1258 if (mmc_send_app_cmd(host, card))
1259 {
1260 dprintf(CRITICAL, "Failed sending App command\n");
1261 return 1;
1262 }
1263
1264 /* APP_CMD is successful, send ACMD41 now */
1265 cmd.cmd_index = ACMD41_SEND_OP_COND;
1266 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1267 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1268 cmd.resp_type = SDHCI_CMD_RESP_R3;
1269
1270 if (sdhci_send_command(host, &cmd))
1271 {
1272 dprintf(CRITICAL, "Failure sending ACMD41\n");
1273 return 1;
1274 }
1275 else
1276 {
1277 if (cmd.resp[0] & MMC_SD_DEV_READY)
1278 {
1279 if (cmd.resp[0] & (1 << 30))
1280 card->type = MMC_CARD_TYPE_SDHC;
1281 else
1282 card->type = MMC_CARD_TYPE_STD_SD;
1283
1284 break;
1285 }
1286 }
1287 /*
1288 * As per SDCC spec try for max 1 second
1289 */
1290 mdelay(50);
1291 }
1292
1293 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1294 {
1295 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1296 return 1;
1297 }
1298
1299 return 0;
1300}
1301
1302/*
1303 * Function to read SD card information from SD status
1304 */
1305static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1306{
1307 BUF_DMA_ALIGN(raw_sd_status, 64);
1308 struct mmc_command cmd = {0};
1309 uint32_t sd_status[16];
1310 uint32_t *status = sd_status;
1311 uint32_t au_size;
1312 int i;
1313 int j;
1314
1315 if (mmc_send_app_cmd(host, card))
1316 {
1317 dprintf(CRITICAL, "Failed sending App command\n");
1318 return 1;
1319 }
1320
1321 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1322 cmd.argument = 0x0;
1323 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1324 cmd.resp_type = SDHCI_CMD_RESP_R2;
1325 cmd.trans_mode = SDHCI_MMC_READ;
1326 cmd.data_present = 0x1;
1327 cmd.data.data_ptr = raw_sd_status;
1328 cmd.data.num_blocks = 0x1;
1329 cmd.data.blk_sz = 0x40;
1330
1331 /* send command */
1332 if (sdhci_send_command(host, &cmd))
1333 return 1;
1334
1335 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1336
1337 for (i = 15, j = 0; i >=0 ; i--, j++)
1338 sd_status[i] = swap_endian32(sd_status[j]);
1339
1340 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1341 /* Card AU size in sectors */
1342 card->ssr.au_size = 1 << (au_size + 4);
1343 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
1344
1345 return 0;
1346}
1347
1348/*
1349 * Function to read the SD CARD configuration register
1350 */
1351static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1352{
1353 BUF_DMA_ALIGN(scr_resp, 8);
1354 struct mmc_command cmd = {0};
1355 uint32_t raw_scr[2];
1356
1357 /* Now read the SCR register */
1358 /* Send APP_CMD before ACMD51*/
1359 if (mmc_send_app_cmd(host, card))
1360 {
1361 dprintf(CRITICAL, "Failed sending App command\n");
1362 return 1;
1363 }
1364
1365 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1366 cmd.argument = 0x0;
1367 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1368 cmd.resp_type = SDHCI_CMD_RESP_R1;
1369 cmd.trans_mode = SDHCI_MMC_READ;
1370 cmd.data_present = 0x1;
1371 cmd.data.data_ptr = scr_resp;
1372 cmd.data.num_blocks = 0x1;
1373 cmd.data.blk_sz = 0x8;
1374
1375 /* send command */
1376 if (sdhci_send_command(host, &cmd))
1377 return 1;
1378
1379 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1380
1381 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1382 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1383
1384 /*
1385 * Parse & Populate the SCR data as per sdcc spec
1386 */
1387 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1388 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1389 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1390 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1391
1392 return 0;
1393}
1394
1395/*
1396 * Function: mmc_set_sd_bus_width
1397 * Arg : host, device structure & width
1398 * Return : 0 on Success, 1 on Failure
1399 * Flow : Set the bus width for the card
1400 */
1401uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1402{
1403 struct mmc_command cmd = {0};
1404
1405 /* Send APP_CMD before ACMD6*/
1406 if (mmc_send_app_cmd(host, card))
1407 {
1408 dprintf(CRITICAL, "Failed sending App command\n");
1409 return 1;
1410 }
1411
1412 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1413 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1414 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1415 cmd.resp_type = SDHCI_CMD_RESP_R1;
1416
1417 /* send command */
1418 if (sdhci_send_command(host, &cmd))
1419 return 1;
1420
1421 return 0;
1422}
1423
1424uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1425{
1426 struct mmc_command cmd = {0};
1427 BUF_DMA_ALIGN(switch_resp, 64);
1428
1429 cmd.cmd_index = CMD6_SWITCH_FUNC;
1430 cmd.argument = MMC_SD_SWITCH_HS;
1431 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1432 cmd.resp_type = SDHCI_CMD_RESP_R1;
1433 cmd.trans_mode = SDHCI_MMC_READ;
1434 cmd.data_present = 0x1;
1435 cmd.data.data_ptr = switch_resp;
1436 cmd.data.num_blocks = 0x1;
1437 cmd.data.blk_sz = 0x40;
1438
1439 /* send command */
1440 if (sdhci_send_command(host, &cmd))
1441 return 1;
1442
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001443 /* Set the SDR25 mode in controller*/
1444 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1445
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001446 return 0;
1447}
1448
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001449/*
1450 * Function: mmc_init_card
1451 * Arg : mmc device structure
1452 * Return : 0 on Success, 1 on Failure
1453 * Flow : Performs initialization and identification of eMMC cards connected
1454 * to the host.
1455 */
1456
1457static uint32_t mmc_card_init(struct mmc_device *dev)
1458{
1459 uint32_t mmc_return = 0;
1460 uint32_t status;
1461 uint8_t bus_width = 0;
1462
1463 struct sdhci_host *host;
1464 struct mmc_card *card;
1465 struct mmc_config_data *cfg;
1466
1467 host = &dev->host;
1468 card = &dev->card;
1469 cfg = &dev->config;
1470
1471 /* Initialize MMC card structure */
1472 card->status = MMC_STATUS_INACTIVE;
1473
1474 /* TODO: Get the OCR params from target */
1475 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1476
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001477 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001478 mmc_return = mmc_reset_card_and_send_op(host, card);
1479 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001480 {
1481 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1482 /* Reset the card & get the OCR */
1483 mmc_return = mmc_sd_card_init(host, card);
1484 if (mmc_return)
1485 {
1486 dprintf(CRITICAL, "Failed to initialize SD card\n");
1487 return mmc_return;
1488 }
1489 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001490
1491 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1492 mmc_return = mmc_identify_card(host, card);
1493 if (mmc_return)
1494 return mmc_return;
1495
1496 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001497 if (MMC_CARD_SD(card))
1498 {
1499 mmc_return = mmc_sd_set_hs(host, card);
1500 if (mmc_return)
1501 {
1502 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1503 return mmc_return;
1504 }
1505 }
1506 else
1507 {
1508 mmc_return = mmc_set_hs_interface(host, card);
1509 if (mmc_return) {
1510 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1511 return mmc_return;
1512 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001513 }
1514
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001515 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001516 if (MMC_CARD_MMC(card))
1517 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001518 /* For MMC cards, also get the extended csd */
1519 mmc_return = mmc_get_ext_csd(host, card);
1520
1521 if (mmc_return) {
1522 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1523 return mmc_return;
1524 }
1525 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001526 else
1527 {
1528 /*Read SCR for sd card */
1529 if (mmc_sd_get_card_scr(host, card))
1530 {
1531 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1532 return 1;
1533 }
1534 /* Read SSR for the SD card */
1535 if (mmc_sd_get_card_ssr(host, card))
1536 {
1537 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1538 return 1;
1539 }
1540 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001541
1542 /* Decode and save the CSD register */
1543 mmc_return = mmc_decode_and_save_csd(card);
1544 if (mmc_return) {
1545 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1546 return mmc_return;
1547 }
1548
1549
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001550 if (MMC_CARD_MMC(card))
1551 {
1552 /* Set the bus width based on host, target capbilities */
1553 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1554 bus_width = DATA_BUS_WIDTH_8BIT;
1555 /*
1556 * Host contoller by default supports 4 bit & 1 bit mode.
1557 * No need to check for host support here
1558 */
1559 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1560 bus_width = DATA_BUS_WIDTH_4BIT;
1561 else
1562 bus_width = DATA_BUS_WIDTH_1BIT;
1563
1564 /* Set 4/8 bit SDR bus width in controller */
1565 mmc_return = sdhci_set_bus_width(host, bus_width);
1566
1567 if (mmc_return) {
1568 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1569 return 1;
1570 }
1571
1572 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001573 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001574 * 1. HS200 mode if supported by host & card
1575 * 2. DDR mode host, if supported by host & card
1576 * 3. Use normal speed mode with supported bus width
1577 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001578 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001579 {
1580 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1581 if (mmc_return)
1582 {
1583 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1584 card->rca);
1585 return mmc_return;
1586 }
1587 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001588 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001589 {
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001590 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1591
1592 if (mmc_return) {
1593 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1594 card->rca);
1595 return mmc_return;
1596 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001597 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001598 mmc_return = mmc_set_ddr_mode(host, card);
1599
1600 if (mmc_return) {
1601 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1602 card->rca);
1603 return mmc_return;
1604 }
1605 } else {
1606 /* Set 4/8 bit bus width for the card */
1607 mmc_return = mmc_set_bus_width(host, card, bus_width);
1608 if (mmc_return) {
1609 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1610 card->rca);
1611 return mmc_return;
1612 }
1613 }
1614 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001615 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001616 {
1617 /* Check the supported bus width for the card from SCR register */
1618 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1619 bus_width = DATA_BUS_WIDTH_4BIT;
1620 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001621 bus_width = DATA_BUS_WIDTH_1BIT;
1622
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001623 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1624 if (mmc_return)
1625 {
1626 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001627 return mmc_return;
1628 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001629
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001630 /* Set bit SDR bus width in controller */
1631 mmc_return = sdhci_set_bus_width(host, bus_width);
1632 if (mmc_return)
1633 {
1634 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001635 return mmc_return;
1636 }
1637 }
1638
1639
1640 /* Verify TRAN state after changing speed and bus width */
1641 mmc_return = mmc_get_card_status(host, card, &status);
1642 if (mmc_return)
1643 return mmc_return;
1644
1645 if (MMC_CARD_STATUS(status) != MMC_TRAN_STATE)
1646 mmc_return = 1;
1647
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001648 card->block_size = MMC_BLK_SZ;
1649
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001650 return mmc_return;
1651}
1652
1653/*
1654 * Function: mmc display csd
1655 * Arg : None
1656 * Return : None
1657 * Flow : Displays the csd information
1658 */
1659static void mmc_display_csd(struct mmc_card *card)
1660{
1661 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1662 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1663 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1664 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1665 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1666 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1667}
1668
1669/*
1670 * Function: mmc_init
1671 * Arg : MMC configuration data
1672 * Return : Pointer to mmc device
1673 * Flow : Entry point to MMC boot process
1674 * Initialize the sd host controller
1675 * Initialize the mmc card
1676 * Set the clock & high speed mode
1677 */
1678struct mmc_device *mmc_init(struct mmc_config_data *data)
1679{
1680 uint8_t mmc_ret = 0;
1681 struct mmc_device *dev;
1682
1683 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1684
1685 if (!dev) {
1686 dprintf(CRITICAL, "Error allocating mmc device\n");
1687 return NULL;
1688 }
1689
1690 ASSERT(data);
1691
1692 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1693
1694 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1695
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001696 /* Initialize the host & clock */
1697 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1698
1699 mmc_ret = mmc_host_init(dev);
1700 if (mmc_ret) {
1701 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1702 return NULL;
1703 }
1704
1705 /* Initialize and identify cards connected to host */
1706 mmc_ret = mmc_card_init(dev);
1707 if (mmc_ret) {
1708 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1709 dev->config.slot);
1710 return NULL;
1711 }
1712
1713 dprintf(INFO, "Done initialization of the card\n");
1714
1715 mmc_display_csd(&dev->card);
1716
1717 return dev;
1718}
1719
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001720static uint32_t mmc_parse_response(uint32_t resp)
1721{
1722 /* Trying to write beyond card capacity */
1723 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1724 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1725 return 1;
1726 }
1727
1728 /* Misaligned address not matching block length */
1729 if (resp & MMC_R1_ADDR_ERR) {
1730 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1731 return 1;
1732 }
1733
1734 /* Invalid block length */
1735 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1736 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1737 return 1;
1738 }
1739
1740 /* Tried to program write protected block */
1741 if (resp & MMC_R1_WP_VIOLATION) {
1742 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1743 return 1;
1744 }
1745
1746 /* card controller error */
1747 if (resp & MMC_R1_CC_ERROR) {
1748 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1749 return 1;
1750 }
1751
1752 /* Generic error */
1753 if (resp & MMC_R1_GENERIC_ERR) {
1754 dprintf(CRITICAL, "A generic Device error\n");
1755 return 1;
1756 }
1757
1758 /* Finally check for card in TRAN state */
1759 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1760 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1761 return 1;
1762 }
1763
1764 return 0;
1765}
1766
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001767static uint32_t mmc_stop_command(struct mmc_device *dev)
1768{
1769 struct mmc_command cmd;
1770 uint32_t mmc_ret = 0;
1771
1772 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1773
1774 cmd.cmd_index = CMD12_STOP_TRANSMISSION;
1775 cmd.argument = (dev->card.rca << 16);
1776 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1777 cmd.resp_type = SDHCI_CMD_RESP_R1;
1778
1779 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1780 if(mmc_ret)
1781 {
1782 dprintf(CRITICAL, "Failed to send stop command\n");
1783 return mmc_ret;
1784 }
1785
1786 /* Response contains 32 bit Card status.
1787 * Parse the errors & provide relevant information */
1788
1789 return mmc_parse_response(cmd.resp[0]);
1790}
1791
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001792/*
1793 * Function: mmc sdhci read
1794 * Arg : mmc device structure, block address, number of blocks & destination
1795 * Return : 0 on Success, non zero on success
1796 * Flow : Fill in the command structure & send the command
1797 */
1798uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1799 uint64_t blk_addr, uint32_t num_blocks)
1800{
1801 uint32_t mmc_ret = 0;
1802 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001803 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001804
1805 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1806
1807 /* CMD17/18 Format:
1808 * [31:0] Data Address
1809 */
1810 if (num_blocks == 1)
1811 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1812 else
1813 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1814
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001815 /*
1816 * Standard emmc cards use byte mode addressing
1817 * convert the block address to byte address before
1818 * sending the command
1819 */
1820 if (card->type == MMC_TYPE_STD_MMC)
1821 cmd.argument = blk_addr * card->block_size;
1822 else
1823 cmd.argument = blk_addr;
1824
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001825 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1826 cmd.resp_type = SDHCI_CMD_RESP_R1;
1827 cmd.trans_mode = SDHCI_MMC_READ;
1828 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001829
1830 /* Use CMD23 If card supports CMD23:
1831 * For SD card use the value read from SCR register
1832 * For emmc by default use CMD23.
1833 * Also as per SDCC spec always use CMD23 to stop
1834 * multiblock read/write if UHS (Ultra High Speed) is
1835 * enabled
1836 */
1837 if (MMC_CARD_SD(card))
1838 cmd.cmd23_support = dev->card.scr.cmd23_support;
1839 else
1840 cmd.cmd23_support = 0x1;
1841
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001842 cmd.data.data_ptr = dest;
1843 cmd.data.num_blocks = num_blocks;
1844
1845 /* send command */
1846 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001847
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001848 /* For multi block read failures send stop command */
1849 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001850 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001851 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001852 }
1853
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001854 /*
1855 * Response contains 32 bit Card status.
1856 * Parse the errors & provide relevant information
1857 */
1858 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001859}
1860
1861/*
1862 * Function: mmc sdhci write
1863 * Arg : mmc device structure, block address, number of blocks & source
1864 * Return : 0 on Success, non zero on success
1865 * Flow : Fill in the command structure & send the command
1866 */
1867uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1868 uint64_t blk_addr, uint32_t num_blocks)
1869{
1870 uint32_t mmc_ret = 0;
1871 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001872 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001873
1874 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1875
1876 /* CMD24/25 Format:
1877 * [31:0] Data Address
1878 */
1879
1880 if (num_blocks == 1)
1881 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1882 else
1883 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1884
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001885 /*
1886 * Standard emmc cards use byte mode addressing
1887 * convert the block address to byte address before
1888 * sending the command
1889 */
1890 if (card->type == MMC_TYPE_STD_MMC)
1891 cmd.argument = blk_addr * card->block_size;
1892 else
1893 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001894 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1895 cmd.resp_type = SDHCI_CMD_RESP_R1;
1896 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001897
1898 /* Use CMD23 If card supports CMD23:
1899 * For SD card use the value read from SCR register
1900 * For emmc by default use CMD23.
1901 * Also as per SDCC spec always use CMD23 to stop
1902 * multiblock read/write if UHS (Ultra High Speed) is
1903 * enabled
1904 */
1905 if (MMC_CARD_SD(card))
1906 cmd.cmd23_support = dev->card.scr.cmd23_support;
1907 else
1908 cmd.cmd23_support = 0x1;
1909
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001910 cmd.data_present = 0x1;
1911 cmd.data.data_ptr = src;
1912 cmd.data.num_blocks = num_blocks;
1913
1914 /* send command */
1915 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001916
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001917 /* For multi block write failures send stop command */
1918 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001919 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001920 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001921 }
1922
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001923 /*
1924 * Response contains 32 bit Card status.
1925 * Parse the errors & provide relevant information
1926 */
1927 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001928}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001929
1930/*
1931 * Send the erase group start address using CMD35
1932 */
1933static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1934{
1935 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001936 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001937
1938 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1939
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001940 if (MMC_CARD_MMC(card))
1941 cmd.cmd_index = CMD35_ERASE_GROUP_START;
1942 else
1943 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
1944
vijay kumar1129e4e2014-03-28 11:24:48 +05301945 /*
1946 * Standard emmc cards use byte mode addressing
1947 * convert the block address to byte address before
1948 * sending the command
1949 */
1950 if (card->type == MMC_TYPE_STD_MMC)
1951 cmd.argument = erase_start * card->block_size;
1952 else
1953 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001954 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1955 cmd.resp_type = SDHCI_CMD_RESP_R1;
1956
1957 /* send command */
1958 if (sdhci_send_command(&dev->host, &cmd))
1959 return 1;
1960
1961 /*
1962 * CMD35 on failure returns address out of range error
1963 */
1964 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
1965 {
1966 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
1967 return 1;
1968 }
1969
1970 return 0;
1971}
1972
1973/*
1974 * Send the erase group end address using CMD36
1975 */
1976static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
1977{
1978 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001979 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001980
1981 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1982
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001983 if (MMC_CARD_MMC(card))
1984 cmd.cmd_index = CMD36_ERASE_GROUP_END;
1985 else
1986 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
1987
vijay kumar1129e4e2014-03-28 11:24:48 +05301988 /*
1989 * Standard emmc cards use byte mode addressing
1990 * convert the block address to byte address before
1991 * sending the command
1992 */
1993 if (card->type == MMC_TYPE_STD_MMC)
1994 cmd.argument = erase_end * card->block_size;
1995 else
1996 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001997 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1998 cmd.resp_type = SDHCI_CMD_RESP_R1;
1999
2000 /* send command */
2001 if (sdhci_send_command(&dev->host, &cmd))
2002 return 1;
2003
2004 /*
2005 * CMD3 on failure returns address out of range error
2006 */
2007 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2008 {
2009 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
2010 return 1;
2011 }
2012
2013 return 0;
2014}
2015
2016/*
2017 * Send the erase CMD38, to erase the selected erase groups
2018 */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002019static uint32_t mmc_send_erase(struct mmc_device *dev, uint64_t erase_timeout)
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002020{
2021 struct mmc_command cmd;
2022 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002023 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002024
2025 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2026
2027 cmd.cmd_index = CMD38_ERASE;
2028 cmd.argument = 0x00000000;
2029 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2030 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002031 cmd.cmd_timeout = erase_timeout;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002032
2033 /* send command */
2034 if (sdhci_send_command(&dev->host, &cmd))
2035 return 1;
2036
2037 do
2038 {
2039 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2040 {
2041 dprintf(CRITICAL, "Failed to get card status after erase\n");
2042 return 1;
2043 }
2044 /* Check if the response of erase command has eras skip status set */
2045 if (status & MMC_R1_WP_ERASE_SKIP)
2046 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
2047
2048 retry++;
2049 udelay(1000);
2050 if (retry == MMC_MAX_CARD_STAT_RETRY)
2051 {
2052 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
2053 return 1;
2054 }
2055 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2056
2057
2058 return 0;
2059}
2060
2061
2062/*
2063 * Function: mmc sdhci erase
2064 * Arg : mmc device structure, block address and length
2065 * Return : 0 on Success, non zero on failure
2066 * Flow : Fill in the command structure & send the command
2067 */
2068uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
2069{
2070 uint32_t erase_unit_sz = 0;
2071 uint32_t erase_start;
2072 uint32_t erase_end;
2073 uint32_t blk_end;
2074 uint32_t num_erase_grps;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002075 uint64_t erase_timeout = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002076 uint32_t *out;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002077 struct mmc_card *card;
2078
2079
2080 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002081
2082 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002083 * Calculate the erase unit size,
2084 * 1. Based on emmc 4.5 spec for emmc card
2085 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002086 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002087 if (MMC_CARD_MMC(card))
2088 {
2089 /*
2090 * Calculate the erase unit size as per the emmc specification v4.5
2091 */
2092 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2093 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2094 else
2095 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2096 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002097 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002098 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2099
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002100
2101 /* Convert length in blocks */
2102 len = len / MMC_BLK_SZ;
2103
2104 if (len < erase_unit_sz)
2105 {
2106 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2107 return 1;
2108 }
2109
2110 /* Calculate erase groups based on the length in blocks */
2111 num_erase_grps = len / erase_unit_sz;
2112
2113 /* Start address of the erase range */
2114 erase_start = blk_addr;
2115
2116 /* Last address of the erase range */
2117 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2118
2119 /* Boundary check for overlap */
2120 blk_end = blk_addr + len;
2121
2122 if (erase_end > blk_end)
2123 {
2124 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2125 erase_end -= erase_unit_sz;
2126 }
2127
2128 /* Send CMD35 for erase group start */
2129 if (mmc_send_erase_grp_start(dev, erase_start))
2130 {
2131 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2132 return 1;
2133 }
2134
2135 /* Send CMD36 for erase group end */
2136 if (mmc_send_erase_grp_end(dev, erase_end))
2137 {
2138 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2139 return 1;
2140 }
2141
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002142 /*
2143 * As per emmc 4.5 spec section 7.4.27, calculate the erase timeout
2144 * erase_timeout = 300 * ERASE_TIMEOUT_MULT * num_erase_grps
2145 */
2146 erase_timeout = (300 * card->ext_csd[MMC_ERASE_TIMEOUT_MULT] * num_erase_grps);
2147
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002148 /* Send CMD38 to perform erase */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002149 if (mmc_send_erase(dev, erase_timeout))
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002150 {
2151 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2152 return 1;
2153 }
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002154
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002155 return 0;
2156}
2157
2158/*
2159 * Function: mmc get wp status
2160 * Arg : mmc device structure, block address and buffer for getting wp status
2161 * Return : 0 on Success, 1 on Failure
2162 * Flow : Get the WP group status by sending CMD31
2163 */
2164uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2165{
2166 struct mmc_command cmd;
2167
2168 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2169
2170 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2171 cmd.argument = addr;
2172 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2173 cmd.resp_type = SDHCI_CMD_RESP_R1;
2174 cmd.trans_mode = SDHCI_MMC_READ;
2175 cmd.data_present = 0x1;
2176 cmd.data.data_ptr = wp_status;
2177 cmd.data.num_blocks = 0x1;
2178 cmd.data.blk_sz = 0x8;
2179
2180 if (sdhci_send_command(&dev->host, &cmd))
2181 {
2182 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2183 return 1;
2184 }
2185
2186 return 0;
2187}
2188
2189/*
2190 * Function: mmc set/clear WP on user area
2191 * Arg : mmc device structure, block address,len, & flag to set or clear
2192 * Return : 0 on success, 1 on failure
2193 * Flow : Function to set/clear power on write protect on user area
2194 */
2195
2196uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2197{
2198 struct mmc_command cmd;
vijay kumar7420baa2014-05-02 12:01:49 +05302199 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002200 uint32_t wp_grp_size;
2201 uint32_t status;
2202 uint32_t num_wp_grps;
2203 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002204 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002205 uint32_t i;
2206
2207 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2208
2209 /* Convert len into blocks */
2210 len = len / MMC_BLK_SZ;
vijay kumar697dbfd2014-04-24 17:12:49 +05302211 wp_grp_size = dev->card.wp_grp_size;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002212
2213 /* Disable PERM WP */
2214 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2215
2216 if (ret)
2217 {
2218 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2219 return ret;
2220 }
2221
2222 /* Read the default values for user WP */
2223 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2224
2225 if (ret)
2226 {
2227 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2228 return ret;
2229 }
2230
2231 /* Check if user power on WP is disabled or perm WP is enabled */
2232 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2233 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2234 {
2235 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2236 return 1;
2237 }
2238
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002239 if (len < wp_grp_size)
2240 {
2241 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2242 return 1;
2243 }
2244
2245 /* Set power on USER WP */
2246 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2247
2248 if (ret)
2249 {
2250 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2251 return ret;
2252 }
2253
2254 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2255
2256 if (set_clr)
2257 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2258 else
2259 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2260
2261 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2262 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2263
2264 for(i = 0; i < num_wp_grps; i++)
2265 {
vijay kumar7420baa2014-05-02 12:01:49 +05302266 /*
2267 * Standard emmc cards use byte mode addressing
2268 * convert the block address to byte address before
2269 * sending the command
2270 */
2271 if (card->type == MMC_TYPE_STD_MMC)
2272 cmd.argument = (addr + (i * wp_grp_size)) * card->block_size;
2273 else
2274 cmd.argument = addr + (i * wp_grp_size);
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002275
2276 if (sdhci_send_command(&dev->host, &cmd))
2277 return 1;
2278
2279 /* CMD28/CMD29 On failure returns address out of range error */
2280 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2281 {
2282 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2283 return 1;
2284 }
2285
2286 /* Check the card status */
2287 do
2288 {
2289 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2290 {
2291 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2292 return 1;
2293 }
2294
2295 /* Time out for WP command */
2296 retry++;
2297 udelay(1000);
2298 if (retry == MMC_MAX_CARD_STAT_RETRY)
2299 {
2300 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2301 return 1;
2302 }
2303 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2304
2305 }
2306
2307 return 0;
2308}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002309
2310/* Function to put the mmc card to sleep */
2311void mmc_put_card_to_sleep(struct mmc_device *dev)
2312{
2313 struct mmc_command cmd = {0};
2314 struct mmc_card *card = &dev->card;
2315
2316 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2317 cmd.argument = 0x00000000;
2318 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2319 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2320
2321 /* send command */
2322 if(sdhci_send_command(&dev->host, &cmd))
2323 {
2324 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2325 return;
2326 }
2327
2328 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2329 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2330 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2331 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2332
2333 /* send command */
2334 if(sdhci_send_command(&dev->host, &cmd))
2335 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2336}