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gerrit-public.fairphone.software / kernel / msm-4.19 / 0c8ba9d28518822d612de23fc9020b2a66a0228c / . / sound / soc / intel / skylake / skl.h
blob: 8a08bb7279911fc7bb888e0d3dff42d19fddcede [file] [log] [blame]
Jeeja KPa40e6932015-07-09 15:20:08 +0530[diff] [blame]1/*
2 * skl.h - HD Audio skylake defintions.
3 *
4 * Copyright (C) 2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 *
19 */
20
21#ifndef __SOUND_SOC_SKL_H
22#define __SOUND_SOC_SKL_H
23
24#include <sound/hda_register.h>
25#include <sound/hdaudio_ext.h>
Jeeja KP473eb872015-07-21 23:53:55 +0530[diff] [blame]26#include "skl-nhlt.h"
Jeeja KPa40e6932015-07-09 15:20:08 +0530[diff] [blame]27
28#define SKL_SUSPEND_DELAY 2000
29
30/* Vendor Specific Registers */
31#define AZX_REG_VS_EM1 0x1000
32#define AZX_REG_VS_INRC 0x1004
33#define AZX_REG_VS_OUTRC 0x1008
34#define AZX_REG_VS_FIFOTRK 0x100C
35#define AZX_REG_VS_FIFOTRK2 0x1010
36#define AZX_REG_VS_EM2 0x1030
37#define AZX_REG_VS_EM3L 0x1038
38#define AZX_REG_VS_EM3U 0x103C
39#define AZX_REG_VS_EM4L 0x1040
40#define AZX_REG_VS_EM4U 0x1044
41#define AZX_REG_VS_LTRC 0x1048
42#define AZX_REG_VS_D0I3C 0x104A
43#define AZX_REG_VS_PCE 0x104B
44#define AZX_REG_VS_L2MAGC 0x1050
45#define AZX_REG_VS_L2LAHPT 0x1054
46#define AZX_REG_VS_SDXDPIB_XBASE 0x1084
47#define AZX_REG_VS_SDXDPIB_XINTERVAL 0x20
48#define AZX_REG_VS_SDXEFIFOS_XBASE 0x1094
49#define AZX_REG_VS_SDXEFIFOS_XINTERVAL 0x20
50
Jayachandran B0c8ba9d2015-12-18 15:12:03 +0530[diff] [blame^]51#define AZX_PCIREG_CGCTL 0x48
52#define AZX_CGCTL_MISCBDCGE_MASK (1 << 6)
53
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100[diff] [blame]54struct skl_dsp_resource {
55 u32 max_mcps;
56 u32 max_mem;
57 u32 mcps;
58 u32 mem;
59};
60
Jeeja KPa40e6932015-07-09 15:20:08 +0530[diff] [blame]61struct skl {
62 struct hdac_ext_bus ebus;
63 struct pci_dev *pci;
64
65 unsigned int init_failed:1; /* delayed init failed */
66 struct platform_device *dmic_dev;
Vinod Koulcc18c5f2015-11-05 21:34:13 +0530[diff] [blame]67 struct platform_device *i2s_dev;
Jeeja KP473eb872015-07-21 23:53:55 +0530[diff] [blame]68
Dan Williamsba40a852015-10-09 18:16:36 -0400[diff] [blame]69 void *nhlt; /* nhlt ptr */
Jeeja KPd255b092015-07-21 23:53:56 +0530[diff] [blame]70 struct skl_sst *skl_sst; /* sst skl ctx */
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100[diff] [blame]71
72 struct skl_dsp_resource resource;
73 struct list_head ppl_list;
74 struct list_head dapm_path_list;
Vinod Koulaecf6fd2015-11-05 21:34:15 +0530[diff] [blame]75 const char *fw_name;
Vinod Kould8018362016-01-05 17:16:04 +0530[diff] [blame]76 const struct firmware *tplg;
Jeeja KP4557c302015-12-03 23:30:00 +0530[diff] [blame]77
78 int supend_active;
Jeeja KPa40e6932015-07-09 15:20:08 +0530[diff] [blame]79};
80
81#define skl_to_ebus(s) (&(s)->ebus)
82#define ebus_to_skl(sbus) \
83 container_of(sbus, struct skl, sbus)
84
85/* to pass dai dma data */
86struct skl_dma_params {
87 u32 format;
88 u8 stream_tag;
89};
90
91int skl_platform_unregister(struct device *dev);
92int skl_platform_register(struct device *dev);
93
Dan Williamsba40a852015-10-09 18:16:36 -0400[diff] [blame]94void *skl_nhlt_init(struct device *dev);
95void skl_nhlt_free(void *addr);
Jeeja KP473eb872015-07-21 23:53:55 +0530[diff] [blame]96struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance,
97 u8 link_type, u8 s_fmt, u8 no_ch, u32 s_rate, u8 dirn);
Jeeja KPd255b092015-07-21 23:53:56 +0530[diff] [blame]98
99int skl_init_dsp(struct skl *skl);
100void skl_free_dsp(struct skl *skl);
101int skl_suspend_dsp(struct skl *skl);
102int skl_resume_dsp(struct skl *skl);
Jeeja KPa40e6932015-07-09 15:20:08 +0530[diff] [blame]103#endif /* __SOUND_SOC_SKL_H */