blob: 8936211b161d3ed6b0a2989359707287f2721b21 [file] [log] [blame]
Sarah Sharp66d4ead2009-04-27 19:52:28 -07001/*
2 * xHCI host controller driver
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/usb.h>
Sarah Sharp0ebbab32009-04-27 19:52:34 -070024#include <linux/pci.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090025#include <linux/slab.h>
Sarah Sharp527c6d72009-04-29 19:06:56 -070026#include <linux/dmapool.h>
James Hogan008eb952013-07-26 13:34:43 +010027#include <linux/dma-mapping.h>
Sarah Sharp66d4ead2009-04-27 19:52:28 -070028
29#include "xhci.h"
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +030030#include "xhci-trace.h"
Sarah Sharp66d4ead2009-04-27 19:52:28 -070031
Sarah Sharp0ebbab32009-04-27 19:52:34 -070032/*
33 * Allocates a generic ring segment from the ring pool, sets the dma address,
34 * initializes the segment to zero, and sets the private next pointer to NULL.
35 *
36 * Section 4.11.1.1:
37 * "All components of all Command and Transfer TRBs shall be initialized to '0'"
38 */
Andiry Xu186a7ef2012-03-05 17:49:36 +080039static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci,
40 unsigned int cycle_state, gfp_t flags)
Sarah Sharp0ebbab32009-04-27 19:52:34 -070041{
42 struct xhci_segment *seg;
43 dma_addr_t dma;
Andiry Xu186a7ef2012-03-05 17:49:36 +080044 int i;
Sarah Sharp0ebbab32009-04-27 19:52:34 -070045
46 seg = kzalloc(sizeof *seg, flags);
47 if (!seg)
Randy Dunlap326b4812010-04-19 08:53:50 -070048 return NULL;
Sarah Sharp0ebbab32009-04-27 19:52:34 -070049
50 seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma);
51 if (!seg->trbs) {
52 kfree(seg);
Randy Dunlap326b4812010-04-19 08:53:50 -070053 return NULL;
Sarah Sharp0ebbab32009-04-27 19:52:34 -070054 }
Sarah Sharp0ebbab32009-04-27 19:52:34 -070055
David Howellseb8ccd22013-03-28 18:48:35 +000056 memset(seg->trbs, 0, TRB_SEGMENT_SIZE);
Andiry Xu186a7ef2012-03-05 17:49:36 +080057 /* If the cycle state is 0, set the cycle bit to 1 for all the TRBs */
58 if (cycle_state == 0) {
59 for (i = 0; i < TRBS_PER_SEGMENT; i++)
Xenia Ragiadakou58719482013-09-09 21:03:09 +030060 seg->trbs[i].link.control |= cpu_to_le32(TRB_CYCLE);
Andiry Xu186a7ef2012-03-05 17:49:36 +080061 }
Sarah Sharp0ebbab32009-04-27 19:52:34 -070062 seg->dma = dma;
63 seg->next = NULL;
64
65 return seg;
66}
67
68static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg)
69{
Sarah Sharp0ebbab32009-04-27 19:52:34 -070070 if (seg->trbs) {
Sarah Sharp0ebbab32009-04-27 19:52:34 -070071 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma);
72 seg->trbs = NULL;
73 }
Sarah Sharp0ebbab32009-04-27 19:52:34 -070074 kfree(seg);
75}
76
Andiry Xu70d43602012-03-05 17:49:35 +080077static void xhci_free_segments_for_ring(struct xhci_hcd *xhci,
78 struct xhci_segment *first)
79{
80 struct xhci_segment *seg;
81
82 seg = first->next;
83 while (seg != first) {
84 struct xhci_segment *next = seg->next;
85 xhci_segment_free(xhci, seg);
86 seg = next;
87 }
88 xhci_segment_free(xhci, first);
89}
90
Sarah Sharp0ebbab32009-04-27 19:52:34 -070091/*
92 * Make the prev segment point to the next segment.
93 *
94 * Change the last TRB in the prev segment to be a Link TRB which points to the
95 * DMA address of the next segment. The caller needs to set any Link TRB
96 * related flags, such as End TRB, Toggle Cycle, and no snoop.
97 */
98static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
Andiry Xu3b72fca2012-03-05 17:49:32 +080099 struct xhci_segment *next, enum xhci_ring_type type)
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700100{
101 u32 val;
102
103 if (!prev || !next)
104 return;
105 prev->next = next;
Andiry Xu3b72fca2012-03-05 17:49:32 +0800106 if (type != TYPE_EVENT) {
Matt Evansf5960b62011-06-01 10:22:55 +1000107 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr =
108 cpu_to_le64(next->dma);
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700109
110 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
Matt Evans28ccd292011-03-29 13:40:46 +1100111 val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control);
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700112 val &= ~TRB_TYPE_BITMASK;
113 val |= TRB_TYPE(TRB_LINK);
Sarah Sharpb0567b32009-08-07 14:04:36 -0700114 /* Always set the chain bit with 0.95 hardware */
Andiry Xu7e393a82011-09-23 14:19:54 -0700115 /* Set chain bit for isoc rings on AMD 0.96 host */
116 if (xhci_link_trb_quirk(xhci) ||
Andiry Xu3b72fca2012-03-05 17:49:32 +0800117 (type == TYPE_ISOC &&
118 (xhci->quirks & XHCI_AMD_0x96_HOST)))
Sarah Sharpb0567b32009-08-07 14:04:36 -0700119 val |= TRB_CHAIN;
Matt Evans28ccd292011-03-29 13:40:46 +1100120 prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val);
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700121 }
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700122}
123
Andiry Xu8dfec612012-03-05 17:49:37 +0800124/*
125 * Link the ring to the new segments.
126 * Set Toggle Cycle for the new ring if needed.
127 */
128static void xhci_link_rings(struct xhci_hcd *xhci, struct xhci_ring *ring,
129 struct xhci_segment *first, struct xhci_segment *last,
130 unsigned int num_segs)
131{
132 struct xhci_segment *next;
133
134 if (!ring || !first || !last)
135 return;
136
137 next = ring->enq_seg->next;
138 xhci_link_segments(xhci, ring->enq_seg, first, ring->type);
139 xhci_link_segments(xhci, last, next, ring->type);
140 ring->num_segs += num_segs;
141 ring->num_trbs_free += (TRBS_PER_SEGMENT - 1) * num_segs;
142
143 if (ring->type != TYPE_EVENT && ring->enq_seg == ring->last_seg) {
144 ring->last_seg->trbs[TRBS_PER_SEGMENT-1].link.control
145 &= ~cpu_to_le32(LINK_TOGGLE);
146 last->trbs[TRBS_PER_SEGMENT-1].link.control
147 |= cpu_to_le32(LINK_TOGGLE);
148 ring->last_seg = last;
149 }
150}
151
Gerd Hoffmann15341302013-10-04 00:29:44 +0200152/*
153 * We need a radix tree for mapping physical addresses of TRBs to which stream
154 * ID they belong to. We need to do this because the host controller won't tell
155 * us which stream ring the TRB came from. We could store the stream ID in an
156 * event data TRB, but that doesn't help us for the cancellation case, since the
157 * endpoint may stop before it reaches that event data TRB.
158 *
159 * The radix tree maps the upper portion of the TRB DMA address to a ring
160 * segment that has the same upper portion of DMA addresses. For example, say I
Hans de Goede84c1e402013-11-05 15:50:03 +0100161 * have segments of size 1KB, that are always 1KB aligned. A segment may
Gerd Hoffmann15341302013-10-04 00:29:44 +0200162 * start at 0x10c91000 and end at 0x10c913f0. If I use the upper 10 bits, the
163 * key to the stream ID is 0x43244. I can use the DMA address of the TRB to
164 * pass the radix tree a key to get the right stream ID:
165 *
166 * 0x10c90fff >> 10 = 0x43243
167 * 0x10c912c0 >> 10 = 0x43244
168 * 0x10c91400 >> 10 = 0x43245
169 *
170 * Obviously, only those TRBs with DMA addresses that are within the segment
171 * will make the radix tree return the stream ID for that ring.
172 *
173 * Caveats for the radix tree:
174 *
175 * The radix tree uses an unsigned long as a key pair. On 32-bit systems, an
176 * unsigned long will be 32-bits; on a 64-bit system an unsigned long will be
177 * 64-bits. Since we only request 32-bit DMA addresses, we can use that as the
178 * key on 32-bit or 64-bit systems (it would also be fine if we asked for 64-bit
179 * PCI DMA addresses on a 64-bit system). There might be a problem on 32-bit
180 * extended systems (where the DMA address can be bigger than 32-bits),
181 * if we allow the PCI dma mask to be bigger than 32-bits. So don't do that.
182 */
Sarah Sharpd5734222013-10-17 12:44:58 -0700183static int xhci_insert_segment_mapping(struct radix_tree_root *trb_address_map,
184 struct xhci_ring *ring,
185 struct xhci_segment *seg,
186 gfp_t mem_flags)
Gerd Hoffmann15341302013-10-04 00:29:44 +0200187{
Gerd Hoffmann15341302013-10-04 00:29:44 +0200188 unsigned long key;
189 int ret;
190
Sarah Sharpd5734222013-10-17 12:44:58 -0700191 key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT);
192 /* Skip any segments that were already added. */
193 if (radix_tree_lookup(trb_address_map, key))
Gerd Hoffmann15341302013-10-04 00:29:44 +0200194 return 0;
195
Sarah Sharpd5734222013-10-17 12:44:58 -0700196 ret = radix_tree_maybe_preload(mem_flags);
197 if (ret)
198 return ret;
199 ret = radix_tree_insert(trb_address_map,
200 key, ring);
201 radix_tree_preload_end();
202 return ret;
203}
Gerd Hoffmann15341302013-10-04 00:29:44 +0200204
Sarah Sharpd5734222013-10-17 12:44:58 -0700205static void xhci_remove_segment_mapping(struct radix_tree_root *trb_address_map,
206 struct xhci_segment *seg)
207{
208 unsigned long key;
209
210 key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT);
211 if (radix_tree_lookup(trb_address_map, key))
212 radix_tree_delete(trb_address_map, key);
213}
214
215static int xhci_update_stream_segment_mapping(
216 struct radix_tree_root *trb_address_map,
217 struct xhci_ring *ring,
218 struct xhci_segment *first_seg,
219 struct xhci_segment *last_seg,
220 gfp_t mem_flags)
221{
222 struct xhci_segment *seg;
223 struct xhci_segment *failed_seg;
224 int ret;
225
226 if (WARN_ON_ONCE(trb_address_map == NULL))
227 return 0;
228
229 seg = first_seg;
230 do {
231 ret = xhci_insert_segment_mapping(trb_address_map,
232 ring, seg, mem_flags);
Gerd Hoffmann15341302013-10-04 00:29:44 +0200233 if (ret)
Sarah Sharpd5734222013-10-17 12:44:58 -0700234 goto remove_streams;
235 if (seg == last_seg)
236 return 0;
Gerd Hoffmann15341302013-10-04 00:29:44 +0200237 seg = seg->next;
Sarah Sharpd5734222013-10-17 12:44:58 -0700238 } while (seg != first_seg);
Gerd Hoffmann15341302013-10-04 00:29:44 +0200239
240 return 0;
Sarah Sharpd5734222013-10-17 12:44:58 -0700241
242remove_streams:
243 failed_seg = seg;
244 seg = first_seg;
245 do {
246 xhci_remove_segment_mapping(trb_address_map, seg);
247 if (seg == failed_seg)
248 return ret;
249 seg = seg->next;
250 } while (seg != first_seg);
251
252 return ret;
Gerd Hoffmann15341302013-10-04 00:29:44 +0200253}
254
255static void xhci_remove_stream_mapping(struct xhci_ring *ring)
256{
257 struct xhci_segment *seg;
Gerd Hoffmann15341302013-10-04 00:29:44 +0200258
259 if (WARN_ON_ONCE(ring->trb_address_map == NULL))
260 return;
261
262 seg = ring->first_seg;
263 do {
Sarah Sharpd5734222013-10-17 12:44:58 -0700264 xhci_remove_segment_mapping(ring->trb_address_map, seg);
Gerd Hoffmann15341302013-10-04 00:29:44 +0200265 seg = seg->next;
266 } while (seg != ring->first_seg);
267}
268
Sarah Sharpd5734222013-10-17 12:44:58 -0700269static int xhci_update_stream_mapping(struct xhci_ring *ring, gfp_t mem_flags)
270{
271 return xhci_update_stream_segment_mapping(ring->trb_address_map, ring,
272 ring->first_seg, ring->last_seg, mem_flags);
273}
274
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700275/* XXX: Do we need the hcd structure in all these functions? */
Sarah Sharpf94e01862009-04-27 19:58:38 -0700276void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring)
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700277{
Kautuk Consul0e6c7f72011-09-19 16:53:12 -0700278 if (!ring)
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700279 return;
Andiry Xu70d43602012-03-05 17:49:35 +0800280
Gerd Hoffmann15341302013-10-04 00:29:44 +0200281 if (ring->first_seg) {
282 if (ring->type == TYPE_STREAM)
283 xhci_remove_stream_mapping(ring);
Andiry Xu70d43602012-03-05 17:49:35 +0800284 xhci_free_segments_for_ring(xhci, ring->first_seg);
Gerd Hoffmann15341302013-10-04 00:29:44 +0200285 }
Andiry Xu70d43602012-03-05 17:49:35 +0800286
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700287 kfree(ring);
288}
289
Andiry Xu186a7ef2012-03-05 17:49:36 +0800290static void xhci_initialize_ring_info(struct xhci_ring *ring,
291 unsigned int cycle_state)
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800292{
293 /* The ring is empty, so the enqueue pointer == dequeue pointer */
294 ring->enqueue = ring->first_seg->trbs;
295 ring->enq_seg = ring->first_seg;
296 ring->dequeue = ring->enqueue;
297 ring->deq_seg = ring->first_seg;
298 /* The ring is initialized to 0. The producer must write 1 to the cycle
299 * bit to handover ownership of the TRB, so PCS = 1. The consumer must
300 * compare CCS to the cycle bit to check ownership, so CCS = 1.
Andiry Xu186a7ef2012-03-05 17:49:36 +0800301 *
302 * New rings are initialized with cycle state equal to 1; if we are
303 * handling ring expansion, set the cycle state equal to the old ring.
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800304 */
Andiry Xu186a7ef2012-03-05 17:49:36 +0800305 ring->cycle_state = cycle_state;
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800306 /* Not necessary for new rings, but needed for re-initialized rings */
307 ring->enq_updates = 0;
308 ring->deq_updates = 0;
Andiry Xub008df62012-03-05 17:49:34 +0800309
310 /*
311 * Each segment has a link TRB, and leave an extra TRB for SW
312 * accounting purpose
313 */
314 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800315}
316
Andiry Xu70d43602012-03-05 17:49:35 +0800317/* Allocate segments and link them for a ring */
318static int xhci_alloc_segments_for_ring(struct xhci_hcd *xhci,
319 struct xhci_segment **first, struct xhci_segment **last,
Andiry Xu186a7ef2012-03-05 17:49:36 +0800320 unsigned int num_segs, unsigned int cycle_state,
321 enum xhci_ring_type type, gfp_t flags)
Andiry Xu70d43602012-03-05 17:49:35 +0800322{
323 struct xhci_segment *prev;
324
Andiry Xu186a7ef2012-03-05 17:49:36 +0800325 prev = xhci_segment_alloc(xhci, cycle_state, flags);
Andiry Xu70d43602012-03-05 17:49:35 +0800326 if (!prev)
327 return -ENOMEM;
328 num_segs--;
329
330 *first = prev;
331 while (num_segs > 0) {
332 struct xhci_segment *next;
333
Andiry Xu186a7ef2012-03-05 17:49:36 +0800334 next = xhci_segment_alloc(xhci, cycle_state, flags);
Andiry Xu70d43602012-03-05 17:49:35 +0800335 if (!next) {
Julius Werner68e52542012-11-01 12:47:59 -0700336 prev = *first;
337 while (prev) {
338 next = prev->next;
339 xhci_segment_free(xhci, prev);
340 prev = next;
341 }
Andiry Xu70d43602012-03-05 17:49:35 +0800342 return -ENOMEM;
343 }
344 xhci_link_segments(xhci, prev, next, type);
345
346 prev = next;
347 num_segs--;
348 }
349 xhci_link_segments(xhci, prev, *first, type);
350 *last = prev;
351
352 return 0;
353}
354
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700355/**
356 * Create a new ring with zero or more segments.
357 *
358 * Link each segment together into a ring.
359 * Set the end flag and the cycle toggle bit on the last segment.
360 * See section 4.9.1 and figures 15 and 16.
361 */
362static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
Andiry Xu186a7ef2012-03-05 17:49:36 +0800363 unsigned int num_segs, unsigned int cycle_state,
364 enum xhci_ring_type type, gfp_t flags)
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700365{
366 struct xhci_ring *ring;
Andiry Xu70d43602012-03-05 17:49:35 +0800367 int ret;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700368
369 ring = kzalloc(sizeof *(ring), flags);
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700370 if (!ring)
Randy Dunlap326b4812010-04-19 08:53:50 -0700371 return NULL;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700372
Andiry Xu3fe4fe02012-03-05 17:49:33 +0800373 ring->num_segs = num_segs;
Sarah Sharpd0e96f52009-04-27 19:58:01 -0700374 INIT_LIST_HEAD(&ring->td_list);
Andiry Xu3b72fca2012-03-05 17:49:32 +0800375 ring->type = type;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700376 if (num_segs == 0)
377 return ring;
378
Andiry Xu70d43602012-03-05 17:49:35 +0800379 ret = xhci_alloc_segments_for_ring(xhci, &ring->first_seg,
Andiry Xu186a7ef2012-03-05 17:49:36 +0800380 &ring->last_seg, num_segs, cycle_state, type, flags);
Andiry Xu70d43602012-03-05 17:49:35 +0800381 if (ret)
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700382 goto fail;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700383
Andiry Xu3b72fca2012-03-05 17:49:32 +0800384 /* Only event ring does not use link TRB */
385 if (type != TYPE_EVENT) {
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700386 /* See section 4.9.2.1 and 6.4.4.1 */
Andiry Xu70d43602012-03-05 17:49:35 +0800387 ring->last_seg->trbs[TRBS_PER_SEGMENT - 1].link.control |=
Matt Evansf5960b62011-06-01 10:22:55 +1000388 cpu_to_le32(LINK_TOGGLE);
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700389 }
Andiry Xu186a7ef2012-03-05 17:49:36 +0800390 xhci_initialize_ring_info(ring, cycle_state);
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700391 return ring;
392
393fail:
Julius Werner68e52542012-11-01 12:47:59 -0700394 kfree(ring);
Randy Dunlap326b4812010-04-19 08:53:50 -0700395 return NULL;
Sarah Sharp0ebbab32009-04-27 19:52:34 -0700396}
397
Sarah Sharp412566b2009-12-09 15:59:01 -0800398void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci,
399 struct xhci_virt_device *virt_dev,
400 unsigned int ep_index)
401{
402 int rings_cached;
403
404 rings_cached = virt_dev->num_rings_cached;
405 if (rings_cached < XHCI_MAX_RINGS_CACHED) {
Sarah Sharp412566b2009-12-09 15:59:01 -0800406 virt_dev->ring_cache[rings_cached] =
407 virt_dev->eps[ep_index].ring;
Sarah Sharp30f89ca2011-05-16 13:09:08 -0700408 virt_dev->num_rings_cached++;
Sarah Sharp412566b2009-12-09 15:59:01 -0800409 xhci_dbg(xhci, "Cached old ring, "
410 "%d ring%s cached\n",
Sarah Sharp30f89ca2011-05-16 13:09:08 -0700411 virt_dev->num_rings_cached,
412 (virt_dev->num_rings_cached > 1) ? "s" : "");
Sarah Sharp412566b2009-12-09 15:59:01 -0800413 } else {
414 xhci_ring_free(xhci, virt_dev->eps[ep_index].ring);
415 xhci_dbg(xhci, "Ring cache full (%d rings), "
416 "freeing ring\n",
417 virt_dev->num_rings_cached);
418 }
419 virt_dev->eps[ep_index].ring = NULL;
420}
421
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800422/* Zero an endpoint ring (except for link TRBs) and move the enqueue and dequeue
423 * pointers to the beginning of the ring.
424 */
425static void xhci_reinit_cached_ring(struct xhci_hcd *xhci,
Andiry Xu186a7ef2012-03-05 17:49:36 +0800426 struct xhci_ring *ring, unsigned int cycle_state,
427 enum xhci_ring_type type)
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800428{
429 struct xhci_segment *seg = ring->first_seg;
Andiry Xu186a7ef2012-03-05 17:49:36 +0800430 int i;
431
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800432 do {
433 memset(seg->trbs, 0,
434 sizeof(union xhci_trb)*TRBS_PER_SEGMENT);
Andiry Xu186a7ef2012-03-05 17:49:36 +0800435 if (cycle_state == 0) {
436 for (i = 0; i < TRBS_PER_SEGMENT; i++)
Xenia Ragiadakou58719482013-09-09 21:03:09 +0300437 seg->trbs[i].link.control |=
438 cpu_to_le32(TRB_CYCLE);
Andiry Xu186a7ef2012-03-05 17:49:36 +0800439 }
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800440 /* All endpoint rings have link TRBs */
Andiry Xu3b72fca2012-03-05 17:49:32 +0800441 xhci_link_segments(xhci, seg, seg->next, type);
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800442 seg = seg->next;
443 } while (seg != ring->first_seg);
Andiry Xu3b72fca2012-03-05 17:49:32 +0800444 ring->type = type;
Andiry Xu186a7ef2012-03-05 17:49:36 +0800445 xhci_initialize_ring_info(ring, cycle_state);
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800446 /* td list should be empty since all URBs have been cancelled,
447 * but just in case...
448 */
449 INIT_LIST_HEAD(&ring->td_list);
450}
451
Andiry Xu8dfec612012-03-05 17:49:37 +0800452/*
453 * Expand an existing ring.
454 * Look for a cached ring or allocate a new ring which has same segment numbers
455 * and link the two rings.
456 */
457int xhci_ring_expansion(struct xhci_hcd *xhci, struct xhci_ring *ring,
458 unsigned int num_trbs, gfp_t flags)
459{
460 struct xhci_segment *first;
461 struct xhci_segment *last;
462 unsigned int num_segs;
463 unsigned int num_segs_needed;
464 int ret;
465
466 num_segs_needed = (num_trbs + (TRBS_PER_SEGMENT - 1) - 1) /
467 (TRBS_PER_SEGMENT - 1);
468
469 /* Allocate number of segments we needed, or double the ring size */
470 num_segs = ring->num_segs > num_segs_needed ?
471 ring->num_segs : num_segs_needed;
472
473 ret = xhci_alloc_segments_for_ring(xhci, &first, &last,
474 num_segs, ring->cycle_state, ring->type, flags);
475 if (ret)
476 return -ENOMEM;
477
Sarah Sharpd5734222013-10-17 12:44:58 -0700478 if (ring->type == TYPE_STREAM)
479 ret = xhci_update_stream_segment_mapping(ring->trb_address_map,
480 ring, first, last, flags);
481 if (ret) {
482 struct xhci_segment *next;
483 do {
484 next = first->next;
485 xhci_segment_free(xhci, first);
486 if (first == last)
487 break;
488 first = next;
489 } while (true);
490 return ret;
491 }
492
Andiry Xu8dfec612012-03-05 17:49:37 +0800493 xhci_link_rings(xhci, ring, first, last, num_segs);
Xenia Ragiadakou68ffb012013-08-14 06:33:56 +0300494 xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
495 "ring expansion succeed, now has %d segments",
Andiry Xu8dfec612012-03-05 17:49:37 +0800496 ring->num_segs);
497
498 return 0;
499}
500
John Yound115b042009-07-27 12:05:15 -0700501#define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
502
Randy Dunlap326b4812010-04-19 08:53:50 -0700503static struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
John Yound115b042009-07-27 12:05:15 -0700504 int type, gfp_t flags)
505{
Sarah Sharp29f9d542013-04-23 15:49:47 -0700506 struct xhci_container_ctx *ctx;
507
508 if ((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT))
509 return NULL;
510
511 ctx = kzalloc(sizeof(*ctx), flags);
John Yound115b042009-07-27 12:05:15 -0700512 if (!ctx)
513 return NULL;
514
John Yound115b042009-07-27 12:05:15 -0700515 ctx->type = type;
516 ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
517 if (type == XHCI_CTX_TYPE_INPUT)
518 ctx->size += CTX_SIZE(xhci->hcc_params);
519
520 ctx->bytes = dma_pool_alloc(xhci->device_pool, flags, &ctx->dma);
Mathias Nyman025f8802013-06-17 09:56:33 -0700521 if (!ctx->bytes) {
522 kfree(ctx);
523 return NULL;
524 }
John Yound115b042009-07-27 12:05:15 -0700525 memset(ctx->bytes, 0, ctx->size);
526 return ctx;
527}
528
Randy Dunlap326b4812010-04-19 08:53:50 -0700529static void xhci_free_container_ctx(struct xhci_hcd *xhci,
John Yound115b042009-07-27 12:05:15 -0700530 struct xhci_container_ctx *ctx)
531{
Sarah Sharpa1d78c12009-12-09 15:59:03 -0800532 if (!ctx)
533 return;
John Yound115b042009-07-27 12:05:15 -0700534 dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma);
535 kfree(ctx);
536}
537
538struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci,
539 struct xhci_container_ctx *ctx)
540{
Sarah Sharp92f8e762013-04-23 17:11:14 -0700541 if (ctx->type != XHCI_CTX_TYPE_INPUT)
542 return NULL;
543
John Yound115b042009-07-27 12:05:15 -0700544 return (struct xhci_input_control_ctx *)ctx->bytes;
545}
546
547struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci,
548 struct xhci_container_ctx *ctx)
549{
550 if (ctx->type == XHCI_CTX_TYPE_DEVICE)
551 return (struct xhci_slot_ctx *)ctx->bytes;
552
553 return (struct xhci_slot_ctx *)
554 (ctx->bytes + CTX_SIZE(xhci->hcc_params));
555}
556
557struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
558 struct xhci_container_ctx *ctx,
559 unsigned int ep_index)
560{
561 /* increment ep index by offset of start of ep ctx array */
562 ep_index++;
563 if (ctx->type == XHCI_CTX_TYPE_INPUT)
564 ep_index++;
565
566 return (struct xhci_ep_ctx *)
567 (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params)));
568}
569
Sarah Sharp8df75f42010-04-02 15:34:16 -0700570
571/***************** Streams structures manipulation *************************/
572
Dmitry Torokhov8212a492011-02-08 13:55:59 -0800573static void xhci_free_stream_ctx(struct xhci_hcd *xhci,
Sarah Sharp8df75f42010-04-02 15:34:16 -0700574 unsigned int num_stream_ctxs,
575 struct xhci_stream_ctx *stream_ctx, dma_addr_t dma)
576{
Xenia Ragiadakou2a100042013-11-15 03:18:08 +0200577 struct device *dev = xhci_to_hcd(xhci)->self.controller;
Hans de Goedeee4aa542013-10-04 00:29:46 +0200578 size_t size = sizeof(struct xhci_stream_ctx) * num_stream_ctxs;
Sarah Sharp8df75f42010-04-02 15:34:16 -0700579
Hans de Goedeee4aa542013-10-04 00:29:46 +0200580 if (size > MEDIUM_STREAM_ARRAY_SIZE)
581 dma_free_coherent(dev, size,
Sarah Sharp8df75f42010-04-02 15:34:16 -0700582 stream_ctx, dma);
Hans de Goedeee4aa542013-10-04 00:29:46 +0200583 else if (size <= SMALL_STREAM_ARRAY_SIZE)
Sarah Sharp8df75f42010-04-02 15:34:16 -0700584 return dma_pool_free(xhci->small_streams_pool,
585 stream_ctx, dma);
586 else
587 return dma_pool_free(xhci->medium_streams_pool,
588 stream_ctx, dma);
589}
590
591/*
592 * The stream context array for each endpoint with bulk streams enabled can
593 * vary in size, based on:
594 * - how many streams the endpoint supports,
595 * - the maximum primary stream array size the host controller supports,
596 * - and how many streams the device driver asks for.
597 *
598 * The stream context array must be a power of 2, and can be as small as
599 * 64 bytes or as large as 1MB.
600 */
Dmitry Torokhov8212a492011-02-08 13:55:59 -0800601static struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci,
Sarah Sharp8df75f42010-04-02 15:34:16 -0700602 unsigned int num_stream_ctxs, dma_addr_t *dma,
603 gfp_t mem_flags)
604{
Xenia Ragiadakou2a100042013-11-15 03:18:08 +0200605 struct device *dev = xhci_to_hcd(xhci)->self.controller;
Hans de Goedeee4aa542013-10-04 00:29:46 +0200606 size_t size = sizeof(struct xhci_stream_ctx) * num_stream_ctxs;
Sarah Sharp8df75f42010-04-02 15:34:16 -0700607
Hans de Goedeee4aa542013-10-04 00:29:46 +0200608 if (size > MEDIUM_STREAM_ARRAY_SIZE)
609 return dma_alloc_coherent(dev, size,
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -0700610 dma, mem_flags);
Hans de Goedeee4aa542013-10-04 00:29:46 +0200611 else if (size <= SMALL_STREAM_ARRAY_SIZE)
Sarah Sharp8df75f42010-04-02 15:34:16 -0700612 return dma_pool_alloc(xhci->small_streams_pool,
613 mem_flags, dma);
614 else
615 return dma_pool_alloc(xhci->medium_streams_pool,
616 mem_flags, dma);
617}
618
Sarah Sharpe9df17e2010-04-02 15:34:43 -0700619struct xhci_ring *xhci_dma_to_transfer_ring(
620 struct xhci_virt_ep *ep,
621 u64 address)
622{
623 if (ep->ep_state & EP_HAS_STREAMS)
624 return radix_tree_lookup(&ep->stream_info->trb_address_map,
David Howellseb8ccd22013-03-28 18:48:35 +0000625 address >> TRB_SEGMENT_SHIFT);
Sarah Sharpe9df17e2010-04-02 15:34:43 -0700626 return ep->ring;
627}
628
Sarah Sharpe9df17e2010-04-02 15:34:43 -0700629struct xhci_ring *xhci_stream_id_to_ring(
630 struct xhci_virt_device *dev,
631 unsigned int ep_index,
632 unsigned int stream_id)
633{
634 struct xhci_virt_ep *ep = &dev->eps[ep_index];
635
636 if (stream_id == 0)
637 return ep->ring;
638 if (!ep->stream_info)
639 return NULL;
640
641 if (stream_id > ep->stream_info->num_streams)
642 return NULL;
643 return ep->stream_info->stream_rings[stream_id];
644}
645
Sarah Sharp8df75f42010-04-02 15:34:16 -0700646/*
647 * Change an endpoint's internal structure so it supports stream IDs. The
648 * number of requested streams includes stream 0, which cannot be used by device
649 * drivers.
650 *
651 * The number of stream contexts in the stream context array may be bigger than
652 * the number of streams the driver wants to use. This is because the number of
653 * stream context array entries must be a power of two.
Sarah Sharp8df75f42010-04-02 15:34:16 -0700654 */
655struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci,
656 unsigned int num_stream_ctxs,
657 unsigned int num_streams, gfp_t mem_flags)
658{
659 struct xhci_stream_info *stream_info;
660 u32 cur_stream;
661 struct xhci_ring *cur_ring;
Sarah Sharp8df75f42010-04-02 15:34:16 -0700662 u64 addr;
663 int ret;
664
665 xhci_dbg(xhci, "Allocating %u streams and %u "
666 "stream context array entries.\n",
667 num_streams, num_stream_ctxs);
668 if (xhci->cmd_ring_reserved_trbs == MAX_RSVD_CMD_TRBS) {
669 xhci_dbg(xhci, "Command ring has no reserved TRBs available\n");
670 return NULL;
671 }
672 xhci->cmd_ring_reserved_trbs++;
673
674 stream_info = kzalloc(sizeof(struct xhci_stream_info), mem_flags);
675 if (!stream_info)
676 goto cleanup_trbs;
677
678 stream_info->num_streams = num_streams;
679 stream_info->num_stream_ctxs = num_stream_ctxs;
680
681 /* Initialize the array of virtual pointers to stream rings. */
682 stream_info->stream_rings = kzalloc(
683 sizeof(struct xhci_ring *)*num_streams,
684 mem_flags);
685 if (!stream_info->stream_rings)
686 goto cleanup_info;
687
688 /* Initialize the array of DMA addresses for stream rings for the HW. */
689 stream_info->stream_ctx_array = xhci_alloc_stream_ctx(xhci,
690 num_stream_ctxs, &stream_info->ctx_array_dma,
691 mem_flags);
692 if (!stream_info->stream_ctx_array)
693 goto cleanup_ctx;
694 memset(stream_info->stream_ctx_array, 0,
695 sizeof(struct xhci_stream_ctx)*num_stream_ctxs);
696
697 /* Allocate everything needed to free the stream rings later */
698 stream_info->free_streams_command =
699 xhci_alloc_command(xhci, true, true, mem_flags);
700 if (!stream_info->free_streams_command)
701 goto cleanup_ctx;
702
703 INIT_RADIX_TREE(&stream_info->trb_address_map, GFP_ATOMIC);
704
705 /* Allocate rings for all the streams that the driver will use,
706 * and add their segment DMA addresses to the radix tree.
707 * Stream 0 is reserved.
708 */
709 for (cur_stream = 1; cur_stream < num_streams; cur_stream++) {
710 stream_info->stream_rings[cur_stream] =
Andiry Xu2fdcd472012-03-05 17:49:39 +0800711 xhci_ring_alloc(xhci, 2, 1, TYPE_STREAM, mem_flags);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700712 cur_ring = stream_info->stream_rings[cur_stream];
713 if (!cur_ring)
714 goto cleanup_rings;
Sarah Sharpe9df17e2010-04-02 15:34:43 -0700715 cur_ring->stream_id = cur_stream;
Gerd Hoffmann15341302013-10-04 00:29:44 +0200716 cur_ring->trb_address_map = &stream_info->trb_address_map;
Sarah Sharp8df75f42010-04-02 15:34:16 -0700717 /* Set deq ptr, cycle bit, and stream context type */
718 addr = cur_ring->first_seg->dma |
719 SCT_FOR_CTX(SCT_PRI_TR) |
720 cur_ring->cycle_state;
Matt Evansf5960b62011-06-01 10:22:55 +1000721 stream_info->stream_ctx_array[cur_stream].stream_ring =
722 cpu_to_le64(addr);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700723 xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n",
724 cur_stream, (unsigned long long) addr);
725
Gerd Hoffmann15341302013-10-04 00:29:44 +0200726 ret = xhci_update_stream_mapping(cur_ring, mem_flags);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700727 if (ret) {
728 xhci_ring_free(xhci, cur_ring);
729 stream_info->stream_rings[cur_stream] = NULL;
730 goto cleanup_rings;
731 }
732 }
733 /* Leave the other unused stream ring pointers in the stream context
734 * array initialized to zero. This will cause the xHC to give us an
735 * error if the device asks for a stream ID we don't have setup (if it
736 * was any other way, the host controller would assume the ring is
737 * "empty" and wait forever for data to be queued to that stream ID).
738 */
Sarah Sharp8df75f42010-04-02 15:34:16 -0700739
740 return stream_info;
741
742cleanup_rings:
743 for (cur_stream = 1; cur_stream < num_streams; cur_stream++) {
744 cur_ring = stream_info->stream_rings[cur_stream];
745 if (cur_ring) {
Sarah Sharp8df75f42010-04-02 15:34:16 -0700746 xhci_ring_free(xhci, cur_ring);
747 stream_info->stream_rings[cur_stream] = NULL;
748 }
749 }
750 xhci_free_command(xhci, stream_info->free_streams_command);
751cleanup_ctx:
752 kfree(stream_info->stream_rings);
753cleanup_info:
754 kfree(stream_info);
755cleanup_trbs:
756 xhci->cmd_ring_reserved_trbs--;
757 return NULL;
758}
759/*
760 * Sets the MaxPStreams field and the Linear Stream Array field.
761 * Sets the dequeue pointer to the stream context array.
762 */
763void xhci_setup_streams_ep_input_ctx(struct xhci_hcd *xhci,
764 struct xhci_ep_ctx *ep_ctx,
765 struct xhci_stream_info *stream_info)
766{
767 u32 max_primary_streams;
768 /* MaxPStreams is the number of stream context array entries, not the
769 * number we're actually using. Must be in 2^(MaxPstreams + 1) format.
770 * fls(0) = 0, fls(0x1) = 1, fls(0x10) = 2, fls(0x100) = 3, etc.
771 */
772 max_primary_streams = fls(stream_info->num_stream_ctxs) - 2;
Xenia Ragiadakou3a7fa5b2013-07-31 07:35:27 +0300773 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
774 "Setting number of stream ctx array entries to %u",
Sarah Sharp8df75f42010-04-02 15:34:16 -0700775 1 << (max_primary_streams + 1));
Matt Evans28ccd292011-03-29 13:40:46 +1100776 ep_ctx->ep_info &= cpu_to_le32(~EP_MAXPSTREAMS_MASK);
777 ep_ctx->ep_info |= cpu_to_le32(EP_MAXPSTREAMS(max_primary_streams)
778 | EP_HAS_LSA);
779 ep_ctx->deq = cpu_to_le64(stream_info->ctx_array_dma);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700780}
781
782/*
783 * Sets the MaxPStreams field and the Linear Stream Array field to 0.
784 * Reinstalls the "normal" endpoint ring (at its previous dequeue mark,
785 * not at the beginning of the ring).
786 */
787void xhci_setup_no_streams_ep_input_ctx(struct xhci_hcd *xhci,
788 struct xhci_ep_ctx *ep_ctx,
789 struct xhci_virt_ep *ep)
790{
791 dma_addr_t addr;
Matt Evans28ccd292011-03-29 13:40:46 +1100792 ep_ctx->ep_info &= cpu_to_le32(~(EP_MAXPSTREAMS_MASK | EP_HAS_LSA));
Sarah Sharp8df75f42010-04-02 15:34:16 -0700793 addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue);
Matt Evans28ccd292011-03-29 13:40:46 +1100794 ep_ctx->deq = cpu_to_le64(addr | ep->ring->cycle_state);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700795}
796
797/* Frees all stream contexts associated with the endpoint,
798 *
799 * Caller should fix the endpoint context streams fields.
800 */
801void xhci_free_stream_info(struct xhci_hcd *xhci,
802 struct xhci_stream_info *stream_info)
803{
804 int cur_stream;
805 struct xhci_ring *cur_ring;
Sarah Sharp8df75f42010-04-02 15:34:16 -0700806
807 if (!stream_info)
808 return;
809
810 for (cur_stream = 1; cur_stream < stream_info->num_streams;
811 cur_stream++) {
812 cur_ring = stream_info->stream_rings[cur_stream];
813 if (cur_ring) {
Sarah Sharp8df75f42010-04-02 15:34:16 -0700814 xhci_ring_free(xhci, cur_ring);
815 stream_info->stream_rings[cur_stream] = NULL;
816 }
817 }
818 xhci_free_command(xhci, stream_info->free_streams_command);
819 xhci->cmd_ring_reserved_trbs--;
820 if (stream_info->stream_ctx_array)
821 xhci_free_stream_ctx(xhci,
822 stream_info->num_stream_ctxs,
823 stream_info->stream_ctx_array,
824 stream_info->ctx_array_dma);
825
Xenia Ragiadakou0d3703b2013-08-26 23:29:48 +0300826 kfree(stream_info->stream_rings);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700827 kfree(stream_info);
828}
829
830
831/***************** Device context manipulation *************************/
832
Sarah Sharp6f5165c2009-10-27 10:57:01 -0700833static void xhci_init_endpoint_timer(struct xhci_hcd *xhci,
834 struct xhci_virt_ep *ep)
835{
836 init_timer(&ep->stop_cmd_timer);
837 ep->stop_cmd_timer.data = (unsigned long) ep;
838 ep->stop_cmd_timer.function = xhci_stop_endpoint_command_watchdog;
839 ep->xhci = xhci;
840}
841
Sarah Sharp839c8172011-09-02 11:05:47 -0700842static void xhci_free_tt_info(struct xhci_hcd *xhci,
843 struct xhci_virt_device *virt_dev,
844 int slot_id)
845{
Sarah Sharp839c8172011-09-02 11:05:47 -0700846 struct list_head *tt_list_head;
Takashi Iwai46ed8f02012-06-01 10:06:23 +0200847 struct xhci_tt_bw_info *tt_info, *next;
848 bool slot_found = false;
Sarah Sharp839c8172011-09-02 11:05:47 -0700849
850 /* If the device never made it past the Set Address stage,
851 * it may not have the real_port set correctly.
852 */
853 if (virt_dev->real_port == 0 ||
854 virt_dev->real_port > HCS_MAX_PORTS(xhci->hcs_params1)) {
855 xhci_dbg(xhci, "Bad real port.\n");
856 return;
857 }
858
859 tt_list_head = &(xhci->rh_bw[virt_dev->real_port - 1].tts);
Takashi Iwai46ed8f02012-06-01 10:06:23 +0200860 list_for_each_entry_safe(tt_info, next, tt_list_head, tt_list) {
861 /* Multi-TT hubs will have more than one entry */
862 if (tt_info->slot_id == slot_id) {
863 slot_found = true;
864 list_del(&tt_info->tt_list);
865 kfree(tt_info);
866 } else if (slot_found) {
Sarah Sharp839c8172011-09-02 11:05:47 -0700867 break;
Takashi Iwai46ed8f02012-06-01 10:06:23 +0200868 }
Sarah Sharp839c8172011-09-02 11:05:47 -0700869 }
Sarah Sharp839c8172011-09-02 11:05:47 -0700870}
871
872int xhci_alloc_tt_info(struct xhci_hcd *xhci,
873 struct xhci_virt_device *virt_dev,
874 struct usb_device *hdev,
875 struct usb_tt *tt, gfp_t mem_flags)
876{
877 struct xhci_tt_bw_info *tt_info;
878 unsigned int num_ports;
879 int i, j;
880
881 if (!tt->multi)
882 num_ports = 1;
883 else
884 num_ports = hdev->maxchild;
885
886 for (i = 0; i < num_ports; i++, tt_info++) {
887 struct xhci_interval_bw_table *bw_table;
888
889 tt_info = kzalloc(sizeof(*tt_info), mem_flags);
890 if (!tt_info)
891 goto free_tts;
892 INIT_LIST_HEAD(&tt_info->tt_list);
893 list_add(&tt_info->tt_list,
894 &xhci->rh_bw[virt_dev->real_port - 1].tts);
895 tt_info->slot_id = virt_dev->udev->slot_id;
896 if (tt->multi)
897 tt_info->ttport = i+1;
898 bw_table = &tt_info->bw_table;
899 for (j = 0; j < XHCI_MAX_INTERVAL; j++)
900 INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints);
901 }
902 return 0;
903
904free_tts:
905 xhci_free_tt_info(xhci, virt_dev, virt_dev->udev->slot_id);
906 return -ENOMEM;
907}
908
909
910/* All the xhci_tds in the ring's TD list should be freed at this point.
911 * Should be called with xhci->lock held if there is any chance the TT lists
912 * will be manipulated by the configure endpoint, allocate device, or update
913 * hub functions while this function is removing the TT entries from the list.
914 */
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700915void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
916{
917 struct xhci_virt_device *dev;
918 int i;
Sarah Sharp2e279802011-09-02 11:05:50 -0700919 int old_active_eps = 0;
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700920
921 /* Slot ID 0 is reserved */
922 if (slot_id == 0 || !xhci->devs[slot_id])
923 return;
924
925 dev = xhci->devs[slot_id];
Sarah Sharp8e595a52009-07-27 12:03:31 -0700926 xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700927 if (!dev)
928 return;
929
Sarah Sharp2e279802011-09-02 11:05:50 -0700930 if (dev->tt_info)
931 old_active_eps = dev->tt_info->active_eps;
932
Sarah Sharp8df75f42010-04-02 15:34:16 -0700933 for (i = 0; i < 31; ++i) {
Sarah Sharp63a0d9a2009-09-04 10:53:09 -0700934 if (dev->eps[i].ring)
935 xhci_ring_free(xhci, dev->eps[i].ring);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700936 if (dev->eps[i].stream_info)
937 xhci_free_stream_info(xhci,
938 dev->eps[i].stream_info);
Sarah Sharp2e279802011-09-02 11:05:50 -0700939 /* Endpoints on the TT/root port lists should have been removed
940 * when usb_disable_device() was called for the device.
941 * We can't drop them anyway, because the udev might have gone
942 * away by this point, and we can't tell what speed it was.
943 */
944 if (!list_empty(&dev->eps[i].bw_endpoint_list))
945 xhci_warn(xhci, "Slot %u endpoint %u "
946 "not removed from BW list!\n",
947 slot_id, i);
Sarah Sharp8df75f42010-04-02 15:34:16 -0700948 }
Sarah Sharp839c8172011-09-02 11:05:47 -0700949 /* If this is a hub, free the TT(s) from the TT list */
950 xhci_free_tt_info(xhci, dev, slot_id);
Sarah Sharp2e279802011-09-02 11:05:50 -0700951 /* If necessary, update the number of active TTs on this root port */
952 xhci_update_tt_active_eps(xhci, dev, old_active_eps);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700953
Sarah Sharp74f9fe22009-12-03 09:44:29 -0800954 if (dev->ring_cache) {
955 for (i = 0; i < dev->num_rings_cached; i++)
956 xhci_ring_free(xhci, dev->ring_cache[i]);
957 kfree(dev->ring_cache);
958 }
959
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700960 if (dev->in_ctx)
John Yound115b042009-07-27 12:05:15 -0700961 xhci_free_container_ctx(xhci, dev->in_ctx);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700962 if (dev->out_ctx)
John Yound115b042009-07-27 12:05:15 -0700963 xhci_free_container_ctx(xhci, dev->out_ctx);
964
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700965 kfree(xhci->devs[slot_id]);
Randy Dunlap326b4812010-04-19 08:53:50 -0700966 xhci->devs[slot_id] = NULL;
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700967}
968
969int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
970 struct usb_device *udev, gfp_t flags)
971{
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700972 struct xhci_virt_device *dev;
Sarah Sharp63a0d9a2009-09-04 10:53:09 -0700973 int i;
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700974
975 /* Slot ID 0 is reserved */
976 if (slot_id == 0 || xhci->devs[slot_id]) {
977 xhci_warn(xhci, "Bad Slot ID %d\n", slot_id);
978 return 0;
979 }
980
981 xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags);
982 if (!xhci->devs[slot_id])
983 return 0;
984 dev = xhci->devs[slot_id];
985
John Yound115b042009-07-27 12:05:15 -0700986 /* Allocate the (output) device context that will be used in the HC. */
987 dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700988 if (!dev->out_ctx)
989 goto fail;
John Yound115b042009-07-27 12:05:15 -0700990
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700991 xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id,
John Yound115b042009-07-27 12:05:15 -0700992 (unsigned long long)dev->out_ctx->dma);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700993
994 /* Allocate the (input) device context for address device command */
John Yound115b042009-07-27 12:05:15 -0700995 dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700996 if (!dev->in_ctx)
997 goto fail;
John Yound115b042009-07-27 12:05:15 -0700998
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -0700999 xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id,
John Yound115b042009-07-27 12:05:15 -07001000 (unsigned long long)dev->in_ctx->dma);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001001
Sarah Sharp6f5165c2009-10-27 10:57:01 -07001002 /* Initialize the cancellation list and watchdog timers for each ep */
1003 for (i = 0; i < 31; i++) {
1004 xhci_init_endpoint_timer(xhci, &dev->eps[i]);
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07001005 INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list);
Sarah Sharp2e279802011-09-02 11:05:50 -07001006 INIT_LIST_HEAD(&dev->eps[i].bw_endpoint_list);
Sarah Sharp6f5165c2009-10-27 10:57:01 -07001007 }
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07001008
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001009 /* Allocate endpoint 0 ring */
Andiry Xu2fdcd472012-03-05 17:49:39 +08001010 dev->eps[0].ring = xhci_ring_alloc(xhci, 2, 1, TYPE_CTRL, flags);
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07001011 if (!dev->eps[0].ring)
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001012 goto fail;
1013
Sarah Sharp74f9fe22009-12-03 09:44:29 -08001014 /* Allocate pointers to the ring cache */
1015 dev->ring_cache = kzalloc(
1016 sizeof(struct xhci_ring *)*XHCI_MAX_RINGS_CACHED,
1017 flags);
1018 if (!dev->ring_cache)
1019 goto fail;
1020 dev->num_rings_cached = 0;
1021
Sarah Sharpf94e01862009-04-27 19:58:38 -07001022 init_completion(&dev->cmd_completion);
Andiry Xu64927732010-10-14 07:22:45 -07001023 dev->udev = udev;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001024
Sarah Sharp28c2d2e2009-07-27 12:05:08 -07001025 /* Point to output device context in dcbaa. */
Matt Evans28ccd292011-03-29 13:40:46 +11001026 xhci->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(dev->out_ctx->dma);
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07001027 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
Matt Evans28ccd292011-03-29 13:40:46 +11001028 slot_id,
1029 &xhci->dcbaa->dev_context_ptrs[slot_id],
Matt Evansf5960b62011-06-01 10:22:55 +10001030 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id]));
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001031
1032 return 1;
1033fail:
1034 xhci_free_virt_device(xhci, slot_id);
1035 return 0;
1036}
1037
Sarah Sharp2d1ee592010-07-09 17:08:54 +02001038void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci,
1039 struct usb_device *udev)
1040{
1041 struct xhci_virt_device *virt_dev;
1042 struct xhci_ep_ctx *ep0_ctx;
1043 struct xhci_ring *ep_ring;
1044
1045 virt_dev = xhci->devs[udev->slot_id];
1046 ep0_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, 0);
1047 ep_ring = virt_dev->eps[0].ring;
1048 /*
1049 * FIXME we don't keep track of the dequeue pointer very well after a
1050 * Set TR dequeue pointer, so we're setting the dequeue pointer of the
1051 * host to our enqueue pointer. This should only be called after a
1052 * configured device has reset, so all control transfers should have
1053 * been completed or cancelled before the reset.
1054 */
Matt Evans28ccd292011-03-29 13:40:46 +11001055 ep0_ctx->deq = cpu_to_le64(xhci_trb_virt_to_dma(ep_ring->enq_seg,
1056 ep_ring->enqueue)
1057 | ep_ring->cycle_state);
Sarah Sharp2d1ee592010-07-09 17:08:54 +02001058}
1059
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001060/*
1061 * The xHCI roothub may have ports of differing speeds in any order in the port
1062 * status registers. xhci->port_array provides an array of the port speed for
1063 * each offset into the port status registers.
1064 *
1065 * The xHCI hardware wants to know the roothub port number that the USB device
1066 * is attached to (or the roothub port its ancestor hub is attached to). All we
1067 * know is the index of that port under either the USB 2.0 or the USB 3.0
1068 * roothub, but that doesn't give us the real index into the HW port status
Lan Tianyu3f5eb142013-03-19 16:48:12 +08001069 * registers. Call xhci_find_raw_port_number() to get real index.
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001070 */
1071static u32 xhci_find_real_port_number(struct xhci_hcd *xhci,
1072 struct usb_device *udev)
1073{
1074 struct usb_device *top_dev;
Lan Tianyu3f5eb142013-03-19 16:48:12 +08001075 struct usb_hcd *hcd;
1076
1077 if (udev->speed == USB_SPEED_SUPER)
1078 hcd = xhci->shared_hcd;
1079 else
1080 hcd = xhci->main_hcd;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001081
1082 for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
1083 top_dev = top_dev->parent)
1084 /* Found device below root hub */;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001085
Lan Tianyu3f5eb142013-03-19 16:48:12 +08001086 return xhci_find_raw_port_number(hcd, top_dev->portnum);
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001087}
1088
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001089/* Setup an xHCI virtual device for a Set Address command */
1090int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev)
1091{
1092 struct xhci_virt_device *dev;
1093 struct xhci_ep_ctx *ep0_ctx;
John Yound115b042009-07-27 12:05:15 -07001094 struct xhci_slot_ctx *slot_ctx;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001095 u32 port_num;
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001096 u32 max_packets;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001097 struct usb_device *top_dev;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001098
1099 dev = xhci->devs[udev->slot_id];
1100 /* Slot ID 0 is reserved */
1101 if (udev->slot_id == 0 || !dev) {
1102 xhci_warn(xhci, "Slot ID %d is not assigned to this device\n",
1103 udev->slot_id);
1104 return -EINVAL;
1105 }
John Yound115b042009-07-27 12:05:15 -07001106 ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);
John Yound115b042009-07-27 12:05:15 -07001107 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001108
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001109 /* 3) Only the control endpoint is valid - one endpoint context */
Matt Evansf5960b62011-06-01 10:22:55 +10001110 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001111 switch (udev->speed) {
1112 case USB_SPEED_SUPER:
Matt Evansf5960b62011-06-01 10:22:55 +10001113 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS);
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001114 max_packets = MAX_PACKET(512);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001115 break;
1116 case USB_SPEED_HIGH:
Matt Evansf5960b62011-06-01 10:22:55 +10001117 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS);
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001118 max_packets = MAX_PACKET(64);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001119 break;
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001120 /* USB core guesses at a 64-byte max packet first for FS devices */
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001121 case USB_SPEED_FULL:
Matt Evansf5960b62011-06-01 10:22:55 +10001122 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS);
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001123 max_packets = MAX_PACKET(64);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001124 break;
1125 case USB_SPEED_LOW:
Matt Evansf5960b62011-06-01 10:22:55 +10001126 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS);
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001127 max_packets = MAX_PACKET(8);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001128 break;
Greg Kroah-Hartman551cdbb2010-01-14 11:08:04 -08001129 case USB_SPEED_WIRELESS:
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001130 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
1131 return -EINVAL;
1132 break;
1133 default:
1134 /* Speed was set earlier, this shouldn't happen. */
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001135 return -EINVAL;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001136 }
1137 /* Find the root hub port this device is under */
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001138 port_num = xhci_find_real_port_number(xhci, udev);
1139 if (!port_num)
1140 return -EINVAL;
Matt Evansf5960b62011-06-01 10:22:55 +10001141 slot_ctx->dev_info2 |= cpu_to_le32(ROOT_HUB_PORT(port_num));
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001142 /* Set the port number in the virtual_device to the faked port number */
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001143 for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
1144 top_dev = top_dev->parent)
1145 /* Found device below root hub */;
Sarah Sharpfe301822011-09-02 11:05:41 -07001146 dev->fake_port = top_dev->portnum;
Sarah Sharp66381752011-09-02 11:05:45 -07001147 dev->real_port = port_num;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001148 xhci_dbg(xhci, "Set root hub portnum to %d\n", port_num);
Sarah Sharpfe301822011-09-02 11:05:41 -07001149 xhci_dbg(xhci, "Set fake root hub portnum to %d\n", dev->fake_port);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001150
Sarah Sharp839c8172011-09-02 11:05:47 -07001151 /* Find the right bandwidth table that this device will be a part of.
1152 * If this is a full speed device attached directly to a root port (or a
1153 * decendent of one), it counts as a primary bandwidth domain, not a
1154 * secondary bandwidth domain under a TT. An xhci_tt_info structure
1155 * will never be created for the HS root hub.
1156 */
1157 if (!udev->tt || !udev->tt->hub->parent) {
1158 dev->bw_table = &xhci->rh_bw[port_num - 1].bw_table;
1159 } else {
1160 struct xhci_root_port_bw_info *rh_bw;
1161 struct xhci_tt_bw_info *tt_bw;
1162
1163 rh_bw = &xhci->rh_bw[port_num - 1];
1164 /* Find the right TT. */
1165 list_for_each_entry(tt_bw, &rh_bw->tts, tt_list) {
1166 if (tt_bw->slot_id != udev->tt->hub->slot_id)
1167 continue;
1168
1169 if (!dev->udev->tt->multi ||
1170 (udev->tt->multi &&
1171 tt_bw->ttport == dev->udev->ttport)) {
1172 dev->bw_table = &tt_bw->bw_table;
1173 dev->tt_info = tt_bw;
1174 break;
1175 }
1176 }
1177 if (!dev->tt_info)
1178 xhci_warn(xhci, "WARN: Didn't find a matching TT\n");
1179 }
1180
Sarah Sharpaa1b13e2011-03-03 05:40:51 -08001181 /* Is this a LS/FS device under an external HS hub? */
1182 if (udev->tt && udev->tt->hub->parent) {
Matt Evans28ccd292011-03-29 13:40:46 +11001183 slot_ctx->tt_info = cpu_to_le32(udev->tt->hub->slot_id |
1184 (udev->ttport << 8));
Sarah Sharp07b6de12009-09-04 10:53:19 -07001185 if (udev->tt->multi)
Matt Evans28ccd292011-03-29 13:40:46 +11001186 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001187 }
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07001188 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001189 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
1190
1191 /* Step 4 - ring already allocated */
1192 /* Step 5 */
Matt Evans28ccd292011-03-29 13:40:46 +11001193 ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP));
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001194
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001195 /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
Mathias Nymanbd18fd52013-04-23 17:17:40 -07001196 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3) |
1197 max_packets);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001198
Matt Evans28ccd292011-03-29 13:40:46 +11001199 ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma |
1200 dev->eps[0].ring->cycle_state);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001201
1202 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
1203
1204 return 0;
1205}
1206
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001207/*
1208 * Convert interval expressed as 2^(bInterval - 1) == interval into
1209 * straight exponent value 2^n == interval.
1210 *
1211 */
1212static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
1213 struct usb_host_endpoint *ep)
1214{
1215 unsigned int interval;
1216
1217 interval = clamp_val(ep->desc.bInterval, 1, 16) - 1;
1218 if (interval != ep->desc.bInterval - 1)
1219 dev_warn(&udev->dev,
Dmitry Torokhovcd3c18b2011-05-31 14:37:23 -07001220 "ep %#x - rounding interval to %d %sframes\n",
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001221 ep->desc.bEndpointAddress,
Dmitry Torokhovcd3c18b2011-05-31 14:37:23 -07001222 1 << interval,
1223 udev->speed == USB_SPEED_FULL ? "" : "micro");
1224
1225 if (udev->speed == USB_SPEED_FULL) {
1226 /*
1227 * Full speed isoc endpoints specify interval in frames,
1228 * not microframes. We are using microframes everywhere,
1229 * so adjust accordingly.
1230 */
1231 interval += 3; /* 1 frame = 2^3 uframes */
1232 }
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001233
1234 return interval;
1235}
1236
1237/*
Sarah Sharp340a3502012-02-13 14:42:11 -08001238 * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001239 * microframes, rounded down to nearest power of 2.
1240 */
Sarah Sharp340a3502012-02-13 14:42:11 -08001241static unsigned int xhci_microframes_to_exponent(struct usb_device *udev,
1242 struct usb_host_endpoint *ep, unsigned int desc_interval,
1243 unsigned int min_exponent, unsigned int max_exponent)
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001244{
1245 unsigned int interval;
1246
Sarah Sharp340a3502012-02-13 14:42:11 -08001247 interval = fls(desc_interval) - 1;
1248 interval = clamp_val(interval, min_exponent, max_exponent);
1249 if ((1 << interval) != desc_interval)
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001250 dev_warn(&udev->dev,
1251 "ep %#x - rounding interval to %d microframes, ep desc says %d microframes\n",
1252 ep->desc.bEndpointAddress,
1253 1 << interval,
Sarah Sharp340a3502012-02-13 14:42:11 -08001254 desc_interval);
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001255
1256 return interval;
1257}
1258
Sarah Sharp340a3502012-02-13 14:42:11 -08001259static unsigned int xhci_parse_microframe_interval(struct usb_device *udev,
1260 struct usb_host_endpoint *ep)
1261{
Sarah Sharp55c19452012-12-17 14:12:35 -08001262 if (ep->desc.bInterval == 0)
1263 return 0;
Sarah Sharp340a3502012-02-13 14:42:11 -08001264 return xhci_microframes_to_exponent(udev, ep,
1265 ep->desc.bInterval, 0, 15);
1266}
1267
1268
1269static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
1270 struct usb_host_endpoint *ep)
1271{
1272 return xhci_microframes_to_exponent(udev, ep,
1273 ep->desc.bInterval * 8, 3, 10);
1274}
1275
Sarah Sharpf94e01862009-04-27 19:58:38 -07001276/* Return the polling or NAK interval.
1277 *
1278 * The polling interval is expressed in "microframes". If xHCI's Interval field
1279 * is set to N, it will service the endpoint every 2^(Interval)*125us.
1280 *
1281 * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
1282 * is set to 0.
1283 */
Dmitry Torokhov575688e2011-03-20 02:15:16 -07001284static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
Sarah Sharpf94e01862009-04-27 19:58:38 -07001285 struct usb_host_endpoint *ep)
1286{
1287 unsigned int interval = 0;
1288
1289 switch (udev->speed) {
1290 case USB_SPEED_HIGH:
1291 /* Max NAK rate */
1292 if (usb_endpoint_xfer_control(&ep->desc) ||
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001293 usb_endpoint_xfer_bulk(&ep->desc)) {
Sarah Sharp340a3502012-02-13 14:42:11 -08001294 interval = xhci_parse_microframe_interval(udev, ep);
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001295 break;
1296 }
Sarah Sharpf94e01862009-04-27 19:58:38 -07001297 /* Fall through - SS and HS isoc/int have same decoding */
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001298
Sarah Sharpf94e01862009-04-27 19:58:38 -07001299 case USB_SPEED_SUPER:
1300 if (usb_endpoint_xfer_int(&ep->desc) ||
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001301 usb_endpoint_xfer_isoc(&ep->desc)) {
1302 interval = xhci_parse_exponent_interval(udev, ep);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001303 }
1304 break;
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001305
Sarah Sharpf94e01862009-04-27 19:58:38 -07001306 case USB_SPEED_FULL:
Sarah Sharpb513d442011-05-13 13:10:01 -07001307 if (usb_endpoint_xfer_isoc(&ep->desc)) {
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001308 interval = xhci_parse_exponent_interval(udev, ep);
1309 break;
1310 }
1311 /*
Sarah Sharpb513d442011-05-13 13:10:01 -07001312 * Fall through for interrupt endpoint interval decoding
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001313 * since it uses the same rules as low speed interrupt
1314 * endpoints.
1315 */
1316
Sarah Sharpf94e01862009-04-27 19:58:38 -07001317 case USB_SPEED_LOW:
1318 if (usb_endpoint_xfer_int(&ep->desc) ||
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001319 usb_endpoint_xfer_isoc(&ep->desc)) {
1320
1321 interval = xhci_parse_frame_interval(udev, ep);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001322 }
1323 break;
Dmitry Torokhovdfa49c42011-03-23 22:41:23 -07001324
Sarah Sharpf94e01862009-04-27 19:58:38 -07001325 default:
1326 BUG();
1327 }
1328 return EP_INTERVAL(interval);
1329}
1330
Sarah Sharpc30c7912010-07-10 15:48:01 +02001331/* The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
Sarah Sharp1cf62242010-04-16 08:07:04 -07001332 * High speed endpoint descriptors can define "the number of additional
1333 * transaction opportunities per microframe", but that goes in the Max Burst
1334 * endpoint context field.
1335 */
Dmitry Torokhov575688e2011-03-20 02:15:16 -07001336static u32 xhci_get_endpoint_mult(struct usb_device *udev,
Sarah Sharp1cf62242010-04-16 08:07:04 -07001337 struct usb_host_endpoint *ep)
1338{
Sarah Sharpc30c7912010-07-10 15:48:01 +02001339 if (udev->speed != USB_SPEED_SUPER ||
1340 !usb_endpoint_xfer_isoc(&ep->desc))
Sarah Sharp1cf62242010-04-16 08:07:04 -07001341 return 0;
Alan Stern842f1692010-04-30 12:44:46 -04001342 return ep->ss_ep_comp.bmAttributes;
Sarah Sharp1cf62242010-04-16 08:07:04 -07001343}
1344
Dmitry Torokhov575688e2011-03-20 02:15:16 -07001345static u32 xhci_get_endpoint_type(struct usb_device *udev,
Sarah Sharpf94e01862009-04-27 19:58:38 -07001346 struct usb_host_endpoint *ep)
1347{
1348 int in;
1349 u32 type;
1350
1351 in = usb_endpoint_dir_in(&ep->desc);
1352 if (usb_endpoint_xfer_control(&ep->desc)) {
1353 type = EP_TYPE(CTRL_EP);
1354 } else if (usb_endpoint_xfer_bulk(&ep->desc)) {
1355 if (in)
1356 type = EP_TYPE(BULK_IN_EP);
1357 else
1358 type = EP_TYPE(BULK_OUT_EP);
1359 } else if (usb_endpoint_xfer_isoc(&ep->desc)) {
1360 if (in)
1361 type = EP_TYPE(ISOC_IN_EP);
1362 else
1363 type = EP_TYPE(ISOC_OUT_EP);
1364 } else if (usb_endpoint_xfer_int(&ep->desc)) {
1365 if (in)
1366 type = EP_TYPE(INT_IN_EP);
1367 else
1368 type = EP_TYPE(INT_OUT_EP);
1369 } else {
Mathias Nyman17d655542013-04-24 17:24:58 +03001370 type = 0;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001371 }
1372 return type;
1373}
1374
Sarah Sharp9238f252010-04-16 08:07:27 -07001375/* Return the maximum endpoint service interval time (ESIT) payload.
1376 * Basically, this is the maxpacket size, multiplied by the burst size
1377 * and mult size.
1378 */
Dmitry Torokhov575688e2011-03-20 02:15:16 -07001379static u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci,
Sarah Sharp9238f252010-04-16 08:07:27 -07001380 struct usb_device *udev,
1381 struct usb_host_endpoint *ep)
1382{
1383 int max_burst;
1384 int max_packet;
1385
1386 /* Only applies for interrupt or isochronous endpoints */
1387 if (usb_endpoint_xfer_control(&ep->desc) ||
1388 usb_endpoint_xfer_bulk(&ep->desc))
1389 return 0;
1390
Alan Stern842f1692010-04-30 12:44:46 -04001391 if (udev->speed == USB_SPEED_SUPER)
Sebastian Andrzej Siewior64b3c302011-04-11 20:19:12 +02001392 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
Sarah Sharp9238f252010-04-16 08:07:27 -07001393
Kuninori Morimoto29cc8892011-08-23 03:12:03 -07001394 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
1395 max_burst = (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11;
Sarah Sharp9238f252010-04-16 08:07:27 -07001396 /* A 0 in max burst means 1 transfer per ESIT */
1397 return max_packet * (max_burst + 1);
1398}
1399
Sarah Sharp8df75f42010-04-02 15:34:16 -07001400/* Set up an endpoint with one ring segment. Do not allocate stream rings.
1401 * Drivers will have to call usb_alloc_streams() to do that.
1402 */
Sarah Sharpf94e01862009-04-27 19:58:38 -07001403int xhci_endpoint_init(struct xhci_hcd *xhci,
1404 struct xhci_virt_device *virt_dev,
1405 struct usb_device *udev,
Sarah Sharpf88ba782009-05-14 11:44:22 -07001406 struct usb_host_endpoint *ep,
1407 gfp_t mem_flags)
Sarah Sharpf94e01862009-04-27 19:58:38 -07001408{
1409 unsigned int ep_index;
1410 struct xhci_ep_ctx *ep_ctx;
1411 struct xhci_ring *ep_ring;
1412 unsigned int max_packet;
1413 unsigned int max_burst;
Andiry Xu3b72fca2012-03-05 17:49:32 +08001414 enum xhci_ring_type type;
Sarah Sharp9238f252010-04-16 08:07:27 -07001415 u32 max_esit_payload;
Mathias Nyman17d655542013-04-24 17:24:58 +03001416 u32 endpoint_type;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001417
1418 ep_index = xhci_get_endpoint_index(&ep->desc);
John Yound115b042009-07-27 12:05:15 -07001419 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001420
Mathias Nyman17d655542013-04-24 17:24:58 +03001421 endpoint_type = xhci_get_endpoint_type(udev, ep);
1422 if (!endpoint_type)
1423 return -EINVAL;
1424 ep_ctx->ep_info2 = cpu_to_le32(endpoint_type);
1425
Andiry Xu3b72fca2012-03-05 17:49:32 +08001426 type = usb_endpoint_type(&ep->desc);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001427 /* Set up the endpoint ring */
Andiry Xu8dfec612012-03-05 17:49:37 +08001428 virt_dev->eps[ep_index].new_ring =
Andiry Xu2fdcd472012-03-05 17:49:39 +08001429 xhci_ring_alloc(xhci, 2, 1, type, mem_flags);
Sarah Sharp74f9fe22009-12-03 09:44:29 -08001430 if (!virt_dev->eps[ep_index].new_ring) {
1431 /* Attempt to use the ring cache */
1432 if (virt_dev->num_rings_cached == 0)
1433 return -ENOMEM;
1434 virt_dev->eps[ep_index].new_ring =
1435 virt_dev->ring_cache[virt_dev->num_rings_cached];
1436 virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL;
1437 virt_dev->num_rings_cached--;
Andiry Xu7e393a82011-09-23 14:19:54 -07001438 xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring,
Andiry Xu186a7ef2012-03-05 17:49:36 +08001439 1, type);
Sarah Sharp74f9fe22009-12-03 09:44:29 -08001440 }
Andiry Xud18240d2010-07-22 15:23:25 -07001441 virt_dev->eps[ep_index].skip = false;
Sarah Sharp63a0d9a2009-09-04 10:53:09 -07001442 ep_ring = virt_dev->eps[ep_index].new_ring;
Matt Evans28ccd292011-03-29 13:40:46 +11001443 ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma | ep_ring->cycle_state);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001444
Matt Evans28ccd292011-03-29 13:40:46 +11001445 ep_ctx->ep_info = cpu_to_le32(xhci_get_endpoint_interval(udev, ep)
1446 | EP_MULT(xhci_get_endpoint_mult(udev, ep)));
Sarah Sharpf94e01862009-04-27 19:58:38 -07001447
1448 /* FIXME dig Mult and streams info out of ep companion desc */
1449
Sarah Sharp47692d12009-07-27 12:04:27 -07001450 /* Allow 3 retries for everything but isoc;
Andiry Xu7b1fc2e2011-05-05 18:14:00 +08001451 * CErr shall be set to 0 for Isoch endpoints.
Sarah Sharp47692d12009-07-27 12:04:27 -07001452 */
Sarah Sharpf94e01862009-04-27 19:58:38 -07001453 if (!usb_endpoint_xfer_isoc(&ep->desc))
Mathias Nyman17d655542013-04-24 17:24:58 +03001454 ep_ctx->ep_info2 |= cpu_to_le32(ERROR_COUNT(3));
Sarah Sharpf94e01862009-04-27 19:58:38 -07001455 else
Mathias Nyman17d655542013-04-24 17:24:58 +03001456 ep_ctx->ep_info2 |= cpu_to_le32(ERROR_COUNT(0));
Sarah Sharpf94e01862009-04-27 19:58:38 -07001457
1458 /* Set the max packet size and max burst */
Alan Sterne4f47e32013-05-08 11:18:05 -04001459 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
1460 max_burst = 0;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001461 switch (udev->speed) {
1462 case USB_SPEED_SUPER:
Sarah Sharpb10de142009-04-27 19:58:50 -07001463 /* dig out max burst from ep companion desc */
Alan Sterne4f47e32013-05-08 11:18:05 -04001464 max_burst = ep->ss_ep_comp.bMaxBurst;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001465 break;
1466 case USB_SPEED_HIGH:
Alan Sterne4f47e32013-05-08 11:18:05 -04001467 /* Some devices get this wrong */
1468 if (usb_endpoint_xfer_bulk(&ep->desc))
1469 max_packet = 512;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001470 /* bits 11:12 specify the number of additional transaction
1471 * opportunities per microframe (USB 2.0, section 9.6.6)
1472 */
1473 if (usb_endpoint_xfer_isoc(&ep->desc) ||
1474 usb_endpoint_xfer_int(&ep->desc)) {
Kuninori Morimoto29cc8892011-08-23 03:12:03 -07001475 max_burst = (usb_endpoint_maxp(&ep->desc)
Matt Evans28ccd292011-03-29 13:40:46 +11001476 & 0x1800) >> 11;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001477 }
Alan Sterne4f47e32013-05-08 11:18:05 -04001478 break;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001479 case USB_SPEED_FULL:
1480 case USB_SPEED_LOW:
Sarah Sharpf94e01862009-04-27 19:58:38 -07001481 break;
1482 default:
1483 BUG();
1484 }
Alan Sterne4f47e32013-05-08 11:18:05 -04001485 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet) |
1486 MAX_BURST(max_burst));
Sarah Sharp9238f252010-04-16 08:07:27 -07001487 max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep);
Matt Evans28ccd292011-03-29 13:40:46 +11001488 ep_ctx->tx_info = cpu_to_le32(MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload));
Sarah Sharp9238f252010-04-16 08:07:27 -07001489
1490 /*
1491 * XXX no idea how to calculate the average TRB buffer length for bulk
1492 * endpoints, as the driver gives us no clue how big each scatter gather
1493 * list entry (or buffer) is going to be.
1494 *
1495 * For isochronous and interrupt endpoints, we set it to the max
1496 * available, until we have new API in the USB core to allow drivers to
1497 * declare how much bandwidth they actually need.
1498 *
1499 * Normally, it would be calculated by taking the total of the buffer
1500 * lengths in the TD and then dividing by the number of TRBs in a TD,
1501 * including link TRBs, No-op TRBs, and Event data TRBs. Since we don't
1502 * use Event Data TRBs, and we don't chain in a link TRB on short
1503 * transfers, we're basically dividing by 1.
Andiry Xu51eb01a2011-05-05 18:13:58 +08001504 *
1505 * xHCI 1.0 specification indicates that the Average TRB Length should
1506 * be set to 8 for control endpoints.
Sarah Sharp9238f252010-04-16 08:07:27 -07001507 */
Andiry Xu51eb01a2011-05-05 18:13:58 +08001508 if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version == 0x100)
1509 ep_ctx->tx_info |= cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(8));
1510 else
1511 ep_ctx->tx_info |=
1512 cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(max_esit_payload));
Sarah Sharp9238f252010-04-16 08:07:27 -07001513
Sarah Sharpf94e01862009-04-27 19:58:38 -07001514 /* FIXME Debug endpoint context */
1515 return 0;
1516}
1517
1518void xhci_endpoint_zero(struct xhci_hcd *xhci,
1519 struct xhci_virt_device *virt_dev,
1520 struct usb_host_endpoint *ep)
1521{
1522 unsigned int ep_index;
1523 struct xhci_ep_ctx *ep_ctx;
1524
1525 ep_index = xhci_get_endpoint_index(&ep->desc);
John Yound115b042009-07-27 12:05:15 -07001526 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
Sarah Sharpf94e01862009-04-27 19:58:38 -07001527
1528 ep_ctx->ep_info = 0;
1529 ep_ctx->ep_info2 = 0;
Sarah Sharp8e595a52009-07-27 12:03:31 -07001530 ep_ctx->deq = 0;
Sarah Sharpf94e01862009-04-27 19:58:38 -07001531 ep_ctx->tx_info = 0;
1532 /* Don't free the endpoint ring until the set interface or configuration
1533 * request succeeds.
1534 */
1535}
1536
Sarah Sharp9af5d712011-09-02 11:05:48 -07001537void xhci_clear_endpoint_bw_info(struct xhci_bw_info *bw_info)
1538{
1539 bw_info->ep_interval = 0;
1540 bw_info->mult = 0;
1541 bw_info->num_packets = 0;
1542 bw_info->max_packet_size = 0;
1543 bw_info->type = 0;
1544 bw_info->max_esit_payload = 0;
1545}
1546
1547void xhci_update_bw_info(struct xhci_hcd *xhci,
1548 struct xhci_container_ctx *in_ctx,
1549 struct xhci_input_control_ctx *ctrl_ctx,
1550 struct xhci_virt_device *virt_dev)
1551{
1552 struct xhci_bw_info *bw_info;
1553 struct xhci_ep_ctx *ep_ctx;
1554 unsigned int ep_type;
1555 int i;
1556
1557 for (i = 1; i < 31; ++i) {
1558 bw_info = &virt_dev->eps[i].bw_info;
1559
1560 /* We can't tell what endpoint type is being dropped, but
1561 * unconditionally clearing the bandwidth info for non-periodic
1562 * endpoints should be harmless because the info will never be
1563 * set in the first place.
1564 */
1565 if (!EP_IS_ADDED(ctrl_ctx, i) && EP_IS_DROPPED(ctrl_ctx, i)) {
1566 /* Dropped endpoint */
1567 xhci_clear_endpoint_bw_info(bw_info);
1568 continue;
1569 }
1570
1571 if (EP_IS_ADDED(ctrl_ctx, i)) {
1572 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, i);
1573 ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
1574
1575 /* Ignore non-periodic endpoints */
1576 if (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
1577 ep_type != ISOC_IN_EP &&
1578 ep_type != INT_IN_EP)
1579 continue;
1580
1581 /* Added or changed endpoint */
1582 bw_info->ep_interval = CTX_TO_EP_INTERVAL(
1583 le32_to_cpu(ep_ctx->ep_info));
Sarah Sharp170c0262011-09-13 16:41:12 -07001584 /* Number of packets and mult are zero-based in the
1585 * input context, but we want one-based for the
1586 * interval table.
Sarah Sharp9af5d712011-09-02 11:05:48 -07001587 */
Sarah Sharp170c0262011-09-13 16:41:12 -07001588 bw_info->mult = CTX_TO_EP_MULT(
1589 le32_to_cpu(ep_ctx->ep_info)) + 1;
Sarah Sharp9af5d712011-09-02 11:05:48 -07001590 bw_info->num_packets = CTX_TO_MAX_BURST(
1591 le32_to_cpu(ep_ctx->ep_info2)) + 1;
1592 bw_info->max_packet_size = MAX_PACKET_DECODED(
1593 le32_to_cpu(ep_ctx->ep_info2));
1594 bw_info->type = ep_type;
1595 bw_info->max_esit_payload = CTX_TO_MAX_ESIT_PAYLOAD(
1596 le32_to_cpu(ep_ctx->tx_info));
1597 }
1598 }
1599}
1600
Sarah Sharpf2217e82009-08-07 14:04:43 -07001601/* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy.
1602 * Useful when you want to change one particular aspect of the endpoint and then
1603 * issue a configure endpoint command.
1604 */
1605void xhci_endpoint_copy(struct xhci_hcd *xhci,
Sarah Sharp913a8a32009-09-04 10:53:13 -07001606 struct xhci_container_ctx *in_ctx,
1607 struct xhci_container_ctx *out_ctx,
1608 unsigned int ep_index)
Sarah Sharpf2217e82009-08-07 14:04:43 -07001609{
1610 struct xhci_ep_ctx *out_ep_ctx;
1611 struct xhci_ep_ctx *in_ep_ctx;
1612
Sarah Sharp913a8a32009-09-04 10:53:13 -07001613 out_ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1614 in_ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
Sarah Sharpf2217e82009-08-07 14:04:43 -07001615
1616 in_ep_ctx->ep_info = out_ep_ctx->ep_info;
1617 in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2;
1618 in_ep_ctx->deq = out_ep_ctx->deq;
1619 in_ep_ctx->tx_info = out_ep_ctx->tx_info;
1620}
1621
1622/* Copy output xhci_slot_ctx to the input xhci_slot_ctx.
1623 * Useful when you want to change one particular aspect of the endpoint and then
1624 * issue a configure endpoint command. Only the context entries field matters,
1625 * but we'll copy the whole thing anyway.
1626 */
Sarah Sharp913a8a32009-09-04 10:53:13 -07001627void xhci_slot_copy(struct xhci_hcd *xhci,
1628 struct xhci_container_ctx *in_ctx,
1629 struct xhci_container_ctx *out_ctx)
Sarah Sharpf2217e82009-08-07 14:04:43 -07001630{
1631 struct xhci_slot_ctx *in_slot_ctx;
1632 struct xhci_slot_ctx *out_slot_ctx;
1633
Sarah Sharp913a8a32009-09-04 10:53:13 -07001634 in_slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1635 out_slot_ctx = xhci_get_slot_ctx(xhci, out_ctx);
Sarah Sharpf2217e82009-08-07 14:04:43 -07001636
1637 in_slot_ctx->dev_info = out_slot_ctx->dev_info;
1638 in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2;
1639 in_slot_ctx->tt_info = out_slot_ctx->tt_info;
1640 in_slot_ctx->dev_state = out_slot_ctx->dev_state;
1641}
1642
John Youn254c80a2009-07-27 12:05:03 -07001643/* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
1644static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
1645{
1646 int i;
1647 struct device *dev = xhci_to_hcd(xhci)->self.controller;
1648 int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
1649
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001650 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
1651 "Allocating %d scratchpad buffers", num_sp);
John Youn254c80a2009-07-27 12:05:03 -07001652
1653 if (!num_sp)
1654 return 0;
1655
1656 xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags);
1657 if (!xhci->scratchpad)
1658 goto fail_sp;
1659
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07001660 xhci->scratchpad->sp_array = dma_alloc_coherent(dev,
John Youn254c80a2009-07-27 12:05:03 -07001661 num_sp * sizeof(u64),
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07001662 &xhci->scratchpad->sp_dma, flags);
John Youn254c80a2009-07-27 12:05:03 -07001663 if (!xhci->scratchpad->sp_array)
1664 goto fail_sp2;
1665
1666 xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags);
1667 if (!xhci->scratchpad->sp_buffers)
1668 goto fail_sp3;
1669
1670 xhci->scratchpad->sp_dma_buffers =
1671 kzalloc(sizeof(dma_addr_t) * num_sp, flags);
1672
1673 if (!xhci->scratchpad->sp_dma_buffers)
1674 goto fail_sp4;
1675
Matt Evans28ccd292011-03-29 13:40:46 +11001676 xhci->dcbaa->dev_context_ptrs[0] = cpu_to_le64(xhci->scratchpad->sp_dma);
John Youn254c80a2009-07-27 12:05:03 -07001677 for (i = 0; i < num_sp; i++) {
1678 dma_addr_t dma;
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07001679 void *buf = dma_alloc_coherent(dev, xhci->page_size, &dma,
1680 flags);
John Youn254c80a2009-07-27 12:05:03 -07001681 if (!buf)
1682 goto fail_sp5;
1683
1684 xhci->scratchpad->sp_array[i] = dma;
1685 xhci->scratchpad->sp_buffers[i] = buf;
1686 xhci->scratchpad->sp_dma_buffers[i] = dma;
1687 }
1688
1689 return 0;
1690
1691 fail_sp5:
1692 for (i = i - 1; i >= 0; i--) {
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07001693 dma_free_coherent(dev, xhci->page_size,
John Youn254c80a2009-07-27 12:05:03 -07001694 xhci->scratchpad->sp_buffers[i],
1695 xhci->scratchpad->sp_dma_buffers[i]);
1696 }
1697 kfree(xhci->scratchpad->sp_dma_buffers);
1698
1699 fail_sp4:
1700 kfree(xhci->scratchpad->sp_buffers);
1701
1702 fail_sp3:
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07001703 dma_free_coherent(dev, num_sp * sizeof(u64),
John Youn254c80a2009-07-27 12:05:03 -07001704 xhci->scratchpad->sp_array,
1705 xhci->scratchpad->sp_dma);
1706
1707 fail_sp2:
1708 kfree(xhci->scratchpad);
1709 xhci->scratchpad = NULL;
1710
1711 fail_sp:
1712 return -ENOMEM;
1713}
1714
1715static void scratchpad_free(struct xhci_hcd *xhci)
1716{
1717 int num_sp;
1718 int i;
Xenia Ragiadakou2a100042013-11-15 03:18:08 +02001719 struct device *dev = xhci_to_hcd(xhci)->self.controller;
John Youn254c80a2009-07-27 12:05:03 -07001720
1721 if (!xhci->scratchpad)
1722 return;
1723
1724 num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
1725
1726 for (i = 0; i < num_sp; i++) {
Xenia Ragiadakou2a100042013-11-15 03:18:08 +02001727 dma_free_coherent(dev, xhci->page_size,
John Youn254c80a2009-07-27 12:05:03 -07001728 xhci->scratchpad->sp_buffers[i],
1729 xhci->scratchpad->sp_dma_buffers[i]);
1730 }
1731 kfree(xhci->scratchpad->sp_dma_buffers);
1732 kfree(xhci->scratchpad->sp_buffers);
Xenia Ragiadakou2a100042013-11-15 03:18:08 +02001733 dma_free_coherent(dev, num_sp * sizeof(u64),
John Youn254c80a2009-07-27 12:05:03 -07001734 xhci->scratchpad->sp_array,
1735 xhci->scratchpad->sp_dma);
1736 kfree(xhci->scratchpad);
1737 xhci->scratchpad = NULL;
1738}
1739
Sarah Sharp913a8a32009-09-04 10:53:13 -07001740struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci,
Sarah Sharpa1d78c12009-12-09 15:59:03 -08001741 bool allocate_in_ctx, bool allocate_completion,
1742 gfp_t mem_flags)
Sarah Sharp913a8a32009-09-04 10:53:13 -07001743{
1744 struct xhci_command *command;
1745
1746 command = kzalloc(sizeof(*command), mem_flags);
1747 if (!command)
1748 return NULL;
1749
Sarah Sharpa1d78c12009-12-09 15:59:03 -08001750 if (allocate_in_ctx) {
1751 command->in_ctx =
1752 xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT,
1753 mem_flags);
1754 if (!command->in_ctx) {
1755 kfree(command);
1756 return NULL;
1757 }
Julia Lawall06e18292009-11-21 12:51:47 +01001758 }
Sarah Sharp913a8a32009-09-04 10:53:13 -07001759
1760 if (allocate_completion) {
1761 command->completion =
1762 kzalloc(sizeof(struct completion), mem_flags);
1763 if (!command->completion) {
1764 xhci_free_container_ctx(xhci, command->in_ctx);
Julia Lawall06e18292009-11-21 12:51:47 +01001765 kfree(command);
Sarah Sharp913a8a32009-09-04 10:53:13 -07001766 return NULL;
1767 }
1768 init_completion(command->completion);
1769 }
1770
1771 command->status = 0;
1772 INIT_LIST_HEAD(&command->cmd_list);
1773 return command;
1774}
1775
Andiry Xu8e51adc2010-07-22 15:23:31 -07001776void xhci_urb_free_priv(struct xhci_hcd *xhci, struct urb_priv *urb_priv)
1777{
Andiry Xu2ffdea22011-09-02 11:05:57 -07001778 if (urb_priv) {
1779 kfree(urb_priv->td[0]);
1780 kfree(urb_priv);
Andiry Xu8e51adc2010-07-22 15:23:31 -07001781 }
Andiry Xu8e51adc2010-07-22 15:23:31 -07001782}
1783
Sarah Sharp913a8a32009-09-04 10:53:13 -07001784void xhci_free_command(struct xhci_hcd *xhci,
1785 struct xhci_command *command)
1786{
1787 xhci_free_container_ctx(xhci,
1788 command->in_ctx);
1789 kfree(command->completion);
1790 kfree(command);
1791}
1792
Sarah Sharp66d4ead2009-04-27 19:52:28 -07001793void xhci_mem_cleanup(struct xhci_hcd *xhci)
1794{
Xenia Ragiadakou2a100042013-11-15 03:18:08 +02001795 struct device *dev = xhci_to_hcd(xhci)->self.controller;
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001796 int size;
Takashi Iwai32f1d2c2012-06-01 10:06:24 +02001797 int i, j, num_ports;
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001798
Mathias Nymanc311e392014-05-08 19:26:03 +03001799 del_timer_sync(&xhci->cmd_timer);
1800
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001801 /* Free the Event Ring Segment Table and the actual Event Ring */
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001802 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
1803 if (xhci->erst.entries)
Xenia Ragiadakou2a100042013-11-15 03:18:08 +02001804 dma_free_coherent(dev, size,
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001805 xhci->erst.entries, xhci->erst.erst_dma_addr);
1806 xhci->erst.entries = NULL;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001807 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed ERST");
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001808 if (xhci->event_ring)
1809 xhci_ring_free(xhci, xhci->event_ring);
1810 xhci->event_ring = NULL;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001811 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed event ring");
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001812
Sarah Sharpdbc33302012-05-08 07:32:03 -07001813 if (xhci->lpm_command)
1814 xhci_free_command(xhci, xhci->lpm_command);
Al Cooper0eda06c2014-09-11 13:55:49 +03001815 xhci->lpm_command = NULL;
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001816 if (xhci->cmd_ring)
1817 xhci_ring_free(xhci, xhci->cmd_ring);
1818 xhci->cmd_ring = NULL;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001819 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed command ring");
Mathias Nymanc9aa1a22014-05-08 19:26:01 +03001820 xhci_cleanup_command_queue(xhci);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001821
Mathias Nyman5dc28082014-05-28 23:51:13 +03001822 num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
Mathias Nymanc207e7c2014-09-11 13:55:48 +03001823 for (i = 0; i < num_ports && xhci->rh_bw; i++) {
Mathias Nyman5dc28082014-05-28 23:51:13 +03001824 struct xhci_interval_bw_table *bwt = &xhci->rh_bw[i].bw_table;
1825 for (j = 0; j < XHCI_MAX_INTERVAL; j++) {
1826 struct list_head *ep = &bwt->interval_bw[j].endpoints;
1827 while (!list_empty(ep))
1828 list_del_init(ep->next);
1829 }
1830 }
1831
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001832 for (i = 1; i < MAX_HC_SLOTS; ++i)
1833 xhci_free_virt_device(xhci, i);
1834
Sarah Sharp0ebbab32009-04-27 19:52:34 -07001835 if (xhci->segment_pool)
1836 dma_pool_destroy(xhci->segment_pool);
1837 xhci->segment_pool = NULL;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001838 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed segment pool");
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001839
1840 if (xhci->device_pool)
1841 dma_pool_destroy(xhci->device_pool);
1842 xhci->device_pool = NULL;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001843 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed device context pool");
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001844
Sarah Sharp8df75f42010-04-02 15:34:16 -07001845 if (xhci->small_streams_pool)
1846 dma_pool_destroy(xhci->small_streams_pool);
1847 xhci->small_streams_pool = NULL;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001848 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
1849 "Freed small stream array pool");
Sarah Sharp8df75f42010-04-02 15:34:16 -07001850
1851 if (xhci->medium_streams_pool)
1852 dma_pool_destroy(xhci->medium_streams_pool);
1853 xhci->medium_streams_pool = NULL;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03001854 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
1855 "Freed medium stream array pool");
Sarah Sharp8df75f42010-04-02 15:34:16 -07001856
Sarah Sharpa74588f2009-04-27 19:53:42 -07001857 if (xhci->dcbaa)
Xenia Ragiadakou2a100042013-11-15 03:18:08 +02001858 dma_free_coherent(dev, sizeof(*xhci->dcbaa),
Sarah Sharpa74588f2009-04-27 19:53:42 -07001859 xhci->dcbaa, xhci->dcbaa->dma);
1860 xhci->dcbaa = NULL;
Sarah Sharp3ffbba92009-04-27 19:57:38 -07001861
Sarah Sharp5294bea2009-11-04 11:22:19 -08001862 scratchpad_free(xhci);
Sarah Sharpda6699c2010-10-26 16:47:13 -07001863
Vladimir Murzin88696ae2013-04-09 22:33:31 +04001864 if (!xhci->rh_bw)
1865 goto no_bw;
1866
Takashi Iwai32f1d2c2012-06-01 10:06:24 +02001867 for (i = 0; i < num_ports; i++) {
1868 struct xhci_tt_bw_info *tt, *n;
1869 list_for_each_entry_safe(tt, n, &xhci->rh_bw[i].tts, tt_list) {
1870 list_del(&tt->tt_list);
1871 kfree(tt);
1872 }
Oliver Neukumf8a9e722012-05-10 10:19:21 +02001873 }
1874
Vladimir Murzin88696ae2013-04-09 22:33:31 +04001875no_bw:
Hans de Goede127329d2013-11-07 08:19:45 +01001876 xhci->cmd_ring_reserved_trbs = 0;
Sarah Sharpda6699c2010-10-26 16:47:13 -07001877 xhci->num_usb2_ports = 0;
1878 xhci->num_usb3_ports = 0;
Oliver Neukumf8a9e722012-05-10 10:19:21 +02001879 xhci->num_active_eps = 0;
Sarah Sharpda6699c2010-10-26 16:47:13 -07001880 kfree(xhci->usb2_ports);
1881 kfree(xhci->usb3_ports);
1882 kfree(xhci->port_array);
Sarah Sharp839c8172011-09-02 11:05:47 -07001883 kfree(xhci->rh_bw);
Mathias Nymanb630d4b2013-05-23 17:14:28 +03001884 kfree(xhci->ext_caps);
Sarah Sharpda6699c2010-10-26 16:47:13 -07001885
Sarah Sharp66d4ead2009-04-27 19:52:28 -07001886 xhci->page_size = 0;
1887 xhci->page_shift = 0;
Sarah Sharp20b67cf2010-12-15 12:47:14 -08001888 xhci->bus_state[0].bus_suspended = 0;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08001889 xhci->bus_state[1].bus_suspended = 0;
Sarah Sharp66d4ead2009-04-27 19:52:28 -07001890}
1891
Sarah Sharp6648f292009-11-09 13:35:23 -08001892static int xhci_test_trb_in_td(struct xhci_hcd *xhci,
1893 struct xhci_segment *input_seg,
1894 union xhci_trb *start_trb,
1895 union xhci_trb *end_trb,
1896 dma_addr_t input_dma,
1897 struct xhci_segment *result_seg,
1898 char *test_name, int test_number)
1899{
1900 unsigned long long start_dma;
1901 unsigned long long end_dma;
1902 struct xhci_segment *seg;
1903
1904 start_dma = xhci_trb_virt_to_dma(input_seg, start_trb);
1905 end_dma = xhci_trb_virt_to_dma(input_seg, end_trb);
1906
1907 seg = trb_in_td(input_seg, start_trb, end_trb, input_dma);
1908 if (seg != result_seg) {
1909 xhci_warn(xhci, "WARN: %s TRB math test %d failed!\n",
1910 test_name, test_number);
1911 xhci_warn(xhci, "Tested TRB math w/ seg %p and "
1912 "input DMA 0x%llx\n",
1913 input_seg,
1914 (unsigned long long) input_dma);
1915 xhci_warn(xhci, "starting TRB %p (0x%llx DMA), "
1916 "ending TRB %p (0x%llx DMA)\n",
1917 start_trb, start_dma,
1918 end_trb, end_dma);
1919 xhci_warn(xhci, "Expected seg %p, got seg %p\n",
1920 result_seg, seg);
1921 return -1;
1922 }
1923 return 0;
1924}
1925
1926/* TRB math checks for xhci_trb_in_td(), using the command and event rings. */
1927static int xhci_check_trb_in_td_math(struct xhci_hcd *xhci, gfp_t mem_flags)
1928{
1929 struct {
1930 dma_addr_t input_dma;
1931 struct xhci_segment *result_seg;
1932 } simple_test_vector [] = {
1933 /* A zeroed DMA field should fail */
1934 { 0, NULL },
1935 /* One TRB before the ring start should fail */
1936 { xhci->event_ring->first_seg->dma - 16, NULL },
1937 /* One byte before the ring start should fail */
1938 { xhci->event_ring->first_seg->dma - 1, NULL },
1939 /* Starting TRB should succeed */
1940 { xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg },
1941 /* Ending TRB should succeed */
1942 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16,
1943 xhci->event_ring->first_seg },
1944 /* One byte after the ring end should fail */
1945 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16 + 1, NULL },
1946 /* One TRB after the ring end should fail */
1947 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT)*16, NULL },
1948 /* An address of all ones should fail */
1949 { (dma_addr_t) (~0), NULL },
1950 };
1951 struct {
1952 struct xhci_segment *input_seg;
1953 union xhci_trb *start_trb;
1954 union xhci_trb *end_trb;
1955 dma_addr_t input_dma;
1956 struct xhci_segment *result_seg;
1957 } complex_test_vector [] = {
1958 /* Test feeding a valid DMA address from a different ring */
1959 { .input_seg = xhci->event_ring->first_seg,
1960 .start_trb = xhci->event_ring->first_seg->trbs,
1961 .end_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1962 .input_dma = xhci->cmd_ring->first_seg->dma,
1963 .result_seg = NULL,
1964 },
1965 /* Test feeding a valid end TRB from a different ring */
1966 { .input_seg = xhci->event_ring->first_seg,
1967 .start_trb = xhci->event_ring->first_seg->trbs,
1968 .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1969 .input_dma = xhci->cmd_ring->first_seg->dma,
1970 .result_seg = NULL,
1971 },
1972 /* Test feeding a valid start and end TRB from a different ring */
1973 { .input_seg = xhci->event_ring->first_seg,
1974 .start_trb = xhci->cmd_ring->first_seg->trbs,
1975 .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1976 .input_dma = xhci->cmd_ring->first_seg->dma,
1977 .result_seg = NULL,
1978 },
1979 /* TRB in this ring, but after this TD */
1980 { .input_seg = xhci->event_ring->first_seg,
1981 .start_trb = &xhci->event_ring->first_seg->trbs[0],
1982 .end_trb = &xhci->event_ring->first_seg->trbs[3],
1983 .input_dma = xhci->event_ring->first_seg->dma + 4*16,
1984 .result_seg = NULL,
1985 },
1986 /* TRB in this ring, but before this TD */
1987 { .input_seg = xhci->event_ring->first_seg,
1988 .start_trb = &xhci->event_ring->first_seg->trbs[3],
1989 .end_trb = &xhci->event_ring->first_seg->trbs[6],
1990 .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1991 .result_seg = NULL,
1992 },
1993 /* TRB in this ring, but after this wrapped TD */
1994 { .input_seg = xhci->event_ring->first_seg,
1995 .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1996 .end_trb = &xhci->event_ring->first_seg->trbs[1],
1997 .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1998 .result_seg = NULL,
1999 },
2000 /* TRB in this ring, but before this wrapped TD */
2001 { .input_seg = xhci->event_ring->first_seg,
2002 .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
2003 .end_trb = &xhci->event_ring->first_seg->trbs[1],
2004 .input_dma = xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 4)*16,
2005 .result_seg = NULL,
2006 },
2007 /* TRB not in this ring, and we have a wrapped TD */
2008 { .input_seg = xhci->event_ring->first_seg,
2009 .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
2010 .end_trb = &xhci->event_ring->first_seg->trbs[1],
2011 .input_dma = xhci->cmd_ring->first_seg->dma + 2*16,
2012 .result_seg = NULL,
2013 },
2014 };
2015
2016 unsigned int num_tests;
2017 int i, ret;
2018
Kulikov Vasiliye10fa472010-06-28 15:55:46 +04002019 num_tests = ARRAY_SIZE(simple_test_vector);
Sarah Sharp6648f292009-11-09 13:35:23 -08002020 for (i = 0; i < num_tests; i++) {
2021 ret = xhci_test_trb_in_td(xhci,
2022 xhci->event_ring->first_seg,
2023 xhci->event_ring->first_seg->trbs,
2024 &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
2025 simple_test_vector[i].input_dma,
2026 simple_test_vector[i].result_seg,
2027 "Simple", i);
2028 if (ret < 0)
2029 return ret;
2030 }
2031
Kulikov Vasiliye10fa472010-06-28 15:55:46 +04002032 num_tests = ARRAY_SIZE(complex_test_vector);
Sarah Sharp6648f292009-11-09 13:35:23 -08002033 for (i = 0; i < num_tests; i++) {
2034 ret = xhci_test_trb_in_td(xhci,
2035 complex_test_vector[i].input_seg,
2036 complex_test_vector[i].start_trb,
2037 complex_test_vector[i].end_trb,
2038 complex_test_vector[i].input_dma,
2039 complex_test_vector[i].result_seg,
2040 "Complex", i);
2041 if (ret < 0)
2042 return ret;
2043 }
2044 xhci_dbg(xhci, "TRB math tests passed.\n");
2045 return 0;
2046}
2047
Sarah Sharp257d5852010-07-29 22:12:56 -07002048static void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
2049{
2050 u64 temp;
2051 dma_addr_t deq;
2052
2053 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2054 xhci->event_ring->dequeue);
2055 if (deq == 0 && !in_interrupt())
2056 xhci_warn(xhci, "WARN something wrong with SW event ring "
2057 "dequeue ptr.\n");
2058 /* Update HC event ring dequeue pointer */
Sarah Sharpf7b2e402014-01-30 13:27:49 -08002059 temp = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
Sarah Sharp257d5852010-07-29 22:12:56 -07002060 temp &= ERST_PTR_MASK;
2061 /* Don't clear the EHB bit (which is RW1C) because
2062 * there might be more events to service.
2063 */
2064 temp &= ~ERST_EHB;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002065 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2066 "// Write event ring dequeue pointer, "
2067 "preserving EHB bit");
Sarah Sharp477632d2014-01-29 14:02:00 -08002068 xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,
Sarah Sharp257d5852010-07-29 22:12:56 -07002069 &xhci->ir_set->erst_dequeue);
2070}
2071
Sarah Sharpda6699c2010-10-26 16:47:13 -07002072static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
Mathias Nymanb630d4b2013-05-23 17:14:28 +03002073 __le32 __iomem *addr, u8 major_revision, int max_caps)
Sarah Sharpda6699c2010-10-26 16:47:13 -07002074{
2075 u32 temp, port_offset, port_count;
2076 int i;
2077
2078 if (major_revision > 0x03) {
2079 xhci_warn(xhci, "Ignoring unknown port speed, "
2080 "Ext Cap %p, revision = 0x%x\n",
2081 addr, major_revision);
2082 /* Ignoring port protocol we can't understand. FIXME */
2083 return;
2084 }
2085
2086 /* Port offset and count in the third dword, see section 7.2 */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002087 temp = readl(addr + 2);
Sarah Sharpda6699c2010-10-26 16:47:13 -07002088 port_offset = XHCI_EXT_PORT_OFF(temp);
2089 port_count = XHCI_EXT_PORT_COUNT(temp);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002090 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2091 "Ext Cap %p, port offset = %u, "
2092 "count = %u, revision = 0x%x",
Sarah Sharpda6699c2010-10-26 16:47:13 -07002093 addr, port_offset, port_count, major_revision);
2094 /* Port count includes the current port offset */
2095 if (port_offset == 0 || (port_offset + port_count - 1) > num_ports)
2096 /* WTF? "Valid values are ‘1’ to MaxPorts" */
2097 return;
Andiry Xufc71ff72011-09-23 14:19:51 -07002098
Mathias Nymanb630d4b2013-05-23 17:14:28 +03002099 /* cache usb2 port capabilities */
2100 if (major_revision < 0x03 && xhci->num_ext_caps < max_caps)
2101 xhci->ext_caps[xhci->num_ext_caps++] = temp;
2102
Andiry Xufc71ff72011-09-23 14:19:51 -07002103 /* Check the host's USB2 LPM capability */
2104 if ((xhci->hci_version == 0x96) && (major_revision != 0x03) &&
2105 (temp & XHCI_L1C)) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002106 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2107 "xHCI 0.96: support USB2 software lpm");
Andiry Xufc71ff72011-09-23 14:19:51 -07002108 xhci->sw_lpm_support = 1;
2109 }
2110
2111 if ((xhci->hci_version >= 0x100) && (major_revision != 0x03)) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002112 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2113 "xHCI 1.0: support USB2 software lpm");
Andiry Xufc71ff72011-09-23 14:19:51 -07002114 xhci->sw_lpm_support = 1;
2115 if (temp & XHCI_HLC) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002116 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2117 "xHCI 1.0: support USB2 hardware lpm");
Andiry Xufc71ff72011-09-23 14:19:51 -07002118 xhci->hw_lpm_support = 1;
2119 }
2120 }
2121
Sarah Sharpda6699c2010-10-26 16:47:13 -07002122 port_offset--;
2123 for (i = port_offset; i < (port_offset + port_count); i++) {
2124 /* Duplicate entry. Ignore the port if the revisions differ. */
2125 if (xhci->port_array[i] != 0) {
2126 xhci_warn(xhci, "Duplicate port entry, Ext Cap %p,"
2127 " port %u\n", addr, i);
2128 xhci_warn(xhci, "Port was marked as USB %u, "
2129 "duplicated as USB %u\n",
2130 xhci->port_array[i], major_revision);
2131 /* Only adjust the roothub port counts if we haven't
2132 * found a similar duplicate.
2133 */
2134 if (xhci->port_array[i] != major_revision &&
Dan Carpenter22e04872011-03-17 22:39:49 +03002135 xhci->port_array[i] != DUPLICATE_ENTRY) {
Sarah Sharpda6699c2010-10-26 16:47:13 -07002136 if (xhci->port_array[i] == 0x03)
2137 xhci->num_usb3_ports--;
2138 else
2139 xhci->num_usb2_ports--;
Dan Carpenter22e04872011-03-17 22:39:49 +03002140 xhci->port_array[i] = DUPLICATE_ENTRY;
Sarah Sharpda6699c2010-10-26 16:47:13 -07002141 }
2142 /* FIXME: Should we disable the port? */
Sarah Sharpf8bbeab2010-12-09 10:29:00 -08002143 continue;
Sarah Sharpda6699c2010-10-26 16:47:13 -07002144 }
2145 xhci->port_array[i] = major_revision;
2146 if (major_revision == 0x03)
2147 xhci->num_usb3_ports++;
2148 else
2149 xhci->num_usb2_ports++;
2150 }
2151 /* FIXME: Should we disable ports not in the Extended Capabilities? */
2152}
2153
2154/*
2155 * Scan the Extended Capabilities for the "Supported Protocol Capabilities" that
2156 * specify what speeds each port is supposed to be. We can't count on the port
2157 * speed bits in the PORTSC register being correct until a device is connected,
2158 * but we need to set up the two fake roothubs with the correct number of USB
2159 * 3.0 and USB 2.0 ports at host controller initialization time.
2160 */
2161static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
2162{
Mathias Nymanb630d4b2013-05-23 17:14:28 +03002163 __le32 __iomem *addr, *tmp_addr;
2164 u32 offset, tmp_offset;
Sarah Sharpda6699c2010-10-26 16:47:13 -07002165 unsigned int num_ports;
Sarah Sharp2e279802011-09-02 11:05:50 -07002166 int i, j, port_index;
Mathias Nymanb630d4b2013-05-23 17:14:28 +03002167 int cap_count = 0;
Sarah Sharpda6699c2010-10-26 16:47:13 -07002168
2169 addr = &xhci->cap_regs->hcc_params;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002170 offset = XHCI_HCC_EXT_CAPS(readl(addr));
Sarah Sharpda6699c2010-10-26 16:47:13 -07002171 if (offset == 0) {
2172 xhci_err(xhci, "No Extended Capability registers, "
2173 "unable to set up roothub.\n");
2174 return -ENODEV;
2175 }
2176
2177 num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
2178 xhci->port_array = kzalloc(sizeof(*xhci->port_array)*num_ports, flags);
2179 if (!xhci->port_array)
2180 return -ENOMEM;
2181
Sarah Sharp839c8172011-09-02 11:05:47 -07002182 xhci->rh_bw = kzalloc(sizeof(*xhci->rh_bw)*num_ports, flags);
2183 if (!xhci->rh_bw)
2184 return -ENOMEM;
Sarah Sharp2e279802011-09-02 11:05:50 -07002185 for (i = 0; i < num_ports; i++) {
2186 struct xhci_interval_bw_table *bw_table;
2187
Sarah Sharp839c8172011-09-02 11:05:47 -07002188 INIT_LIST_HEAD(&xhci->rh_bw[i].tts);
Sarah Sharp2e279802011-09-02 11:05:50 -07002189 bw_table = &xhci->rh_bw[i].bw_table;
2190 for (j = 0; j < XHCI_MAX_INTERVAL; j++)
2191 INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints);
2192 }
Sarah Sharp839c8172011-09-02 11:05:47 -07002193
Sarah Sharpda6699c2010-10-26 16:47:13 -07002194 /*
2195 * For whatever reason, the first capability offset is from the
2196 * capability register base, not from the HCCPARAMS register.
2197 * See section 5.3.6 for offset calculation.
2198 */
2199 addr = &xhci->cap_regs->hc_capbase + offset;
Mathias Nymanb630d4b2013-05-23 17:14:28 +03002200
2201 tmp_addr = addr;
2202 tmp_offset = offset;
2203
2204 /* count extended protocol capability entries for later caching */
2205 do {
2206 u32 cap_id;
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002207 cap_id = readl(tmp_addr);
Mathias Nymanb630d4b2013-05-23 17:14:28 +03002208 if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)
2209 cap_count++;
2210 tmp_offset = XHCI_EXT_CAPS_NEXT(cap_id);
2211 tmp_addr += tmp_offset;
2212 } while (tmp_offset);
2213
2214 xhci->ext_caps = kzalloc(sizeof(*xhci->ext_caps) * cap_count, flags);
2215 if (!xhci->ext_caps)
2216 return -ENOMEM;
2217
Sarah Sharpda6699c2010-10-26 16:47:13 -07002218 while (1) {
2219 u32 cap_id;
2220
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002221 cap_id = readl(addr);
Sarah Sharpda6699c2010-10-26 16:47:13 -07002222 if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)
2223 xhci_add_in_port(xhci, num_ports, addr,
Mathias Nymanb630d4b2013-05-23 17:14:28 +03002224 (u8) XHCI_EXT_PORT_MAJOR(cap_id),
2225 cap_count);
Sarah Sharpda6699c2010-10-26 16:47:13 -07002226 offset = XHCI_EXT_CAPS_NEXT(cap_id);
2227 if (!offset || (xhci->num_usb2_ports + xhci->num_usb3_ports)
2228 == num_ports)
2229 break;
2230 /*
2231 * Once you're into the Extended Capabilities, the offset is
2232 * always relative to the register holding the offset.
2233 */
2234 addr += offset;
2235 }
2236
2237 if (xhci->num_usb2_ports == 0 && xhci->num_usb3_ports == 0) {
2238 xhci_warn(xhci, "No ports on the roothubs?\n");
2239 return -ENODEV;
2240 }
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002241 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2242 "Found %u USB 2.0 ports and %u USB 3.0 ports.",
Sarah Sharpda6699c2010-10-26 16:47:13 -07002243 xhci->num_usb2_ports, xhci->num_usb3_ports);
Sarah Sharpd30b2a22010-11-23 10:42:22 -08002244
2245 /* Place limits on the number of roothub ports so that the hub
2246 * descriptors aren't longer than the USB core will allocate.
2247 */
2248 if (xhci->num_usb3_ports > 15) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002249 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2250 "Limiting USB 3.0 roothub ports to 15.");
Sarah Sharpd30b2a22010-11-23 10:42:22 -08002251 xhci->num_usb3_ports = 15;
2252 }
2253 if (xhci->num_usb2_ports > USB_MAXCHILDREN) {
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002254 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2255 "Limiting USB 2.0 roothub ports to %u.",
Sarah Sharpd30b2a22010-11-23 10:42:22 -08002256 USB_MAXCHILDREN);
2257 xhci->num_usb2_ports = USB_MAXCHILDREN;
2258 }
2259
Sarah Sharpda6699c2010-10-26 16:47:13 -07002260 /*
2261 * Note we could have all USB 3.0 ports, or all USB 2.0 ports.
2262 * Not sure how the USB core will handle a hub with no ports...
2263 */
2264 if (xhci->num_usb2_ports) {
2265 xhci->usb2_ports = kmalloc(sizeof(*xhci->usb2_ports)*
2266 xhci->num_usb2_ports, flags);
2267 if (!xhci->usb2_ports)
2268 return -ENOMEM;
2269
2270 port_index = 0;
Sarah Sharpf8bbeab2010-12-09 10:29:00 -08002271 for (i = 0; i < num_ports; i++) {
2272 if (xhci->port_array[i] == 0x03 ||
2273 xhci->port_array[i] == 0 ||
Dan Carpenter22e04872011-03-17 22:39:49 +03002274 xhci->port_array[i] == DUPLICATE_ENTRY)
Sarah Sharpf8bbeab2010-12-09 10:29:00 -08002275 continue;
2276
2277 xhci->usb2_ports[port_index] =
2278 &xhci->op_regs->port_status_base +
2279 NUM_PORT_REGS*i;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002280 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2281 "USB 2.0 port at index %u, "
2282 "addr = %p", i,
Sarah Sharpf8bbeab2010-12-09 10:29:00 -08002283 xhci->usb2_ports[port_index]);
2284 port_index++;
Sarah Sharpd30b2a22010-11-23 10:42:22 -08002285 if (port_index == xhci->num_usb2_ports)
2286 break;
Sarah Sharpf8bbeab2010-12-09 10:29:00 -08002287 }
Sarah Sharpda6699c2010-10-26 16:47:13 -07002288 }
2289 if (xhci->num_usb3_ports) {
2290 xhci->usb3_ports = kmalloc(sizeof(*xhci->usb3_ports)*
2291 xhci->num_usb3_ports, flags);
2292 if (!xhci->usb3_ports)
2293 return -ENOMEM;
2294
2295 port_index = 0;
2296 for (i = 0; i < num_ports; i++)
2297 if (xhci->port_array[i] == 0x03) {
2298 xhci->usb3_ports[port_index] =
2299 &xhci->op_regs->port_status_base +
2300 NUM_PORT_REGS*i;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002301 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2302 "USB 3.0 port at index %u, "
2303 "addr = %p", i,
Sarah Sharpda6699c2010-10-26 16:47:13 -07002304 xhci->usb3_ports[port_index]);
2305 port_index++;
Sarah Sharpd30b2a22010-11-23 10:42:22 -08002306 if (port_index == xhci->num_usb3_ports)
2307 break;
Sarah Sharpda6699c2010-10-26 16:47:13 -07002308 }
2309 }
2310 return 0;
2311}
Sarah Sharp6648f292009-11-09 13:35:23 -08002312
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002313int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2314{
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002315 dma_addr_t dma;
2316 struct device *dev = xhci_to_hcd(xhci)->self.controller;
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002317 unsigned int val, val2;
Sarah Sharp8e595a52009-07-27 12:03:31 -07002318 u64 val_64;
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002319 struct xhci_segment *seg;
Sarah Sharp623bef92011-11-11 14:57:33 -08002320 u32 page_size, temp;
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002321 int i;
2322
Mathias Nymanc9aa1a22014-05-08 19:26:01 +03002323 INIT_LIST_HEAD(&xhci->cmd_list);
Sergio Aguirre331de002013-04-04 10:32:13 -07002324
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002325 page_size = readl(&xhci->op_regs->page_size);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002326 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2327 "Supported page size register = 0x%x", page_size);
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002328 for (i = 0; i < 16; i++) {
2329 if ((0x1 & page_size) != 0)
2330 break;
2331 page_size = page_size >> 1;
2332 }
2333 if (i < 16)
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002334 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2335 "Supported page size of %iK", (1 << (i+12)) / 1024);
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002336 else
2337 xhci_warn(xhci, "WARN: no supported page size\n");
2338 /* Use 4K pages, since that's common and the minimum the HC supports */
2339 xhci->page_shift = 12;
2340 xhci->page_size = 1 << xhci->page_shift;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002341 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2342 "HCD page size set to %iK", xhci->page_size / 1024);
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002343
2344 /*
2345 * Program the Number of Device Slots Enabled field in the CONFIG
2346 * register with the max value of slots the HC can handle.
2347 */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002348 val = HCS_MAX_SLOTS(readl(&xhci->cap_regs->hcs_params1));
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002349 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2350 "// xHC can handle at most %d device slots.", val);
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002351 val2 = readl(&xhci->op_regs->config_reg);
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002352 val |= (val2 & ~HCS_SLOTS_MASK);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002353 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2354 "// Setting Max device slots reg = 0x%x.", val);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02002355 writel(val, &xhci->op_regs->config_reg);
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002356
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002357 /*
Sarah Sharpa74588f2009-04-27 19:53:42 -07002358 * Section 5.4.8 - doorbell array must be
2359 * "physically contiguous and 64-byte (cache line) aligned".
2360 */
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07002361 xhci->dcbaa = dma_alloc_coherent(dev, sizeof(*xhci->dcbaa), &dma,
2362 GFP_KERNEL);
Sarah Sharpa74588f2009-04-27 19:53:42 -07002363 if (!xhci->dcbaa)
2364 goto fail;
2365 memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa));
2366 xhci->dcbaa->dma = dma;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002367 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2368 "// Device context base array address = 0x%llx (DMA), %p (virt)",
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07002369 (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
Sarah Sharp477632d2014-01-29 14:02:00 -08002370 xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
Sarah Sharpa74588f2009-04-27 19:53:42 -07002371
2372 /*
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002373 * Initialize the ring segment pool. The ring must be a contiguous
2374 * structure comprised of TRBs. The TRBs must be 16 byte aligned,
Hans de Goede84c1e402013-11-05 15:50:03 +01002375 * however, the command ring segment needs 64-byte aligned segments
2376 * and our use of dma addresses in the trb_address_map radix tree needs
2377 * TRB_SEGMENT_SIZE alignment, so we pick the greater alignment need.
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002378 */
2379 xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
Hans de Goede84c1e402013-11-05 15:50:03 +01002380 TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size);
John Yound115b042009-07-27 12:05:15 -07002381
Sarah Sharp3ffbba92009-04-27 19:57:38 -07002382 /* See Table 46 and Note on Figure 55 */
Sarah Sharp3ffbba92009-04-27 19:57:38 -07002383 xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
John Yound115b042009-07-27 12:05:15 -07002384 2112, 64, xhci->page_size);
Sarah Sharp3ffbba92009-04-27 19:57:38 -07002385 if (!xhci->segment_pool || !xhci->device_pool)
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002386 goto fail;
2387
Sarah Sharp8df75f42010-04-02 15:34:16 -07002388 /* Linear stream context arrays don't have any boundary restrictions,
2389 * and only need to be 16-byte aligned.
2390 */
2391 xhci->small_streams_pool =
2392 dma_pool_create("xHCI 256 byte stream ctx arrays",
2393 dev, SMALL_STREAM_ARRAY_SIZE, 16, 0);
2394 xhci->medium_streams_pool =
2395 dma_pool_create("xHCI 1KB stream ctx arrays",
2396 dev, MEDIUM_STREAM_ARRAY_SIZE, 16, 0);
2397 /* Any stream context array bigger than MEDIUM_STREAM_ARRAY_SIZE
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07002398 * will be allocated with dma_alloc_coherent()
Sarah Sharp8df75f42010-04-02 15:34:16 -07002399 */
2400
2401 if (!xhci->small_streams_pool || !xhci->medium_streams_pool)
2402 goto fail;
2403
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002404 /* Set up the command ring to have one segments for now. */
Andiry Xu186a7ef2012-03-05 17:49:36 +08002405 xhci->cmd_ring = xhci_ring_alloc(xhci, 1, 1, TYPE_COMMAND, flags);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002406 if (!xhci->cmd_ring)
2407 goto fail;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002408 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2409 "Allocated command ring at %p", xhci->cmd_ring);
2410 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "First segment DMA is 0x%llx",
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07002411 (unsigned long long)xhci->cmd_ring->first_seg->dma);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002412
2413 /* Set the address in the Command Ring Control register */
Sarah Sharpf7b2e402014-01-30 13:27:49 -08002414 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
Sarah Sharp8e595a52009-07-27 12:03:31 -07002415 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
2416 (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002417 xhci->cmd_ring->cycle_state;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002418 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2419 "// Setting command ring address to 0x%x", val);
Sarah Sharp477632d2014-01-29 14:02:00 -08002420 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002421 xhci_dbg_cmd_ptrs(xhci);
2422
Sarah Sharpdbc33302012-05-08 07:32:03 -07002423 xhci->lpm_command = xhci_alloc_command(xhci, true, true, flags);
2424 if (!xhci->lpm_command)
2425 goto fail;
2426
2427 /* Reserve one command ring TRB for disabling LPM.
2428 * Since the USB core grabs the shared usb_bus bandwidth mutex before
2429 * disabling LPM, we only need to reserve one TRB for all devices.
2430 */
2431 xhci->cmd_ring_reserved_trbs++;
2432
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002433 val = readl(&xhci->cap_regs->db_off);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002434 val &= DBOFF_MASK;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002435 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2436 "// Doorbell array is located at offset 0x%x"
2437 " from cap regs base addr", val);
Dmitry Torokhovc50a00f2011-02-08 16:29:34 -08002438 xhci->dba = (void __iomem *) xhci->cap_regs + val;
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002439 xhci_dbg_regs(xhci);
2440 xhci_print_run_regs(xhci);
2441 /* Set ir_set to interrupt register set 0 */
Dmitry Torokhovc50a00f2011-02-08 16:29:34 -08002442 xhci->ir_set = &xhci->run_regs->ir_set[0];
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002443
2444 /*
2445 * Event ring setup: Allocate a normal ring, but also setup
2446 * the event ring segment table (ERST). Section 4.9.3.
2447 */
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002448 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Allocating event ring");
Andiry Xu186a7ef2012-03-05 17:49:36 +08002449 xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, 1, TYPE_EVENT,
Andiry Xu7e393a82011-09-23 14:19:54 -07002450 flags);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002451 if (!xhci->event_ring)
2452 goto fail;
Sarah Sharp6648f292009-11-09 13:35:23 -08002453 if (xhci_check_trb_in_td_math(xhci, flags) < 0)
2454 goto fail;
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002455
Sebastian Andrzej Siewior22d45f02011-09-23 14:19:59 -07002456 xhci->erst.entries = dma_alloc_coherent(dev,
2457 sizeof(struct xhci_erst_entry) * ERST_NUM_SEGS, &dma,
2458 GFP_KERNEL);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002459 if (!xhci->erst.entries)
2460 goto fail;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002461 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2462 "// Allocated event ring segment table at 0x%llx",
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07002463 (unsigned long long)dma);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002464
2465 memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS);
2466 xhci->erst.num_entries = ERST_NUM_SEGS;
2467 xhci->erst.erst_dma_addr = dma;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002468 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2469 "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx",
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002470 xhci->erst.num_entries,
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07002471 xhci->erst.entries,
2472 (unsigned long long)xhci->erst.erst_dma_addr);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002473
2474 /* set ring base address and size for each segment table entry */
2475 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
2476 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
Matt Evans28ccd292011-03-29 13:40:46 +11002477 entry->seg_addr = cpu_to_le64(seg->dma);
2478 entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002479 entry->rsvd = 0;
2480 seg = seg->next;
2481 }
2482
2483 /* set ERST count with the number of entries in the segment table */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002484 val = readl(&xhci->ir_set->erst_size);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002485 val &= ERST_SIZE_MASK;
2486 val |= ERST_NUM_SEGS;
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002487 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2488 "// Write ERST size = %i to ir_set 0 (some bits preserved)",
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002489 val);
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02002490 writel(val, &xhci->ir_set->erst_size);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002491
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002492 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2493 "// Set ERST entries to point to event ring.");
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002494 /* set the segment table base address */
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002495 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2496 "// Set ERST base address for ir_set 0 = 0x%llx",
Greg Kroah-Hartman700e2052009-04-29 19:14:08 -07002497 (unsigned long long)xhci->erst.erst_dma_addr);
Sarah Sharpf7b2e402014-01-30 13:27:49 -08002498 val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
Sarah Sharp8e595a52009-07-27 12:03:31 -07002499 val_64 &= ERST_PTR_MASK;
2500 val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
Sarah Sharp477632d2014-01-29 14:02:00 -08002501 xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002502
2503 /* Set the event ring dequeue address */
Sarah Sharp23e3be12009-04-29 19:05:20 -07002504 xhci_set_hc_event_deq(xhci);
Xenia Ragiadakoud195fcf2013-08-14 06:33:55 +03002505 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2506 "Wrote ERST address to ir_set 0.");
Dmitry Torokhov09ece302011-02-08 16:29:33 -08002507 xhci_print_ir_set(xhci, 0);
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002508
Mathias Nymanc311e392014-05-08 19:26:03 +03002509 /* init command timeout timer */
2510 init_timer(&xhci->cmd_timer);
2511 xhci->cmd_timer.data = (unsigned long) xhci;
2512 xhci->cmd_timer.function = xhci_handle_command_timeout;
2513
Sarah Sharp0ebbab32009-04-27 19:52:34 -07002514 /*
2515 * XXX: Might need to set the Interrupter Moderation Register to
2516 * something other than the default (~1ms minimum between interrupts).
2517 * See section 5.5.1.2.
2518 */
Sarah Sharp3ffbba92009-04-27 19:57:38 -07002519 init_completion(&xhci->addr_dev);
2520 for (i = 0; i < MAX_HC_SLOTS; ++i)
Randy Dunlap326b4812010-04-19 08:53:50 -07002521 xhci->devs[i] = NULL;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08002522 for (i = 0; i < USB_MAXCHILDREN; ++i) {
Sarah Sharp20b67cf2010-12-15 12:47:14 -08002523 xhci->bus_state[0].resume_done[i] = 0;
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08002524 xhci->bus_state[1].resume_done[i] = 0;
Sarah Sharp8b3d4572013-08-20 08:12:12 -07002525 /* Only the USB 2.0 completions will ever be used. */
2526 init_completion(&xhci->bus_state[1].rexit_done[i]);
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -08002527 }
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002528
John Youn254c80a2009-07-27 12:05:03 -07002529 if (scratchpad_alloc(xhci, flags))
2530 goto fail;
Sarah Sharpda6699c2010-10-26 16:47:13 -07002531 if (xhci_setup_port_arrays(xhci, flags))
2532 goto fail;
John Youn254c80a2009-07-27 12:05:03 -07002533
Sarah Sharp623bef92011-11-11 14:57:33 -08002534 /* Enable USB 3.0 device notifications for function remote wake, which
2535 * is necessary for allowing USB 3.0 devices to do remote wakeup from
2536 * U3 (device suspend).
2537 */
Xenia Ragiadakoub0ba9722013-11-15 05:34:06 +02002538 temp = readl(&xhci->op_regs->dev_notification);
Sarah Sharp623bef92011-11-11 14:57:33 -08002539 temp &= ~DEV_NOTE_MASK;
2540 temp |= DEV_NOTE_FWAKE;
Xenia Ragiadakou204b7792013-11-15 05:34:07 +02002541 writel(temp, &xhci->op_regs->dev_notification);
Sarah Sharp623bef92011-11-11 14:57:33 -08002542
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002543 return 0;
John Youn254c80a2009-07-27 12:05:03 -07002544
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002545fail:
2546 xhci_warn(xhci, "Couldn't initialize memory\n");
Sarah Sharp159e1fc2012-03-16 13:09:39 -07002547 xhci_halt(xhci);
2548 xhci_reset(xhci);
Sarah Sharp66d4ead2009-04-27 19:52:28 -07002549 xhci_mem_cleanup(xhci);
2550 return -ENOMEM;
2551}