blob: 09664fcf5afb047c0923fa5e5fe7c343e0f2171e [file] [log] [blame]
Dong Aishengbc3a59c2012-03-31 21:26:57 +08001/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020013#include "imx28.dtsi"
Dong Aishengbc3a59c2012-03-31 21:26:57 +080014
15/ {
16 model = "Freescale i.MX28 Evaluation Kit";
17 compatible = "fsl,imx28-evk", "fsl,imx28";
18
19 memory {
20 reg = <0x40000000 0x08000000>;
21 };
22
23 apb@80000000 {
Shawn Guo35d23042012-05-06 16:33:34 +080024 apbh@80000000 {
Huang Shijie7a8e5142012-05-25 17:25:35 +080025 gpmi-nand@8000c000 {
26 pinctrl-names = "default";
Shawn Guodaefb692012-07-07 20:59:09 +080027 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg
28 &gpmi_pins_evk>;
Huang Shijie7a8e5142012-05-25 17:25:35 +080029 status = "okay";
30 };
31
Shawn Guo35d23042012-05-06 16:33:34 +080032 ssp0: ssp@80010000 {
33 compatible = "fsl,imx28-mmc";
34 pinctrl-names = "default";
35 pinctrl-0 = <&mmc0_8bit_pins_a
36 &mmc0_cd_cfg &mmc0_sck_cfg>;
37 bus-width = <8>;
38 wp-gpios = <&gpio2 12 0>;
Shawn Guo64edbcd2012-06-28 11:45:01 +080039 vmmc-supply = <&reg_vddio_sd0>;
Shawn Guo35d23042012-05-06 16:33:34 +080040 status = "okay";
41 };
42
43 ssp1: ssp@80012000 {
44 compatible = "fsl,imx28-mmc";
45 bus-width = <8>;
46 wp-gpios = <&gpio0 28 0>;
Shawn Guo35d23042012-05-06 16:33:34 +080047 };
Shawn Guod54dbb52012-06-28 11:44:58 +080048
Fabio Estevam5decb4b2012-08-27 13:23:27 -030049 ssp2: ssp@80014000 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "fsl,imx28-spi";
53 pinctrl-names = "default";
54 pinctrl-0 = <&spi2_pins_a>;
55 status = "okay";
56
57 flash: m25p80@0 {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "sst,sst25vf016b";
61 spi-max-frequency = <40000000>;
62 reg = <0>;
63 };
64 };
65
Shawn Guod54dbb52012-06-28 11:44:58 +080066 pinctrl@80018000 {
67 pinctrl-names = "default";
68 pinctrl-0 = <&hog_pins_a>;
69
Fabio Estevame0e35b42012-08-22 13:25:31 -030070 hog_pins_a: hog@0 {
Shawn Guod54dbb52012-06-28 11:44:58 +080071 reg = <0>;
72 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020073 MX28_PAD_SSP1_CMD__GPIO_2_13
74 MX28_PAD_SSP1_DATA3__GPIO_2_15
75 MX28_PAD_ENET0_RX_CLK__GPIO_4_13
76 MX28_PAD_SSP1_SCK__GPIO_2_12
77 MX28_PAD_PWM3__GPIO_3_28
78 MX28_PAD_LCD_RESET__GPIO_3_30
79 MX28_PAD_AUART2_RX__GPIO_3_8
80 MX28_PAD_AUART2_TX__GPIO_3_9
Shawn Guod54dbb52012-06-28 11:44:58 +080081 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080082 fsl,drive-strength = <MXS_DRIVE_4mA>;
83 fsl,voltage = <MXS_VOLTAGE_HIGH>;
84 fsl,pull-up = <MXS_PULL_DISABLE>;
Shawn Guod54dbb52012-06-28 11:44:58 +080085 };
Shawn Guodaefb692012-07-07 20:59:09 +080086
Fabio Estevam30d6e2d2012-09-23 16:18:38 -030087 led_pin_gpio3_5: led_gpio3_5@0 {
88 reg = <0>;
89 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020090 MX28_PAD_AUART1_TX__GPIO_3_5
Fabio Estevam30d6e2d2012-09-23 16:18:38 -030091 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080092 fsl,drive-strength = <MXS_DRIVE_4mA>;
93 fsl,voltage = <MXS_VOLTAGE_HIGH>;
94 fsl,pull-up = <MXS_PULL_DISABLE>;
Fabio Estevam30d6e2d2012-09-23 16:18:38 -030095 };
96
Shawn Guodaefb692012-07-07 20:59:09 +080097 gpmi_pins_evk: gpmi-nand-evk@0 {
98 reg = <0>;
99 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +0200100 MX28_PAD_GPMI_CE1N__GPMI_CE1N
101 MX28_PAD_GPMI_RDY1__GPMI_READY1
Shawn Guodaefb692012-07-07 20:59:09 +0800102 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +0800103 fsl,drive-strength = <MXS_DRIVE_4mA>;
104 fsl,voltage = <MXS_VOLTAGE_HIGH>;
105 fsl,pull-up = <MXS_PULL_DISABLE>;
Shawn Guodaefb692012-07-07 20:59:09 +0800106 };
Shawn Guo3dba2592012-07-07 21:09:51 +0800107
108 lcdif_pins_evk: lcdif-evk@0 {
109 reg = <0>;
110 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +0200111 MX28_PAD_LCD_RD_E__LCD_VSYNC
112 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
113 MX28_PAD_LCD_RS__LCD_DOTCLK
114 MX28_PAD_LCD_CS__LCD_ENABLE
Shawn Guo3dba2592012-07-07 21:09:51 +0800115 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +0800116 fsl,drive-strength = <MXS_DRIVE_4mA>;
117 fsl,voltage = <MXS_VOLTAGE_HIGH>;
118 fsl,pull-up = <MXS_PULL_DISABLE>;
Shawn Guo3dba2592012-07-07 21:09:51 +0800119 };
Shawn Guod54dbb52012-06-28 11:44:58 +0800120 };
Shawn Guoa915ee42012-06-28 11:45:07 +0800121
122 lcdif@80030000 {
123 pinctrl-names = "default";
Shawn Guo3dba2592012-07-07 21:09:51 +0800124 pinctrl-0 = <&lcdif_24bit_pins_a
125 &lcdif_pins_evk>;
Fabio Estevam43444292013-04-07 15:44:59 -0300126 lcd-supply = <&reg_lcd_3v3>;
Fabio Estevam20d412b2014-09-02 22:45:12 -0300127 display = <&display0>;
Shawn Guoa915ee42012-06-28 11:45:07 +0800128 status = "okay";
Shawn Guo0d9f8212013-03-14 11:37:15 +0800129
Fabio Estevam20d412b2014-09-02 22:45:12 -0300130 display0: display0 {
Shawn Guo0d9f8212013-03-14 11:37:15 +0800131 bits-per-pixel = <32>;
132 bus-width = <24>;
133
134 display-timings {
135 native-mode = <&timing0>;
136 timing0: timing0 {
137 clock-frequency = <33500000>;
138 hactive = <800>;
139 vactive = <480>;
140 hback-porch = <89>;
141 hfront-porch = <164>;
142 vback-porch = <23>;
143 vfront-porch = <10>;
144 hsync-len = <10>;
145 vsync-len = <10>;
146 hsync-active = <0>;
147 vsync-active = <0>;
148 de-active = <1>;
149 pixelclk-active = <0>;
150 };
151 };
152 };
Shawn Guoa915ee42012-06-28 11:45:07 +0800153 };
Shawn Guo6ca44ac2012-06-28 11:45:03 +0800154
155 can0: can@80032000 {
156 pinctrl-names = "default";
157 pinctrl-0 = <&can0_pins_a>;
Fabio Estevamb7c41142013-06-10 23:12:57 -0300158 xceiver-supply = <&reg_can_3v3>;
Shawn Guo6ca44ac2012-06-28 11:45:03 +0800159 status = "okay";
160 };
161
162 can1: can@80034000 {
163 pinctrl-names = "default";
164 pinctrl-0 = <&can1_pins_a>;
Fabio Estevamb7c41142013-06-10 23:12:57 -0300165 xceiver-supply = <&reg_can_3v3>;
Shawn Guo6ca44ac2012-06-28 11:45:03 +0800166 status = "okay";
167 };
Shawn Guo35d23042012-05-06 16:33:34 +0800168 };
169
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800170 apbx@80040000 {
Shawn Guo530f1d42012-05-10 15:03:16 +0800171 saif0: saif@80042000 {
172 pinctrl-names = "default";
173 pinctrl-0 = <&saif0_pins_a>;
174 status = "okay";
175 };
176
177 saif1: saif@80046000 {
178 pinctrl-names = "default";
179 pinctrl-0 = <&saif1_pins_a>;
180 fsl,saif-master = <&saif0>;
181 status = "okay";
182 };
183
Fabio Estevam8495a242012-08-27 13:23:28 -0300184 lradc@80050000 {
Fabio Estevam289604d2013-09-17 16:18:38 -0300185 fsl,lradc-touchscreen-wires = <4>;
Fabio Estevam8495a242012-08-27 13:23:28 -0300186 status = "okay";
Juergen Beiserte9c88fb2013-09-23 15:36:00 +0100187 fsl,lradc-touchscreen-wires = <4>;
188 fsl,ave-ctrl = <4>;
189 fsl,ave-delay = <2>;
190 fsl,settling = <10>;
Fabio Estevam8495a242012-08-27 13:23:28 -0300191 };
192
Shawn Guo2a96e392012-05-10 15:02:10 +0800193 i2c0: i2c@80058000 {
194 pinctrl-names = "default";
195 pinctrl-0 = <&i2c0_pins_a>;
Fabio Estevam78b81f462013-11-25 15:47:39 -0200196 clock-frequency = <400000>;
Shawn Guo2a96e392012-05-10 15:02:10 +0800197 status = "okay";
Shawn Guo530f1d42012-05-10 15:03:16 +0800198
199 sgtl5000: codec@0a {
200 compatible = "fsl,sgtl5000";
201 reg = <0x0a>;
202 VDDA-supply = <&reg_3p3v>;
203 VDDIO-supply = <&reg_3p3v>;
Shawn Guo66acaf32013-07-01 15:46:05 +0800204 clocks = <&saif0>;
Shawn Guo530f1d42012-05-10 15:03:16 +0800205 };
Fabio Estevamfa876ce2012-08-27 16:39:59 -0300206
207 at24@51 {
208 compatible = "at24,24c32";
209 pagesize = <32>;
210 reg = <0x51>;
211 };
Shawn Guo2a96e392012-05-10 15:02:10 +0800212 };
213
Shawn Guo52f71762012-06-28 11:45:06 +0800214 pwm: pwm@80064000 {
215 pinctrl-names = "default";
216 pinctrl-0 = <&pwm2_pins_a>;
217 status = "okay";
218 };
219
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800220 duart: serial@80074000 {
221 pinctrl-names = "default";
222 pinctrl-0 = <&duart_pins_a>;
223 status = "okay";
224 };
Fabio Estevam80d969e2012-06-15 12:35:56 -0300225
226 auart0: serial@8006a000 {
227 pinctrl-names = "default";
228 pinctrl-0 = <&auart0_pins_a>;
Huang Shijieb2755b72013-08-03 10:09:16 -0400229 fsl,uart-has-rtscts;
Fabio Estevam80d969e2012-06-15 12:35:56 -0300230 status = "okay";
231 };
232
233 auart3: serial@80070000 {
234 pinctrl-names = "default";
235 pinctrl-0 = <&auart3_pins_a>;
236 status = "okay";
237 };
Richard Zhao5da01272012-07-12 10:25:27 +0800238
239 usbphy0: usbphy@8007c000 {
240 status = "okay";
241 };
242
243 usbphy1: usbphy@8007e000 {
244 status = "okay";
245 };
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800246 };
247 };
248
249 ahb@80080000 {
Richard Zhao5da01272012-07-12 10:25:27 +0800250 usb0: usb@80080000 {
Fabio Estevam69c02f92013-08-21 10:27:03 -0300251 pinctrl-names = "default";
252 pinctrl-0 = <&usb0_id_pins_a>;
Richard Zhao5da01272012-07-12 10:25:27 +0800253 vbus-supply = <&reg_usb0_vbus>;
254 status = "okay";
255 };
256
257 usb1: usb@80090000 {
258 vbus-supply = <&reg_usb1_vbus>;
259 status = "okay";
260 };
261
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800262 mac0: ethernet@800f0000 {
263 phy-mode = "rmii";
264 pinctrl-names = "default";
265 pinctrl-0 = <&mac0_pins_a>;
Shawn Guoc9987c82012-06-28 11:45:02 +0800266 phy-supply = <&reg_fec_3v3>;
267 phy-reset-gpios = <&gpio4 13 0>;
268 phy-reset-duration = <100>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800269 status = "okay";
270 };
271
272 mac1: ethernet@800f4000 {
273 phy-mode = "rmii";
274 pinctrl-names = "default";
275 pinctrl-0 = <&mac1_pins_a>;
276 status = "okay";
277 };
278 };
Shawn Guo530f1d42012-05-10 15:03:16 +0800279
280 regulators {
281 compatible = "simple-bus";
Shawn Guo352d3182014-02-07 23:18:30 +0800282 #address-cells = <1>;
283 #size-cells = <0>;
Shawn Guo530f1d42012-05-10 15:03:16 +0800284
Shawn Guo352d3182014-02-07 23:18:30 +0800285 reg_3p3v: regulator@0 {
Shawn Guo530f1d42012-05-10 15:03:16 +0800286 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800287 reg = <0>;
Shawn Guo530f1d42012-05-10 15:03:16 +0800288 regulator-name = "3P3V";
289 regulator-min-microvolt = <3300000>;
290 regulator-max-microvolt = <3300000>;
291 regulator-always-on;
292 };
Shawn Guo64edbcd2012-06-28 11:45:01 +0800293
Shawn Guo352d3182014-02-07 23:18:30 +0800294 reg_vddio_sd0: regulator@1 {
Shawn Guo64edbcd2012-06-28 11:45:01 +0800295 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800296 reg = <1>;
Shawn Guo64edbcd2012-06-28 11:45:01 +0800297 regulator-name = "vddio-sd0";
298 regulator-min-microvolt = <3300000>;
299 regulator-max-microvolt = <3300000>;
300 gpio = <&gpio3 28 0>;
301 };
Shawn Guoc9987c82012-06-28 11:45:02 +0800302
Shawn Guo352d3182014-02-07 23:18:30 +0800303 reg_fec_3v3: regulator@2 {
Shawn Guoc9987c82012-06-28 11:45:02 +0800304 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800305 reg = <2>;
Shawn Guoc9987c82012-06-28 11:45:02 +0800306 regulator-name = "fec-3v3";
307 regulator-min-microvolt = <3300000>;
308 regulator-max-microvolt = <3300000>;
309 gpio = <&gpio2 15 0>;
310 };
Richard Zhao5da01272012-07-12 10:25:27 +0800311
Shawn Guo352d3182014-02-07 23:18:30 +0800312 reg_usb0_vbus: regulator@3 {
Richard Zhao5da01272012-07-12 10:25:27 +0800313 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800314 reg = <3>;
Richard Zhao5da01272012-07-12 10:25:27 +0800315 regulator-name = "usb0_vbus";
316 regulator-min-microvolt = <5000000>;
317 regulator-max-microvolt = <5000000>;
318 gpio = <&gpio3 9 0>;
319 enable-active-high;
320 };
321
Shawn Guo352d3182014-02-07 23:18:30 +0800322 reg_usb1_vbus: regulator@4 {
Richard Zhao5da01272012-07-12 10:25:27 +0800323 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800324 reg = <4>;
Richard Zhao5da01272012-07-12 10:25:27 +0800325 regulator-name = "usb1_vbus";
326 regulator-min-microvolt = <5000000>;
327 regulator-max-microvolt = <5000000>;
328 gpio = <&gpio3 8 0>;
329 enable-active-high;
330 };
Fabio Estevam43444292013-04-07 15:44:59 -0300331
Shawn Guo352d3182014-02-07 23:18:30 +0800332 reg_lcd_3v3: regulator@5 {
Fabio Estevam43444292013-04-07 15:44:59 -0300333 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800334 reg = <5>;
Fabio Estevam43444292013-04-07 15:44:59 -0300335 regulator-name = "lcd-3v3";
336 regulator-min-microvolt = <3300000>;
337 regulator-max-microvolt = <3300000>;
338 gpio = <&gpio3 30 0>;
339 enable-active-high;
340 };
Fabio Estevamb7c41142013-06-10 23:12:57 -0300341
Shawn Guo352d3182014-02-07 23:18:30 +0800342 reg_can_3v3: regulator@6 {
Fabio Estevamb7c41142013-06-10 23:12:57 -0300343 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800344 reg = <6>;
Fabio Estevamb7c41142013-06-10 23:12:57 -0300345 regulator-name = "can-3v3";
346 regulator-min-microvolt = <3300000>;
347 regulator-max-microvolt = <3300000>;
348 gpio = <&gpio2 13 0>;
349 enable-active-high;
350 };
351
Shawn Guo530f1d42012-05-10 15:03:16 +0800352 };
353
354 sound {
355 compatible = "fsl,imx28-evk-sgtl5000",
356 "fsl,mxs-audio-sgtl5000";
357 model = "imx28-evk-sgtl5000";
358 saif-controllers = <&saif0 &saif1>;
359 audio-codec = <&sgtl5000>;
360 };
Shawn Guoa600e332012-06-28 11:45:04 +0800361
362 leds {
363 compatible = "gpio-leds";
Fabio Estevam30d6e2d2012-09-23 16:18:38 -0300364 pinctrl-names = "default";
365 pinctrl-0 = <&led_pin_gpio3_5>;
Shawn Guoa600e332012-06-28 11:45:04 +0800366
367 user {
368 label = "Heartbeat";
369 gpios = <&gpio3 5 0>;
370 linux,default-trigger = "heartbeat";
371 };
372 };
Shawn Guo52f71762012-06-28 11:45:06 +0800373
374 backlight {
375 compatible = "pwm-backlight";
376 pwms = <&pwm 2 5000000>;
377 brightness-levels = <0 4 8 16 32 64 128 255>;
378 default-brightness-level = <6>;
379 };
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800380};