Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1 | /* |
Vinit Agnihotri | e2eed58 | 2013-03-14 18:13:41 +0000 | [diff] [blame] | 2 | * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved. |
Mike Marciniszyn | 551ace1 | 2012-07-19 13:03:56 +0000 | [diff] [blame] | 3 | * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved. |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 4 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. |
| 5 | * |
| 6 | * This software is available to you under a choice of one of two |
| 7 | * licenses. You may choose to be licensed under the terms of the GNU |
| 8 | * General Public License (GPL) Version 2, available from the file |
| 9 | * COPYING in the main directory of this source tree, or the |
| 10 | * OpenIB.org BSD license below: |
| 11 | * |
| 12 | * Redistribution and use in source and binary forms, with or |
| 13 | * without modification, are permitted provided that the following |
| 14 | * conditions are met: |
| 15 | * |
| 16 | * - Redistributions of source code must retain the above |
| 17 | * copyright notice, this list of conditions and the following |
| 18 | * disclaimer. |
| 19 | * |
| 20 | * - Redistributions in binary form must reproduce the above |
| 21 | * copyright notice, this list of conditions and the following |
| 22 | * disclaimer in the documentation and/or other materials |
| 23 | * provided with the distribution. |
| 24 | * |
| 25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 32 | * SOFTWARE. |
| 33 | */ |
| 34 | |
| 35 | #include <linux/pci.h> |
| 36 | #include <linux/netdevice.h> |
| 37 | #include <linux/vmalloc.h> |
| 38 | #include <linux/delay.h> |
| 39 | #include <linux/idr.h> |
Paul Gortmaker | e4dd23d | 2011-05-27 15:35:46 -0400 | [diff] [blame] | 40 | #include <linux/module.h> |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 41 | #include <linux/printk.h> |
Mike Marciniszyn | 8469ba3 | 2013-05-30 18:25:25 -0400 | [diff] [blame] | 42 | #ifdef CONFIG_INFINIBAND_QIB_DCA |
| 43 | #include <linux/dca.h> |
| 44 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 45 | |
| 46 | #include "qib.h" |
| 47 | #include "qib_common.h" |
Mike Marciniszyn | 36a8f01 | 2012-07-19 13:04:04 +0000 | [diff] [blame] | 48 | #include "qib_mad.h" |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 49 | #ifdef CONFIG_DEBUG_FS |
| 50 | #include "qib_debugfs.h" |
| 51 | #include "qib_verbs.h" |
| 52 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 53 | |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 54 | #undef pr_fmt |
| 55 | #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt |
| 56 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 57 | /* |
| 58 | * min buffers we want to have per context, after driver |
| 59 | */ |
| 60 | #define QIB_MIN_USER_CTXT_BUFCNT 7 |
| 61 | |
| 62 | #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF |
| 63 | #define QLOGIC_IB_R_SOFTWARE_SHIFT 24 |
| 64 | #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62) |
| 65 | |
| 66 | /* |
| 67 | * Number of ctxts we are configured to use (to allow for more pio |
| 68 | * buffers per ctxt, etc.) Zero means use chip value. |
| 69 | */ |
| 70 | ushort qib_cfgctxts; |
| 71 | module_param_named(cfgctxts, qib_cfgctxts, ushort, S_IRUGO); |
| 72 | MODULE_PARM_DESC(cfgctxts, "Set max number of contexts to use"); |
| 73 | |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 74 | unsigned qib_numa_aware; |
| 75 | module_param_named(numa_aware, qib_numa_aware, uint, S_IRUGO); |
| 76 | MODULE_PARM_DESC(numa_aware, |
| 77 | "0 -> PSM allocation close to HCA, 1 -> PSM allocation local to process"); |
| 78 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 79 | /* |
| 80 | * If set, do not write to any regs if avoidable, hack to allow |
| 81 | * check for deranged default register values. |
| 82 | */ |
| 83 | ushort qib_mini_init; |
| 84 | module_param_named(mini_init, qib_mini_init, ushort, S_IRUGO); |
| 85 | MODULE_PARM_DESC(mini_init, "If set, do minimal diag init"); |
| 86 | |
| 87 | unsigned qib_n_krcv_queues; |
| 88 | module_param_named(krcvqs, qib_n_krcv_queues, uint, S_IRUGO); |
| 89 | MODULE_PARM_DESC(krcvqs, "number of kernel receive queues per IB port"); |
| 90 | |
Mike Marciniszyn | 36a8f01 | 2012-07-19 13:04:04 +0000 | [diff] [blame] | 91 | unsigned qib_cc_table_size; |
| 92 | module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO); |
| 93 | MODULE_PARM_DESC(cc_table_size, "Congestion control table entries 0 (CCA disabled - default), min = 128, max = 1984"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 94 | /* |
| 95 | * qib_wc_pat parameter: |
| 96 | * 0 is WC via MTRR |
| 97 | * 1 is WC via PAT |
| 98 | * If PAT initialization fails, code reverts back to MTRR |
| 99 | */ |
| 100 | unsigned qib_wc_pat = 1; /* default (1) is to use PAT, not MTRR */ |
| 101 | module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO); |
| 102 | MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism"); |
| 103 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 104 | static void verify_interrupt(unsigned long); |
| 105 | |
| 106 | static struct idr qib_unit_table; |
| 107 | u32 qib_cpulist_count; |
| 108 | unsigned long *qib_cpulist; |
| 109 | |
| 110 | /* set number of contexts we'll actually use */ |
| 111 | void qib_set_ctxtcnt(struct qib_devdata *dd) |
| 112 | { |
Mike Marciniszyn | 5dbbcb9 | 2011-01-10 17:42:20 -0800 | [diff] [blame] | 113 | if (!qib_cfgctxts) { |
Ralph Campbell | 0502f94 | 2010-07-21 22:46:11 +0000 | [diff] [blame] | 114 | dd->cfgctxts = dd->first_user_ctxt + num_online_cpus(); |
Mike Marciniszyn | 5dbbcb9 | 2011-01-10 17:42:20 -0800 | [diff] [blame] | 115 | if (dd->cfgctxts > dd->ctxtcnt) |
| 116 | dd->cfgctxts = dd->ctxtcnt; |
| 117 | } else if (qib_cfgctxts < dd->num_pports) |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 118 | dd->cfgctxts = dd->ctxtcnt; |
| 119 | else if (qib_cfgctxts <= dd->ctxtcnt) |
| 120 | dd->cfgctxts = qib_cfgctxts; |
| 121 | else |
| 122 | dd->cfgctxts = dd->ctxtcnt; |
Mitko Haralanov | 6ceaade | 2012-05-07 14:03:02 -0400 | [diff] [blame] | 123 | dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 : |
| 124 | dd->cfgctxts - dd->first_user_ctxt; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | /* |
| 128 | * Common code for creating the receive context array. |
| 129 | */ |
| 130 | int qib_create_ctxts(struct qib_devdata *dd) |
| 131 | { |
| 132 | unsigned i; |
| 133 | int ret; |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 134 | int local_node_id = pcibus_to_node(dd->pcidev->bus); |
| 135 | |
| 136 | if (local_node_id < 0) |
| 137 | local_node_id = numa_node_id(); |
| 138 | dd->assigned_node_id = local_node_id; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 139 | |
| 140 | /* |
| 141 | * Allocate full ctxtcnt array, rather than just cfgctxts, because |
| 142 | * cleanup iterates across all possible ctxts. |
| 143 | */ |
| 144 | dd->rcd = kzalloc(sizeof(*dd->rcd) * dd->ctxtcnt, GFP_KERNEL); |
| 145 | if (!dd->rcd) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 146 | qib_dev_err(dd, |
| 147 | "Unable to allocate ctxtdata array, failing\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 148 | ret = -ENOMEM; |
| 149 | goto done; |
| 150 | } |
| 151 | |
| 152 | /* create (one or more) kctxt */ |
| 153 | for (i = 0; i < dd->first_user_ctxt; ++i) { |
| 154 | struct qib_pportdata *ppd; |
| 155 | struct qib_ctxtdata *rcd; |
| 156 | |
| 157 | if (dd->skip_kctxt_mask & (1 << i)) |
| 158 | continue; |
| 159 | |
| 160 | ppd = dd->pport + (i % dd->num_pports); |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 161 | |
| 162 | rcd = qib_create_ctxtdata(ppd, i, dd->assigned_node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 163 | if (!rcd) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 164 | qib_dev_err(dd, |
| 165 | "Unable to allocate ctxtdata for Kernel ctxt, failing\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 166 | ret = -ENOMEM; |
| 167 | goto done; |
| 168 | } |
| 169 | rcd->pkeys[0] = QIB_DEFAULT_P_KEY; |
| 170 | rcd->seq_cnt = 1; |
| 171 | } |
| 172 | ret = 0; |
| 173 | done: |
| 174 | return ret; |
| 175 | } |
| 176 | |
| 177 | /* |
| 178 | * Common code for user and kernel context setup. |
| 179 | */ |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 180 | struct qib_ctxtdata *qib_create_ctxtdata(struct qib_pportdata *ppd, u32 ctxt, |
| 181 | int node_id) |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 182 | { |
| 183 | struct qib_devdata *dd = ppd->dd; |
| 184 | struct qib_ctxtdata *rcd; |
| 185 | |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 186 | rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 187 | if (rcd) { |
| 188 | INIT_LIST_HEAD(&rcd->qp_wait_list); |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 189 | rcd->node_id = node_id; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 190 | rcd->ppd = ppd; |
| 191 | rcd->dd = dd; |
| 192 | rcd->cnt = 1; |
| 193 | rcd->ctxt = ctxt; |
| 194 | dd->rcd[ctxt] = rcd; |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 195 | #ifdef CONFIG_DEBUG_FS |
| 196 | if (ctxt < dd->first_user_ctxt) { /* N/A for PSM contexts */ |
| 197 | rcd->opstats = kzalloc_node(sizeof(*rcd->opstats), |
| 198 | GFP_KERNEL, node_id); |
| 199 | if (!rcd->opstats) { |
| 200 | kfree(rcd); |
| 201 | qib_dev_err(dd, |
| 202 | "Unable to allocate per ctxt stats buffer\n"); |
| 203 | return NULL; |
| 204 | } |
| 205 | } |
| 206 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 207 | dd->f_init_ctxt(rcd); |
| 208 | |
| 209 | /* |
| 210 | * To avoid wasting a lot of memory, we allocate 32KB chunks |
| 211 | * of physically contiguous memory, advance through it until |
| 212 | * used up and then allocate more. Of course, we need |
| 213 | * memory to store those extra pointers, now. 32KB seems to |
| 214 | * be the most that is "safe" under memory pressure |
| 215 | * (creating large files and then copying them over |
| 216 | * NFS while doing lots of MPI jobs). The OOM killer can |
| 217 | * get invoked, even though we say we can sleep and this can |
| 218 | * cause significant system problems.... |
| 219 | */ |
| 220 | rcd->rcvegrbuf_size = 0x8000; |
| 221 | rcd->rcvegrbufs_perchunk = |
| 222 | rcd->rcvegrbuf_size / dd->rcvegrbufsize; |
| 223 | rcd->rcvegrbuf_chunks = (rcd->rcvegrcnt + |
| 224 | rcd->rcvegrbufs_perchunk - 1) / |
| 225 | rcd->rcvegrbufs_perchunk; |
Mike Marciniszyn | 9e1c0e4 | 2011-09-23 13:16:39 -0400 | [diff] [blame] | 226 | BUG_ON(!is_power_of_2(rcd->rcvegrbufs_perchunk)); |
| 227 | rcd->rcvegrbufs_perchunk_shift = |
| 228 | ilog2(rcd->rcvegrbufs_perchunk); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 229 | } |
| 230 | return rcd; |
| 231 | } |
| 232 | |
| 233 | /* |
| 234 | * Common code for initializing the physical port structure. |
| 235 | */ |
| 236 | void qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd, |
| 237 | u8 hw_pidx, u8 port) |
| 238 | { |
Mike Marciniszyn | 36a8f01 | 2012-07-19 13:04:04 +0000 | [diff] [blame] | 239 | int size; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 240 | ppd->dd = dd; |
| 241 | ppd->hw_pidx = hw_pidx; |
| 242 | ppd->port = port; /* IB port number, not index */ |
| 243 | |
| 244 | spin_lock_init(&ppd->sdma_lock); |
| 245 | spin_lock_init(&ppd->lflags_lock); |
| 246 | init_waitqueue_head(&ppd->state_wait); |
| 247 | |
| 248 | init_timer(&ppd->symerr_clear_timer); |
| 249 | ppd->symerr_clear_timer.function = qib_clear_symerror_on_linkup; |
| 250 | ppd->symerr_clear_timer.data = (unsigned long)ppd; |
Mike Marciniszyn | 551ace1 | 2012-07-19 13:03:56 +0000 | [diff] [blame] | 251 | |
| 252 | ppd->qib_wq = NULL; |
Mike Marciniszyn | 36a8f01 | 2012-07-19 13:04:04 +0000 | [diff] [blame] | 253 | |
| 254 | spin_lock_init(&ppd->cc_shadow_lock); |
| 255 | |
| 256 | if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) |
| 257 | goto bail; |
| 258 | |
| 259 | ppd->cc_supported_table_entries = min(max_t(int, qib_cc_table_size, |
| 260 | IB_CCT_MIN_ENTRIES), IB_CCT_ENTRIES*IB_CC_TABLE_CAP_DEFAULT); |
| 261 | |
| 262 | ppd->cc_max_table_entries = |
| 263 | ppd->cc_supported_table_entries/IB_CCT_ENTRIES; |
| 264 | |
| 265 | size = IB_CC_TABLE_CAP_DEFAULT * sizeof(struct ib_cc_table_entry) |
| 266 | * IB_CCT_ENTRIES; |
| 267 | ppd->ccti_entries = kzalloc(size, GFP_KERNEL); |
| 268 | if (!ppd->ccti_entries) { |
| 269 | qib_dev_err(dd, |
| 270 | "failed to allocate congestion control table for port %d!\n", |
| 271 | port); |
| 272 | goto bail; |
| 273 | } |
| 274 | |
| 275 | size = IB_CC_CCS_ENTRIES * sizeof(struct ib_cc_congestion_entry); |
| 276 | ppd->congestion_entries = kzalloc(size, GFP_KERNEL); |
| 277 | if (!ppd->congestion_entries) { |
| 278 | qib_dev_err(dd, |
| 279 | "failed to allocate congestion setting list for port %d!\n", |
| 280 | port); |
| 281 | goto bail_1; |
| 282 | } |
| 283 | |
| 284 | size = sizeof(struct cc_table_shadow); |
| 285 | ppd->ccti_entries_shadow = kzalloc(size, GFP_KERNEL); |
| 286 | if (!ppd->ccti_entries_shadow) { |
| 287 | qib_dev_err(dd, |
| 288 | "failed to allocate shadow ccti list for port %d!\n", |
| 289 | port); |
| 290 | goto bail_2; |
| 291 | } |
| 292 | |
| 293 | size = sizeof(struct ib_cc_congestion_setting_attr); |
| 294 | ppd->congestion_entries_shadow = kzalloc(size, GFP_KERNEL); |
| 295 | if (!ppd->congestion_entries_shadow) { |
| 296 | qib_dev_err(dd, |
| 297 | "failed to allocate shadow congestion setting list for port %d!\n", |
| 298 | port); |
| 299 | goto bail_3; |
| 300 | } |
| 301 | |
| 302 | return; |
| 303 | |
| 304 | bail_3: |
| 305 | kfree(ppd->ccti_entries_shadow); |
| 306 | ppd->ccti_entries_shadow = NULL; |
| 307 | bail_2: |
| 308 | kfree(ppd->congestion_entries); |
| 309 | ppd->congestion_entries = NULL; |
| 310 | bail_1: |
| 311 | kfree(ppd->ccti_entries); |
| 312 | ppd->ccti_entries = NULL; |
| 313 | bail: |
| 314 | /* User is intentionally disabling the congestion control agent */ |
| 315 | if (!qib_cc_table_size) |
| 316 | return; |
| 317 | |
| 318 | if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) { |
| 319 | qib_cc_table_size = 0; |
| 320 | qib_dev_err(dd, |
| 321 | "Congestion Control table size %d less than minimum %d for port %d\n", |
| 322 | qib_cc_table_size, IB_CCT_MIN_ENTRIES, port); |
| 323 | } |
| 324 | |
| 325 | qib_dev_err(dd, "Congestion Control Agent disabled for port %d\n", |
| 326 | port); |
| 327 | return; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 328 | } |
| 329 | |
| 330 | static int init_pioavailregs(struct qib_devdata *dd) |
| 331 | { |
| 332 | int ret, pidx; |
| 333 | u64 *status_page; |
| 334 | |
| 335 | dd->pioavailregs_dma = dma_alloc_coherent( |
| 336 | &dd->pcidev->dev, PAGE_SIZE, &dd->pioavailregs_phys, |
| 337 | GFP_KERNEL); |
| 338 | if (!dd->pioavailregs_dma) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 339 | qib_dev_err(dd, |
| 340 | "failed to allocate PIOavail reg area in memory\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 341 | ret = -ENOMEM; |
| 342 | goto done; |
| 343 | } |
| 344 | |
| 345 | /* |
| 346 | * We really want L2 cache aligned, but for current CPUs of |
| 347 | * interest, they are the same. |
| 348 | */ |
| 349 | status_page = (u64 *) |
| 350 | ((char *) dd->pioavailregs_dma + |
| 351 | ((2 * L1_CACHE_BYTES + |
| 352 | dd->pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES)); |
| 353 | /* device status comes first, for backwards compatibility */ |
| 354 | dd->devstatusp = status_page; |
| 355 | *status_page++ = 0; |
| 356 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 357 | dd->pport[pidx].statusp = status_page; |
| 358 | *status_page++ = 0; |
| 359 | } |
| 360 | |
| 361 | /* |
| 362 | * Setup buffer to hold freeze and other messages, accessible to |
| 363 | * apps, following statusp. This is per-unit, not per port. |
| 364 | */ |
| 365 | dd->freezemsg = (char *) status_page; |
| 366 | *dd->freezemsg = 0; |
| 367 | /* length of msg buffer is "whatever is left" */ |
| 368 | ret = (char *) status_page - (char *) dd->pioavailregs_dma; |
| 369 | dd->freezelen = PAGE_SIZE - ret; |
| 370 | |
| 371 | ret = 0; |
| 372 | |
| 373 | done: |
| 374 | return ret; |
| 375 | } |
| 376 | |
| 377 | /** |
| 378 | * init_shadow_tids - allocate the shadow TID array |
| 379 | * @dd: the qlogic_ib device |
| 380 | * |
| 381 | * allocate the shadow TID array, so we can qib_munlock previous |
| 382 | * entries. It may make more sense to move the pageshadow to the |
| 383 | * ctxt data structure, so we only allocate memory for ctxts actually |
| 384 | * in use, since we at 8k per ctxt, now. |
| 385 | * We don't want failures here to prevent use of the driver/chip, |
| 386 | * so no return value. |
| 387 | */ |
| 388 | static void init_shadow_tids(struct qib_devdata *dd) |
| 389 | { |
| 390 | struct page **pages; |
| 391 | dma_addr_t *addrs; |
| 392 | |
Joe Perches | 948579c | 2010-11-05 03:07:36 +0000 | [diff] [blame] | 393 | pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 394 | if (!pages) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 395 | qib_dev_err(dd, |
| 396 | "failed to allocate shadow page * array, no expected sends!\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 397 | goto bail; |
| 398 | } |
| 399 | |
Joe Perches | 948579c | 2010-11-05 03:07:36 +0000 | [diff] [blame] | 400 | addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 401 | if (!addrs) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 402 | qib_dev_err(dd, |
| 403 | "failed to allocate shadow dma handle array, no expected sends!\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 404 | goto bail_free; |
| 405 | } |
| 406 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 407 | dd->pageshadow = pages; |
| 408 | dd->physshadow = addrs; |
| 409 | return; |
| 410 | |
| 411 | bail_free: |
| 412 | vfree(pages); |
| 413 | bail: |
| 414 | dd->pageshadow = NULL; |
| 415 | } |
| 416 | |
| 417 | /* |
| 418 | * Do initialization for device that is only needed on |
| 419 | * first detect, not on resets. |
| 420 | */ |
| 421 | static int loadtime_init(struct qib_devdata *dd) |
| 422 | { |
| 423 | int ret = 0; |
| 424 | |
| 425 | if (((dd->revision >> QLOGIC_IB_R_SOFTWARE_SHIFT) & |
| 426 | QLOGIC_IB_R_SOFTWARE_MASK) != QIB_CHIP_SWVERSION) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 427 | qib_dev_err(dd, |
| 428 | "Driver only handles version %d, chip swversion is %d (%llx), failng\n", |
| 429 | QIB_CHIP_SWVERSION, |
| 430 | (int)(dd->revision >> |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 431 | QLOGIC_IB_R_SOFTWARE_SHIFT) & |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 432 | QLOGIC_IB_R_SOFTWARE_MASK, |
| 433 | (unsigned long long) dd->revision); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 434 | ret = -ENOSYS; |
| 435 | goto done; |
| 436 | } |
| 437 | |
| 438 | if (dd->revision & QLOGIC_IB_R_EMULATOR_MASK) |
| 439 | qib_devinfo(dd->pcidev, "%s", dd->boardversion); |
| 440 | |
| 441 | spin_lock_init(&dd->pioavail_lock); |
| 442 | spin_lock_init(&dd->sendctrl_lock); |
| 443 | spin_lock_init(&dd->uctxt_lock); |
| 444 | spin_lock_init(&dd->qib_diag_trans_lock); |
| 445 | spin_lock_init(&dd->eep_st_lock); |
| 446 | mutex_init(&dd->eep_lock); |
| 447 | |
| 448 | if (qib_mini_init) |
| 449 | goto done; |
| 450 | |
| 451 | ret = init_pioavailregs(dd); |
| 452 | init_shadow_tids(dd); |
| 453 | |
| 454 | qib_get_eeprom_info(dd); |
| 455 | |
| 456 | /* setup time (don't start yet) to verify we got interrupt */ |
| 457 | init_timer(&dd->intrchk_timer); |
| 458 | dd->intrchk_timer.function = verify_interrupt; |
| 459 | dd->intrchk_timer.data = (unsigned long) dd; |
| 460 | |
Mike Marciniszyn | 85caafe | 2013-06-04 15:05:37 -0400 | [diff] [blame] | 461 | ret = qib_cq_init(dd); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 462 | done: |
| 463 | return ret; |
| 464 | } |
| 465 | |
| 466 | /** |
| 467 | * init_after_reset - re-initialize after a reset |
| 468 | * @dd: the qlogic_ib device |
| 469 | * |
| 470 | * sanity check at least some of the values after reset, and |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 471 | * ensure no receive or transmit (explicitly, in case reset |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 472 | * failed |
| 473 | */ |
| 474 | static int init_after_reset(struct qib_devdata *dd) |
| 475 | { |
| 476 | int i; |
| 477 | |
| 478 | /* |
| 479 | * Ensure chip does no sends or receives, tail updates, or |
| 480 | * pioavail updates while we re-initialize. This is mostly |
| 481 | * for the driver data structures, not chip registers. |
| 482 | */ |
| 483 | for (i = 0; i < dd->num_pports; ++i) { |
| 484 | /* |
| 485 | * ctxt == -1 means "all contexts". Only really safe for |
| 486 | * _dis_abling things, as here. |
| 487 | */ |
| 488 | dd->f_rcvctrl(dd->pport + i, QIB_RCVCTRL_CTXT_DIS | |
| 489 | QIB_RCVCTRL_INTRAVAIL_DIS | |
| 490 | QIB_RCVCTRL_TAILUPD_DIS, -1); |
| 491 | /* Redundant across ports for some, but no big deal. */ |
| 492 | dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_DIS | |
| 493 | QIB_SENDCTRL_AVAIL_DIS); |
| 494 | } |
| 495 | |
| 496 | return 0; |
| 497 | } |
| 498 | |
| 499 | static void enable_chip(struct qib_devdata *dd) |
| 500 | { |
| 501 | u64 rcvmask; |
| 502 | int i; |
| 503 | |
| 504 | /* |
| 505 | * Enable PIO send, and update of PIOavail regs to memory. |
| 506 | */ |
| 507 | for (i = 0; i < dd->num_pports; ++i) |
| 508 | dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_ENB | |
| 509 | QIB_SENDCTRL_AVAIL_ENB); |
| 510 | /* |
| 511 | * Enable kernel ctxts' receive and receive interrupt. |
| 512 | * Other ctxts done as user opens and inits them. |
| 513 | */ |
| 514 | rcvmask = QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_INTRAVAIL_ENB; |
| 515 | rcvmask |= (dd->flags & QIB_NODMA_RTAIL) ? |
| 516 | QIB_RCVCTRL_TAILUPD_DIS : QIB_RCVCTRL_TAILUPD_ENB; |
| 517 | for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) { |
| 518 | struct qib_ctxtdata *rcd = dd->rcd[i]; |
| 519 | |
| 520 | if (rcd) |
| 521 | dd->f_rcvctrl(rcd->ppd, rcvmask, i); |
| 522 | } |
| 523 | } |
| 524 | |
| 525 | static void verify_interrupt(unsigned long opaque) |
| 526 | { |
| 527 | struct qib_devdata *dd = (struct qib_devdata *) opaque; |
Mike Marciniszyn | 1ed88dd | 2014-03-07 08:40:49 -0500 | [diff] [blame^] | 528 | u64 int_counter; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 529 | |
| 530 | if (!dd) |
| 531 | return; /* being torn down */ |
| 532 | |
| 533 | /* |
| 534 | * If we don't have a lid or any interrupts, let the user know and |
| 535 | * don't bother checking again. |
| 536 | */ |
Mike Marciniszyn | 1ed88dd | 2014-03-07 08:40:49 -0500 | [diff] [blame^] | 537 | int_counter = qib_int_counter(dd) - dd->z_int_counter; |
| 538 | if (int_counter == 0) { |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 539 | if (!dd->f_intr_fallback(dd)) |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 540 | dev_err(&dd->pcidev->dev, |
| 541 | "No interrupts detected, not usable.\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 542 | else /* re-arm the timer to see if fallback works */ |
| 543 | mod_timer(&dd->intrchk_timer, jiffies + HZ/2); |
| 544 | } |
| 545 | } |
| 546 | |
| 547 | static void init_piobuf_state(struct qib_devdata *dd) |
| 548 | { |
| 549 | int i, pidx; |
| 550 | u32 uctxts; |
| 551 | |
| 552 | /* |
| 553 | * Ensure all buffers are free, and fifos empty. Buffers |
| 554 | * are common, so only do once for port 0. |
| 555 | * |
| 556 | * After enable and qib_chg_pioavailkernel so we can safely |
| 557 | * enable pioavail updates and PIOENABLE. After this, packets |
| 558 | * are ready and able to go out. |
| 559 | */ |
| 560 | dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_ALL); |
| 561 | for (pidx = 0; pidx < dd->num_pports; ++pidx) |
| 562 | dd->f_sendctrl(dd->pport + pidx, QIB_SENDCTRL_FLUSH); |
| 563 | |
| 564 | /* |
| 565 | * If not all sendbufs are used, add the one to each of the lower |
| 566 | * numbered contexts. pbufsctxt and lastctxt_piobuf are |
| 567 | * calculated in chip-specific code because it may cause some |
| 568 | * chip-specific adjustments to be made. |
| 569 | */ |
| 570 | uctxts = dd->cfgctxts - dd->first_user_ctxt; |
| 571 | dd->ctxts_extrabuf = dd->pbufsctxt ? |
| 572 | dd->lastctxt_piobuf - (dd->pbufsctxt * uctxts) : 0; |
| 573 | |
| 574 | /* |
| 575 | * Set up the shadow copies of the piobufavail registers, |
| 576 | * which we compare against the chip registers for now, and |
| 577 | * the in memory DMA'ed copies of the registers. |
| 578 | * By now pioavail updates to memory should have occurred, so |
| 579 | * copy them into our working/shadow registers; this is in |
| 580 | * case something went wrong with abort, but mostly to get the |
| 581 | * initial values of the generation bit correct. |
| 582 | */ |
| 583 | for (i = 0; i < dd->pioavregs; i++) { |
| 584 | __le64 tmp; |
| 585 | |
| 586 | tmp = dd->pioavailregs_dma[i]; |
| 587 | /* |
| 588 | * Don't need to worry about pioavailkernel here |
| 589 | * because we will call qib_chg_pioavailkernel() later |
| 590 | * in initialization, to busy out buffers as needed. |
| 591 | */ |
| 592 | dd->pioavailshadow[i] = le64_to_cpu(tmp); |
| 593 | } |
| 594 | while (i < ARRAY_SIZE(dd->pioavailshadow)) |
| 595 | dd->pioavailshadow[i++] = 0; /* for debugging sanity */ |
| 596 | |
| 597 | /* after pioavailshadow is setup */ |
| 598 | qib_chg_pioavailkernel(dd, 0, dd->piobcnt2k + dd->piobcnt4k, |
| 599 | TXCHK_CHG_TYPE_KERN, NULL); |
| 600 | dd->f_initvl15_bufs(dd); |
| 601 | } |
| 602 | |
| 603 | /** |
Mike Marciniszyn | 551ace1 | 2012-07-19 13:03:56 +0000 | [diff] [blame] | 604 | * qib_create_workqueues - create per port workqueues |
| 605 | * @dd: the qlogic_ib device |
| 606 | */ |
| 607 | static int qib_create_workqueues(struct qib_devdata *dd) |
| 608 | { |
| 609 | int pidx; |
| 610 | struct qib_pportdata *ppd; |
| 611 | |
| 612 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 613 | ppd = dd->pport + pidx; |
| 614 | if (!ppd->qib_wq) { |
| 615 | char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */ |
| 616 | snprintf(wq_name, sizeof(wq_name), "qib%d_%d", |
| 617 | dd->unit, pidx); |
| 618 | ppd->qib_wq = |
| 619 | create_singlethread_workqueue(wq_name); |
| 620 | if (!ppd->qib_wq) |
| 621 | goto wq_error; |
| 622 | } |
| 623 | } |
| 624 | return 0; |
| 625 | wq_error: |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 626 | pr_err("create_singlethread_workqueue failed for port %d\n", |
| 627 | pidx + 1); |
Mike Marciniszyn | 551ace1 | 2012-07-19 13:03:56 +0000 | [diff] [blame] | 628 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 629 | ppd = dd->pport + pidx; |
| 630 | if (ppd->qib_wq) { |
| 631 | destroy_workqueue(ppd->qib_wq); |
| 632 | ppd->qib_wq = NULL; |
| 633 | } |
| 634 | } |
| 635 | return -ENOMEM; |
| 636 | } |
| 637 | |
| 638 | /** |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 639 | * qib_init - do the actual initialization sequence on the chip |
| 640 | * @dd: the qlogic_ib device |
| 641 | * @reinit: reinitializing, so don't allocate new memory |
| 642 | * |
| 643 | * Do the actual initialization sequence on the chip. This is done |
| 644 | * both from the init routine called from the PCI infrastructure, and |
| 645 | * when we reset the chip, or detect that it was reset internally, |
| 646 | * or it's administratively re-enabled. |
| 647 | * |
| 648 | * Memory allocation here and in called routines is only done in |
| 649 | * the first case (reinit == 0). We have to be careful, because even |
| 650 | * without memory allocation, we need to re-write all the chip registers |
| 651 | * TIDs, etc. after the reset or enable has completed. |
| 652 | */ |
| 653 | int qib_init(struct qib_devdata *dd, int reinit) |
| 654 | { |
| 655 | int ret = 0, pidx, lastfail = 0; |
| 656 | u32 portok = 0; |
| 657 | unsigned i; |
| 658 | struct qib_ctxtdata *rcd; |
| 659 | struct qib_pportdata *ppd; |
| 660 | unsigned long flags; |
| 661 | |
| 662 | /* Set linkstate to unknown, so we can watch for a transition. */ |
| 663 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 664 | ppd = dd->pport + pidx; |
| 665 | spin_lock_irqsave(&ppd->lflags_lock, flags); |
| 666 | ppd->lflags &= ~(QIBL_LINKACTIVE | QIBL_LINKARMED | |
| 667 | QIBL_LINKDOWN | QIBL_LINKINIT | |
| 668 | QIBL_LINKV); |
| 669 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
| 670 | } |
| 671 | |
| 672 | if (reinit) |
| 673 | ret = init_after_reset(dd); |
| 674 | else |
| 675 | ret = loadtime_init(dd); |
| 676 | if (ret) |
| 677 | goto done; |
| 678 | |
| 679 | /* Bypass most chip-init, to get to device creation */ |
| 680 | if (qib_mini_init) |
| 681 | return 0; |
| 682 | |
| 683 | ret = dd->f_late_initreg(dd); |
| 684 | if (ret) |
| 685 | goto done; |
| 686 | |
| 687 | /* dd->rcd can be NULL if early init failed */ |
| 688 | for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) { |
| 689 | /* |
| 690 | * Set up the (kernel) rcvhdr queue and egr TIDs. If doing |
| 691 | * re-init, the simplest way to handle this is to free |
| 692 | * existing, and re-allocate. |
| 693 | * Need to re-create rest of ctxt 0 ctxtdata as well. |
| 694 | */ |
| 695 | rcd = dd->rcd[i]; |
| 696 | if (!rcd) |
| 697 | continue; |
| 698 | |
| 699 | lastfail = qib_create_rcvhdrq(dd, rcd); |
| 700 | if (!lastfail) |
| 701 | lastfail = qib_setup_eagerbufs(rcd); |
| 702 | if (lastfail) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 703 | qib_dev_err(dd, |
| 704 | "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 705 | continue; |
| 706 | } |
| 707 | } |
| 708 | |
| 709 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 710 | int mtu; |
| 711 | if (lastfail) |
| 712 | ret = lastfail; |
| 713 | ppd = dd->pport + pidx; |
| 714 | mtu = ib_mtu_enum_to_int(qib_ibmtu); |
| 715 | if (mtu == -1) { |
| 716 | mtu = QIB_DEFAULT_MTU; |
| 717 | qib_ibmtu = 0; /* don't leave invalid value */ |
| 718 | } |
| 719 | /* set max we can ever have for this driver load */ |
| 720 | ppd->init_ibmaxlen = min(mtu > 2048 ? |
| 721 | dd->piosize4k : dd->piosize2k, |
| 722 | dd->rcvegrbufsize + |
| 723 | (dd->rcvhdrentsize << 2)); |
| 724 | /* |
| 725 | * Have to initialize ibmaxlen, but this will normally |
| 726 | * change immediately in qib_set_mtu(). |
| 727 | */ |
| 728 | ppd->ibmaxlen = ppd->init_ibmaxlen; |
| 729 | qib_set_mtu(ppd, mtu); |
| 730 | |
| 731 | spin_lock_irqsave(&ppd->lflags_lock, flags); |
| 732 | ppd->lflags |= QIBL_IB_LINK_DISABLED; |
| 733 | spin_unlock_irqrestore(&ppd->lflags_lock, flags); |
| 734 | |
| 735 | lastfail = dd->f_bringup_serdes(ppd); |
| 736 | if (lastfail) { |
| 737 | qib_devinfo(dd->pcidev, |
| 738 | "Failed to bringup IB port %u\n", ppd->port); |
| 739 | lastfail = -ENETDOWN; |
| 740 | continue; |
| 741 | } |
| 742 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 743 | portok++; |
| 744 | } |
| 745 | |
| 746 | if (!portok) { |
| 747 | /* none of the ports initialized */ |
| 748 | if (!ret && lastfail) |
| 749 | ret = lastfail; |
| 750 | else if (!ret) |
| 751 | ret = -ENETDOWN; |
| 752 | /* but continue on, so we can debug cause */ |
| 753 | } |
| 754 | |
| 755 | enable_chip(dd); |
| 756 | |
| 757 | init_piobuf_state(dd); |
| 758 | |
| 759 | done: |
| 760 | if (!ret) { |
| 761 | /* chip is OK for user apps; mark it as initialized */ |
| 762 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 763 | ppd = dd->pport + pidx; |
| 764 | /* |
| 765 | * Set status even if port serdes is not initialized |
| 766 | * so that diags will work. |
| 767 | */ |
| 768 | *ppd->statusp |= QIB_STATUS_CHIP_PRESENT | |
| 769 | QIB_STATUS_INITTED; |
| 770 | if (!ppd->link_speed_enabled) |
| 771 | continue; |
| 772 | if (dd->flags & QIB_HAS_SEND_DMA) |
| 773 | ret = qib_setup_sdma(ppd); |
| 774 | init_timer(&ppd->hol_timer); |
| 775 | ppd->hol_timer.function = qib_hol_event; |
| 776 | ppd->hol_timer.data = (unsigned long)ppd; |
| 777 | ppd->hol_state = QIB_HOL_UP; |
| 778 | } |
| 779 | |
| 780 | /* now we can enable all interrupts from the chip */ |
| 781 | dd->f_set_intr_state(dd, 1); |
| 782 | |
| 783 | /* |
| 784 | * Setup to verify we get an interrupt, and fallback |
| 785 | * to an alternate if necessary and possible. |
| 786 | */ |
| 787 | mod_timer(&dd->intrchk_timer, jiffies + HZ/2); |
| 788 | /* start stats retrieval timer */ |
| 789 | mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER); |
| 790 | } |
| 791 | |
| 792 | /* if ret is non-zero, we probably should do some cleanup here... */ |
| 793 | return ret; |
| 794 | } |
| 795 | |
| 796 | /* |
| 797 | * These next two routines are placeholders in case we don't have per-arch |
| 798 | * code for controlling write combining. If explicit control of write |
| 799 | * combining is not available, performance will probably be awful. |
| 800 | */ |
| 801 | |
| 802 | int __attribute__((weak)) qib_enable_wc(struct qib_devdata *dd) |
| 803 | { |
| 804 | return -EOPNOTSUPP; |
| 805 | } |
| 806 | |
| 807 | void __attribute__((weak)) qib_disable_wc(struct qib_devdata *dd) |
| 808 | { |
| 809 | } |
| 810 | |
| 811 | static inline struct qib_devdata *__qib_lookup(int unit) |
| 812 | { |
| 813 | return idr_find(&qib_unit_table, unit); |
| 814 | } |
| 815 | |
| 816 | struct qib_devdata *qib_lookup(int unit) |
| 817 | { |
| 818 | struct qib_devdata *dd; |
| 819 | unsigned long flags; |
| 820 | |
| 821 | spin_lock_irqsave(&qib_devs_lock, flags); |
| 822 | dd = __qib_lookup(unit); |
| 823 | spin_unlock_irqrestore(&qib_devs_lock, flags); |
| 824 | |
| 825 | return dd; |
| 826 | } |
| 827 | |
| 828 | /* |
| 829 | * Stop the timers during unit shutdown, or after an error late |
| 830 | * in initialization. |
| 831 | */ |
| 832 | static void qib_stop_timers(struct qib_devdata *dd) |
| 833 | { |
| 834 | struct qib_pportdata *ppd; |
| 835 | int pidx; |
| 836 | |
| 837 | if (dd->stats_timer.data) { |
| 838 | del_timer_sync(&dd->stats_timer); |
| 839 | dd->stats_timer.data = 0; |
| 840 | } |
| 841 | if (dd->intrchk_timer.data) { |
| 842 | del_timer_sync(&dd->intrchk_timer); |
| 843 | dd->intrchk_timer.data = 0; |
| 844 | } |
| 845 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 846 | ppd = dd->pport + pidx; |
| 847 | if (ppd->hol_timer.data) |
| 848 | del_timer_sync(&ppd->hol_timer); |
| 849 | if (ppd->led_override_timer.data) { |
| 850 | del_timer_sync(&ppd->led_override_timer); |
| 851 | atomic_set(&ppd->led_override_timer_active, 0); |
| 852 | } |
| 853 | if (ppd->symerr_clear_timer.data) |
| 854 | del_timer_sync(&ppd->symerr_clear_timer); |
| 855 | } |
| 856 | } |
| 857 | |
| 858 | /** |
| 859 | * qib_shutdown_device - shut down a device |
| 860 | * @dd: the qlogic_ib device |
| 861 | * |
| 862 | * This is called to make the device quiet when we are about to |
| 863 | * unload the driver, and also when the device is administratively |
| 864 | * disabled. It does not free any data structures. |
| 865 | * Everything it does has to be setup again by qib_init(dd, 1) |
| 866 | */ |
| 867 | static void qib_shutdown_device(struct qib_devdata *dd) |
| 868 | { |
| 869 | struct qib_pportdata *ppd; |
| 870 | unsigned pidx; |
| 871 | |
| 872 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 873 | ppd = dd->pport + pidx; |
| 874 | |
| 875 | spin_lock_irq(&ppd->lflags_lock); |
| 876 | ppd->lflags &= ~(QIBL_LINKDOWN | QIBL_LINKINIT | |
| 877 | QIBL_LINKARMED | QIBL_LINKACTIVE | |
| 878 | QIBL_LINKV); |
| 879 | spin_unlock_irq(&ppd->lflags_lock); |
| 880 | *ppd->statusp &= ~(QIB_STATUS_IB_CONF | QIB_STATUS_IB_READY); |
| 881 | } |
| 882 | dd->flags &= ~QIB_INITTED; |
| 883 | |
| 884 | /* mask interrupts, but not errors */ |
| 885 | dd->f_set_intr_state(dd, 0); |
| 886 | |
| 887 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 888 | ppd = dd->pport + pidx; |
| 889 | dd->f_rcvctrl(ppd, QIB_RCVCTRL_TAILUPD_DIS | |
| 890 | QIB_RCVCTRL_CTXT_DIS | |
| 891 | QIB_RCVCTRL_INTRAVAIL_DIS | |
| 892 | QIB_RCVCTRL_PKEY_ENB, -1); |
| 893 | /* |
| 894 | * Gracefully stop all sends allowing any in progress to |
| 895 | * trickle out first. |
| 896 | */ |
| 897 | dd->f_sendctrl(ppd, QIB_SENDCTRL_CLEAR); |
| 898 | } |
| 899 | |
| 900 | /* |
| 901 | * Enough for anything that's going to trickle out to have actually |
| 902 | * done so. |
| 903 | */ |
| 904 | udelay(20); |
| 905 | |
| 906 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 907 | ppd = dd->pport + pidx; |
| 908 | dd->f_setextled(ppd, 0); /* make sure LEDs are off */ |
| 909 | |
| 910 | if (dd->flags & QIB_HAS_SEND_DMA) |
| 911 | qib_teardown_sdma(ppd); |
| 912 | |
| 913 | dd->f_sendctrl(ppd, QIB_SENDCTRL_AVAIL_DIS | |
| 914 | QIB_SENDCTRL_SEND_DIS); |
| 915 | /* |
| 916 | * Clear SerdesEnable. |
| 917 | * We can't count on interrupts since we are stopping. |
| 918 | */ |
| 919 | dd->f_quiet_serdes(ppd); |
Mike Marciniszyn | 551ace1 | 2012-07-19 13:03:56 +0000 | [diff] [blame] | 920 | |
| 921 | if (ppd->qib_wq) { |
| 922 | destroy_workqueue(ppd->qib_wq); |
| 923 | ppd->qib_wq = NULL; |
| 924 | } |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 925 | } |
| 926 | |
| 927 | qib_update_eeprom_log(dd); |
| 928 | } |
| 929 | |
| 930 | /** |
| 931 | * qib_free_ctxtdata - free a context's allocated data |
| 932 | * @dd: the qlogic_ib device |
| 933 | * @rcd: the ctxtdata structure |
| 934 | * |
| 935 | * free up any allocated data for a context |
| 936 | * This should not touch anything that would affect a simultaneous |
| 937 | * re-allocation of context data, because it is called after qib_mutex |
| 938 | * is released (and can be called from reinit as well). |
| 939 | * It should never change any chip state, or global driver state. |
| 940 | */ |
| 941 | void qib_free_ctxtdata(struct qib_devdata *dd, struct qib_ctxtdata *rcd) |
| 942 | { |
| 943 | if (!rcd) |
| 944 | return; |
| 945 | |
| 946 | if (rcd->rcvhdrq) { |
| 947 | dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size, |
| 948 | rcd->rcvhdrq, rcd->rcvhdrq_phys); |
| 949 | rcd->rcvhdrq = NULL; |
| 950 | if (rcd->rcvhdrtail_kvaddr) { |
| 951 | dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE, |
| 952 | rcd->rcvhdrtail_kvaddr, |
| 953 | rcd->rcvhdrqtailaddr_phys); |
| 954 | rcd->rcvhdrtail_kvaddr = NULL; |
| 955 | } |
| 956 | } |
| 957 | if (rcd->rcvegrbuf) { |
| 958 | unsigned e; |
| 959 | |
| 960 | for (e = 0; e < rcd->rcvegrbuf_chunks; e++) { |
| 961 | void *base = rcd->rcvegrbuf[e]; |
| 962 | size_t size = rcd->rcvegrbuf_size; |
| 963 | |
| 964 | dma_free_coherent(&dd->pcidev->dev, size, |
| 965 | base, rcd->rcvegrbuf_phys[e]); |
| 966 | } |
| 967 | kfree(rcd->rcvegrbuf); |
| 968 | rcd->rcvegrbuf = NULL; |
| 969 | kfree(rcd->rcvegrbuf_phys); |
| 970 | rcd->rcvegrbuf_phys = NULL; |
| 971 | rcd->rcvegrbuf_chunks = 0; |
| 972 | } |
| 973 | |
| 974 | kfree(rcd->tid_pg_list); |
| 975 | vfree(rcd->user_event_mask); |
| 976 | vfree(rcd->subctxt_uregbase); |
| 977 | vfree(rcd->subctxt_rcvegrbuf); |
| 978 | vfree(rcd->subctxt_rcvhdr_base); |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 979 | #ifdef CONFIG_DEBUG_FS |
| 980 | kfree(rcd->opstats); |
| 981 | rcd->opstats = NULL; |
| 982 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 983 | kfree(rcd); |
| 984 | } |
| 985 | |
| 986 | /* |
| 987 | * Perform a PIO buffer bandwidth write test, to verify proper system |
| 988 | * configuration. Even when all the setup calls work, occasionally |
| 989 | * BIOS or other issues can prevent write combining from working, or |
| 990 | * can cause other bandwidth problems to the chip. |
| 991 | * |
| 992 | * This test simply writes the same buffer over and over again, and |
| 993 | * measures close to the peak bandwidth to the chip (not testing |
| 994 | * data bandwidth to the wire). On chips that use an address-based |
| 995 | * trigger to send packets to the wire, this is easy. On chips that |
| 996 | * use a count to trigger, we want to make sure that the packet doesn't |
| 997 | * go out on the wire, or trigger flow control checks. |
| 998 | */ |
| 999 | static void qib_verify_pioperf(struct qib_devdata *dd) |
| 1000 | { |
| 1001 | u32 pbnum, cnt, lcnt; |
| 1002 | u32 __iomem *piobuf; |
| 1003 | u32 *addr; |
| 1004 | u64 msecs, emsecs; |
| 1005 | |
| 1006 | piobuf = dd->f_getsendbuf(dd->pport, 0ULL, &pbnum); |
| 1007 | if (!piobuf) { |
| 1008 | qib_devinfo(dd->pcidev, |
| 1009 | "No PIObufs for checking perf, skipping\n"); |
| 1010 | return; |
| 1011 | } |
| 1012 | |
| 1013 | /* |
| 1014 | * Enough to give us a reasonable test, less than piobuf size, and |
| 1015 | * likely multiple of store buffer length. |
| 1016 | */ |
| 1017 | cnt = 1024; |
| 1018 | |
| 1019 | addr = vmalloc(cnt); |
| 1020 | if (!addr) { |
| 1021 | qib_devinfo(dd->pcidev, |
| 1022 | "Couldn't get memory for checking PIO perf," |
| 1023 | " skipping\n"); |
| 1024 | goto done; |
| 1025 | } |
| 1026 | |
| 1027 | preempt_disable(); /* we want reasonably accurate elapsed time */ |
| 1028 | msecs = 1 + jiffies_to_msecs(jiffies); |
| 1029 | for (lcnt = 0; lcnt < 10000U; lcnt++) { |
| 1030 | /* wait until we cross msec boundary */ |
| 1031 | if (jiffies_to_msecs(jiffies) >= msecs) |
| 1032 | break; |
| 1033 | udelay(1); |
| 1034 | } |
| 1035 | |
| 1036 | dd->f_set_armlaunch(dd, 0); |
| 1037 | |
| 1038 | /* |
| 1039 | * length 0, no dwords actually sent |
| 1040 | */ |
| 1041 | writeq(0, piobuf); |
| 1042 | qib_flush_wc(); |
| 1043 | |
| 1044 | /* |
| 1045 | * This is only roughly accurate, since even with preempt we |
| 1046 | * still take interrupts that could take a while. Running for |
| 1047 | * >= 5 msec seems to get us "close enough" to accurate values. |
| 1048 | */ |
| 1049 | msecs = jiffies_to_msecs(jiffies); |
| 1050 | for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) { |
| 1051 | qib_pio_copy(piobuf + 64, addr, cnt >> 2); |
| 1052 | emsecs = jiffies_to_msecs(jiffies) - msecs; |
| 1053 | } |
| 1054 | |
| 1055 | /* 1 GiB/sec, slightly over IB SDR line rate */ |
| 1056 | if (lcnt < (emsecs * 1024U)) |
| 1057 | qib_dev_err(dd, |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1058 | "Performance problem: bandwidth to PIO buffers is only %u MiB/sec\n", |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1059 | lcnt / (u32) emsecs); |
| 1060 | |
| 1061 | preempt_enable(); |
| 1062 | |
| 1063 | vfree(addr); |
| 1064 | |
| 1065 | done: |
| 1066 | /* disarm piobuf, so it's available again */ |
| 1067 | dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(pbnum)); |
| 1068 | qib_sendbuf_done(dd, pbnum); |
| 1069 | dd->f_set_armlaunch(dd, 1); |
| 1070 | } |
| 1071 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1072 | void qib_free_devdata(struct qib_devdata *dd) |
| 1073 | { |
| 1074 | unsigned long flags; |
| 1075 | |
| 1076 | spin_lock_irqsave(&qib_devs_lock, flags); |
| 1077 | idr_remove(&qib_unit_table, dd->unit); |
| 1078 | list_del(&dd->list); |
| 1079 | spin_unlock_irqrestore(&qib_devs_lock, flags); |
| 1080 | |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 1081 | #ifdef CONFIG_DEBUG_FS |
| 1082 | qib_dbg_ibdev_exit(&dd->verbs_dev); |
| 1083 | #endif |
Mike Marciniszyn | 1ed88dd | 2014-03-07 08:40:49 -0500 | [diff] [blame^] | 1084 | free_percpu(dd->int_counter); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1085 | ib_dealloc_device(&dd->verbs_dev.ibdev); |
| 1086 | } |
| 1087 | |
Mike Marciniszyn | 1ed88dd | 2014-03-07 08:40:49 -0500 | [diff] [blame^] | 1088 | u64 qib_int_counter(struct qib_devdata *dd) |
| 1089 | { |
| 1090 | int cpu; |
| 1091 | u64 int_counter = 0; |
| 1092 | |
| 1093 | for_each_possible_cpu(cpu) |
| 1094 | int_counter += *per_cpu_ptr(dd->int_counter, cpu); |
| 1095 | return int_counter; |
| 1096 | } |
| 1097 | |
| 1098 | u64 qib_sps_ints(void) |
| 1099 | { |
| 1100 | unsigned long flags; |
| 1101 | struct qib_devdata *dd; |
| 1102 | u64 sps_ints = 0; |
| 1103 | |
| 1104 | spin_lock_irqsave(&qib_devs_lock, flags); |
| 1105 | list_for_each_entry(dd, &qib_dev_list, list) { |
| 1106 | sps_ints += qib_int_counter(dd); |
| 1107 | } |
| 1108 | spin_unlock_irqrestore(&qib_devs_lock, flags); |
| 1109 | return sps_ints; |
| 1110 | } |
| 1111 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1112 | /* |
| 1113 | * Allocate our primary per-unit data structure. Must be done via verbs |
| 1114 | * allocator, because the verbs cleanup process both does cleanup and |
| 1115 | * free of the data structure. |
| 1116 | * "extra" is for chip-specific data. |
| 1117 | * |
| 1118 | * Use the idr mechanism to get a unit number for this unit. |
| 1119 | */ |
| 1120 | struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra) |
| 1121 | { |
| 1122 | unsigned long flags; |
| 1123 | struct qib_devdata *dd; |
| 1124 | int ret; |
| 1125 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1126 | dd = (struct qib_devdata *) ib_alloc_device(sizeof(*dd) + extra); |
Mike Marciniszyn | f8b6c47 | 2014-03-07 08:32:31 -0500 | [diff] [blame] | 1127 | if (!dd) |
| 1128 | return ERR_PTR(-ENOMEM); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1129 | |
Mike Marciniszyn | f8b6c47 | 2014-03-07 08:32:31 -0500 | [diff] [blame] | 1130 | INIT_LIST_HEAD(&dd->list); |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 1131 | |
Tejun Heo | 80f22b4 | 2013-02-27 17:04:25 -0800 | [diff] [blame] | 1132 | idr_preload(GFP_KERNEL); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1133 | spin_lock_irqsave(&qib_devs_lock, flags); |
Tejun Heo | 80f22b4 | 2013-02-27 17:04:25 -0800 | [diff] [blame] | 1134 | |
| 1135 | ret = idr_alloc(&qib_unit_table, dd, 0, 0, GFP_NOWAIT); |
| 1136 | if (ret >= 0) { |
| 1137 | dd->unit = ret; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1138 | list_add(&dd->list, &qib_dev_list); |
Tejun Heo | 80f22b4 | 2013-02-27 17:04:25 -0800 | [diff] [blame] | 1139 | } |
| 1140 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1141 | spin_unlock_irqrestore(&qib_devs_lock, flags); |
Tejun Heo | 80f22b4 | 2013-02-27 17:04:25 -0800 | [diff] [blame] | 1142 | idr_preload_end(); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1143 | |
| 1144 | if (ret < 0) { |
| 1145 | qib_early_err(&pdev->dev, |
| 1146 | "Could not allocate unit ID: error %d\n", -ret); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1147 | goto bail; |
| 1148 | } |
Mike Marciniszyn | 1ed88dd | 2014-03-07 08:40:49 -0500 | [diff] [blame^] | 1149 | dd->int_counter = alloc_percpu(u64); |
| 1150 | if (!dd->int_counter) { |
| 1151 | ret = -ENOMEM; |
| 1152 | qib_early_err(&pdev->dev, |
| 1153 | "Could not allocate per-cpu int_counter\n"); |
| 1154 | goto bail; |
| 1155 | } |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1156 | |
| 1157 | if (!qib_cpulist_count) { |
| 1158 | u32 count = num_online_cpus(); |
| 1159 | qib_cpulist = kzalloc(BITS_TO_LONGS(count) * |
| 1160 | sizeof(long), GFP_KERNEL); |
| 1161 | if (qib_cpulist) |
| 1162 | qib_cpulist_count = count; |
| 1163 | else |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1164 | qib_early_err(&pdev->dev, |
| 1165 | "Could not alloc cpulist info, cpu affinity might be wrong\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1166 | } |
Mike Marciniszyn | f8b6c47 | 2014-03-07 08:32:31 -0500 | [diff] [blame] | 1167 | #ifdef CONFIG_DEBUG_FS |
| 1168 | qib_dbg_ibdev_init(&dd->verbs_dev); |
| 1169 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1170 | return dd; |
Mike Marciniszyn | f8b6c47 | 2014-03-07 08:32:31 -0500 | [diff] [blame] | 1171 | bail: |
| 1172 | if (!list_empty(&dd->list)) |
| 1173 | list_del_init(&dd->list); |
| 1174 | ib_dealloc_device(&dd->verbs_dev.ibdev); |
| 1175 | return ERR_PTR(ret);; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1176 | } |
| 1177 | |
| 1178 | /* |
| 1179 | * Called from freeze mode handlers, and from PCI error |
| 1180 | * reporting code. Should be paranoid about state of |
| 1181 | * system and data structures. |
| 1182 | */ |
| 1183 | void qib_disable_after_error(struct qib_devdata *dd) |
| 1184 | { |
| 1185 | if (dd->flags & QIB_INITTED) { |
| 1186 | u32 pidx; |
| 1187 | |
| 1188 | dd->flags &= ~QIB_INITTED; |
| 1189 | if (dd->pport) |
| 1190 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
| 1191 | struct qib_pportdata *ppd; |
| 1192 | |
| 1193 | ppd = dd->pport + pidx; |
| 1194 | if (dd->flags & QIB_PRESENT) { |
| 1195 | qib_set_linkstate(ppd, |
| 1196 | QIB_IB_LINKDOWN_DISABLE); |
| 1197 | dd->f_setextled(ppd, 0); |
| 1198 | } |
| 1199 | *ppd->statusp &= ~QIB_STATUS_IB_READY; |
| 1200 | } |
| 1201 | } |
| 1202 | |
| 1203 | /* |
| 1204 | * Mark as having had an error for driver, and also |
| 1205 | * for /sys and status word mapped to user programs. |
| 1206 | * This marks unit as not usable, until reset. |
| 1207 | */ |
| 1208 | if (dd->devstatusp) |
| 1209 | *dd->devstatusp |= QIB_STATUS_HWERROR; |
| 1210 | } |
| 1211 | |
Greg Kroah-Hartman | 1e6d9ab | 2012-12-21 15:08:40 -0800 | [diff] [blame] | 1212 | static void qib_remove_one(struct pci_dev *); |
| 1213 | static int qib_init_one(struct pci_dev *, const struct pci_device_id *); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1214 | |
Vinit Agnihotri | e2eed58 | 2013-03-14 18:13:41 +0000 | [diff] [blame] | 1215 | #define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: " |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1216 | #define PFX QIB_DRV_NAME ": " |
| 1217 | |
Mike Marciniszyn | 865b64b | 2011-11-09 13:35:55 -0500 | [diff] [blame] | 1218 | static DEFINE_PCI_DEVICE_TABLE(qib_pci_tbl) = { |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1219 | { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_QLOGIC_IB_6120) }, |
| 1220 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7220) }, |
| 1221 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7322) }, |
| 1222 | { 0, } |
| 1223 | }; |
| 1224 | |
| 1225 | MODULE_DEVICE_TABLE(pci, qib_pci_tbl); |
| 1226 | |
Paul Bolle | bea25e8 | 2013-08-07 20:47:38 +0200 | [diff] [blame] | 1227 | static struct pci_driver qib_driver = { |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1228 | .name = QIB_DRV_NAME, |
| 1229 | .probe = qib_init_one, |
Greg Kroah-Hartman | 1e6d9ab | 2012-12-21 15:08:40 -0800 | [diff] [blame] | 1230 | .remove = qib_remove_one, |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1231 | .id_table = qib_pci_tbl, |
| 1232 | .err_handler = &qib_pci_err_handler, |
| 1233 | }; |
| 1234 | |
Mike Marciniszyn | 8469ba3 | 2013-05-30 18:25:25 -0400 | [diff] [blame] | 1235 | #ifdef CONFIG_INFINIBAND_QIB_DCA |
| 1236 | |
| 1237 | static int qib_notify_dca(struct notifier_block *, unsigned long, void *); |
| 1238 | static struct notifier_block dca_notifier = { |
| 1239 | .notifier_call = qib_notify_dca, |
| 1240 | .next = NULL, |
| 1241 | .priority = 0 |
| 1242 | }; |
| 1243 | |
| 1244 | static int qib_notify_dca_device(struct device *device, void *data) |
| 1245 | { |
| 1246 | struct qib_devdata *dd = dev_get_drvdata(device); |
| 1247 | unsigned long event = *(unsigned long *)data; |
| 1248 | |
| 1249 | return dd->f_notify_dca(dd, event); |
| 1250 | } |
| 1251 | |
| 1252 | static int qib_notify_dca(struct notifier_block *nb, unsigned long event, |
| 1253 | void *p) |
| 1254 | { |
| 1255 | int rval; |
| 1256 | |
| 1257 | rval = driver_for_each_device(&qib_driver.driver, NULL, |
| 1258 | &event, qib_notify_dca_device); |
| 1259 | return rval ? NOTIFY_BAD : NOTIFY_DONE; |
| 1260 | } |
| 1261 | |
| 1262 | #endif |
| 1263 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1264 | /* |
| 1265 | * Do all the generic driver unit- and chip-independent memory |
| 1266 | * allocation and initialization. |
| 1267 | */ |
| 1268 | static int __init qlogic_ib_init(void) |
| 1269 | { |
| 1270 | int ret; |
| 1271 | |
| 1272 | ret = qib_dev_init(); |
| 1273 | if (ret) |
| 1274 | goto bail; |
| 1275 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1276 | /* |
| 1277 | * These must be called before the driver is registered with |
| 1278 | * the PCI subsystem. |
| 1279 | */ |
| 1280 | idr_init(&qib_unit_table); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1281 | |
Mike Marciniszyn | 8469ba3 | 2013-05-30 18:25:25 -0400 | [diff] [blame] | 1282 | #ifdef CONFIG_INFINIBAND_QIB_DCA |
| 1283 | dca_register_notify(&dca_notifier); |
| 1284 | #endif |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 1285 | #ifdef CONFIG_DEBUG_FS |
| 1286 | qib_dbg_init(); |
| 1287 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1288 | ret = pci_register_driver(&qib_driver); |
| 1289 | if (ret < 0) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1290 | pr_err("Unable to register driver: error %d\n", -ret); |
Mike Marciniszyn | 85caafe | 2013-06-04 15:05:37 -0400 | [diff] [blame] | 1291 | goto bail_dev; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1292 | } |
| 1293 | |
| 1294 | /* not fatal if it doesn't work */ |
| 1295 | if (qib_init_qibfs()) |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1296 | pr_err("Unable to register ipathfs\n"); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1297 | goto bail; /* all OK */ |
| 1298 | |
Mike Marciniszyn | 85caafe | 2013-06-04 15:05:37 -0400 | [diff] [blame] | 1299 | bail_dev: |
Mike Marciniszyn | 8469ba3 | 2013-05-30 18:25:25 -0400 | [diff] [blame] | 1300 | #ifdef CONFIG_INFINIBAND_QIB_DCA |
| 1301 | dca_unregister_notify(&dca_notifier); |
| 1302 | #endif |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 1303 | #ifdef CONFIG_DEBUG_FS |
| 1304 | qib_dbg_exit(); |
| 1305 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1306 | idr_destroy(&qib_unit_table); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1307 | qib_dev_cleanup(); |
| 1308 | bail: |
| 1309 | return ret; |
| 1310 | } |
| 1311 | |
| 1312 | module_init(qlogic_ib_init); |
| 1313 | |
| 1314 | /* |
| 1315 | * Do the non-unit driver cleanup, memory free, etc. at unload. |
| 1316 | */ |
| 1317 | static void __exit qlogic_ib_cleanup(void) |
| 1318 | { |
| 1319 | int ret; |
| 1320 | |
| 1321 | ret = qib_exit_qibfs(); |
| 1322 | if (ret) |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1323 | pr_err( |
| 1324 | "Unable to cleanup counter filesystem: error %d\n", |
| 1325 | -ret); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1326 | |
Mike Marciniszyn | 8469ba3 | 2013-05-30 18:25:25 -0400 | [diff] [blame] | 1327 | #ifdef CONFIG_INFINIBAND_QIB_DCA |
| 1328 | dca_unregister_notify(&dca_notifier); |
| 1329 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1330 | pci_unregister_driver(&qib_driver); |
Mike Marciniszyn | ddb8876 | 2013-06-15 17:07:03 -0400 | [diff] [blame] | 1331 | #ifdef CONFIG_DEBUG_FS |
| 1332 | qib_dbg_exit(); |
| 1333 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1334 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1335 | qib_cpulist_count = 0; |
| 1336 | kfree(qib_cpulist); |
| 1337 | |
| 1338 | idr_destroy(&qib_unit_table); |
| 1339 | qib_dev_cleanup(); |
| 1340 | } |
| 1341 | |
| 1342 | module_exit(qlogic_ib_cleanup); |
| 1343 | |
| 1344 | /* this can only be called after a successful initialization */ |
| 1345 | static void cleanup_device_data(struct qib_devdata *dd) |
| 1346 | { |
| 1347 | int ctxt; |
| 1348 | int pidx; |
| 1349 | struct qib_ctxtdata **tmp; |
| 1350 | unsigned long flags; |
| 1351 | |
| 1352 | /* users can't do anything more with chip */ |
Mike Marciniszyn | 36a8f01 | 2012-07-19 13:04:04 +0000 | [diff] [blame] | 1353 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1354 | if (dd->pport[pidx].statusp) |
| 1355 | *dd->pport[pidx].statusp &= ~QIB_STATUS_CHIP_PRESENT; |
| 1356 | |
Mike Marciniszyn | 36a8f01 | 2012-07-19 13:04:04 +0000 | [diff] [blame] | 1357 | spin_lock(&dd->pport[pidx].cc_shadow_lock); |
| 1358 | |
| 1359 | kfree(dd->pport[pidx].congestion_entries); |
| 1360 | dd->pport[pidx].congestion_entries = NULL; |
| 1361 | kfree(dd->pport[pidx].ccti_entries); |
| 1362 | dd->pport[pidx].ccti_entries = NULL; |
| 1363 | kfree(dd->pport[pidx].ccti_entries_shadow); |
| 1364 | dd->pport[pidx].ccti_entries_shadow = NULL; |
| 1365 | kfree(dd->pport[pidx].congestion_entries_shadow); |
| 1366 | dd->pport[pidx].congestion_entries_shadow = NULL; |
| 1367 | |
| 1368 | spin_unlock(&dd->pport[pidx].cc_shadow_lock); |
| 1369 | } |
| 1370 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1371 | if (!qib_wc_pat) |
| 1372 | qib_disable_wc(dd); |
| 1373 | |
| 1374 | if (dd->pioavailregs_dma) { |
| 1375 | dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE, |
| 1376 | (void *) dd->pioavailregs_dma, |
| 1377 | dd->pioavailregs_phys); |
| 1378 | dd->pioavailregs_dma = NULL; |
| 1379 | } |
| 1380 | |
| 1381 | if (dd->pageshadow) { |
| 1382 | struct page **tmpp = dd->pageshadow; |
| 1383 | dma_addr_t *tmpd = dd->physshadow; |
Mike Marciniszyn | 308c813 | 2013-07-03 13:50:28 -0400 | [diff] [blame] | 1384 | int i; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1385 | |
| 1386 | for (ctxt = 0; ctxt < dd->cfgctxts; ctxt++) { |
| 1387 | int ctxt_tidbase = ctxt * dd->rcvtidcnt; |
| 1388 | int maxtid = ctxt_tidbase + dd->rcvtidcnt; |
| 1389 | |
| 1390 | for (i = ctxt_tidbase; i < maxtid; i++) { |
| 1391 | if (!tmpp[i]) |
| 1392 | continue; |
| 1393 | pci_unmap_page(dd->pcidev, tmpd[i], |
| 1394 | PAGE_SIZE, PCI_DMA_FROMDEVICE); |
| 1395 | qib_release_user_pages(&tmpp[i], 1); |
| 1396 | tmpp[i] = NULL; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1397 | } |
| 1398 | } |
| 1399 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1400 | dd->pageshadow = NULL; |
| 1401 | vfree(tmpp); |
Mike Marciniszyn | 308c813 | 2013-07-03 13:50:28 -0400 | [diff] [blame] | 1402 | dd->physshadow = NULL; |
| 1403 | vfree(tmpd); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1404 | } |
| 1405 | |
| 1406 | /* |
| 1407 | * Free any resources still in use (usually just kernel contexts) |
| 1408 | * at unload; we do for ctxtcnt, because that's what we allocate. |
| 1409 | * We acquire lock to be really paranoid that rcd isn't being |
| 1410 | * accessed from some interrupt-related code (that should not happen, |
| 1411 | * but best to be sure). |
| 1412 | */ |
| 1413 | spin_lock_irqsave(&dd->uctxt_lock, flags); |
| 1414 | tmp = dd->rcd; |
| 1415 | dd->rcd = NULL; |
| 1416 | spin_unlock_irqrestore(&dd->uctxt_lock, flags); |
| 1417 | for (ctxt = 0; tmp && ctxt < dd->ctxtcnt; ctxt++) { |
| 1418 | struct qib_ctxtdata *rcd = tmp[ctxt]; |
| 1419 | |
| 1420 | tmp[ctxt] = NULL; /* debugging paranoia */ |
| 1421 | qib_free_ctxtdata(dd, rcd); |
| 1422 | } |
| 1423 | kfree(tmp); |
| 1424 | kfree(dd->boardname); |
Mike Marciniszyn | 85caafe | 2013-06-04 15:05:37 -0400 | [diff] [blame] | 1425 | qib_cq_exit(dd); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1426 | } |
| 1427 | |
| 1428 | /* |
| 1429 | * Clean up on unit shutdown, or error during unit load after |
| 1430 | * successful initialization. |
| 1431 | */ |
| 1432 | static void qib_postinit_cleanup(struct qib_devdata *dd) |
| 1433 | { |
| 1434 | /* |
| 1435 | * Clean up chip-specific stuff. |
| 1436 | * We check for NULL here, because it's outside |
| 1437 | * the kregbase check, and we need to call it |
| 1438 | * after the free_irq. Thus it's possible that |
| 1439 | * the function pointers were never initialized. |
| 1440 | */ |
| 1441 | if (dd->f_cleanup) |
| 1442 | dd->f_cleanup(dd); |
| 1443 | |
| 1444 | qib_pcie_ddcleanup(dd); |
| 1445 | |
| 1446 | cleanup_device_data(dd); |
| 1447 | |
| 1448 | qib_free_devdata(dd); |
| 1449 | } |
| 1450 | |
Greg Kroah-Hartman | 1e6d9ab | 2012-12-21 15:08:40 -0800 | [diff] [blame] | 1451 | static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1452 | { |
| 1453 | int ret, j, pidx, initfail; |
| 1454 | struct qib_devdata *dd = NULL; |
| 1455 | |
| 1456 | ret = qib_pcie_init(pdev, ent); |
| 1457 | if (ret) |
| 1458 | goto bail; |
| 1459 | |
| 1460 | /* |
| 1461 | * Do device-specific initialiation, function table setup, dd |
| 1462 | * allocation, etc. |
| 1463 | */ |
| 1464 | switch (ent->device) { |
| 1465 | case PCI_DEVICE_ID_QLOGIC_IB_6120: |
Ralph Campbell | 7e3a1f4 | 2010-05-25 12:22:33 -0700 | [diff] [blame] | 1466 | #ifdef CONFIG_PCI_MSI |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1467 | dd = qib_init_iba6120_funcs(pdev, ent); |
Ralph Campbell | 7e3a1f4 | 2010-05-25 12:22:33 -0700 | [diff] [blame] | 1468 | #else |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1469 | qib_early_err(&pdev->dev, |
Vinit Agnihotri | e2eed58 | 2013-03-14 18:13:41 +0000 | [diff] [blame] | 1470 | "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n", |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1471 | ent->device); |
Ralph Campbell | 9e43e01 | 2010-10-22 15:29:46 -0700 | [diff] [blame] | 1472 | dd = ERR_PTR(-ENODEV); |
Ralph Campbell | 7e3a1f4 | 2010-05-25 12:22:33 -0700 | [diff] [blame] | 1473 | #endif |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1474 | break; |
| 1475 | |
| 1476 | case PCI_DEVICE_ID_QLOGIC_IB_7220: |
| 1477 | dd = qib_init_iba7220_funcs(pdev, ent); |
| 1478 | break; |
| 1479 | |
| 1480 | case PCI_DEVICE_ID_QLOGIC_IB_7322: |
| 1481 | dd = qib_init_iba7322_funcs(pdev, ent); |
| 1482 | break; |
| 1483 | |
| 1484 | default: |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1485 | qib_early_err(&pdev->dev, |
Vinit Agnihotri | e2eed58 | 2013-03-14 18:13:41 +0000 | [diff] [blame] | 1486 | "Failing on unknown Intel deviceid 0x%x\n", |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1487 | ent->device); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1488 | ret = -ENODEV; |
| 1489 | } |
| 1490 | |
| 1491 | if (IS_ERR(dd)) |
| 1492 | ret = PTR_ERR(dd); |
| 1493 | if (ret) |
| 1494 | goto bail; /* error already printed */ |
| 1495 | |
Mike Marciniszyn | 551ace1 | 2012-07-19 13:03:56 +0000 | [diff] [blame] | 1496 | ret = qib_create_workqueues(dd); |
| 1497 | if (ret) |
| 1498 | goto bail; |
| 1499 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1500 | /* do the generic initialization */ |
| 1501 | initfail = qib_init(dd, 0); |
| 1502 | |
| 1503 | ret = qib_register_ib_device(dd); |
| 1504 | |
| 1505 | /* |
| 1506 | * Now ready for use. this should be cleared whenever we |
| 1507 | * detect a reset, or initiate one. If earlier failure, |
| 1508 | * we still create devices, so diags, etc. can be used |
| 1509 | * to determine cause of problem. |
| 1510 | */ |
| 1511 | if (!qib_mini_init && !initfail && !ret) |
| 1512 | dd->flags |= QIB_INITTED; |
| 1513 | |
| 1514 | j = qib_device_create(dd); |
| 1515 | if (j) |
| 1516 | qib_dev_err(dd, "Failed to create /dev devices: %d\n", -j); |
| 1517 | j = qibfs_add(dd); |
| 1518 | if (j) |
| 1519 | qib_dev_err(dd, "Failed filesystem setup for counters: %d\n", |
| 1520 | -j); |
| 1521 | |
| 1522 | if (qib_mini_init || initfail || ret) { |
| 1523 | qib_stop_timers(dd); |
Tejun Heo | f062671 | 2010-10-19 15:24:36 +0000 | [diff] [blame] | 1524 | flush_workqueue(ib_wq); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1525 | for (pidx = 0; pidx < dd->num_pports; ++pidx) |
| 1526 | dd->f_quiet_serdes(dd->pport + pidx); |
Ralph Campbell | 756a33b | 2010-07-01 20:25:45 +0000 | [diff] [blame] | 1527 | if (qib_mini_init) |
| 1528 | goto bail; |
| 1529 | if (!j) { |
| 1530 | (void) qibfs_remove(dd); |
| 1531 | qib_device_remove(dd); |
| 1532 | } |
| 1533 | if (!ret) |
| 1534 | qib_unregister_ib_device(dd); |
| 1535 | qib_postinit_cleanup(dd); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1536 | if (initfail) |
| 1537 | ret = initfail; |
| 1538 | goto bail; |
| 1539 | } |
| 1540 | |
| 1541 | if (!qib_wc_pat) { |
| 1542 | ret = qib_enable_wc(dd); |
| 1543 | if (ret) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1544 | qib_dev_err(dd, |
| 1545 | "Write combining not enabled (err %d): performance may be poor\n", |
| 1546 | -ret); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1547 | ret = 0; |
| 1548 | } |
| 1549 | } |
| 1550 | |
| 1551 | qib_verify_pioperf(dd); |
| 1552 | bail: |
| 1553 | return ret; |
| 1554 | } |
| 1555 | |
Greg Kroah-Hartman | 1e6d9ab | 2012-12-21 15:08:40 -0800 | [diff] [blame] | 1556 | static void qib_remove_one(struct pci_dev *pdev) |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1557 | { |
| 1558 | struct qib_devdata *dd = pci_get_drvdata(pdev); |
| 1559 | int ret; |
| 1560 | |
| 1561 | /* unregister from IB core */ |
| 1562 | qib_unregister_ib_device(dd); |
| 1563 | |
| 1564 | /* |
| 1565 | * Disable the IB link, disable interrupts on the device, |
| 1566 | * clear dma engines, etc. |
| 1567 | */ |
| 1568 | if (!qib_mini_init) |
| 1569 | qib_shutdown_device(dd); |
| 1570 | |
| 1571 | qib_stop_timers(dd); |
| 1572 | |
Tejun Heo | f062671 | 2010-10-19 15:24:36 +0000 | [diff] [blame] | 1573 | /* wait until all of our (qsfp) queue_work() calls complete */ |
| 1574 | flush_workqueue(ib_wq); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1575 | |
| 1576 | ret = qibfs_remove(dd); |
| 1577 | if (ret) |
| 1578 | qib_dev_err(dd, "Failed counters filesystem cleanup: %d\n", |
| 1579 | -ret); |
| 1580 | |
| 1581 | qib_device_remove(dd); |
| 1582 | |
| 1583 | qib_postinit_cleanup(dd); |
| 1584 | } |
| 1585 | |
| 1586 | /** |
| 1587 | * qib_create_rcvhdrq - create a receive header queue |
| 1588 | * @dd: the qlogic_ib device |
| 1589 | * @rcd: the context data |
| 1590 | * |
| 1591 | * This must be contiguous memory (from an i/o perspective), and must be |
| 1592 | * DMA'able (which means for some systems, it will go through an IOMMU, |
| 1593 | * or be forced into a low address range). |
| 1594 | */ |
| 1595 | int qib_create_rcvhdrq(struct qib_devdata *dd, struct qib_ctxtdata *rcd) |
| 1596 | { |
| 1597 | unsigned amt; |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1598 | int old_node_id; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1599 | |
| 1600 | if (!rcd->rcvhdrq) { |
| 1601 | dma_addr_t phys_hdrqtail; |
| 1602 | gfp_t gfp_flags; |
| 1603 | |
| 1604 | amt = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize * |
| 1605 | sizeof(u32), PAGE_SIZE); |
| 1606 | gfp_flags = (rcd->ctxt >= dd->first_user_ctxt) ? |
| 1607 | GFP_USER : GFP_KERNEL; |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1608 | |
| 1609 | old_node_id = dev_to_node(&dd->pcidev->dev); |
| 1610 | set_dev_node(&dd->pcidev->dev, rcd->node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1611 | rcd->rcvhdrq = dma_alloc_coherent( |
| 1612 | &dd->pcidev->dev, amt, &rcd->rcvhdrq_phys, |
| 1613 | gfp_flags | __GFP_COMP); |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1614 | set_dev_node(&dd->pcidev->dev, old_node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1615 | |
| 1616 | if (!rcd->rcvhdrq) { |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1617 | qib_dev_err(dd, |
| 1618 | "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n", |
| 1619 | amt, rcd->ctxt); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1620 | goto bail; |
| 1621 | } |
| 1622 | |
| 1623 | if (rcd->ctxt >= dd->first_user_ctxt) { |
| 1624 | rcd->user_event_mask = vmalloc_user(PAGE_SIZE); |
| 1625 | if (!rcd->user_event_mask) |
| 1626 | goto bail_free_hdrq; |
| 1627 | } |
| 1628 | |
| 1629 | if (!(dd->flags & QIB_NODMA_RTAIL)) { |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1630 | set_dev_node(&dd->pcidev->dev, rcd->node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1631 | rcd->rcvhdrtail_kvaddr = dma_alloc_coherent( |
| 1632 | &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, |
| 1633 | gfp_flags); |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1634 | set_dev_node(&dd->pcidev->dev, old_node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1635 | if (!rcd->rcvhdrtail_kvaddr) |
| 1636 | goto bail_free; |
| 1637 | rcd->rcvhdrqtailaddr_phys = phys_hdrqtail; |
| 1638 | } |
| 1639 | |
| 1640 | rcd->rcvhdrq_size = amt; |
| 1641 | } |
| 1642 | |
| 1643 | /* clear for security and sanity on each use */ |
| 1644 | memset(rcd->rcvhdrq, 0, rcd->rcvhdrq_size); |
| 1645 | if (rcd->rcvhdrtail_kvaddr) |
| 1646 | memset(rcd->rcvhdrtail_kvaddr, 0, PAGE_SIZE); |
| 1647 | return 0; |
| 1648 | |
| 1649 | bail_free: |
Mike Marciniszyn | 7fac330 | 2012-07-19 13:04:25 +0000 | [diff] [blame] | 1650 | qib_dev_err(dd, |
| 1651 | "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n", |
| 1652 | rcd->ctxt); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1653 | vfree(rcd->user_event_mask); |
| 1654 | rcd->user_event_mask = NULL; |
| 1655 | bail_free_hdrq: |
| 1656 | dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq, |
| 1657 | rcd->rcvhdrq_phys); |
| 1658 | rcd->rcvhdrq = NULL; |
| 1659 | bail: |
| 1660 | return -ENOMEM; |
| 1661 | } |
| 1662 | |
| 1663 | /** |
| 1664 | * allocate eager buffers, both kernel and user contexts. |
| 1665 | * @rcd: the context we are setting up. |
| 1666 | * |
| 1667 | * Allocate the eager TID buffers and program them into hip. |
| 1668 | * They are no longer completely contiguous, we do multiple allocation |
| 1669 | * calls. Otherwise we get the OOM code involved, by asking for too |
| 1670 | * much per call, with disastrous results on some kernels. |
| 1671 | */ |
| 1672 | int qib_setup_eagerbufs(struct qib_ctxtdata *rcd) |
| 1673 | { |
| 1674 | struct qib_devdata *dd = rcd->dd; |
| 1675 | unsigned e, egrcnt, egrperchunk, chunk, egrsize, egroff; |
| 1676 | size_t size; |
| 1677 | gfp_t gfp_flags; |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1678 | int old_node_id; |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1679 | |
| 1680 | /* |
| 1681 | * GFP_USER, but without GFP_FS, so buffer cache can be |
| 1682 | * coalesced (we hope); otherwise, even at order 4, |
| 1683 | * heavy filesystem activity makes these fail, and we can |
| 1684 | * use compound pages. |
| 1685 | */ |
| 1686 | gfp_flags = __GFP_WAIT | __GFP_IO | __GFP_COMP; |
| 1687 | |
| 1688 | egrcnt = rcd->rcvegrcnt; |
| 1689 | egroff = rcd->rcvegr_tid_base; |
| 1690 | egrsize = dd->rcvegrbufsize; |
| 1691 | |
| 1692 | chunk = rcd->rcvegrbuf_chunks; |
| 1693 | egrperchunk = rcd->rcvegrbufs_perchunk; |
| 1694 | size = rcd->rcvegrbuf_size; |
| 1695 | if (!rcd->rcvegrbuf) { |
| 1696 | rcd->rcvegrbuf = |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1697 | kzalloc_node(chunk * sizeof(rcd->rcvegrbuf[0]), |
| 1698 | GFP_KERNEL, rcd->node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1699 | if (!rcd->rcvegrbuf) |
| 1700 | goto bail; |
| 1701 | } |
| 1702 | if (!rcd->rcvegrbuf_phys) { |
| 1703 | rcd->rcvegrbuf_phys = |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1704 | kmalloc_node(chunk * sizeof(rcd->rcvegrbuf_phys[0]), |
| 1705 | GFP_KERNEL, rcd->node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1706 | if (!rcd->rcvegrbuf_phys) |
| 1707 | goto bail_rcvegrbuf; |
| 1708 | } |
| 1709 | for (e = 0; e < rcd->rcvegrbuf_chunks; e++) { |
| 1710 | if (rcd->rcvegrbuf[e]) |
| 1711 | continue; |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1712 | |
| 1713 | old_node_id = dev_to_node(&dd->pcidev->dev); |
| 1714 | set_dev_node(&dd->pcidev->dev, rcd->node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1715 | rcd->rcvegrbuf[e] = |
| 1716 | dma_alloc_coherent(&dd->pcidev->dev, size, |
| 1717 | &rcd->rcvegrbuf_phys[e], |
| 1718 | gfp_flags); |
Ramkrishna Vepa | e0f30ba | 2013-05-28 12:57:33 -0400 | [diff] [blame] | 1719 | set_dev_node(&dd->pcidev->dev, old_node_id); |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1720 | if (!rcd->rcvegrbuf[e]) |
| 1721 | goto bail_rcvegrbuf_phys; |
| 1722 | } |
| 1723 | |
| 1724 | rcd->rcvegr_phys = rcd->rcvegrbuf_phys[0]; |
| 1725 | |
| 1726 | for (e = chunk = 0; chunk < rcd->rcvegrbuf_chunks; chunk++) { |
| 1727 | dma_addr_t pa = rcd->rcvegrbuf_phys[chunk]; |
| 1728 | unsigned i; |
| 1729 | |
Ralph Campbell | 5df4223 | 2010-06-17 23:13:59 +0000 | [diff] [blame] | 1730 | /* clear for security and sanity on each use */ |
| 1731 | memset(rcd->rcvegrbuf[chunk], 0, size); |
| 1732 | |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1733 | for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) { |
| 1734 | dd->f_put_tid(dd, e + egroff + |
| 1735 | (u64 __iomem *) |
| 1736 | ((char __iomem *) |
| 1737 | dd->kregbase + |
| 1738 | dd->rcvegrbase), |
| 1739 | RCVHQ_RCV_TYPE_EAGER, pa); |
| 1740 | pa += egrsize; |
| 1741 | } |
| 1742 | cond_resched(); /* don't hog the cpu */ |
| 1743 | } |
| 1744 | |
| 1745 | return 0; |
| 1746 | |
| 1747 | bail_rcvegrbuf_phys: |
| 1748 | for (e = 0; e < rcd->rcvegrbuf_chunks && rcd->rcvegrbuf[e]; e++) |
| 1749 | dma_free_coherent(&dd->pcidev->dev, size, |
| 1750 | rcd->rcvegrbuf[e], rcd->rcvegrbuf_phys[e]); |
| 1751 | kfree(rcd->rcvegrbuf_phys); |
| 1752 | rcd->rcvegrbuf_phys = NULL; |
| 1753 | bail_rcvegrbuf: |
| 1754 | kfree(rcd->rcvegrbuf); |
| 1755 | rcd->rcvegrbuf = NULL; |
| 1756 | bail: |
| 1757 | return -ENOMEM; |
| 1758 | } |
| 1759 | |
Dave Olson | fce24a9 | 2010-06-17 23:13:44 +0000 | [diff] [blame] | 1760 | /* |
| 1761 | * Note: Changes to this routine should be mirrored |
| 1762 | * for the diagnostics routine qib_remap_ioaddr32(). |
| 1763 | * There is also related code for VL15 buffers in qib_init_7322_variables(). |
| 1764 | * The teardown code that unmaps is in qib_pcie_ddcleanup() |
| 1765 | */ |
Ralph Campbell | f931551 | 2010-05-23 21:44:54 -0700 | [diff] [blame] | 1766 | int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) |
| 1767 | { |
| 1768 | u64 __iomem *qib_kregbase = NULL; |
| 1769 | void __iomem *qib_piobase = NULL; |
| 1770 | u64 __iomem *qib_userbase = NULL; |
| 1771 | u64 qib_kreglen; |
| 1772 | u64 qib_pio2koffset = dd->piobufbase & 0xffffffff; |
| 1773 | u64 qib_pio4koffset = dd->piobufbase >> 32; |
| 1774 | u64 qib_pio2klen = dd->piobcnt2k * dd->palign; |
| 1775 | u64 qib_pio4klen = dd->piobcnt4k * dd->align4k; |
| 1776 | u64 qib_physaddr = dd->physaddr; |
| 1777 | u64 qib_piolen; |
| 1778 | u64 qib_userlen = 0; |
| 1779 | |
| 1780 | /* |
| 1781 | * Free the old mapping because the kernel will try to reuse the |
| 1782 | * old mapping and not create a new mapping with the |
| 1783 | * write combining attribute. |
| 1784 | */ |
| 1785 | iounmap(dd->kregbase); |
| 1786 | dd->kregbase = NULL; |
| 1787 | |
| 1788 | /* |
| 1789 | * Assumes chip address space looks like: |
| 1790 | * - kregs + sregs + cregs + uregs (in any order) |
| 1791 | * - piobufs (2K and 4K bufs in either order) |
| 1792 | * or: |
| 1793 | * - kregs + sregs + cregs (in any order) |
| 1794 | * - piobufs (2K and 4K bufs in either order) |
| 1795 | * - uregs |
| 1796 | */ |
| 1797 | if (dd->piobcnt4k == 0) { |
| 1798 | qib_kreglen = qib_pio2koffset; |
| 1799 | qib_piolen = qib_pio2klen; |
| 1800 | } else if (qib_pio2koffset < qib_pio4koffset) { |
| 1801 | qib_kreglen = qib_pio2koffset; |
| 1802 | qib_piolen = qib_pio4koffset + qib_pio4klen - qib_kreglen; |
| 1803 | } else { |
| 1804 | qib_kreglen = qib_pio4koffset; |
| 1805 | qib_piolen = qib_pio2koffset + qib_pio2klen - qib_kreglen; |
| 1806 | } |
| 1807 | qib_piolen += vl15buflen; |
| 1808 | /* Map just the configured ports (not all hw ports) */ |
| 1809 | if (dd->uregbase > qib_kreglen) |
| 1810 | qib_userlen = dd->ureg_align * dd->cfgctxts; |
| 1811 | |
| 1812 | /* Sanity checks passed, now create the new mappings */ |
| 1813 | qib_kregbase = ioremap_nocache(qib_physaddr, qib_kreglen); |
| 1814 | if (!qib_kregbase) |
| 1815 | goto bail; |
| 1816 | |
| 1817 | qib_piobase = ioremap_wc(qib_physaddr + qib_kreglen, qib_piolen); |
| 1818 | if (!qib_piobase) |
| 1819 | goto bail_kregbase; |
| 1820 | |
| 1821 | if (qib_userlen) { |
| 1822 | qib_userbase = ioremap_nocache(qib_physaddr + dd->uregbase, |
| 1823 | qib_userlen); |
| 1824 | if (!qib_userbase) |
| 1825 | goto bail_piobase; |
| 1826 | } |
| 1827 | |
| 1828 | dd->kregbase = qib_kregbase; |
| 1829 | dd->kregend = (u64 __iomem *) |
| 1830 | ((char __iomem *) qib_kregbase + qib_kreglen); |
| 1831 | dd->piobase = qib_piobase; |
| 1832 | dd->pio2kbase = (void __iomem *) |
| 1833 | (((char __iomem *) dd->piobase) + |
| 1834 | qib_pio2koffset - qib_kreglen); |
| 1835 | if (dd->piobcnt4k) |
| 1836 | dd->pio4kbase = (void __iomem *) |
| 1837 | (((char __iomem *) dd->piobase) + |
| 1838 | qib_pio4koffset - qib_kreglen); |
| 1839 | if (qib_userlen) |
| 1840 | /* ureg will now be accessed relative to dd->userbase */ |
| 1841 | dd->userbase = qib_userbase; |
| 1842 | return 0; |
| 1843 | |
| 1844 | bail_piobase: |
| 1845 | iounmap(qib_piobase); |
| 1846 | bail_kregbase: |
| 1847 | iounmap(qib_kregbase); |
| 1848 | bail: |
| 1849 | return -ENOMEM; |
| 1850 | } |