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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Thierry Reding776dc382013-10-14 14:43:22 +020010#include <linux/host1x.h>
Thierry Redingdf06b752014-06-26 21:41:53 +020011#include <linux/iommu.h>
Thierry Reding776dc382013-10-14 14:43:22 +020012
Thierry Reding1503ca42014-11-24 17:41:23 +010013#include <drm/drm_atomic.h>
Thierry Reding07866962014-11-24 17:08:06 +010014#include <drm/drm_atomic_helper.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include "drm.h"
Arto Merilainende2ba662013-03-22 16:34:08 +020017#include "gem.h"
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000018
19#define DRIVER_NAME "tegra"
20#define DRIVER_DESC "NVIDIA Tegra graphics"
21#define DRIVER_DATE "20120330"
22#define DRIVER_MAJOR 0
23#define DRIVER_MINOR 0
24#define DRIVER_PATCHLEVEL 0
25
Thierry Reding08943e62013-09-26 16:08:18 +020026struct tegra_drm_file {
27 struct list_head contexts;
28};
29
Thierry Reding1503ca42014-11-24 17:41:23 +010030static void tegra_atomic_schedule(struct tegra_drm *tegra,
31 struct drm_atomic_state *state)
32{
33 tegra->commit.state = state;
34 schedule_work(&tegra->commit.work);
35}
36
37static void tegra_atomic_complete(struct tegra_drm *tegra,
38 struct drm_atomic_state *state)
39{
40 struct drm_device *drm = tegra->drm;
41
42 /*
43 * Everything below can be run asynchronously without the need to grab
44 * any modeset locks at all under one condition: It must be guaranteed
45 * that the asynchronous work has either been cancelled (if the driver
46 * supports it, which at least requires that the framebuffers get
47 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
48 * before the new state gets committed on the software side with
49 * drm_atomic_helper_swap_state().
50 *
51 * This scheme allows new atomic state updates to be prepared and
52 * checked in parallel to the asynchronous completion of the previous
53 * update. Which is important since compositors need to figure out the
54 * composition of the next frame right after having submitted the
55 * current layout.
56 */
57
Daniel Vetter1af434a2015-02-22 12:24:19 +010058 drm_atomic_helper_commit_modeset_disables(drm, state);
Daniel Vetteraef9dbb2015-09-08 12:02:07 +020059 drm_atomic_helper_commit_planes(drm, state, false);
Daniel Vetter1af434a2015-02-22 12:24:19 +010060 drm_atomic_helper_commit_modeset_enables(drm, state);
Thierry Reding1503ca42014-11-24 17:41:23 +010061
62 drm_atomic_helper_wait_for_vblanks(drm, state);
63
64 drm_atomic_helper_cleanup_planes(drm, state);
65 drm_atomic_state_free(state);
66}
67
68static void tegra_atomic_work(struct work_struct *work)
69{
70 struct tegra_drm *tegra = container_of(work, struct tegra_drm,
71 commit.work);
72
73 tegra_atomic_complete(tegra, tegra->commit.state);
74}
75
76static int tegra_atomic_commit(struct drm_device *drm,
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020077 struct drm_atomic_state *state, bool nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +010078{
79 struct tegra_drm *tegra = drm->dev_private;
80 int err;
81
82 err = drm_atomic_helper_prepare_planes(drm, state);
83 if (err)
84 return err;
85
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020086 /* serialize outstanding nonblocking commits */
Thierry Reding1503ca42014-11-24 17:41:23 +010087 mutex_lock(&tegra->commit.lock);
88 flush_work(&tegra->commit.work);
89
90 /*
91 * This is the point of no return - everything below never fails except
92 * when the hw goes bonghits. Which means we can commit the new state on
93 * the software side now.
94 */
95
96 drm_atomic_helper_swap_state(drm, state);
97
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020098 if (nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +010099 tegra_atomic_schedule(tegra, state);
100 else
101 tegra_atomic_complete(tegra, state);
102
103 mutex_unlock(&tegra->commit.lock);
104 return 0;
105}
106
Thierry Redingf9914212014-11-26 13:03:57 +0100107static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
108 .fb_create = tegra_fb_create,
Archit Tanejab110ef32015-10-27 13:40:59 +0530109#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Redingf9914212014-11-26 13:03:57 +0100110 .output_poll_changed = tegra_fb_output_poll_changed,
111#endif
Thierry Reding07866962014-11-24 17:08:06 +0100112 .atomic_check = drm_atomic_helper_check,
Thierry Reding1503ca42014-11-24 17:41:23 +0100113 .atomic_commit = tegra_atomic_commit,
Thierry Redingf9914212014-11-26 13:03:57 +0100114};
115
Thierry Reding776dc382013-10-14 14:43:22 +0200116static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000117{
Thierry Reding776dc382013-10-14 14:43:22 +0200118 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Reding386a2a72013-09-24 13:22:17 +0200119 struct tegra_drm *tegra;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000120 int err;
121
Thierry Reding776dc382013-10-14 14:43:22 +0200122 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
Thierry Reding386a2a72013-09-24 13:22:17 +0200123 if (!tegra)
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200124 return -ENOMEM;
125
Thierry Redingdf06b752014-06-26 21:41:53 +0200126 if (iommu_present(&platform_bus_type)) {
Thierry Reding4553f732015-01-19 16:15:04 +0100127 struct iommu_domain_geometry *geometry;
128 u64 start, end;
129
Thierry Redingdf06b752014-06-26 21:41:53 +0200130 tegra->domain = iommu_domain_alloc(&platform_bus_type);
Dan Carpenterbf19b882014-12-04 14:00:35 +0300131 if (!tegra->domain) {
132 err = -ENOMEM;
Thierry Redingdf06b752014-06-26 21:41:53 +0200133 goto free;
134 }
135
Thierry Reding4553f732015-01-19 16:15:04 +0100136 geometry = &tegra->domain->geometry;
137 start = geometry->aperture_start;
138 end = geometry->aperture_end;
139
Thierry Redingd2d8c352015-11-23 16:46:30 +0100140 DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n",
141 start, end);
Thierry Reding4553f732015-01-19 16:15:04 +0100142 drm_mm_init(&tegra->mm, start, end - start + 1);
Thierry Redingdf06b752014-06-26 21:41:53 +0200143 }
144
Thierry Reding386a2a72013-09-24 13:22:17 +0200145 mutex_init(&tegra->clients_lock);
146 INIT_LIST_HEAD(&tegra->clients);
Thierry Reding1503ca42014-11-24 17:41:23 +0100147
148 mutex_init(&tegra->commit.lock);
149 INIT_WORK(&tegra->commit.work, tegra_atomic_work);
150
Thierry Reding386a2a72013-09-24 13:22:17 +0200151 drm->dev_private = tegra;
152 tegra->drm = drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000153
154 drm_mode_config_init(drm);
155
Thierry Redingf9914212014-11-26 13:03:57 +0100156 drm->mode_config.min_width = 0;
157 drm->mode_config.min_height = 0;
158
159 drm->mode_config.max_width = 4096;
160 drm->mode_config.max_height = 4096;
161
162 drm->mode_config.funcs = &tegra_drm_mode_funcs;
163
Thierry Redinge2215322014-06-27 17:19:25 +0200164 err = tegra_drm_fb_prepare(drm);
165 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100166 goto config;
Thierry Redinge2215322014-06-27 17:19:25 +0200167
168 drm_kms_helper_poll_init(drm);
169
Thierry Reding776dc382013-10-14 14:43:22 +0200170 err = host1x_device_init(device);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000171 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100172 goto fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000173
Thierry Reding603f0cc2013-04-22 21:22:14 +0200174 /*
175 * We don't use the drm_irq_install() helpers provided by the DRM
176 * core, so we need to set this manually in order to allow the
177 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
178 */
Ville Syrjälä44238432013-10-04 14:53:37 +0300179 drm->irq_enabled = true;
Thierry Reding603f0cc2013-04-22 21:22:14 +0200180
Thierry Reding42e9ce02015-01-28 14:43:05 +0100181 /* syncpoints are used for full 32-bit hardware VBLANK counters */
Thierry Reding42e9ce02015-01-28 14:43:05 +0100182 drm->max_vblank_count = 0xffffffff;
Thierry Redingcdc630b2015-07-21 16:45:49 +0200183 drm->vblank_disable_allowed = true;
Thierry Reding42e9ce02015-01-28 14:43:05 +0100184
Thierry Reding6e5ff992012-11-28 11:45:47 +0100185 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
186 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100187 goto device;
Thierry Reding6e5ff992012-11-28 11:45:47 +0100188
Thierry Reding31930d42015-07-02 17:04:06 +0200189 drm_mode_config_reset(drm);
190
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000191 err = tegra_drm_fb_init(drm);
192 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100193 goto vblank;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000194
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000195 return 0;
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100196
197vblank:
198 drm_vblank_cleanup(drm);
199device:
200 host1x_device_exit(device);
201fbdev:
202 drm_kms_helper_poll_fini(drm);
203 tegra_drm_fb_free(drm);
204config:
205 drm_mode_config_cleanup(drm);
Thierry Redingdf06b752014-06-26 21:41:53 +0200206
207 if (tegra->domain) {
208 iommu_domain_free(tegra->domain);
209 drm_mm_takedown(&tegra->mm);
210 }
211free:
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100212 kfree(tegra);
213 return err;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000214}
215
216static int tegra_drm_unload(struct drm_device *drm)
217{
Thierry Reding776dc382013-10-14 14:43:22 +0200218 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Redingdf06b752014-06-26 21:41:53 +0200219 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding776dc382013-10-14 14:43:22 +0200220 int err;
221
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000222 drm_kms_helper_poll_fini(drm);
223 tegra_drm_fb_exit(drm);
Thierry Redingf002abc2013-10-14 14:06:02 +0200224 drm_mode_config_cleanup(drm);
Thierry Reding4aa3df72014-11-24 16:27:13 +0100225 drm_vblank_cleanup(drm);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000226
Thierry Reding776dc382013-10-14 14:43:22 +0200227 err = host1x_device_exit(device);
228 if (err < 0)
229 return err;
230
Thierry Redingdf06b752014-06-26 21:41:53 +0200231 if (tegra->domain) {
232 iommu_domain_free(tegra->domain);
233 drm_mm_takedown(&tegra->mm);
234 }
235
Thierry Reding1053f4dd2014-11-04 16:17:55 +0100236 kfree(tegra);
237
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000238 return 0;
239}
240
241static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
242{
Thierry Reding08943e62013-09-26 16:08:18 +0200243 struct tegra_drm_file *fpriv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200244
245 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
246 if (!fpriv)
247 return -ENOMEM;
248
249 INIT_LIST_HEAD(&fpriv->contexts);
250 filp->driver_priv = fpriv;
251
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000252 return 0;
253}
254
Thierry Redingc88c3632013-09-26 16:08:22 +0200255static void tegra_drm_context_free(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200256{
257 context->client->ops->close_channel(context);
258 kfree(context);
259}
260
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000261static void tegra_drm_lastclose(struct drm_device *drm)
262{
Archit Tanejab110ef32015-10-27 13:40:59 +0530263#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Reding386a2a72013-09-24 13:22:17 +0200264 struct tegra_drm *tegra = drm->dev_private;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000265
Thierry Reding386a2a72013-09-24 13:22:17 +0200266 tegra_fbdev_restore_mode(tegra->fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100267#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000268}
269
Thierry Redingc40f0f12013-10-10 11:00:33 +0200270static struct host1x_bo *
271host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle)
272{
273 struct drm_gem_object *gem;
274 struct tegra_bo *bo;
275
276 gem = drm_gem_object_lookup(drm, file, handle);
277 if (!gem)
278 return NULL;
279
Daniel Vettera07cdfe2015-11-23 10:32:48 +0100280 drm_gem_object_unreference_unlocked(gem);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200281
282 bo = to_tegra_bo(gem);
283 return &bo->base;
284}
285
Thierry Reding961e3be2014-06-10 10:25:00 +0200286static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
287 struct drm_tegra_reloc __user *src,
288 struct drm_device *drm,
289 struct drm_file *file)
290{
291 u32 cmdbuf, target;
292 int err;
293
294 err = get_user(cmdbuf, &src->cmdbuf.handle);
295 if (err < 0)
296 return err;
297
298 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
299 if (err < 0)
300 return err;
301
302 err = get_user(target, &src->target.handle);
303 if (err < 0)
304 return err;
305
David Ung31f40f82015-01-20 18:37:35 -0800306 err = get_user(dest->target.offset, &src->target.offset);
Thierry Reding961e3be2014-06-10 10:25:00 +0200307 if (err < 0)
308 return err;
309
310 err = get_user(dest->shift, &src->shift);
311 if (err < 0)
312 return err;
313
314 dest->cmdbuf.bo = host1x_bo_lookup(drm, file, cmdbuf);
315 if (!dest->cmdbuf.bo)
316 return -ENOENT;
317
318 dest->target.bo = host1x_bo_lookup(drm, file, target);
319 if (!dest->target.bo)
320 return -ENOENT;
321
322 return 0;
323}
324
Thierry Redingc40f0f12013-10-10 11:00:33 +0200325int tegra_drm_submit(struct tegra_drm_context *context,
326 struct drm_tegra_submit *args, struct drm_device *drm,
327 struct drm_file *file)
328{
329 unsigned int num_cmdbufs = args->num_cmdbufs;
330 unsigned int num_relocs = args->num_relocs;
331 unsigned int num_waitchks = args->num_waitchks;
332 struct drm_tegra_cmdbuf __user *cmdbufs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100333 (void __user *)(uintptr_t)args->cmdbufs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200334 struct drm_tegra_reloc __user *relocs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100335 (void __user *)(uintptr_t)args->relocs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200336 struct drm_tegra_waitchk __user *waitchks =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100337 (void __user *)(uintptr_t)args->waitchks;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200338 struct drm_tegra_syncpt syncpt;
339 struct host1x_job *job;
340 int err;
341
342 /* We don't yet support other than one syncpt_incr struct per submit */
343 if (args->num_syncpts != 1)
344 return -EINVAL;
345
346 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
347 args->num_relocs, args->num_waitchks);
348 if (!job)
349 return -ENOMEM;
350
351 job->num_relocs = args->num_relocs;
352 job->num_waitchk = args->num_waitchks;
353 job->client = (u32)args->context;
354 job->class = context->client->base.class;
355 job->serialize = true;
356
357 while (num_cmdbufs) {
358 struct drm_tegra_cmdbuf cmdbuf;
359 struct host1x_bo *bo;
360
Dan Carpenter9a991602013-11-08 13:07:37 +0300361 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
362 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200363 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300364 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200365
366 bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
367 if (!bo) {
368 err = -ENOENT;
369 goto fail;
370 }
371
372 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
373 num_cmdbufs--;
374 cmdbufs++;
375 }
376
Thierry Reding961e3be2014-06-10 10:25:00 +0200377 /* copy and resolve relocations from submit */
Thierry Redingc40f0f12013-10-10 11:00:33 +0200378 while (num_relocs--) {
Thierry Reding961e3be2014-06-10 10:25:00 +0200379 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
380 &relocs[num_relocs], drm,
381 file);
382 if (err < 0)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200383 goto fail;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200384 }
385
Dan Carpenter9a991602013-11-08 13:07:37 +0300386 if (copy_from_user(job->waitchk, waitchks,
387 sizeof(*waitchks) * num_waitchks)) {
388 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200389 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300390 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200391
Dan Carpenter9a991602013-11-08 13:07:37 +0300392 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
393 sizeof(syncpt))) {
394 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200395 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300396 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200397
398 job->is_addr_reg = context->client->ops->is_addr_reg;
399 job->syncpt_incrs = syncpt.incrs;
400 job->syncpt_id = syncpt.id;
401 job->timeout = 10000;
402
403 if (args->timeout && args->timeout < 10000)
404 job->timeout = args->timeout;
405
406 err = host1x_job_pin(job, context->client->base.dev);
407 if (err)
408 goto fail;
409
410 err = host1x_job_submit(job);
411 if (err)
412 goto fail_submit;
413
414 args->fence = job->syncpt_end;
415
416 host1x_job_put(job);
417 return 0;
418
419fail_submit:
420 host1x_job_unpin(job);
421fail:
422 host1x_job_put(job);
423 return err;
424}
425
426
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200427#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingc88c3632013-09-26 16:08:22 +0200428static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200429{
Thierry Redingc88c3632013-09-26 16:08:22 +0200430 return (struct tegra_drm_context *)(uintptr_t)context;
431}
432
433static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
434 struct tegra_drm_context *context)
435{
436 struct tegra_drm_context *ctx;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200437
438 list_for_each_entry(ctx, &file->contexts, list)
439 if (ctx == context)
440 return true;
441
442 return false;
443}
444
445static int tegra_gem_create(struct drm_device *drm, void *data,
446 struct drm_file *file)
447{
448 struct drm_tegra_gem_create *args = data;
449 struct tegra_bo *bo;
450
Thierry Reding773af772013-10-04 22:34:01 +0200451 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200452 &args->handle);
453 if (IS_ERR(bo))
454 return PTR_ERR(bo);
455
456 return 0;
457}
458
459static int tegra_gem_mmap(struct drm_device *drm, void *data,
460 struct drm_file *file)
461{
462 struct drm_tegra_gem_mmap *args = data;
463 struct drm_gem_object *gem;
464 struct tegra_bo *bo;
465
466 gem = drm_gem_object_lookup(drm, file, args->handle);
467 if (!gem)
468 return -EINVAL;
469
470 bo = to_tegra_bo(gem);
471
David Herrmann2bc7b0c2013-08-13 14:19:58 +0200472 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200473
Daniel Vetter11533302015-11-23 10:32:40 +0100474 drm_gem_object_unreference_unlocked(gem);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200475
476 return 0;
477}
478
479static int tegra_syncpt_read(struct drm_device *drm, void *data,
480 struct drm_file *file)
481{
Thierry Reding776dc382013-10-14 14:43:22 +0200482 struct host1x *host = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200483 struct drm_tegra_syncpt_read *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200484 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200485
Thierry Reding776dc382013-10-14 14:43:22 +0200486 sp = host1x_syncpt_get(host, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200487 if (!sp)
488 return -EINVAL;
489
490 args->value = host1x_syncpt_read_min(sp);
491 return 0;
492}
493
494static int tegra_syncpt_incr(struct drm_device *drm, void *data,
495 struct drm_file *file)
496{
Thierry Reding776dc382013-10-14 14:43:22 +0200497 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200498 struct drm_tegra_syncpt_incr *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200499 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200500
Thierry Reding776dc382013-10-14 14:43:22 +0200501 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200502 if (!sp)
503 return -EINVAL;
504
Arto Merilainenebae30b2013-05-29 13:26:08 +0300505 return host1x_syncpt_incr(sp);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200506}
507
508static int tegra_syncpt_wait(struct drm_device *drm, void *data,
509 struct drm_file *file)
510{
Thierry Reding776dc382013-10-14 14:43:22 +0200511 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200512 struct drm_tegra_syncpt_wait *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200513 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200514
Thierry Reding776dc382013-10-14 14:43:22 +0200515 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200516 if (!sp)
517 return -EINVAL;
518
519 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
520 &args->value);
521}
522
523static int tegra_open_channel(struct drm_device *drm, void *data,
524 struct drm_file *file)
525{
Thierry Reding08943e62013-09-26 16:08:18 +0200526 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding386a2a72013-09-24 13:22:17 +0200527 struct tegra_drm *tegra = drm->dev_private;
528 struct drm_tegra_open_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200529 struct tegra_drm_context *context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200530 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200531 int err = -ENODEV;
532
533 context = kzalloc(sizeof(*context), GFP_KERNEL);
534 if (!context)
535 return -ENOMEM;
536
Thierry Reding776dc382013-10-14 14:43:22 +0200537 list_for_each_entry(client, &tegra->clients, list)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200538 if (client->base.class == args->client) {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200539 err = client->ops->open_channel(client, context);
540 if (err)
541 break;
542
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200543 list_add(&context->list, &fpriv->contexts);
544 args->context = (uintptr_t)context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200545 context->client = client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200546 return 0;
547 }
548
549 kfree(context);
550 return err;
551}
552
553static int tegra_close_channel(struct drm_device *drm, void *data,
554 struct drm_file *file)
555{
Thierry Reding08943e62013-09-26 16:08:18 +0200556 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding776dc382013-10-14 14:43:22 +0200557 struct drm_tegra_close_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200558 struct tegra_drm_context *context;
559
560 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200561
Thierry Reding08943e62013-09-26 16:08:18 +0200562 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200563 return -EINVAL;
564
565 list_del(&context->list);
Thierry Redingc88c3632013-09-26 16:08:22 +0200566 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200567
568 return 0;
569}
570
571static int tegra_get_syncpt(struct drm_device *drm, void *data,
572 struct drm_file *file)
573{
Thierry Reding08943e62013-09-26 16:08:18 +0200574 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200575 struct drm_tegra_get_syncpt *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200576 struct tegra_drm_context *context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200577 struct host1x_syncpt *syncpt;
578
Thierry Redingc88c3632013-09-26 16:08:22 +0200579 context = tegra_drm_get_context(args->context);
580
Thierry Reding08943e62013-09-26 16:08:18 +0200581 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200582 return -ENODEV;
583
Thierry Reding53fa7f72013-09-24 15:35:40 +0200584 if (args->index >= context->client->base.num_syncpts)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200585 return -EINVAL;
586
Thierry Reding53fa7f72013-09-24 15:35:40 +0200587 syncpt = context->client->base.syncpts[args->index];
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200588 args->id = host1x_syncpt_id(syncpt);
589
590 return 0;
591}
592
593static int tegra_submit(struct drm_device *drm, void *data,
594 struct drm_file *file)
595{
Thierry Reding08943e62013-09-26 16:08:18 +0200596 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200597 struct drm_tegra_submit *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200598 struct tegra_drm_context *context;
599
600 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200601
Thierry Reding08943e62013-09-26 16:08:18 +0200602 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200603 return -ENODEV;
604
605 return context->client->ops->submit(context, args, drm, file);
606}
Arto Merilainenc54a1692013-10-14 15:21:54 +0300607
608static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
609 struct drm_file *file)
610{
611 struct tegra_drm_file *fpriv = file->driver_priv;
612 struct drm_tegra_get_syncpt_base *args = data;
613 struct tegra_drm_context *context;
614 struct host1x_syncpt_base *base;
615 struct host1x_syncpt *syncpt;
616
617 context = tegra_drm_get_context(args->context);
618
619 if (!tegra_drm_file_owns_context(fpriv, context))
620 return -ENODEV;
621
622 if (args->syncpt >= context->client->base.num_syncpts)
623 return -EINVAL;
624
625 syncpt = context->client->base.syncpts[args->syncpt];
626
627 base = host1x_syncpt_get_base(syncpt);
628 if (!base)
629 return -ENXIO;
630
631 args->id = host1x_syncpt_base_id(base);
632
633 return 0;
634}
Thierry Reding7678d712014-06-03 14:56:57 +0200635
636static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
637 struct drm_file *file)
638{
639 struct drm_tegra_gem_set_tiling *args = data;
640 enum tegra_bo_tiling_mode mode;
641 struct drm_gem_object *gem;
642 unsigned long value = 0;
643 struct tegra_bo *bo;
644
645 switch (args->mode) {
646 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
647 mode = TEGRA_BO_TILING_MODE_PITCH;
648
649 if (args->value != 0)
650 return -EINVAL;
651
652 break;
653
654 case DRM_TEGRA_GEM_TILING_MODE_TILED:
655 mode = TEGRA_BO_TILING_MODE_TILED;
656
657 if (args->value != 0)
658 return -EINVAL;
659
660 break;
661
662 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
663 mode = TEGRA_BO_TILING_MODE_BLOCK;
664
665 if (args->value > 5)
666 return -EINVAL;
667
668 value = args->value;
669 break;
670
671 default:
672 return -EINVAL;
673 }
674
675 gem = drm_gem_object_lookup(drm, file, args->handle);
676 if (!gem)
677 return -ENOENT;
678
679 bo = to_tegra_bo(gem);
680
681 bo->tiling.mode = mode;
682 bo->tiling.value = value;
683
Daniel Vetter11533302015-11-23 10:32:40 +0100684 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200685
686 return 0;
687}
688
689static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
690 struct drm_file *file)
691{
692 struct drm_tegra_gem_get_tiling *args = data;
693 struct drm_gem_object *gem;
694 struct tegra_bo *bo;
695 int err = 0;
696
697 gem = drm_gem_object_lookup(drm, file, args->handle);
698 if (!gem)
699 return -ENOENT;
700
701 bo = to_tegra_bo(gem);
702
703 switch (bo->tiling.mode) {
704 case TEGRA_BO_TILING_MODE_PITCH:
705 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
706 args->value = 0;
707 break;
708
709 case TEGRA_BO_TILING_MODE_TILED:
710 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
711 args->value = 0;
712 break;
713
714 case TEGRA_BO_TILING_MODE_BLOCK:
715 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
716 args->value = bo->tiling.value;
717 break;
718
719 default:
720 err = -EINVAL;
721 break;
722 }
723
Daniel Vetter11533302015-11-23 10:32:40 +0100724 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200725
726 return err;
727}
Thierry Reding7b129082014-06-10 12:04:03 +0200728
729static int tegra_gem_set_flags(struct drm_device *drm, void *data,
730 struct drm_file *file)
731{
732 struct drm_tegra_gem_set_flags *args = data;
733 struct drm_gem_object *gem;
734 struct tegra_bo *bo;
735
736 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
737 return -EINVAL;
738
739 gem = drm_gem_object_lookup(drm, file, args->handle);
740 if (!gem)
741 return -ENOENT;
742
743 bo = to_tegra_bo(gem);
744 bo->flags = 0;
745
746 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
747 bo->flags |= TEGRA_BO_BOTTOM_UP;
748
Daniel Vetter11533302015-11-23 10:32:40 +0100749 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200750
751 return 0;
752}
753
754static int tegra_gem_get_flags(struct drm_device *drm, void *data,
755 struct drm_file *file)
756{
757 struct drm_tegra_gem_get_flags *args = data;
758 struct drm_gem_object *gem;
759 struct tegra_bo *bo;
760
761 gem = drm_gem_object_lookup(drm, file, args->handle);
762 if (!gem)
763 return -ENOENT;
764
765 bo = to_tegra_bo(gem);
766 args->flags = 0;
767
768 if (bo->flags & TEGRA_BO_BOTTOM_UP)
769 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
770
Daniel Vetter11533302015-11-23 10:32:40 +0100771 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200772
773 return 0;
774}
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200775#endif
776
Rob Clarkbaa70942013-08-02 13:27:49 -0400777static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200778#ifdef CONFIG_DRM_TEGRA_STAGING
Daniel Vetterf8c47142015-09-08 13:56:30 +0200779 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
780 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
781 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
782 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
783 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
784 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
785 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
786 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
787 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
788 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
789 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
790 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
791 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
792 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200793#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000794};
795
796static const struct file_operations tegra_drm_fops = {
797 .owner = THIS_MODULE,
798 .open = drm_open,
799 .release = drm_release,
800 .unlocked_ioctl = drm_ioctl,
Arto Merilainende2ba662013-03-22 16:34:08 +0200801 .mmap = tegra_drm_mmap,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000802 .poll = drm_poll,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000803 .read = drm_read,
804#ifdef CONFIG_COMPAT
805 .compat_ioctl = drm_compat_ioctl,
806#endif
807 .llseek = noop_llseek,
808};
809
Thierry Redinged7dae52014-12-16 16:03:13 +0100810static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
811 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100812{
813 struct drm_crtc *crtc;
814
815 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
Thierry Redinged7dae52014-12-16 16:03:13 +0100816 if (pipe == drm_crtc_index(crtc))
Thierry Reding6e5ff992012-11-28 11:45:47 +0100817 return crtc;
818 }
819
820 return NULL;
821}
822
Thierry Reding88e72712015-09-24 18:35:31 +0200823static u32 tegra_drm_get_vblank_counter(struct drm_device *drm,
824 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100825{
Thierry Redinged7dae52014-12-16 16:03:13 +0100826 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
Thierry Reding42e9ce02015-01-28 14:43:05 +0100827 struct tegra_dc *dc = to_tegra_dc(crtc);
Thierry Redinged7dae52014-12-16 16:03:13 +0100828
829 if (!crtc)
830 return 0;
831
Thierry Reding42e9ce02015-01-28 14:43:05 +0100832 return tegra_dc_get_vblank_counter(dc);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100833}
834
Thierry Reding88e72712015-09-24 18:35:31 +0200835static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100836{
837 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
838 struct tegra_dc *dc = to_tegra_dc(crtc);
839
840 if (!crtc)
841 return -ENODEV;
842
843 tegra_dc_enable_vblank(dc);
844
845 return 0;
846}
847
Thierry Reding88e72712015-09-24 18:35:31 +0200848static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100849{
850 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
851 struct tegra_dc *dc = to_tegra_dc(crtc);
852
853 if (crtc)
854 tegra_dc_disable_vblank(dc);
855}
856
Thierry Reding3c03c462012-11-28 12:00:18 +0100857static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
858{
Thierry Reding08943e62013-09-26 16:08:18 +0200859 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Redingc88c3632013-09-26 16:08:22 +0200860 struct tegra_drm_context *context, *tmp;
Thierry Reding3c03c462012-11-28 12:00:18 +0100861
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200862 list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
Thierry Redingc88c3632013-09-26 16:08:22 +0200863 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200864
865 kfree(fpriv);
Thierry Reding3c03c462012-11-28 12:00:18 +0100866}
867
Thierry Redinge450fcc2013-02-13 16:13:16 +0100868#ifdef CONFIG_DEBUG_FS
869static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
870{
871 struct drm_info_node *node = (struct drm_info_node *)s->private;
872 struct drm_device *drm = node->minor->dev;
873 struct drm_framebuffer *fb;
874
875 mutex_lock(&drm->mode_config.fb_lock);
876
877 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
878 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
879 fb->base.id, fb->width, fb->height, fb->depth,
880 fb->bits_per_pixel,
Dave Airlie747a5982016-04-15 15:10:35 +1000881 drm_framebuffer_read_refcount(fb));
Thierry Redinge450fcc2013-02-13 16:13:16 +0100882 }
883
884 mutex_unlock(&drm->mode_config.fb_lock);
885
886 return 0;
887}
888
Thierry Reding28c23372015-01-23 09:16:03 +0100889static int tegra_debugfs_iova(struct seq_file *s, void *data)
890{
891 struct drm_info_node *node = (struct drm_info_node *)s->private;
892 struct drm_device *drm = node->minor->dev;
893 struct tegra_drm *tegra = drm->dev_private;
894
895 return drm_mm_dump_table(s, &tegra->mm);
896}
897
Thierry Redinge450fcc2013-02-13 16:13:16 +0100898static struct drm_info_list tegra_debugfs_list[] = {
899 { "framebuffers", tegra_debugfs_framebuffers, 0 },
Thierry Reding28c23372015-01-23 09:16:03 +0100900 { "iova", tegra_debugfs_iova, 0 },
Thierry Redinge450fcc2013-02-13 16:13:16 +0100901};
902
903static int tegra_debugfs_init(struct drm_minor *minor)
904{
905 return drm_debugfs_create_files(tegra_debugfs_list,
906 ARRAY_SIZE(tegra_debugfs_list),
907 minor->debugfs_root, minor);
908}
909
910static void tegra_debugfs_cleanup(struct drm_minor *minor)
911{
912 drm_debugfs_remove_files(tegra_debugfs_list,
913 ARRAY_SIZE(tegra_debugfs_list), minor);
914}
915#endif
916
Thierry Reding9b57f5f2013-11-08 13:17:14 +0100917static struct drm_driver tegra_drm_driver = {
Thierry Redingad906592015-09-24 18:38:09 +0200918 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
919 DRIVER_ATOMIC,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000920 .load = tegra_drm_load,
921 .unload = tegra_drm_unload,
922 .open = tegra_drm_open,
Thierry Reding3c03c462012-11-28 12:00:18 +0100923 .preclose = tegra_drm_preclose,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000924 .lastclose = tegra_drm_lastclose,
925
Thierry Reding6e5ff992012-11-28 11:45:47 +0100926 .get_vblank_counter = tegra_drm_get_vblank_counter,
927 .enable_vblank = tegra_drm_enable_vblank,
928 .disable_vblank = tegra_drm_disable_vblank,
929
Thierry Redinge450fcc2013-02-13 16:13:16 +0100930#if defined(CONFIG_DEBUG_FS)
931 .debugfs_init = tegra_debugfs_init,
932 .debugfs_cleanup = tegra_debugfs_cleanup,
933#endif
934
Arto Merilainende2ba662013-03-22 16:34:08 +0200935 .gem_free_object = tegra_bo_free_object,
936 .gem_vm_ops = &tegra_bo_vm_ops,
Thierry Reding38003912013-12-12 10:00:43 +0100937
938 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
939 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
940 .gem_prime_export = tegra_gem_prime_export,
941 .gem_prime_import = tegra_gem_prime_import,
942
Arto Merilainende2ba662013-03-22 16:34:08 +0200943 .dumb_create = tegra_bo_dumb_create,
944 .dumb_map_offset = tegra_bo_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200945 .dumb_destroy = drm_gem_dumb_destroy,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000946
947 .ioctls = tegra_drm_ioctls,
948 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
949 .fops = &tegra_drm_fops,
950
951 .name = DRIVER_NAME,
952 .desc = DRIVER_DESC,
953 .date = DRIVER_DATE,
954 .major = DRIVER_MAJOR,
955 .minor = DRIVER_MINOR,
956 .patchlevel = DRIVER_PATCHLEVEL,
957};
Thierry Reding776dc382013-10-14 14:43:22 +0200958
959int tegra_drm_register_client(struct tegra_drm *tegra,
960 struct tegra_drm_client *client)
961{
962 mutex_lock(&tegra->clients_lock);
963 list_add_tail(&client->list, &tegra->clients);
964 mutex_unlock(&tegra->clients_lock);
965
966 return 0;
967}
968
969int tegra_drm_unregister_client(struct tegra_drm *tegra,
970 struct tegra_drm_client *client)
971{
972 mutex_lock(&tegra->clients_lock);
973 list_del_init(&client->list);
974 mutex_unlock(&tegra->clients_lock);
975
976 return 0;
977}
978
Thierry Reding9910f5c2014-05-22 09:57:15 +0200979static int host1x_drm_probe(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +0200980{
Thierry Reding9910f5c2014-05-22 09:57:15 +0200981 struct drm_driver *driver = &tegra_drm_driver;
982 struct drm_device *drm;
983 int err;
984
985 drm = drm_dev_alloc(driver, &dev->dev);
986 if (!drm)
987 return -ENOMEM;
988
Thierry Reding9910f5c2014-05-22 09:57:15 +0200989 dev_set_drvdata(&dev->dev, drm);
990
991 err = drm_dev_register(drm, 0);
992 if (err < 0)
993 goto unref;
994
995 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
996 driver->major, driver->minor, driver->patchlevel,
997 driver->date, drm->primary->index);
998
999 return 0;
1000
1001unref:
1002 drm_dev_unref(drm);
1003 return err;
Thierry Reding776dc382013-10-14 14:43:22 +02001004}
1005
Thierry Reding9910f5c2014-05-22 09:57:15 +02001006static int host1x_drm_remove(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001007{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001008 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1009
1010 drm_dev_unregister(drm);
1011 drm_dev_unref(drm);
Thierry Reding776dc382013-10-14 14:43:22 +02001012
1013 return 0;
1014}
1015
Thierry Reding359ae682014-12-18 17:15:25 +01001016#ifdef CONFIG_PM_SLEEP
1017static int host1x_drm_suspend(struct device *dev)
1018{
1019 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001020 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001021
1022 drm_kms_helper_poll_disable(drm);
Thierry Reding986c58d2015-08-11 13:11:49 +02001023 tegra_drm_fb_suspend(drm);
1024
1025 tegra->state = drm_atomic_helper_suspend(drm);
1026 if (IS_ERR(tegra->state)) {
1027 tegra_drm_fb_resume(drm);
1028 drm_kms_helper_poll_enable(drm);
1029 return PTR_ERR(tegra->state);
1030 }
Thierry Reding359ae682014-12-18 17:15:25 +01001031
1032 return 0;
1033}
1034
1035static int host1x_drm_resume(struct device *dev)
1036{
1037 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001038 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001039
Thierry Reding986c58d2015-08-11 13:11:49 +02001040 drm_atomic_helper_resume(drm, tegra->state);
1041 tegra_drm_fb_resume(drm);
Thierry Reding359ae682014-12-18 17:15:25 +01001042 drm_kms_helper_poll_enable(drm);
1043
1044 return 0;
1045}
1046#endif
1047
Thierry Redinga13f1dc2015-08-11 13:22:44 +02001048static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1049 host1x_drm_resume);
Thierry Reding359ae682014-12-18 17:15:25 +01001050
Thierry Reding776dc382013-10-14 14:43:22 +02001051static const struct of_device_id host1x_drm_subdevs[] = {
1052 { .compatible = "nvidia,tegra20-dc", },
1053 { .compatible = "nvidia,tegra20-hdmi", },
1054 { .compatible = "nvidia,tegra20-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001055 { .compatible = "nvidia,tegra20-gr3d", },
Thierry Reding776dc382013-10-14 14:43:22 +02001056 { .compatible = "nvidia,tegra30-dc", },
1057 { .compatible = "nvidia,tegra30-hdmi", },
1058 { .compatible = "nvidia,tegra30-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001059 { .compatible = "nvidia,tegra30-gr3d", },
Thierry Redingdec72732013-09-03 08:45:46 +02001060 { .compatible = "nvidia,tegra114-dsi", },
Mikko Perttunen7d1d28a2013-09-30 16:54:47 +02001061 { .compatible = "nvidia,tegra114-hdmi", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001062 { .compatible = "nvidia,tegra114-gr3d", },
Thierry Reding8620fc62013-12-12 11:03:59 +01001063 { .compatible = "nvidia,tegra124-dc", },
Thierry Reding6b6b6042013-11-15 16:06:05 +01001064 { .compatible = "nvidia,tegra124-sor", },
Thierry Redingfb7be702013-11-15 16:07:32 +01001065 { .compatible = "nvidia,tegra124-hdmi", },
Thierry Reding7d338582015-04-10 11:35:21 +02001066 { .compatible = "nvidia,tegra124-dsi", },
Thierry Redingc06c7932015-04-10 11:35:21 +02001067 { .compatible = "nvidia,tegra132-dsi", },
Thierry Reding5b4f5162015-03-27 10:31:58 +01001068 { .compatible = "nvidia,tegra210-dc", },
Thierry Redingddfb4062015-04-08 16:56:22 +02001069 { .compatible = "nvidia,tegra210-dsi", },
Thierry Reding3309ac82015-07-30 10:32:46 +02001070 { .compatible = "nvidia,tegra210-sor", },
Thierry Reding459cc2c2015-07-30 10:34:24 +02001071 { .compatible = "nvidia,tegra210-sor1", },
Thierry Reding776dc382013-10-14 14:43:22 +02001072 { /* sentinel */ }
1073};
1074
1075static struct host1x_driver host1x_drm_driver = {
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001076 .driver = {
1077 .name = "drm",
Thierry Reding359ae682014-12-18 17:15:25 +01001078 .pm = &host1x_drm_pm_ops,
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001079 },
Thierry Reding776dc382013-10-14 14:43:22 +02001080 .probe = host1x_drm_probe,
1081 .remove = host1x_drm_remove,
1082 .subdevs = host1x_drm_subdevs,
1083};
1084
Thierry Reding473112e2015-09-10 16:07:14 +02001085static struct platform_driver * const drivers[] = {
1086 &tegra_dc_driver,
1087 &tegra_hdmi_driver,
1088 &tegra_dsi_driver,
1089 &tegra_dpaux_driver,
1090 &tegra_sor_driver,
1091 &tegra_gr2d_driver,
1092 &tegra_gr3d_driver,
1093};
1094
Thierry Reding776dc382013-10-14 14:43:22 +02001095static int __init host1x_drm_init(void)
1096{
1097 int err;
1098
1099 err = host1x_driver_register(&host1x_drm_driver);
1100 if (err < 0)
1101 return err;
1102
Thierry Reding473112e2015-09-10 16:07:14 +02001103 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001104 if (err < 0)
1105 goto unregister_host1x;
1106
Thierry Reding776dc382013-10-14 14:43:22 +02001107 return 0;
1108
Thierry Reding776dc382013-10-14 14:43:22 +02001109unregister_host1x:
1110 host1x_driver_unregister(&host1x_drm_driver);
1111 return err;
1112}
1113module_init(host1x_drm_init);
1114
1115static void __exit host1x_drm_exit(void)
1116{
Thierry Reding473112e2015-09-10 16:07:14 +02001117 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001118 host1x_driver_unregister(&host1x_drm_driver);
1119}
1120module_exit(host1x_drm_exit);
1121
1122MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1123MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1124MODULE_LICENSE("GPL v2");