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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200150 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Raed Salem16f1c5b2017-07-30 11:02:51 +0300330 u8 log_max_flow_counter[0x8];
331 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 log_max_flow[0x8];
333
Matan Barakb4ff3a32016-02-09 14:57:42 +0200334 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335
336 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
339};
340
341struct mlx5_ifc_odp_per_transport_service_cap_bits {
342 u8 send[0x1];
343 u8 receive[0x1];
344 u8 write[0x1];
345 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200346 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300347 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349};
350
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200351struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353
354 u8 ipv4[0x20];
355};
356
357struct mlx5_ifc_ipv6_layout_bits {
358 u8 ipv6[16][0x8];
359};
360
361union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
362 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
363 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200364 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200365};
366
Saeed Mahameede2816822015-05-28 22:28:40 +0300367struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
368 u8 smac_47_16[0x20];
369
370 u8 smac_15_0[0x10];
371 u8 ethertype[0x10];
372
373 u8 dmac_47_16[0x20];
374
375 u8 dmac_15_0[0x10];
376 u8 first_prio[0x3];
377 u8 first_cfi[0x1];
378 u8 first_vid[0xc];
379
380 u8 ip_protocol[0x8];
381 u8 ip_dscp[0x6];
382 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300383 u8 cvlan_tag[0x1];
384 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300385 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300386 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 tcp_flags[0x9];
388
389 u8 tcp_sport[0x10];
390 u8 tcp_dport[0x10];
391
Or Gerlitza8ade552017-06-07 17:49:56 +0300392 u8 reserved_at_c0[0x18];
393 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300394
395 u8 udp_sport[0x10];
396 u8 udp_dport[0x10];
397
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200398 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401};
402
403struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300404 u8 reserved_at_0[0x8];
405 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300406
Matan Barakb4ff3a32016-02-09 14:57:42 +0200407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408 u8 source_port[0x10];
409
410 u8 outer_second_prio[0x3];
411 u8 outer_second_cfi[0x1];
412 u8 outer_second_vid[0xc];
413 u8 inner_second_prio[0x3];
414 u8 inner_second_cfi[0x1];
415 u8 inner_second_vid[0xc];
416
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300417 u8 outer_second_cvlan_tag[0x1];
418 u8 inner_second_cvlan_tag[0x1];
419 u8 outer_second_svlan_tag[0x1];
420 u8 inner_second_svlan_tag[0x1];
421 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300422 u8 gre_protocol[0x10];
423
424 u8 gre_key_h[0x18];
425 u8 gre_key_l[0x8];
426
427 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 outer_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436 u8 inner_ipv6_flow_label[0x14];
437
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300438 u8 reserved_at_120[0x28];
439 u8 bth_dst_qp[0x18];
440 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300441};
442
443struct mlx5_ifc_cmd_pas_bits {
444 u8 pa_h[0x20];
445
446 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200447 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300448};
449
450struct mlx5_ifc_uint64_bits {
451 u8 hi[0x20];
452
453 u8 lo[0x20];
454};
455
456enum {
457 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
458 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
459 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
460 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
461 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
462 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
463 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
464 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
465 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
466 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
467};
468
469struct mlx5_ifc_ads_bits {
470 u8 fl[0x1];
471 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 pkey_index[0x10];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 grh[0x1];
477 u8 mlid[0x7];
478 u8 rlid[0x10];
479
480 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 stat_rate[0x4];
485 u8 hop_limit[0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 tclass[0x8];
489 u8 flow_label[0x14];
490
491 u8 rgid_rip[16][0x8];
492
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 f_dscp[0x1];
495 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200496 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300497 u8 f_eth_prio[0x1];
498 u8 ecn[0x2];
499 u8 dscp[0x6];
500 u8 udp_sport[0x10];
501
502 u8 dei_cfi[0x1];
503 u8 eth_prio[0x3];
504 u8 sl[0x4];
505 u8 port[0x8];
506 u8 rmac_47_32[0x10];
507
508 u8 rmac_31_0[0x20];
509};
510
511struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200512 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300513 u8 nic_rx_multi_path_tirs_fts[0x1];
514 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
515 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
524
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530};
531
Saeed Mahameed495716b2015-12-01 18:03:19 +0200532struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
536
537 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
540
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542};
543
Saeed Mahameedd6666752015-12-01 18:03:22 +0200544struct mlx5_ifc_e_switch_cap_bits {
545 u8 vport_svlan_strip[0x1];
546 u8 vport_cvlan_strip[0x1];
547 u8 vport_svlan_insert[0x1];
548 u8 vport_cvlan_insert_if_not_exist[0x1];
549 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300550 u8 reserved_at_5[0x19];
551 u8 nic_vport_node_guid_modify[0x1];
552 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200553
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300554 u8 vxlan_encap_decap[0x1];
555 u8 nvgre_encap_decap[0x1];
556 u8 reserved_at_22[0x9];
557 u8 log_max_encap_headers[0x5];
558 u8 reserved_2b[0x6];
559 u8 max_encap_header_size[0xa];
560
561 u8 reserved_40[0x7c0];
562
Saeed Mahameedd6666752015-12-01 18:03:22 +0200563};
564
Saeed Mahameed74862162016-06-09 15:11:34 +0300565struct mlx5_ifc_qos_cap_bits {
566 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300567 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200568 u8 esw_bw_share[0x1];
569 u8 esw_rate_limit[0x1];
570 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_20[0x20];
573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300577
578 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 esw_element_type[0x10];
582 u8 esw_tsar_type[0x10];
583
584 u8 reserved_at_c0[0x10];
585 u8 max_qos_para_vport[0x10];
586
587 u8 max_tsar_bw_share[0x20];
588
589 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300590};
591
Saeed Mahameede2816822015-05-28 22:28:40 +0300592struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
593 u8 csum_cap[0x1];
594 u8 vlan_cap[0x1];
595 u8 lro_cap[0x1];
596 u8 lro_psh_flag[0x1];
597 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200598 u8 reserved_at_5[0x2];
599 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200600 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200603 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300604 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300606 u8 reg_umr_sq[0x1];
607 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300608 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300611 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 tunnel_stateless_vxlan[0x1];
613
Ilan Tayari547eede2017-04-18 16:04:28 +0300614 u8 swp[0x1];
615 u8 swp_csum[0x1];
616 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300617 u8 reserved_at_23[0x1b];
618 u8 max_geneve_opt_len[0x1];
619 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622 u8 lro_min_mss_size[0x10];
623
Matan Barakb4ff3a32016-02-09 14:57:42 +0200624 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300625
626 u8 lro_timer_supported_periods[4][0x20];
627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629};
630
631struct mlx5_ifc_roce_cap_bits {
632 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200633 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 roce_version[0x8];
641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643 u8 r_roce_dest_udp_port[0x10];
644
645 u8 r_roce_max_src_udp_port[0x10];
646 u8 r_roce_min_src_udp_port[0x10];
647
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649 u8 roce_address_table_size[0x10];
650
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652};
653
654enum {
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
664};
665
666enum {
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
676};
677
678struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Or Gerlitzbd108382017-05-28 15:24:17 +0300681 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300683 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200690 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691
Matan Barakb4ff3a32016-02-09 14:57:42 +0200692 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200693 u8 atomic_size_qp[0x10];
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696 u8 atomic_size_dc[0x10];
697
Matan Barakb4ff3a32016-02-09 14:57:42 +0200698 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699};
700
701struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703
704 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708
709 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
710
711 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
712
713 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
714
Matan Barakb4ff3a32016-02-09 14:57:42 +0200715 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300716};
717
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200718struct mlx5_ifc_calc_op {
719 u8 reserved_at_0[0x10];
720 u8 reserved_at_10[0x9];
721 u8 op_swap_endianness[0x1];
722 u8 op_min[0x1];
723 u8 op_xor[0x1];
724 u8 op_or[0x1];
725 u8 op_and[0x1];
726 u8 op_max[0x1];
727 u8 op_add[0x1];
728};
729
730struct mlx5_ifc_vector_calc_cap_bits {
731 u8 calc_matrix[0x1];
732 u8 reserved_at_1[0x1f];
733 u8 reserved_at_20[0x8];
734 u8 max_vec_count[0x8];
735 u8 reserved_at_30[0xd];
736 u8 max_chunk_size[0x3];
737 struct mlx5_ifc_calc_op calc0;
738 struct mlx5_ifc_calc_op calc1;
739 struct mlx5_ifc_calc_op calc2;
740 struct mlx5_ifc_calc_op calc3;
741
742 u8 reserved_at_e0[0x720];
743};
744
Saeed Mahameede2816822015-05-28 22:28:40 +0300745enum {
746 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
747 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300748 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300749 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300750};
751
752enum {
753 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
754 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
755};
756
757enum {
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
759 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
760 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
761 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
762 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
768 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
769 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
770 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
771 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
772};
773
774enum {
775 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
776 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
777};
778
779enum {
780 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
781 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
782 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
783};
784
785enum {
786 MLX5_CAP_PORT_TYPE_IB = 0x0,
787 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300788};
789
Max Gurtovoy1410a902017-05-28 10:53:10 +0300790enum {
791 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
792 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
793 MLX5_CAP_UMR_FENCE_NONE = 0x2,
794};
795
Eli Cohenb7755162014-10-02 12:19:44 +0300796struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300798
799 u8 log_max_srq_sz[0x8];
800 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_qp[0x5];
803
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300805 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300807
Matan Barakb4ff3a32016-02-09 14:57:42 +0200808 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200810 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300811 u8 log_max_cq[0x5];
812
813 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200814 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200816 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300817 u8 log_max_eq[0x4];
818
819 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200820 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200822 u8 force_teardown[0x1];
823 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200825 u8 umr_extended_translation_offset[0x1];
826 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_klm_list_size[0x6];
828
Matan Barakb4ff3a32016-02-09 14:57:42 +0200829 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300830 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_ra_res_dc[0x6];
833
Matan Barakb4ff3a32016-02-09 14:57:42 +0200834 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300835 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200836 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 log_max_ra_res_qp[0x6];
838
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200839 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300840 u8 cc_query_allowed[0x1];
841 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200842 u8 start_pad[0x1];
843 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500844 u8 reserved_at_165[0xa];
845 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300846 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300847
Saeed Mahameede2816822015-05-28 22:28:40 +0300848 u8 out_of_seq_cnt[0x1];
849 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300850 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300851 u8 reserved_at_183[0x1];
852 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300853 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300854 u8 max_qp_cnt[0xa];
855 u8 pkey_table_size[0x10];
856
Saeed Mahameede2816822015-05-28 22:28:40 +0300857 u8 vport_group_manager[0x1];
858 u8 vhca_group_manager[0x1];
859 u8 ib_virt[0x1];
860 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200861 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300862 u8 ets[0x1];
863 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200864 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300865 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200866 u8 mcam_reg[0x1];
867 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300868 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200869 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300870 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300871 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200872 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300873 u8 disable_link_up[0x1];
874 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300875 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300876 u8 num_ports[0x8];
877
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300878 u8 reserved_at_1c0[0x1];
879 u8 pps[0x1];
880 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300881 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300882 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200883 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300884 u8 reserved_at_1d0[0x1];
885 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300886 u8 general_notification_event[0x1];
887 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200888 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200889 u8 rol_s[0x1];
890 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300891 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200892 u8 wol_s[0x1];
893 u8 wol_g[0x1];
894 u8 wol_a[0x1];
895 u8 wol_b[0x1];
896 u8 wol_m[0x1];
897 u8 wol_u[0x1];
898 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300899
900 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300901 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300902 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300903
Saeed Mahameede2816822015-05-28 22:28:40 +0300904 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300905 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300906 u8 reserved_at_202[0x1];
907 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200908 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300909 u8 reserved_at_205[0x5];
910 u8 umr_fence[0x2];
911 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300912 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300913 u8 cmdif_checksum[0x2];
914 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300915 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300916 u8 wq_signature[0x1];
917 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300918 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300919 u8 sho[0x1];
920 u8 tph[0x1];
921 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300922 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300923 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300924 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 roce[0x1];
926 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300927 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928
929 u8 cq_oi[0x1];
930 u8 cq_resize[0x1];
931 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300932 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300933 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 pg[0x1];
935 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300937 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300938 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300939 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300940 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200942 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300943 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200944 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300945 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 qkv[0x1];
947 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200948 u8 set_deth_sqpn[0x1];
949 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300950 u8 xrc[0x1];
951 u8 ud[0x1];
952 u8 uc[0x1];
953 u8 rc[0x1];
954
Eli Cohena6d51b62017-01-03 23:55:23 +0200955 u8 uar_4k[0x1];
956 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300957 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300958 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300959 u8 log_pg_sz[0x8];
960
961 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200962 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300963 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300964 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300965 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300966
967 u8 reserved_at_270[0xb];
968 u8 lag_master[0x1];
969 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300970
Tariq Toukane1c9c622016-04-11 23:10:21 +0300971 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300972 u8 max_wqe_sz_sq[0x10];
973
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 max_wqe_sz_rq[0x10];
976
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300977 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 max_wqe_sz_sq_dc[0x10];
979
Tariq Toukane1c9c622016-04-11 23:10:21 +0300980 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 max_qp_mcg[0x19];
982
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 log_max_mcg[0x8];
985
Tariq Toukane1c9c622016-04-11 23:10:21 +0300986 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300987 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300988 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300989 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300990 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300991 u8 log_max_xrcd[0x5];
992
Amir Vadaia351a1b02016-07-14 10:32:38 +0300993 u8 reserved_at_340[0x8];
994 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300995 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300996
Eli Cohenb7755162014-10-02 12:19:44 +0300997
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001001 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001002 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001003 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001005 u8 log_max_tis[0x5];
1006
Saeed Mahameede2816822015-05-28 22:28:40 +03001007 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001015 u8 log_max_tis_per_sq[0x5];
1016
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001018 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001020 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001022 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001024 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001025
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001027 u8 log_max_wq_sz[0x5];
1028
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001029 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001030 u8 disable_local_lb[0x1];
1031 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001032 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001034 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001036 u8 log_max_current_uc_list[0x5];
1037
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001039
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001041 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001042 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001043 u8 log_uar_page_sz[0x10];
1044
Tariq Toukane1c9c622016-04-11 23:10:21 +03001045 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001046 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001047 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048
Eli Cohena6d51b62017-01-03 23:55:23 +02001049 u8 reserved_at_500[0x20];
1050 u8 num_of_uars_per_page[0x20];
1051 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001052
Guy Levi0ff8e792017-10-19 08:25:51 +03001053 u8 reserved_at_580[0x3d];
1054 u8 cqe_128_always[0x1];
1055 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001056 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001057
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001058 u8 cqe_compression_timeout[0x10];
1059 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001060
Saeed Mahameed74862162016-06-09 15:11:34 +03001061 u8 reserved_at_5e0[0x10];
1062 u8 tag_matching[0x1];
1063 u8 rndv_offload_rc[0x1];
1064 u8 rndv_offload_dc[0x1];
1065 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001066 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001067 u8 log_max_xrq[0x5];
1068
Max Gurtovoy7b135582017-01-02 11:37:38 +02001069 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001070};
1071
Saeed Mahameed81848732015-12-01 18:03:20 +02001072enum mlx5_flow_destination_type {
1073 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1074 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1075 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001076
1077 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001078};
1079
1080struct mlx5_ifc_dest_format_struct_bits {
1081 u8 destination_type[0x8];
1082 u8 destination_id[0x18];
1083
Matan Barakb4ff3a32016-02-09 14:57:42 +02001084 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001085};
1086
Amir Vadai9dc0b282016-05-13 12:55:39 +00001087struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001088 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001089
1090 u8 reserved_at_20[0x20];
1091};
1092
1093union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1094 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1095 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1096 u8 reserved_at_0[0x40];
1097};
1098
Saeed Mahameede2816822015-05-28 22:28:40 +03001099struct mlx5_ifc_fte_match_param_bits {
1100 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1101
1102 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1103
1104 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1105
Matan Barakb4ff3a32016-02-09 14:57:42 +02001106 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001107};
1108
1109enum {
1110 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1111 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1112 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1113 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1114 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1115};
1116
1117struct mlx5_ifc_rx_hash_field_select_bits {
1118 u8 l3_prot_type[0x1];
1119 u8 l4_prot_type[0x1];
1120 u8 selected_fields[0x1e];
1121};
1122
1123enum {
1124 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1125 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1126};
1127
1128enum {
1129 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1130 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1131};
1132
1133struct mlx5_ifc_wq_bits {
1134 u8 wq_type[0x4];
1135 u8 wq_signature[0x1];
1136 u8 end_padding_mode[0x2];
1137 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001138 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001139
1140 u8 hds_skip_first_sge[0x1];
1141 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001142 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001143 u8 page_offset[0x5];
1144 u8 lwm[0x10];
1145
Matan Barakb4ff3a32016-02-09 14:57:42 +02001146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001147 u8 pd[0x18];
1148
Matan Barakb4ff3a32016-02-09 14:57:42 +02001149 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001150 u8 uar_page[0x18];
1151
1152 u8 dbr_addr[0x40];
1153
1154 u8 hw_counter[0x20];
1155
1156 u8 sw_counter[0x20];
1157
Matan Barakb4ff3a32016-02-09 14:57:42 +02001158 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001159 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001160 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001161 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001162 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001163 u8 log_wq_sz[0x5];
1164
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001165 u8 reserved_at_120[0x15];
1166 u8 log_wqe_num_of_strides[0x3];
1167 u8 two_byte_shift_en[0x1];
1168 u8 reserved_at_139[0x4];
1169 u8 log_wqe_stride_size[0x3];
1170
1171 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001172
1173 struct mlx5_ifc_cmd_pas_bits pas[0];
1174};
1175
1176struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001177 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001178 u8 rq_num[0x18];
1179};
1180
1181struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183 u8 mac_addr_47_32[0x10];
1184
1185 u8 mac_addr_31_0[0x20];
1186};
1187
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001188struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001189 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001190 u8 vlan[0x0c];
1191
Matan Barakb4ff3a32016-02-09 14:57:42 +02001192 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001193};
1194
Saeed Mahameede2816822015-05-28 22:28:40 +03001195struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001196 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197
1198 u8 min_time_between_cnps[0x20];
1199
Matan Barakb4ff3a32016-02-09 14:57:42 +02001200 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001201 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001202 u8 reserved_at_d8[0x4];
1203 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001204 u8 cnp_802p_prio[0x3];
1205
Matan Barakb4ff3a32016-02-09 14:57:42 +02001206 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001207};
1208
1209struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001210 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001211
Matan Barakb4ff3a32016-02-09 14:57:42 +02001212 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001213 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001214 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001215 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001216 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001217
Matan Barakb4ff3a32016-02-09 14:57:42 +02001218 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001219
1220 u8 rpg_time_reset[0x20];
1221
1222 u8 rpg_byte_reset[0x20];
1223
1224 u8 rpg_threshold[0x20];
1225
1226 u8 rpg_max_rate[0x20];
1227
1228 u8 rpg_ai_rate[0x20];
1229
1230 u8 rpg_hai_rate[0x20];
1231
1232 u8 rpg_gd[0x20];
1233
1234 u8 rpg_min_dec_fac[0x20];
1235
1236 u8 rpg_min_rate[0x20];
1237
Matan Barakb4ff3a32016-02-09 14:57:42 +02001238 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001239
1240 u8 rate_to_set_on_first_cnp[0x20];
1241
1242 u8 dce_tcp_g[0x20];
1243
1244 u8 dce_tcp_rtt[0x20];
1245
1246 u8 rate_reduce_monitor_period[0x20];
1247
Matan Barakb4ff3a32016-02-09 14:57:42 +02001248 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001249
1250 u8 initial_alpha_value[0x20];
1251
Matan Barakb4ff3a32016-02-09 14:57:42 +02001252 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001253};
1254
1255struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001256 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001257
1258 u8 rppp_max_rps[0x20];
1259
1260 u8 rpg_time_reset[0x20];
1261
1262 u8 rpg_byte_reset[0x20];
1263
1264 u8 rpg_threshold[0x20];
1265
1266 u8 rpg_max_rate[0x20];
1267
1268 u8 rpg_ai_rate[0x20];
1269
1270 u8 rpg_hai_rate[0x20];
1271
1272 u8 rpg_gd[0x20];
1273
1274 u8 rpg_min_dec_fac[0x20];
1275
1276 u8 rpg_min_rate[0x20];
1277
Matan Barakb4ff3a32016-02-09 14:57:42 +02001278 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001279};
1280
1281enum {
1282 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1283 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1284 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1285};
1286
1287struct mlx5_ifc_resize_field_select_bits {
1288 u8 resize_field_select[0x20];
1289};
1290
1291enum {
1292 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1293 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1294 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1295 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1296};
1297
1298struct mlx5_ifc_modify_field_select_bits {
1299 u8 modify_field_select[0x20];
1300};
1301
1302struct mlx5_ifc_field_select_r_roce_np_bits {
1303 u8 field_select_r_roce_np[0x20];
1304};
1305
1306struct mlx5_ifc_field_select_r_roce_rp_bits {
1307 u8 field_select_r_roce_rp[0x20];
1308};
1309
1310enum {
1311 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1312 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1313 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1314 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1315 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1316 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1317 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1318 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1319 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1320 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1321};
1322
1323struct mlx5_ifc_field_select_802_1qau_rp_bits {
1324 u8 field_select_8021qaurp[0x20];
1325};
1326
1327struct mlx5_ifc_phys_layer_cntrs_bits {
1328 u8 time_since_last_clear_high[0x20];
1329
1330 u8 time_since_last_clear_low[0x20];
1331
1332 u8 symbol_errors_high[0x20];
1333
1334 u8 symbol_errors_low[0x20];
1335
1336 u8 sync_headers_errors_high[0x20];
1337
1338 u8 sync_headers_errors_low[0x20];
1339
1340 u8 edpl_bip_errors_lane0_high[0x20];
1341
1342 u8 edpl_bip_errors_lane0_low[0x20];
1343
1344 u8 edpl_bip_errors_lane1_high[0x20];
1345
1346 u8 edpl_bip_errors_lane1_low[0x20];
1347
1348 u8 edpl_bip_errors_lane2_high[0x20];
1349
1350 u8 edpl_bip_errors_lane2_low[0x20];
1351
1352 u8 edpl_bip_errors_lane3_high[0x20];
1353
1354 u8 edpl_bip_errors_lane3_low[0x20];
1355
1356 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1357
1358 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1359
1360 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1361
1362 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1363
1364 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1365
1366 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1367
1368 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1369
1370 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1371
1372 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1373
1374 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1375
1376 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1377
1378 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1379
1380 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1381
1382 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1383
1384 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1385
1386 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1387
1388 u8 rs_fec_corrected_blocks_high[0x20];
1389
1390 u8 rs_fec_corrected_blocks_low[0x20];
1391
1392 u8 rs_fec_uncorrectable_blocks_high[0x20];
1393
1394 u8 rs_fec_uncorrectable_blocks_low[0x20];
1395
1396 u8 rs_fec_no_errors_blocks_high[0x20];
1397
1398 u8 rs_fec_no_errors_blocks_low[0x20];
1399
1400 u8 rs_fec_single_error_blocks_high[0x20];
1401
1402 u8 rs_fec_single_error_blocks_low[0x20];
1403
1404 u8 rs_fec_corrected_symbols_total_high[0x20];
1405
1406 u8 rs_fec_corrected_symbols_total_low[0x20];
1407
1408 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1409
1410 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1411
1412 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1413
1414 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1415
1416 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1417
1418 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1419
1420 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1421
1422 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1423
1424 u8 link_down_events[0x20];
1425
1426 u8 successful_recovery_events[0x20];
1427
Matan Barakb4ff3a32016-02-09 14:57:42 +02001428 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001429};
1430
Gal Pressmand8dc0502016-09-27 17:04:51 +03001431struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1432 u8 time_since_last_clear_high[0x20];
1433
1434 u8 time_since_last_clear_low[0x20];
1435
1436 u8 phy_received_bits_high[0x20];
1437
1438 u8 phy_received_bits_low[0x20];
1439
1440 u8 phy_symbol_errors_high[0x20];
1441
1442 u8 phy_symbol_errors_low[0x20];
1443
1444 u8 phy_corrected_bits_high[0x20];
1445
1446 u8 phy_corrected_bits_low[0x20];
1447
1448 u8 phy_corrected_bits_lane0_high[0x20];
1449
1450 u8 phy_corrected_bits_lane0_low[0x20];
1451
1452 u8 phy_corrected_bits_lane1_high[0x20];
1453
1454 u8 phy_corrected_bits_lane1_low[0x20];
1455
1456 u8 phy_corrected_bits_lane2_high[0x20];
1457
1458 u8 phy_corrected_bits_lane2_low[0x20];
1459
1460 u8 phy_corrected_bits_lane3_high[0x20];
1461
1462 u8 phy_corrected_bits_lane3_low[0x20];
1463
1464 u8 reserved_at_200[0x5c0];
1465};
1466
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001467struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1468 u8 symbol_error_counter[0x10];
1469
1470 u8 link_error_recovery_counter[0x8];
1471
1472 u8 link_downed_counter[0x8];
1473
1474 u8 port_rcv_errors[0x10];
1475
1476 u8 port_rcv_remote_physical_errors[0x10];
1477
1478 u8 port_rcv_switch_relay_errors[0x10];
1479
1480 u8 port_xmit_discards[0x10];
1481
1482 u8 port_xmit_constraint_errors[0x8];
1483
1484 u8 port_rcv_constraint_errors[0x8];
1485
1486 u8 reserved_at_70[0x8];
1487
1488 u8 link_overrun_errors[0x8];
1489
1490 u8 reserved_at_80[0x10];
1491
1492 u8 vl_15_dropped[0x10];
1493
Tim Wright133bea02017-05-01 17:30:08 +01001494 u8 reserved_at_a0[0x80];
1495
1496 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001497};
1498
Saeed Mahameede2816822015-05-28 22:28:40 +03001499struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1500 u8 transmit_queue_high[0x20];
1501
1502 u8 transmit_queue_low[0x20];
1503
Matan Barakb4ff3a32016-02-09 14:57:42 +02001504 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001505};
1506
1507struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1508 u8 rx_octets_high[0x20];
1509
1510 u8 rx_octets_low[0x20];
1511
Matan Barakb4ff3a32016-02-09 14:57:42 +02001512 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001513
1514 u8 rx_frames_high[0x20];
1515
1516 u8 rx_frames_low[0x20];
1517
1518 u8 tx_octets_high[0x20];
1519
1520 u8 tx_octets_low[0x20];
1521
Matan Barakb4ff3a32016-02-09 14:57:42 +02001522 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001523
1524 u8 tx_frames_high[0x20];
1525
1526 u8 tx_frames_low[0x20];
1527
1528 u8 rx_pause_high[0x20];
1529
1530 u8 rx_pause_low[0x20];
1531
1532 u8 rx_pause_duration_high[0x20];
1533
1534 u8 rx_pause_duration_low[0x20];
1535
1536 u8 tx_pause_high[0x20];
1537
1538 u8 tx_pause_low[0x20];
1539
1540 u8 tx_pause_duration_high[0x20];
1541
1542 u8 tx_pause_duration_low[0x20];
1543
1544 u8 rx_pause_transition_high[0x20];
1545
1546 u8 rx_pause_transition_low[0x20];
1547
Matan Barakb4ff3a32016-02-09 14:57:42 +02001548 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001549};
1550
1551struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1552 u8 port_transmit_wait_high[0x20];
1553
1554 u8 port_transmit_wait_low[0x20];
1555
Gal Pressman2dba0792017-06-18 14:56:45 +03001556 u8 reserved_at_40[0x100];
1557
1558 u8 rx_buffer_almost_full_high[0x20];
1559
1560 u8 rx_buffer_almost_full_low[0x20];
1561
1562 u8 rx_buffer_full_high[0x20];
1563
1564 u8 rx_buffer_full_low[0x20];
1565
1566 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001567};
1568
1569struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1570 u8 dot3stats_alignment_errors_high[0x20];
1571
1572 u8 dot3stats_alignment_errors_low[0x20];
1573
1574 u8 dot3stats_fcs_errors_high[0x20];
1575
1576 u8 dot3stats_fcs_errors_low[0x20];
1577
1578 u8 dot3stats_single_collision_frames_high[0x20];
1579
1580 u8 dot3stats_single_collision_frames_low[0x20];
1581
1582 u8 dot3stats_multiple_collision_frames_high[0x20];
1583
1584 u8 dot3stats_multiple_collision_frames_low[0x20];
1585
1586 u8 dot3stats_sqe_test_errors_high[0x20];
1587
1588 u8 dot3stats_sqe_test_errors_low[0x20];
1589
1590 u8 dot3stats_deferred_transmissions_high[0x20];
1591
1592 u8 dot3stats_deferred_transmissions_low[0x20];
1593
1594 u8 dot3stats_late_collisions_high[0x20];
1595
1596 u8 dot3stats_late_collisions_low[0x20];
1597
1598 u8 dot3stats_excessive_collisions_high[0x20];
1599
1600 u8 dot3stats_excessive_collisions_low[0x20];
1601
1602 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1603
1604 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1605
1606 u8 dot3stats_carrier_sense_errors_high[0x20];
1607
1608 u8 dot3stats_carrier_sense_errors_low[0x20];
1609
1610 u8 dot3stats_frame_too_longs_high[0x20];
1611
1612 u8 dot3stats_frame_too_longs_low[0x20];
1613
1614 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1615
1616 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1617
1618 u8 dot3stats_symbol_errors_high[0x20];
1619
1620 u8 dot3stats_symbol_errors_low[0x20];
1621
1622 u8 dot3control_in_unknown_opcodes_high[0x20];
1623
1624 u8 dot3control_in_unknown_opcodes_low[0x20];
1625
1626 u8 dot3in_pause_frames_high[0x20];
1627
1628 u8 dot3in_pause_frames_low[0x20];
1629
1630 u8 dot3out_pause_frames_high[0x20];
1631
1632 u8 dot3out_pause_frames_low[0x20];
1633
Matan Barakb4ff3a32016-02-09 14:57:42 +02001634 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001635};
1636
1637struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1638 u8 ether_stats_drop_events_high[0x20];
1639
1640 u8 ether_stats_drop_events_low[0x20];
1641
1642 u8 ether_stats_octets_high[0x20];
1643
1644 u8 ether_stats_octets_low[0x20];
1645
1646 u8 ether_stats_pkts_high[0x20];
1647
1648 u8 ether_stats_pkts_low[0x20];
1649
1650 u8 ether_stats_broadcast_pkts_high[0x20];
1651
1652 u8 ether_stats_broadcast_pkts_low[0x20];
1653
1654 u8 ether_stats_multicast_pkts_high[0x20];
1655
1656 u8 ether_stats_multicast_pkts_low[0x20];
1657
1658 u8 ether_stats_crc_align_errors_high[0x20];
1659
1660 u8 ether_stats_crc_align_errors_low[0x20];
1661
1662 u8 ether_stats_undersize_pkts_high[0x20];
1663
1664 u8 ether_stats_undersize_pkts_low[0x20];
1665
1666 u8 ether_stats_oversize_pkts_high[0x20];
1667
1668 u8 ether_stats_oversize_pkts_low[0x20];
1669
1670 u8 ether_stats_fragments_high[0x20];
1671
1672 u8 ether_stats_fragments_low[0x20];
1673
1674 u8 ether_stats_jabbers_high[0x20];
1675
1676 u8 ether_stats_jabbers_low[0x20];
1677
1678 u8 ether_stats_collisions_high[0x20];
1679
1680 u8 ether_stats_collisions_low[0x20];
1681
1682 u8 ether_stats_pkts64octets_high[0x20];
1683
1684 u8 ether_stats_pkts64octets_low[0x20];
1685
1686 u8 ether_stats_pkts65to127octets_high[0x20];
1687
1688 u8 ether_stats_pkts65to127octets_low[0x20];
1689
1690 u8 ether_stats_pkts128to255octets_high[0x20];
1691
1692 u8 ether_stats_pkts128to255octets_low[0x20];
1693
1694 u8 ether_stats_pkts256to511octets_high[0x20];
1695
1696 u8 ether_stats_pkts256to511octets_low[0x20];
1697
1698 u8 ether_stats_pkts512to1023octets_high[0x20];
1699
1700 u8 ether_stats_pkts512to1023octets_low[0x20];
1701
1702 u8 ether_stats_pkts1024to1518octets_high[0x20];
1703
1704 u8 ether_stats_pkts1024to1518octets_low[0x20];
1705
1706 u8 ether_stats_pkts1519to2047octets_high[0x20];
1707
1708 u8 ether_stats_pkts1519to2047octets_low[0x20];
1709
1710 u8 ether_stats_pkts2048to4095octets_high[0x20];
1711
1712 u8 ether_stats_pkts2048to4095octets_low[0x20];
1713
1714 u8 ether_stats_pkts4096to8191octets_high[0x20];
1715
1716 u8 ether_stats_pkts4096to8191octets_low[0x20];
1717
1718 u8 ether_stats_pkts8192to10239octets_high[0x20];
1719
1720 u8 ether_stats_pkts8192to10239octets_low[0x20];
1721
Matan Barakb4ff3a32016-02-09 14:57:42 +02001722 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001723};
1724
1725struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1726 u8 if_in_octets_high[0x20];
1727
1728 u8 if_in_octets_low[0x20];
1729
1730 u8 if_in_ucast_pkts_high[0x20];
1731
1732 u8 if_in_ucast_pkts_low[0x20];
1733
1734 u8 if_in_discards_high[0x20];
1735
1736 u8 if_in_discards_low[0x20];
1737
1738 u8 if_in_errors_high[0x20];
1739
1740 u8 if_in_errors_low[0x20];
1741
1742 u8 if_in_unknown_protos_high[0x20];
1743
1744 u8 if_in_unknown_protos_low[0x20];
1745
1746 u8 if_out_octets_high[0x20];
1747
1748 u8 if_out_octets_low[0x20];
1749
1750 u8 if_out_ucast_pkts_high[0x20];
1751
1752 u8 if_out_ucast_pkts_low[0x20];
1753
1754 u8 if_out_discards_high[0x20];
1755
1756 u8 if_out_discards_low[0x20];
1757
1758 u8 if_out_errors_high[0x20];
1759
1760 u8 if_out_errors_low[0x20];
1761
1762 u8 if_in_multicast_pkts_high[0x20];
1763
1764 u8 if_in_multicast_pkts_low[0x20];
1765
1766 u8 if_in_broadcast_pkts_high[0x20];
1767
1768 u8 if_in_broadcast_pkts_low[0x20];
1769
1770 u8 if_out_multicast_pkts_high[0x20];
1771
1772 u8 if_out_multicast_pkts_low[0x20];
1773
1774 u8 if_out_broadcast_pkts_high[0x20];
1775
1776 u8 if_out_broadcast_pkts_low[0x20];
1777
Matan Barakb4ff3a32016-02-09 14:57:42 +02001778 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001779};
1780
1781struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1782 u8 a_frames_transmitted_ok_high[0x20];
1783
1784 u8 a_frames_transmitted_ok_low[0x20];
1785
1786 u8 a_frames_received_ok_high[0x20];
1787
1788 u8 a_frames_received_ok_low[0x20];
1789
1790 u8 a_frame_check_sequence_errors_high[0x20];
1791
1792 u8 a_frame_check_sequence_errors_low[0x20];
1793
1794 u8 a_alignment_errors_high[0x20];
1795
1796 u8 a_alignment_errors_low[0x20];
1797
1798 u8 a_octets_transmitted_ok_high[0x20];
1799
1800 u8 a_octets_transmitted_ok_low[0x20];
1801
1802 u8 a_octets_received_ok_high[0x20];
1803
1804 u8 a_octets_received_ok_low[0x20];
1805
1806 u8 a_multicast_frames_xmitted_ok_high[0x20];
1807
1808 u8 a_multicast_frames_xmitted_ok_low[0x20];
1809
1810 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1811
1812 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1813
1814 u8 a_multicast_frames_received_ok_high[0x20];
1815
1816 u8 a_multicast_frames_received_ok_low[0x20];
1817
1818 u8 a_broadcast_frames_received_ok_high[0x20];
1819
1820 u8 a_broadcast_frames_received_ok_low[0x20];
1821
1822 u8 a_in_range_length_errors_high[0x20];
1823
1824 u8 a_in_range_length_errors_low[0x20];
1825
1826 u8 a_out_of_range_length_field_high[0x20];
1827
1828 u8 a_out_of_range_length_field_low[0x20];
1829
1830 u8 a_frame_too_long_errors_high[0x20];
1831
1832 u8 a_frame_too_long_errors_low[0x20];
1833
1834 u8 a_symbol_error_during_carrier_high[0x20];
1835
1836 u8 a_symbol_error_during_carrier_low[0x20];
1837
1838 u8 a_mac_control_frames_transmitted_high[0x20];
1839
1840 u8 a_mac_control_frames_transmitted_low[0x20];
1841
1842 u8 a_mac_control_frames_received_high[0x20];
1843
1844 u8 a_mac_control_frames_received_low[0x20];
1845
1846 u8 a_unsupported_opcodes_received_high[0x20];
1847
1848 u8 a_unsupported_opcodes_received_low[0x20];
1849
1850 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1851
1852 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1853
1854 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1855
1856 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1857
Matan Barakb4ff3a32016-02-09 14:57:42 +02001858 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001859};
1860
Gal Pressman8ed1a632016-11-17 13:46:01 +02001861struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1862 u8 life_time_counter_high[0x20];
1863
1864 u8 life_time_counter_low[0x20];
1865
1866 u8 rx_errors[0x20];
1867
1868 u8 tx_errors[0x20];
1869
1870 u8 l0_to_recovery_eieos[0x20];
1871
1872 u8 l0_to_recovery_ts[0x20];
1873
1874 u8 l0_to_recovery_framing[0x20];
1875
1876 u8 l0_to_recovery_retrain[0x20];
1877
1878 u8 crc_error_dllp[0x20];
1879
1880 u8 crc_error_tlp[0x20];
1881
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001882 u8 tx_overflow_buffer_pkt_high[0x20];
1883
1884 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001885
1886 u8 outbound_stalled_reads[0x20];
1887
1888 u8 outbound_stalled_writes[0x20];
1889
1890 u8 outbound_stalled_reads_events[0x20];
1891
1892 u8 outbound_stalled_writes_events[0x20];
1893
1894 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001895};
1896
Saeed Mahameede2816822015-05-28 22:28:40 +03001897struct mlx5_ifc_cmd_inter_comp_event_bits {
1898 u8 command_completion_vector[0x20];
1899
Matan Barakb4ff3a32016-02-09 14:57:42 +02001900 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001901};
1902
1903struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001904 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001905 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001906 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001907 u8 vl[0x4];
1908
Matan Barakb4ff3a32016-02-09 14:57:42 +02001909 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001910};
1911
1912struct mlx5_ifc_db_bf_congestion_event_bits {
1913 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001914 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001915 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001916 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001917
Matan Barakb4ff3a32016-02-09 14:57:42 +02001918 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001919};
1920
1921struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001922 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001923
1924 u8 gpio_event_hi[0x20];
1925
1926 u8 gpio_event_lo[0x20];
1927
Matan Barakb4ff3a32016-02-09 14:57:42 +02001928 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001929};
1930
1931struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001932 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001933
1934 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001935 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001936
Matan Barakb4ff3a32016-02-09 14:57:42 +02001937 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001938};
1939
1940struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001941 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001942};
1943
1944enum {
1945 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1946 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1947};
1948
1949struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001950 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001951 u8 cqn[0x18];
1952
Matan Barakb4ff3a32016-02-09 14:57:42 +02001953 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001954
Matan Barakb4ff3a32016-02-09 14:57:42 +02001955 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001956 u8 syndrome[0x8];
1957
Matan Barakb4ff3a32016-02-09 14:57:42 +02001958 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001959};
1960
1961struct mlx5_ifc_rdma_page_fault_event_bits {
1962 u8 bytes_committed[0x20];
1963
1964 u8 r_key[0x20];
1965
Matan Barakb4ff3a32016-02-09 14:57:42 +02001966 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001967 u8 packet_len[0x10];
1968
1969 u8 rdma_op_len[0x20];
1970
1971 u8 rdma_va[0x40];
1972
Matan Barakb4ff3a32016-02-09 14:57:42 +02001973 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001974 u8 rdma[0x1];
1975 u8 write[0x1];
1976 u8 requestor[0x1];
1977 u8 qp_number[0x18];
1978};
1979
1980struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1981 u8 bytes_committed[0x20];
1982
Matan Barakb4ff3a32016-02-09 14:57:42 +02001983 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001984 u8 wqe_index[0x10];
1985
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987 u8 len[0x10];
1988
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990
Matan Barakb4ff3a32016-02-09 14:57:42 +02001991 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001992 u8 rdma[0x1];
1993 u8 write_read[0x1];
1994 u8 requestor[0x1];
1995 u8 qpn[0x18];
1996};
1997
1998struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001999 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002000
2001 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002002 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002003
Matan Barakb4ff3a32016-02-09 14:57:42 +02002004 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002005 u8 qpn_rqn_sqn[0x18];
2006};
2007
2008struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002009 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002010
Matan Barakb4ff3a32016-02-09 14:57:42 +02002011 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002012 u8 dct_number[0x18];
2013};
2014
2015struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002016 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002017
Matan Barakb4ff3a32016-02-09 14:57:42 +02002018 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002019 u8 cq_number[0x18];
2020};
2021
2022enum {
2023 MLX5_QPC_STATE_RST = 0x0,
2024 MLX5_QPC_STATE_INIT = 0x1,
2025 MLX5_QPC_STATE_RTR = 0x2,
2026 MLX5_QPC_STATE_RTS = 0x3,
2027 MLX5_QPC_STATE_SQER = 0x4,
2028 MLX5_QPC_STATE_ERR = 0x6,
2029 MLX5_QPC_STATE_SQD = 0x7,
2030 MLX5_QPC_STATE_SUSPENDED = 0x9,
2031};
2032
2033enum {
2034 MLX5_QPC_ST_RC = 0x0,
2035 MLX5_QPC_ST_UC = 0x1,
2036 MLX5_QPC_ST_UD = 0x2,
2037 MLX5_QPC_ST_XRC = 0x3,
2038 MLX5_QPC_ST_DCI = 0x5,
2039 MLX5_QPC_ST_QP0 = 0x7,
2040 MLX5_QPC_ST_QP1 = 0x8,
2041 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2042 MLX5_QPC_ST_REG_UMR = 0xc,
2043};
2044
2045enum {
2046 MLX5_QPC_PM_STATE_ARMED = 0x0,
2047 MLX5_QPC_PM_STATE_REARM = 0x1,
2048 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2049 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2050};
2051
2052enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002053 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2054};
2055
2056enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002057 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2058 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2059};
2060
2061enum {
2062 MLX5_QPC_MTU_256_BYTES = 0x1,
2063 MLX5_QPC_MTU_512_BYTES = 0x2,
2064 MLX5_QPC_MTU_1K_BYTES = 0x3,
2065 MLX5_QPC_MTU_2K_BYTES = 0x4,
2066 MLX5_QPC_MTU_4K_BYTES = 0x5,
2067 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2068};
2069
2070enum {
2071 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2072 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2073 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2074 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2075 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2076 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2077 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2078 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2079};
2080
2081enum {
2082 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2083 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2084 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2085};
2086
2087enum {
2088 MLX5_QPC_CS_RES_DISABLE = 0x0,
2089 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2090 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2091};
2092
2093struct mlx5_ifc_qpc_bits {
2094 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002095 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002097 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002098 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002099 u8 reserved_at_15[0x3];
2100 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002101 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002102 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002103
2104 u8 wq_signature[0x1];
2105 u8 block_lb_mc[0x1];
2106 u8 atomic_like_write_en[0x1];
2107 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002108 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002109 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002110 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 u8 pd[0x18];
2112
2113 u8 mtu[0x3];
2114 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002115 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002116 u8 log_rq_size[0x4];
2117 u8 log_rq_stride[0x3];
2118 u8 no_sq[0x1];
2119 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002120 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002121 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002122 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002123
2124 u8 counter_set_id[0x8];
2125 u8 uar_page[0x18];
2126
Matan Barakb4ff3a32016-02-09 14:57:42 +02002127 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002128 u8 user_index[0x18];
2129
Matan Barakb4ff3a32016-02-09 14:57:42 +02002130 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002131 u8 log_page_size[0x5];
2132 u8 remote_qpn[0x18];
2133
2134 struct mlx5_ifc_ads_bits primary_address_path;
2135
2136 struct mlx5_ifc_ads_bits secondary_address_path;
2137
2138 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002139 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002140 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002141 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002142 u8 retry_count[0x3];
2143 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002144 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002145 u8 fre[0x1];
2146 u8 cur_rnr_retry[0x3];
2147 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002148 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002149
Matan Barakb4ff3a32016-02-09 14:57:42 +02002150 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002151
Matan Barakb4ff3a32016-02-09 14:57:42 +02002152 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002153 u8 next_send_psn[0x18];
2154
Matan Barakb4ff3a32016-02-09 14:57:42 +02002155 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156 u8 cqn_snd[0x18];
2157
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002158 u8 reserved_at_400[0x8];
2159 u8 deth_sqpn[0x18];
2160
2161 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162
Matan Barakb4ff3a32016-02-09 14:57:42 +02002163 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164 u8 last_acked_psn[0x18];
2165
Matan Barakb4ff3a32016-02-09 14:57:42 +02002166 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002167 u8 ssn[0x18];
2168
Matan Barakb4ff3a32016-02-09 14:57:42 +02002169 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002170 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002171 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002172 u8 atomic_mode[0x4];
2173 u8 rre[0x1];
2174 u8 rwe[0x1];
2175 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002176 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002177 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002178 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002179 u8 cd_slave_receive[0x1];
2180 u8 cd_slave_send[0x1];
2181 u8 cd_master[0x1];
2182
Matan Barakb4ff3a32016-02-09 14:57:42 +02002183 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002184 u8 min_rnr_nak[0x5];
2185 u8 next_rcv_psn[0x18];
2186
Matan Barakb4ff3a32016-02-09 14:57:42 +02002187 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002188 u8 xrcd[0x18];
2189
Matan Barakb4ff3a32016-02-09 14:57:42 +02002190 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002191 u8 cqn_rcv[0x18];
2192
2193 u8 dbr_addr[0x40];
2194
2195 u8 q_key[0x20];
2196
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002199 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002200
Matan Barakb4ff3a32016-02-09 14:57:42 +02002201 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002202 u8 rmsn[0x18];
2203
2204 u8 hw_sq_wqebb_counter[0x10];
2205 u8 sw_sq_wqebb_counter[0x10];
2206
2207 u8 hw_rq_counter[0x20];
2208
2209 u8 sw_rq_counter[0x20];
2210
Matan Barakb4ff3a32016-02-09 14:57:42 +02002211 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002212
Matan Barakb4ff3a32016-02-09 14:57:42 +02002213 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002214 u8 cgs[0x1];
2215 u8 cs_req[0x8];
2216 u8 cs_res[0x8];
2217
2218 u8 dc_access_key[0x40];
2219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221};
2222
2223struct mlx5_ifc_roce_addr_layout_bits {
2224 u8 source_l3_address[16][0x8];
2225
Matan Barakb4ff3a32016-02-09 14:57:42 +02002226 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002227 u8 vlan_valid[0x1];
2228 u8 vlan_id[0xc];
2229 u8 source_mac_47_32[0x10];
2230
2231 u8 source_mac_31_0[0x20];
2232
Matan Barakb4ff3a32016-02-09 14:57:42 +02002233 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234 u8 roce_l3_type[0x4];
2235 u8 roce_version[0x8];
2236
Matan Barakb4ff3a32016-02-09 14:57:42 +02002237 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238};
2239
2240union mlx5_ifc_hca_cap_union_bits {
2241 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2242 struct mlx5_ifc_odp_cap_bits odp_cap;
2243 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2244 struct mlx5_ifc_roce_cap_bits roce_cap;
2245 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2246 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002247 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002248 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002249 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002250 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002251 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002252 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002253};
2254
2255enum {
2256 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2257 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2258 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002259 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002260 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2261 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002262 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002263};
2264
2265struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002266 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002267
2268 u8 group_id[0x20];
2269
Matan Barakb4ff3a32016-02-09 14:57:42 +02002270 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002271 u8 flow_tag[0x18];
2272
Matan Barakb4ff3a32016-02-09 14:57:42 +02002273 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002274 u8 action[0x10];
2275
Matan Barakb4ff3a32016-02-09 14:57:42 +02002276 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002277 u8 destination_list_size[0x18];
2278
Amir Vadai9dc0b282016-05-13 12:55:39 +00002279 u8 reserved_at_a0[0x8];
2280 u8 flow_counter_list_size[0x18];
2281
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002282 u8 encap_id[0x20];
2283
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002284 u8 modify_header_id[0x20];
2285
2286 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002287
2288 struct mlx5_ifc_fte_match_param_bits match_value;
2289
Matan Barakb4ff3a32016-02-09 14:57:42 +02002290 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002291
Amir Vadai9dc0b282016-05-13 12:55:39 +00002292 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002293};
2294
2295enum {
2296 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2297 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2298};
2299
2300struct mlx5_ifc_xrc_srqc_bits {
2301 u8 state[0x4];
2302 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002303 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304
2305 u8 wq_signature[0x1];
2306 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002307 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002308 u8 rlky[0x1];
2309 u8 basic_cyclic_rcv_wqe[0x1];
2310 u8 log_rq_stride[0x3];
2311 u8 xrcd[0x18];
2312
2313 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002314 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002315 u8 cqn[0x18];
2316
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318
2319 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321 u8 log_page_size[0x6];
2322 u8 user_index[0x18];
2323
Matan Barakb4ff3a32016-02-09 14:57:42 +02002324 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325
Matan Barakb4ff3a32016-02-09 14:57:42 +02002326 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002327 u8 pd[0x18];
2328
2329 u8 lwm[0x10];
2330 u8 wqe_cnt[0x10];
2331
Matan Barakb4ff3a32016-02-09 14:57:42 +02002332 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002333
2334 u8 db_record_addr_h[0x20];
2335
2336 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002337 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338
Matan Barakb4ff3a32016-02-09 14:57:42 +02002339 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340};
2341
2342struct mlx5_ifc_traffic_counter_bits {
2343 u8 packets[0x40];
2344
2345 u8 octets[0x40];
2346};
2347
2348struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002349 u8 strict_lag_tx_port_affinity[0x1];
2350 u8 reserved_at_1[0x3];
2351 u8 lag_tx_port_affinity[0x04];
2352
2353 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002355 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358
Matan Barakb4ff3a32016-02-09 14:57:42 +02002359 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002360 u8 transport_domain[0x18];
2361
Erez Shitrit500a3d02017-04-13 06:36:51 +03002362 u8 reserved_at_140[0x8];
2363 u8 underlay_qpn[0x18];
2364 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002365};
2366
2367enum {
2368 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2369 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2370};
2371
2372enum {
2373 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2374 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2375};
2376
2377enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002378 MLX5_RX_HASH_FN_NONE = 0x0,
2379 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2380 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002381};
2382
2383enum {
2384 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2385 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2386};
2387
2388struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390
2391 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002392 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002393
Matan Barakb4ff3a32016-02-09 14:57:42 +02002394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002395
Matan Barakb4ff3a32016-02-09 14:57:42 +02002396 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397 u8 lro_timeout_period_usecs[0x10];
2398 u8 lro_enable_mask[0x4];
2399 u8 lro_max_ip_payload_size[0x8];
2400
Matan Barakb4ff3a32016-02-09 14:57:42 +02002401 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002402
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404 u8 inline_rqn[0x18];
2405
2406 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410 u8 indirect_table[0x18];
2411
2412 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 self_lb_block[0x2];
2415 u8 transport_domain[0x18];
2416
2417 u8 rx_hash_toeplitz_key[10][0x20];
2418
2419 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2420
2421 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2422
Matan Barakb4ff3a32016-02-09 14:57:42 +02002423 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002424};
2425
2426enum {
2427 MLX5_SRQC_STATE_GOOD = 0x0,
2428 MLX5_SRQC_STATE_ERROR = 0x1,
2429};
2430
2431struct mlx5_ifc_srqc_bits {
2432 u8 state[0x4];
2433 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435
2436 u8 wq_signature[0x1];
2437 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002438 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002439 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002440 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002441 u8 log_rq_stride[0x3];
2442 u8 xrcd[0x18];
2443
2444 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002445 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002446 u8 cqn[0x18];
2447
Matan Barakb4ff3a32016-02-09 14:57:42 +02002448 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002452 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002453
Matan Barakb4ff3a32016-02-09 14:57:42 +02002454 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455
Matan Barakb4ff3a32016-02-09 14:57:42 +02002456 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002457 u8 pd[0x18];
2458
2459 u8 lwm[0x10];
2460 u8 wqe_cnt[0x10];
2461
Matan Barakb4ff3a32016-02-09 14:57:42 +02002462 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002463
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002464 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002465
Matan Barakb4ff3a32016-02-09 14:57:42 +02002466 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002467};
2468
2469enum {
2470 MLX5_SQC_STATE_RST = 0x0,
2471 MLX5_SQC_STATE_RDY = 0x1,
2472 MLX5_SQC_STATE_ERR = 0x3,
2473};
2474
2475struct mlx5_ifc_sqc_bits {
2476 u8 rlky[0x1];
2477 u8 cd_master[0x1];
2478 u8 fre[0x1];
2479 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002480 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002481 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002483 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002484 u8 allow_swp[0x1];
2485 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002486
Matan Barakb4ff3a32016-02-09 14:57:42 +02002487 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002488 u8 user_index[0x18];
2489
Matan Barakb4ff3a32016-02-09 14:57:42 +02002490 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491 u8 cqn[0x18];
2492
Saeed Mahameed74862162016-06-09 15:11:34 +03002493 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002494
Saeed Mahameed74862162016-06-09 15:11:34 +03002495 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002496 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002497 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002498
Matan Barakb4ff3a32016-02-09 14:57:42 +02002499 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002500
Matan Barakb4ff3a32016-02-09 14:57:42 +02002501 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002502 u8 tis_num_0[0x18];
2503
2504 struct mlx5_ifc_wq_bits wq;
2505};
2506
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002507enum {
2508 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2509 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2510 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2511 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2512};
2513
2514struct mlx5_ifc_scheduling_context_bits {
2515 u8 element_type[0x8];
2516 u8 reserved_at_8[0x18];
2517
2518 u8 element_attributes[0x20];
2519
2520 u8 parent_element_id[0x20];
2521
2522 u8 reserved_at_60[0x40];
2523
2524 u8 bw_share[0x20];
2525
2526 u8 max_average_bw[0x20];
2527
2528 u8 reserved_at_e0[0x120];
2529};
2530
Saeed Mahameede2816822015-05-28 22:28:40 +03002531struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002532 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002533
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535 u8 rqt_max_size[0x10];
2536
Matan Barakb4ff3a32016-02-09 14:57:42 +02002537 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002538 u8 rqt_actual_size[0x10];
2539
Matan Barakb4ff3a32016-02-09 14:57:42 +02002540 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002541
2542 struct mlx5_ifc_rq_num_bits rq_num[0];
2543};
2544
2545enum {
2546 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2547 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2548};
2549
2550enum {
2551 MLX5_RQC_STATE_RST = 0x0,
2552 MLX5_RQC_STATE_RDY = 0x1,
2553 MLX5_RQC_STATE_ERR = 0x3,
2554};
2555
2556struct mlx5_ifc_rqc_bits {
2557 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002558 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002559 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002560 u8 vsd[0x1];
2561 u8 mem_rq_type[0x4];
2562 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002563 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002565 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002566
Matan Barakb4ff3a32016-02-09 14:57:42 +02002567 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002568 u8 user_index[0x18];
2569
Matan Barakb4ff3a32016-02-09 14:57:42 +02002570 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571 u8 cqn[0x18];
2572
2573 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002574 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002575
Matan Barakb4ff3a32016-02-09 14:57:42 +02002576 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002577 u8 rmpn[0x18];
2578
Matan Barakb4ff3a32016-02-09 14:57:42 +02002579 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002580
2581 struct mlx5_ifc_wq_bits wq;
2582};
2583
2584enum {
2585 MLX5_RMPC_STATE_RDY = 0x1,
2586 MLX5_RMPC_STATE_ERR = 0x3,
2587};
2588
2589struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002590 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002591 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002592 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002593
2594 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002595 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002596
Matan Barakb4ff3a32016-02-09 14:57:42 +02002597 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598
2599 struct mlx5_ifc_wq_bits wq;
2600};
2601
Saeed Mahameede2816822015-05-28 22:28:40 +03002602struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002603 u8 reserved_at_0[0x5];
2604 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002605 u8 reserved_at_8[0x15];
2606 u8 disable_mc_local_lb[0x1];
2607 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002608 u8 roce_en[0x1];
2609
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002610 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002611 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002612 u8 event_on_mtu[0x1];
2613 u8 event_on_promisc_change[0x1];
2614 u8 event_on_vlan_change[0x1];
2615 u8 event_on_mc_address_change[0x1];
2616 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002617
Matan Barakb4ff3a32016-02-09 14:57:42 +02002618 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002619
2620 u8 mtu[0x10];
2621
Achiad Shochat9efa7522015-12-23 18:47:20 +02002622 u8 system_image_guid[0x40];
2623 u8 port_guid[0x40];
2624 u8 node_guid[0x40];
2625
Matan Barakb4ff3a32016-02-09 14:57:42 +02002626 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002627 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002629
2630 u8 promisc_uc[0x1];
2631 u8 promisc_mc[0x1];
2632 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002633 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002634 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002635 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002636 u8 allowed_list_size[0xc];
2637
2638 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2639
Matan Barakb4ff3a32016-02-09 14:57:42 +02002640 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002641
2642 u8 current_uc_mac_address[0][0x40];
2643};
2644
2645enum {
2646 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2647 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2648 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002649 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002650};
2651
2652struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002653 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002654 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002655 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002656 u8 small_fence_on_rdma_read_response[0x1];
2657 u8 umr_en[0x1];
2658 u8 a[0x1];
2659 u8 rw[0x1];
2660 u8 rr[0x1];
2661 u8 lw[0x1];
2662 u8 lr[0x1];
2663 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002664 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665
2666 u8 qpn[0x18];
2667 u8 mkey_7_0[0x8];
2668
Matan Barakb4ff3a32016-02-09 14:57:42 +02002669 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002670
2671 u8 length64[0x1];
2672 u8 bsf_en[0x1];
2673 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002674 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002675 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002676 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002677 u8 en_rinval[0x1];
2678 u8 pd[0x18];
2679
2680 u8 start_addr[0x40];
2681
2682 u8 len[0x40];
2683
2684 u8 bsf_octword_size[0x20];
2685
Matan Barakb4ff3a32016-02-09 14:57:42 +02002686 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687
2688 u8 translations_octword_size[0x20];
2689
Matan Barakb4ff3a32016-02-09 14:57:42 +02002690 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002691 u8 log_page_size[0x5];
2692
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694};
2695
2696struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002697 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002698 u8 pkey[0x10];
2699};
2700
2701struct mlx5_ifc_array128_auto_bits {
2702 u8 array128_auto[16][0x8];
2703};
2704
2705struct mlx5_ifc_hca_vport_context_bits {
2706 u8 field_select[0x20];
2707
Matan Barakb4ff3a32016-02-09 14:57:42 +02002708 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002709
2710 u8 sm_virt_aware[0x1];
2711 u8 has_smi[0x1];
2712 u8 has_raw[0x1];
2713 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002715 u8 port_physical_state[0x4];
2716 u8 vport_state_policy[0x4];
2717 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002718 u8 vport_state[0x4];
2719
Matan Barakb4ff3a32016-02-09 14:57:42 +02002720 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002721
2722 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002723
2724 u8 port_guid[0x40];
2725
2726 u8 node_guid[0x40];
2727
2728 u8 cap_mask1[0x20];
2729
2730 u8 cap_mask1_field_select[0x20];
2731
2732 u8 cap_mask2[0x20];
2733
2734 u8 cap_mask2_field_select[0x20];
2735
Matan Barakb4ff3a32016-02-09 14:57:42 +02002736 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002737
2738 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002739 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002740 u8 init_type_reply[0x4];
2741 u8 lmc[0x3];
2742 u8 subnet_timeout[0x5];
2743
2744 u8 sm_lid[0x10];
2745 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002746 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002747
2748 u8 qkey_violation_counter[0x10];
2749 u8 pkey_violation_counter[0x10];
2750
Matan Barakb4ff3a32016-02-09 14:57:42 +02002751 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002752};
2753
Saeed Mahameedd6666752015-12-01 18:03:22 +02002754struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002755 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002756 u8 vport_svlan_strip[0x1];
2757 u8 vport_cvlan_strip[0x1];
2758 u8 vport_svlan_insert[0x1];
2759 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002760 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002761
Matan Barakb4ff3a32016-02-09 14:57:42 +02002762 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002763
2764 u8 svlan_cfi[0x1];
2765 u8 svlan_pcp[0x3];
2766 u8 svlan_id[0xc];
2767 u8 cvlan_cfi[0x1];
2768 u8 cvlan_pcp[0x3];
2769 u8 cvlan_id[0xc];
2770
Matan Barakb4ff3a32016-02-09 14:57:42 +02002771 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002772};
2773
Saeed Mahameede2816822015-05-28 22:28:40 +03002774enum {
2775 MLX5_EQC_STATUS_OK = 0x0,
2776 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2777};
2778
2779enum {
2780 MLX5_EQC_ST_ARMED = 0x9,
2781 MLX5_EQC_ST_FIRED = 0xa,
2782};
2783
2784struct mlx5_ifc_eqc_bits {
2785 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002786 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002787 u8 ec[0x1];
2788 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002789 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002790 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002791 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002792
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794
Matan Barakb4ff3a32016-02-09 14:57:42 +02002795 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002796 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002797 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002798
Matan Barakb4ff3a32016-02-09 14:57:42 +02002799 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002800 u8 log_eq_size[0x5];
2801 u8 uar_page[0x18];
2802
Matan Barakb4ff3a32016-02-09 14:57:42 +02002803 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002804
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806 u8 intr[0x8];
2807
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002809 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002810 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002811
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813
Matan Barakb4ff3a32016-02-09 14:57:42 +02002814 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002815 u8 consumer_counter[0x18];
2816
Matan Barakb4ff3a32016-02-09 14:57:42 +02002817 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002818 u8 producer_counter[0x18];
2819
Matan Barakb4ff3a32016-02-09 14:57:42 +02002820 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002821};
2822
2823enum {
2824 MLX5_DCTC_STATE_ACTIVE = 0x0,
2825 MLX5_DCTC_STATE_DRAINING = 0x1,
2826 MLX5_DCTC_STATE_DRAINED = 0x2,
2827};
2828
2829enum {
2830 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2831 MLX5_DCTC_CS_RES_NA = 0x1,
2832 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2833};
2834
2835enum {
2836 MLX5_DCTC_MTU_256_BYTES = 0x1,
2837 MLX5_DCTC_MTU_512_BYTES = 0x2,
2838 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2839 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2840 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2841};
2842
2843struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002844 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002845 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847
Matan Barakb4ff3a32016-02-09 14:57:42 +02002848 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002849 u8 user_index[0x18];
2850
Matan Barakb4ff3a32016-02-09 14:57:42 +02002851 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002852 u8 cqn[0x18];
2853
2854 u8 counter_set_id[0x8];
2855 u8 atomic_mode[0x4];
2856 u8 rre[0x1];
2857 u8 rwe[0x1];
2858 u8 rae[0x1];
2859 u8 atomic_like_write_en[0x1];
2860 u8 latency_sensitive[0x1];
2861 u8 rlky[0x1];
2862 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864
Matan Barakb4ff3a32016-02-09 14:57:42 +02002865 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002866 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002867 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002868 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002869 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002870
Matan Barakb4ff3a32016-02-09 14:57:42 +02002871 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002872 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002873
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875 u8 pd[0x18];
2876
2877 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002878 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879 u8 flow_label[0x14];
2880
2881 u8 dc_access_key[0x40];
2882
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884 u8 mtu[0x3];
2885 u8 port[0x8];
2886 u8 pkey_index[0x10];
2887
Matan Barakb4ff3a32016-02-09 14:57:42 +02002888 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002889 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 hop_limit[0x8];
2892
2893 u8 dc_access_key_violation_count[0x20];
2894
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002896 u8 dei_cfi[0x1];
2897 u8 eth_prio[0x3];
2898 u8 ecn[0x2];
2899 u8 dscp[0x6];
2900
Matan Barakb4ff3a32016-02-09 14:57:42 +02002901 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002902};
2903
2904enum {
2905 MLX5_CQC_STATUS_OK = 0x0,
2906 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2907 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2908};
2909
2910enum {
2911 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2912 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2913};
2914
2915enum {
2916 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2917 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2918 MLX5_CQC_ST_FIRED = 0xa,
2919};
2920
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002921enum {
2922 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2923 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002924 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002925};
2926
Saeed Mahameede2816822015-05-28 22:28:40 +03002927struct mlx5_ifc_cqc_bits {
2928 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002929 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002930 u8 cqe_sz[0x3];
2931 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002932 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002933 u8 scqe_break_moderation_en[0x1];
2934 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002935 u8 cq_period_mode[0x2];
2936 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 mini_cqe_res_format[0x2];
2938 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002939 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002940
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942
Matan Barakb4ff3a32016-02-09 14:57:42 +02002943 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002948 u8 log_cq_size[0x5];
2949 u8 uar_page[0x18];
2950
Matan Barakb4ff3a32016-02-09 14:57:42 +02002951 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002952 u8 cq_period[0xc];
2953 u8 cq_max_count[0x10];
2954
Matan Barakb4ff3a32016-02-09 14:57:42 +02002955 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002956 u8 c_eqn[0x8];
2957
Matan Barakb4ff3a32016-02-09 14:57:42 +02002958 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002959 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002960 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002961
Matan Barakb4ff3a32016-02-09 14:57:42 +02002962 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002963
Matan Barakb4ff3a32016-02-09 14:57:42 +02002964 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002965 u8 last_notified_index[0x18];
2966
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968 u8 last_solicit_index[0x18];
2969
Matan Barakb4ff3a32016-02-09 14:57:42 +02002970 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002971 u8 consumer_counter[0x18];
2972
Matan Barakb4ff3a32016-02-09 14:57:42 +02002973 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002974 u8 producer_counter[0x18];
2975
Matan Barakb4ff3a32016-02-09 14:57:42 +02002976 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002977
2978 u8 dbr_addr[0x40];
2979};
2980
2981union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2982 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2983 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2984 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002985 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002986};
2987
2988struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990
Matan Barakb4ff3a32016-02-09 14:57:42 +02002991 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002992 u8 ieee_vendor_id[0x18];
2993
Matan Barakb4ff3a32016-02-09 14:57:42 +02002994 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002995 u8 vsd_vendor_id[0x10];
2996
2997 u8 vsd[208][0x8];
2998
2999 u8 vsd_contd_psid[16][0x8];
3000};
3001
Saeed Mahameed74862162016-06-09 15:11:34 +03003002enum {
3003 MLX5_XRQC_STATE_GOOD = 0x0,
3004 MLX5_XRQC_STATE_ERROR = 0x1,
3005};
3006
3007enum {
3008 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3009 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3010};
3011
3012enum {
3013 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3014};
3015
3016struct mlx5_ifc_tag_matching_topology_context_bits {
3017 u8 log_matching_list_sz[0x4];
3018 u8 reserved_at_4[0xc];
3019 u8 append_next_index[0x10];
3020
3021 u8 sw_phase_cnt[0x10];
3022 u8 hw_phase_cnt[0x10];
3023
3024 u8 reserved_at_40[0x40];
3025};
3026
3027struct mlx5_ifc_xrqc_bits {
3028 u8 state[0x4];
3029 u8 rlkey[0x1];
3030 u8 reserved_at_5[0xf];
3031 u8 topology[0x4];
3032 u8 reserved_at_18[0x4];
3033 u8 offload[0x4];
3034
3035 u8 reserved_at_20[0x8];
3036 u8 user_index[0x18];
3037
3038 u8 reserved_at_40[0x8];
3039 u8 cqn[0x18];
3040
3041 u8 reserved_at_60[0xa0];
3042
3043 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3044
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003045 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003046
3047 struct mlx5_ifc_wq_bits wq;
3048};
3049
Saeed Mahameede2816822015-05-28 22:28:40 +03003050union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3051 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3052 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003053 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003054};
3055
3056union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3057 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3058 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3059 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003060 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003061};
3062
3063union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3064 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3065 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3066 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3067 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3068 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3069 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3070 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003071 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003072 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003073 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003074 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003075};
3076
Gal Pressman8ed1a632016-11-17 13:46:01 +02003077union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3078 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3079 u8 reserved_at_0[0x7c0];
3080};
3081
Saeed Mahameede2816822015-05-28 22:28:40 +03003082union mlx5_ifc_event_auto_bits {
3083 struct mlx5_ifc_comp_event_bits comp_event;
3084 struct mlx5_ifc_dct_events_bits dct_events;
3085 struct mlx5_ifc_qp_events_bits qp_events;
3086 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3087 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3088 struct mlx5_ifc_cq_error_bits cq_error;
3089 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3090 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3091 struct mlx5_ifc_gpio_event_bits gpio_event;
3092 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3093 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3094 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003095 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003096};
3097
3098struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003099 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003100
3101 u8 assert_existptr[0x20];
3102
3103 u8 assert_callra[0x20];
3104
Matan Barakb4ff3a32016-02-09 14:57:42 +02003105 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003106
3107 u8 fw_version[0x20];
3108
3109 u8 hw_id[0x20];
3110
Matan Barakb4ff3a32016-02-09 14:57:42 +02003111 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003112
3113 u8 irisc_index[0x8];
3114 u8 synd[0x8];
3115 u8 ext_synd[0x10];
3116};
3117
3118struct mlx5_ifc_register_loopback_control_bits {
3119 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003120 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003121 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003123
Matan Barakb4ff3a32016-02-09 14:57:42 +02003124 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003125};
3126
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003127struct mlx5_ifc_vport_tc_element_bits {
3128 u8 traffic_class[0x4];
3129 u8 reserved_at_4[0xc];
3130 u8 vport_number[0x10];
3131};
3132
3133struct mlx5_ifc_vport_element_bits {
3134 u8 reserved_at_0[0x10];
3135 u8 vport_number[0x10];
3136};
3137
3138enum {
3139 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3140 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3141 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3142};
3143
3144struct mlx5_ifc_tsar_element_bits {
3145 u8 reserved_at_0[0x8];
3146 u8 tsar_type[0x8];
3147 u8 reserved_at_10[0x10];
3148};
3149
Majd Dibbiny8812c242017-02-09 14:20:12 +02003150enum {
3151 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3152 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3153};
3154
Saeed Mahameede2816822015-05-28 22:28:40 +03003155struct mlx5_ifc_teardown_hca_out_bits {
3156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003158
3159 u8 syndrome[0x20];
3160
Majd Dibbiny8812c242017-02-09 14:20:12 +02003161 u8 reserved_at_40[0x3f];
3162
3163 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003164};
3165
3166enum {
3167 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003168 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003169};
3170
3171struct mlx5_ifc_teardown_hca_in_bits {
3172 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003173 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003174
Matan Barakb4ff3a32016-02-09 14:57:42 +02003175 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003176 u8 op_mod[0x10];
3177
Matan Barakb4ff3a32016-02-09 14:57:42 +02003178 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003179 u8 profile[0x10];
3180
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182};
3183
3184struct mlx5_ifc_sqerr2rts_qp_out_bits {
3185 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003186 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003187
3188 u8 syndrome[0x20];
3189
Matan Barakb4ff3a32016-02-09 14:57:42 +02003190 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191};
3192
3193struct mlx5_ifc_sqerr2rts_qp_in_bits {
3194 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196
Matan Barakb4ff3a32016-02-09 14:57:42 +02003197 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003198 u8 op_mod[0x10];
3199
Matan Barakb4ff3a32016-02-09 14:57:42 +02003200 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003201 u8 qpn[0x18];
3202
Matan Barakb4ff3a32016-02-09 14:57:42 +02003203 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003204
3205 u8 opt_param_mask[0x20];
3206
Matan Barakb4ff3a32016-02-09 14:57:42 +02003207 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003208
3209 struct mlx5_ifc_qpc_bits qpc;
3210
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212};
3213
3214struct mlx5_ifc_sqd2rts_qp_out_bits {
3215 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003216 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003217
3218 u8 syndrome[0x20];
3219
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221};
3222
3223struct mlx5_ifc_sqd2rts_qp_in_bits {
3224 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003225 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003226
Matan Barakb4ff3a32016-02-09 14:57:42 +02003227 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003228 u8 op_mod[0x10];
3229
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231 u8 qpn[0x18];
3232
Matan Barakb4ff3a32016-02-09 14:57:42 +02003233 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003234
3235 u8 opt_param_mask[0x20];
3236
Matan Barakb4ff3a32016-02-09 14:57:42 +02003237 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003238
3239 struct mlx5_ifc_qpc_bits qpc;
3240
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242};
3243
3244struct mlx5_ifc_set_roce_address_out_bits {
3245 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003246 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003247
3248 u8 syndrome[0x20];
3249
Matan Barakb4ff3a32016-02-09 14:57:42 +02003250 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003251};
3252
3253struct mlx5_ifc_set_roce_address_in_bits {
3254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003256
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258 u8 op_mod[0x10];
3259
3260 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262
Matan Barakb4ff3a32016-02-09 14:57:42 +02003263 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264
3265 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3266};
3267
3268struct mlx5_ifc_set_mad_demux_out_bits {
3269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003271
3272 u8 syndrome[0x20];
3273
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275};
3276
3277enum {
3278 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3279 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3280};
3281
3282struct mlx5_ifc_set_mad_demux_in_bits {
3283 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003284 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003285
Matan Barakb4ff3a32016-02-09 14:57:42 +02003286 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003287 u8 op_mod[0x10];
3288
Matan Barakb4ff3a32016-02-09 14:57:42 +02003289 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003290
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003292 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294};
3295
3296struct mlx5_ifc_set_l2_table_entry_out_bits {
3297 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299
3300 u8 syndrome[0x20];
3301
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303};
3304
3305struct mlx5_ifc_set_l2_table_entry_in_bits {
3306 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308
Matan Barakb4ff3a32016-02-09 14:57:42 +02003309 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003310 u8 op_mod[0x10];
3311
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003315 u8 table_index[0x18];
3316
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003320 u8 vlan_valid[0x1];
3321 u8 vlan[0xc];
3322
3323 struct mlx5_ifc_mac_address_layout_bits mac_address;
3324
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326};
3327
3328struct mlx5_ifc_set_issi_out_bits {
3329 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003331
3332 u8 syndrome[0x20];
3333
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003335};
3336
3337struct mlx5_ifc_set_issi_in_bits {
3338 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003339 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342 u8 op_mod[0x10];
3343
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003345 u8 current_issi[0x10];
3346
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348};
3349
3350struct mlx5_ifc_set_hca_cap_out_bits {
3351 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003352 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353
3354 u8 syndrome[0x20];
3355
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003357};
3358
3359struct mlx5_ifc_set_hca_cap_in_bits {
3360 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003361 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003364 u8 op_mod[0x10];
3365
Matan Barakb4ff3a32016-02-09 14:57:42 +02003366 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003367
Saeed Mahameede2816822015-05-28 22:28:40 +03003368 union mlx5_ifc_hca_cap_union_bits capability;
3369};
3370
Maor Gottlieb26a81452015-12-10 17:12:39 +02003371enum {
3372 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3373 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3374 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3375 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3376};
3377
Saeed Mahameede2816822015-05-28 22:28:40 +03003378struct mlx5_ifc_set_fte_out_bits {
3379 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003380 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003381
3382 u8 syndrome[0x20];
3383
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003385};
3386
3387struct mlx5_ifc_set_fte_in_bits {
3388 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003389 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392 u8 op_mod[0x10];
3393
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003394 u8 other_vport[0x1];
3395 u8 reserved_at_41[0xf];
3396 u8 vport_number[0x10];
3397
3398 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003399
3400 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003402
Matan Barakb4ff3a32016-02-09 14:57:42 +02003403 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003404 u8 table_id[0x18];
3405
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003407 u8 modify_enable_mask[0x8];
3408
Matan Barakb4ff3a32016-02-09 14:57:42 +02003409 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003410
3411 u8 flow_index[0x20];
3412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414
3415 struct mlx5_ifc_flow_context_bits flow_context;
3416};
3417
3418struct mlx5_ifc_rts2rts_qp_out_bits {
3419 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003421
3422 u8 syndrome[0x20];
3423
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425};
3426
3427struct mlx5_ifc_rts2rts_qp_in_bits {
3428 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432 u8 op_mod[0x10];
3433
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435 u8 qpn[0x18];
3436
Matan Barakb4ff3a32016-02-09 14:57:42 +02003437 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003438
3439 u8 opt_param_mask[0x20];
3440
Matan Barakb4ff3a32016-02-09 14:57:42 +02003441 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003442
3443 struct mlx5_ifc_qpc_bits qpc;
3444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446};
3447
3448struct mlx5_ifc_rtr2rts_qp_out_bits {
3449 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003450 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003451
3452 u8 syndrome[0x20];
3453
Matan Barakb4ff3a32016-02-09 14:57:42 +02003454 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455};
3456
3457struct mlx5_ifc_rtr2rts_qp_in_bits {
3458 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003459 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003460
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462 u8 op_mod[0x10];
3463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465 u8 qpn[0x18];
3466
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468
3469 u8 opt_param_mask[0x20];
3470
Matan Barakb4ff3a32016-02-09 14:57:42 +02003471 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003472
3473 struct mlx5_ifc_qpc_bits qpc;
3474
Matan Barakb4ff3a32016-02-09 14:57:42 +02003475 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003476};
3477
3478struct mlx5_ifc_rst2init_qp_out_bits {
3479 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003480 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003481
3482 u8 syndrome[0x20];
3483
Matan Barakb4ff3a32016-02-09 14:57:42 +02003484 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003485};
3486
3487struct mlx5_ifc_rst2init_qp_in_bits {
3488 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003489 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003490
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492 u8 op_mod[0x10];
3493
Matan Barakb4ff3a32016-02-09 14:57:42 +02003494 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003495 u8 qpn[0x18];
3496
Matan Barakb4ff3a32016-02-09 14:57:42 +02003497 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003498
3499 u8 opt_param_mask[0x20];
3500
Matan Barakb4ff3a32016-02-09 14:57:42 +02003501 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003502
3503 struct mlx5_ifc_qpc_bits qpc;
3504
Matan Barakb4ff3a32016-02-09 14:57:42 +02003505 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003506};
3507
Saeed Mahameed74862162016-06-09 15:11:34 +03003508struct mlx5_ifc_query_xrq_out_bits {
3509 u8 status[0x8];
3510 u8 reserved_at_8[0x18];
3511
3512 u8 syndrome[0x20];
3513
3514 u8 reserved_at_40[0x40];
3515
3516 struct mlx5_ifc_xrqc_bits xrq_context;
3517};
3518
3519struct mlx5_ifc_query_xrq_in_bits {
3520 u8 opcode[0x10];
3521 u8 reserved_at_10[0x10];
3522
3523 u8 reserved_at_20[0x10];
3524 u8 op_mod[0x10];
3525
3526 u8 reserved_at_40[0x8];
3527 u8 xrqn[0x18];
3528
3529 u8 reserved_at_60[0x20];
3530};
3531
Saeed Mahameede2816822015-05-28 22:28:40 +03003532struct mlx5_ifc_query_xrc_srq_out_bits {
3533 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535
3536 u8 syndrome[0x20];
3537
Matan Barakb4ff3a32016-02-09 14:57:42 +02003538 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003539
3540 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3541
Matan Barakb4ff3a32016-02-09 14:57:42 +02003542 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003543
3544 u8 pas[0][0x40];
3545};
3546
3547struct mlx5_ifc_query_xrc_srq_in_bits {
3548 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552 u8 op_mod[0x10];
3553
Matan Barakb4ff3a32016-02-09 14:57:42 +02003554 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003555 u8 xrc_srqn[0x18];
3556
Matan Barakb4ff3a32016-02-09 14:57:42 +02003557 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003558};
3559
3560enum {
3561 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3562 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3563};
3564
3565struct mlx5_ifc_query_vport_state_out_bits {
3566 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003567 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568
3569 u8 syndrome[0x20];
3570
Matan Barakb4ff3a32016-02-09 14:57:42 +02003571 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003572
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574 u8 admin_state[0x4];
3575 u8 state[0x4];
3576};
3577
3578enum {
3579 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003580 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003581};
3582
3583struct mlx5_ifc_query_vport_state_in_bits {
3584 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003585 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003586
Matan Barakb4ff3a32016-02-09 14:57:42 +02003587 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003588 u8 op_mod[0x10];
3589
3590 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003591 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003592 u8 vport_number[0x10];
3593
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595};
3596
3597struct mlx5_ifc_query_vport_counter_out_bits {
3598 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003599 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003600
3601 u8 syndrome[0x20];
3602
Matan Barakb4ff3a32016-02-09 14:57:42 +02003603 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003604
3605 struct mlx5_ifc_traffic_counter_bits received_errors;
3606
3607 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3608
3609 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3610
3611 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3612
3613 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3614
3615 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3616
3617 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3618
3619 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3620
3621 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3622
3623 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3624
3625 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3626
3627 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3628
Matan Barakb4ff3a32016-02-09 14:57:42 +02003629 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003630};
3631
3632enum {
3633 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3634};
3635
3636struct mlx5_ifc_query_vport_counter_in_bits {
3637 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641 u8 op_mod[0x10];
3642
3643 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003644 u8 reserved_at_41[0xb];
3645 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646 u8 vport_number[0x10];
3647
Matan Barakb4ff3a32016-02-09 14:57:42 +02003648 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003649
3650 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003651 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003652
Matan Barakb4ff3a32016-02-09 14:57:42 +02003653 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003654};
3655
3656struct mlx5_ifc_query_tis_out_bits {
3657 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659
3660 u8 syndrome[0x20];
3661
Matan Barakb4ff3a32016-02-09 14:57:42 +02003662 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003663
3664 struct mlx5_ifc_tisc_bits tis_context;
3665};
3666
3667struct mlx5_ifc_query_tis_in_bits {
3668 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672 u8 op_mod[0x10];
3673
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675 u8 tisn[0x18];
3676
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678};
3679
3680struct mlx5_ifc_query_tir_out_bits {
3681 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003682 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003683
3684 u8 syndrome[0x20];
3685
Matan Barakb4ff3a32016-02-09 14:57:42 +02003686 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003687
3688 struct mlx5_ifc_tirc_bits tir_context;
3689};
3690
3691struct mlx5_ifc_query_tir_in_bits {
3692 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696 u8 op_mod[0x10];
3697
Matan Barakb4ff3a32016-02-09 14:57:42 +02003698 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003699 u8 tirn[0x18];
3700
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702};
3703
3704struct mlx5_ifc_query_srq_out_bits {
3705 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003706 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003707
3708 u8 syndrome[0x20];
3709
Matan Barakb4ff3a32016-02-09 14:57:42 +02003710 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003711
3712 struct mlx5_ifc_srqc_bits srq_context_entry;
3713
Matan Barakb4ff3a32016-02-09 14:57:42 +02003714 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003715
3716 u8 pas[0][0x40];
3717};
3718
3719struct mlx5_ifc_query_srq_in_bits {
3720 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003721 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003722
Matan Barakb4ff3a32016-02-09 14:57:42 +02003723 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003724 u8 op_mod[0x10];
3725
Matan Barakb4ff3a32016-02-09 14:57:42 +02003726 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003727 u8 srqn[0x18];
3728
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730};
3731
3732struct mlx5_ifc_query_sq_out_bits {
3733 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003734 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003735
3736 u8 syndrome[0x20];
3737
Matan Barakb4ff3a32016-02-09 14:57:42 +02003738 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003739
3740 struct mlx5_ifc_sqc_bits sq_context;
3741};
3742
3743struct mlx5_ifc_query_sq_in_bits {
3744 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003746
Matan Barakb4ff3a32016-02-09 14:57:42 +02003747 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003748 u8 op_mod[0x10];
3749
Matan Barakb4ff3a32016-02-09 14:57:42 +02003750 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003751 u8 sqn[0x18];
3752
Matan Barakb4ff3a32016-02-09 14:57:42 +02003753 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003754};
3755
3756struct mlx5_ifc_query_special_contexts_out_bits {
3757 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003758 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003759
3760 u8 syndrome[0x20];
3761
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003762 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003763
3764 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003765
3766 u8 null_mkey[0x20];
3767
3768 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003769};
3770
3771struct mlx5_ifc_query_special_contexts_in_bits {
3772 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003773 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003774
Matan Barakb4ff3a32016-02-09 14:57:42 +02003775 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003776 u8 op_mod[0x10];
3777
Matan Barakb4ff3a32016-02-09 14:57:42 +02003778 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003779};
3780
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003781struct mlx5_ifc_query_scheduling_element_out_bits {
3782 u8 opcode[0x10];
3783 u8 reserved_at_10[0x10];
3784
3785 u8 reserved_at_20[0x10];
3786 u8 op_mod[0x10];
3787
3788 u8 reserved_at_40[0xc0];
3789
3790 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3791
3792 u8 reserved_at_300[0x100];
3793};
3794
3795enum {
3796 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3797};
3798
3799struct mlx5_ifc_query_scheduling_element_in_bits {
3800 u8 opcode[0x10];
3801 u8 reserved_at_10[0x10];
3802
3803 u8 reserved_at_20[0x10];
3804 u8 op_mod[0x10];
3805
3806 u8 scheduling_hierarchy[0x8];
3807 u8 reserved_at_48[0x18];
3808
3809 u8 scheduling_element_id[0x20];
3810
3811 u8 reserved_at_80[0x180];
3812};
3813
Saeed Mahameede2816822015-05-28 22:28:40 +03003814struct mlx5_ifc_query_rqt_out_bits {
3815 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003816 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817
3818 u8 syndrome[0x20];
3819
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821
3822 struct mlx5_ifc_rqtc_bits rqt_context;
3823};
3824
3825struct mlx5_ifc_query_rqt_in_bits {
3826 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830 u8 op_mod[0x10];
3831
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833 u8 rqtn[0x18];
3834
Matan Barakb4ff3a32016-02-09 14:57:42 +02003835 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003836};
3837
3838struct mlx5_ifc_query_rq_out_bits {
3839 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003840 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003841
3842 u8 syndrome[0x20];
3843
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845
3846 struct mlx5_ifc_rqc_bits rq_context;
3847};
3848
3849struct mlx5_ifc_query_rq_in_bits {
3850 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852
Matan Barakb4ff3a32016-02-09 14:57:42 +02003853 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003854 u8 op_mod[0x10];
3855
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857 u8 rqn[0x18];
3858
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860};
3861
3862struct mlx5_ifc_query_roce_address_out_bits {
3863 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003864 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003865
3866 u8 syndrome[0x20];
3867
Matan Barakb4ff3a32016-02-09 14:57:42 +02003868 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003869
3870 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3871};
3872
3873struct mlx5_ifc_query_roce_address_in_bits {
3874 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878 u8 op_mod[0x10];
3879
3880 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003881 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003882
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884};
3885
3886struct mlx5_ifc_query_rmp_out_bits {
3887 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889
3890 u8 syndrome[0x20];
3891
Matan Barakb4ff3a32016-02-09 14:57:42 +02003892 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003893
3894 struct mlx5_ifc_rmpc_bits rmp_context;
3895};
3896
3897struct mlx5_ifc_query_rmp_in_bits {
3898 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900
Matan Barakb4ff3a32016-02-09 14:57:42 +02003901 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003902 u8 op_mod[0x10];
3903
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905 u8 rmpn[0x18];
3906
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908};
3909
3910struct mlx5_ifc_query_qp_out_bits {
3911 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913
3914 u8 syndrome[0x20];
3915
Matan Barakb4ff3a32016-02-09 14:57:42 +02003916 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003917
3918 u8 opt_param_mask[0x20];
3919
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921
3922 struct mlx5_ifc_qpc_bits qpc;
3923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925
3926 u8 pas[0][0x40];
3927};
3928
3929struct mlx5_ifc_query_qp_in_bits {
3930 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932
Matan Barakb4ff3a32016-02-09 14:57:42 +02003933 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003934 u8 op_mod[0x10];
3935
Matan Barakb4ff3a32016-02-09 14:57:42 +02003936 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003937 u8 qpn[0x18];
3938
Matan Barakb4ff3a32016-02-09 14:57:42 +02003939 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003940};
3941
3942struct mlx5_ifc_query_q_counter_out_bits {
3943 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003944 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003945
3946 u8 syndrome[0x20];
3947
Matan Barakb4ff3a32016-02-09 14:57:42 +02003948 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003949
3950 u8 rx_write_requests[0x20];
3951
Matan Barakb4ff3a32016-02-09 14:57:42 +02003952 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003953
3954 u8 rx_read_requests[0x20];
3955
Matan Barakb4ff3a32016-02-09 14:57:42 +02003956 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957
3958 u8 rx_atomic_requests[0x20];
3959
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961
3962 u8 rx_dct_connect[0x20];
3963
Matan Barakb4ff3a32016-02-09 14:57:42 +02003964 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003965
3966 u8 out_of_buffer[0x20];
3967
Matan Barakb4ff3a32016-02-09 14:57:42 +02003968 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003969
3970 u8 out_of_sequence[0x20];
3971
Saeed Mahameed74862162016-06-09 15:11:34 +03003972 u8 reserved_at_1e0[0x20];
3973
3974 u8 duplicate_request[0x20];
3975
3976 u8 reserved_at_220[0x20];
3977
3978 u8 rnr_nak_retry_err[0x20];
3979
3980 u8 reserved_at_260[0x20];
3981
3982 u8 packet_seq_err[0x20];
3983
3984 u8 reserved_at_2a0[0x20];
3985
3986 u8 implied_nak_seq_err[0x20];
3987
3988 u8 reserved_at_2e0[0x20];
3989
3990 u8 local_ack_timeout_err[0x20];
3991
Parav Pandit58dcb602017-06-19 07:19:37 +03003992 u8 reserved_at_320[0xa0];
3993
3994 u8 resp_local_length_error[0x20];
3995
3996 u8 req_local_length_error[0x20];
3997
3998 u8 resp_local_qp_error[0x20];
3999
4000 u8 local_operation_error[0x20];
4001
4002 u8 resp_local_protection[0x20];
4003
4004 u8 req_local_protection[0x20];
4005
4006 u8 resp_cqe_error[0x20];
4007
4008 u8 req_cqe_error[0x20];
4009
4010 u8 req_mw_binding[0x20];
4011
4012 u8 req_bad_response[0x20];
4013
4014 u8 req_remote_invalid_request[0x20];
4015
4016 u8 resp_remote_invalid_request[0x20];
4017
4018 u8 req_remote_access_errors[0x20];
4019
4020 u8 resp_remote_access_errors[0x20];
4021
4022 u8 req_remote_operation_errors[0x20];
4023
4024 u8 req_transport_retries_exceeded[0x20];
4025
4026 u8 cq_overflow[0x20];
4027
4028 u8 resp_cqe_flush_error[0x20];
4029
4030 u8 req_cqe_flush_error[0x20];
4031
4032 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004033};
4034
4035struct mlx5_ifc_query_q_counter_in_bits {
4036 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040 u8 op_mod[0x10];
4041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043
4044 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004045 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004046
Matan Barakb4ff3a32016-02-09 14:57:42 +02004047 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004048 u8 counter_set_id[0x8];
4049};
4050
4051struct mlx5_ifc_query_pages_out_bits {
4052 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054
4055 u8 syndrome[0x20];
4056
Matan Barakb4ff3a32016-02-09 14:57:42 +02004057 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004058 u8 function_id[0x10];
4059
4060 u8 num_pages[0x20];
4061};
4062
4063enum {
4064 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4065 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4066 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4067};
4068
4069struct mlx5_ifc_query_pages_in_bits {
4070 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004071 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004072
Matan Barakb4ff3a32016-02-09 14:57:42 +02004073 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004074 u8 op_mod[0x10];
4075
Matan Barakb4ff3a32016-02-09 14:57:42 +02004076 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004077 u8 function_id[0x10];
4078
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080};
4081
4082struct mlx5_ifc_query_nic_vport_context_out_bits {
4083 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004084 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004085
4086 u8 syndrome[0x20];
4087
Matan Barakb4ff3a32016-02-09 14:57:42 +02004088 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004089
4090 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4091};
4092
4093struct mlx5_ifc_query_nic_vport_context_in_bits {
4094 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004095 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004096
Matan Barakb4ff3a32016-02-09 14:57:42 +02004097 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004098 u8 op_mod[0x10];
4099
4100 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102 u8 vport_number[0x10];
4103
Matan Barakb4ff3a32016-02-09 14:57:42 +02004104 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004105 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107};
4108
4109struct mlx5_ifc_query_mkey_out_bits {
4110 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004111 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004112
4113 u8 syndrome[0x20];
4114
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116
4117 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4118
Matan Barakb4ff3a32016-02-09 14:57:42 +02004119 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004120
4121 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4122
4123 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4124};
4125
4126struct mlx5_ifc_query_mkey_in_bits {
4127 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129
Matan Barakb4ff3a32016-02-09 14:57:42 +02004130 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004131 u8 op_mod[0x10];
4132
Matan Barakb4ff3a32016-02-09 14:57:42 +02004133 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004134 u8 mkey_index[0x18];
4135
4136 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004137 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004138};
4139
4140struct mlx5_ifc_query_mad_demux_out_bits {
4141 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004142 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004143
4144 u8 syndrome[0x20];
4145
Matan Barakb4ff3a32016-02-09 14:57:42 +02004146 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004147
4148 u8 mad_dumux_parameters_block[0x20];
4149};
4150
4151struct mlx5_ifc_query_mad_demux_in_bits {
4152 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004153 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004154
Matan Barakb4ff3a32016-02-09 14:57:42 +02004155 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004156 u8 op_mod[0x10];
4157
Matan Barakb4ff3a32016-02-09 14:57:42 +02004158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004159};
4160
4161struct mlx5_ifc_query_l2_table_entry_out_bits {
4162 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164
4165 u8 syndrome[0x20];
4166
Matan Barakb4ff3a32016-02-09 14:57:42 +02004167 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004168
Matan Barakb4ff3a32016-02-09 14:57:42 +02004169 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004170 u8 vlan_valid[0x1];
4171 u8 vlan[0xc];
4172
4173 struct mlx5_ifc_mac_address_layout_bits mac_address;
4174
Matan Barakb4ff3a32016-02-09 14:57:42 +02004175 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176};
4177
4178struct mlx5_ifc_query_l2_table_entry_in_bits {
4179 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004180 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004181
Matan Barakb4ff3a32016-02-09 14:57:42 +02004182 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004183 u8 op_mod[0x10];
4184
Matan Barakb4ff3a32016-02-09 14:57:42 +02004185 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004186
Matan Barakb4ff3a32016-02-09 14:57:42 +02004187 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004188 u8 table_index[0x18];
4189
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191};
4192
4193struct mlx5_ifc_query_issi_out_bits {
4194 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004195 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004196
4197 u8 syndrome[0x20];
4198
Matan Barakb4ff3a32016-02-09 14:57:42 +02004199 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004200 u8 current_issi[0x10];
4201
Matan Barakb4ff3a32016-02-09 14:57:42 +02004202 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203
Matan Barakb4ff3a32016-02-09 14:57:42 +02004204 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004205 u8 supported_issi_dw0[0x20];
4206};
4207
4208struct mlx5_ifc_query_issi_in_bits {
4209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211
Matan Barakb4ff3a32016-02-09 14:57:42 +02004212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004213 u8 op_mod[0x10];
4214
Matan Barakb4ff3a32016-02-09 14:57:42 +02004215 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004216};
4217
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004218struct mlx5_ifc_set_driver_version_out_bits {
4219 u8 status[0x8];
4220 u8 reserved_0[0x18];
4221
4222 u8 syndrome[0x20];
4223 u8 reserved_1[0x40];
4224};
4225
4226struct mlx5_ifc_set_driver_version_in_bits {
4227 u8 opcode[0x10];
4228 u8 reserved_0[0x10];
4229
4230 u8 reserved_1[0x10];
4231 u8 op_mod[0x10];
4232
4233 u8 reserved_2[0x40];
4234 u8 driver_version[64][0x8];
4235};
4236
Saeed Mahameede2816822015-05-28 22:28:40 +03004237struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4238 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004240
4241 u8 syndrome[0x20];
4242
Matan Barakb4ff3a32016-02-09 14:57:42 +02004243 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004244
4245 struct mlx5_ifc_pkey_bits pkey[0];
4246};
4247
4248struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4249 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251
Matan Barakb4ff3a32016-02-09 14:57:42 +02004252 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253 u8 op_mod[0x10];
4254
4255 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004257 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004258 u8 vport_number[0x10];
4259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261 u8 pkey_index[0x10];
4262};
4263
Eli Coheneff901d2016-03-11 22:58:42 +02004264enum {
4265 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4266 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4267 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4268};
4269
Saeed Mahameede2816822015-05-28 22:28:40 +03004270struct mlx5_ifc_query_hca_vport_gid_out_bits {
4271 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004273
4274 u8 syndrome[0x20];
4275
Matan Barakb4ff3a32016-02-09 14:57:42 +02004276 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004277
4278 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004279 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004280
4281 struct mlx5_ifc_array128_auto_bits gid[0];
4282};
4283
4284struct mlx5_ifc_query_hca_vport_gid_in_bits {
4285 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004286 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004287
Matan Barakb4ff3a32016-02-09 14:57:42 +02004288 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289 u8 op_mod[0x10];
4290
4291 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004292 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004293 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004294 u8 vport_number[0x10];
4295
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297 u8 gid_index[0x10];
4298};
4299
4300struct mlx5_ifc_query_hca_vport_context_out_bits {
4301 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004302 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004303
4304 u8 syndrome[0x20];
4305
Matan Barakb4ff3a32016-02-09 14:57:42 +02004306 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004307
4308 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4309};
4310
4311struct mlx5_ifc_query_hca_vport_context_in_bits {
4312 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004314
Matan Barakb4ff3a32016-02-09 14:57:42 +02004315 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004316 u8 op_mod[0x10];
4317
4318 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004320 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321 u8 vport_number[0x10];
4322
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324};
4325
4326struct mlx5_ifc_query_hca_cap_out_bits {
4327 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004328 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004329
4330 u8 syndrome[0x20];
4331
Matan Barakb4ff3a32016-02-09 14:57:42 +02004332 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004333
4334 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004335};
4336
4337struct mlx5_ifc_query_hca_cap_in_bits {
4338 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004339 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004340
Matan Barakb4ff3a32016-02-09 14:57:42 +02004341 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004342 u8 op_mod[0x10];
4343
Matan Barakb4ff3a32016-02-09 14:57:42 +02004344 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004345};
4346
Saeed Mahameede2816822015-05-28 22:28:40 +03004347struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004348 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004349 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004350
4351 u8 syndrome[0x20];
4352
Matan Barakb4ff3a32016-02-09 14:57:42 +02004353 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004354
Matan Barakb4ff3a32016-02-09 14:57:42 +02004355 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004356 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004357 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004358 u8 log_size[0x8];
4359
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004361};
4362
Saeed Mahameede2816822015-05-28 22:28:40 +03004363struct mlx5_ifc_query_flow_table_in_bits {
4364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004368 u8 op_mod[0x10];
4369
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371
4372 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004373 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004374
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376 u8 table_id[0x18];
4377
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004379};
4380
4381struct mlx5_ifc_query_fte_out_bits {
4382 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004383 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004384
4385 u8 syndrome[0x20];
4386
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004388
4389 struct mlx5_ifc_flow_context_bits flow_context;
4390};
4391
4392struct mlx5_ifc_query_fte_in_bits {
4393 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004395
Matan Barakb4ff3a32016-02-09 14:57:42 +02004396 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004397 u8 op_mod[0x10];
4398
Matan Barakb4ff3a32016-02-09 14:57:42 +02004399 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004400
4401 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004403
Matan Barakb4ff3a32016-02-09 14:57:42 +02004404 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004405 u8 table_id[0x18];
4406
Matan Barakb4ff3a32016-02-09 14:57:42 +02004407 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004408
4409 u8 flow_index[0x20];
4410
Matan Barakb4ff3a32016-02-09 14:57:42 +02004411 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004412};
4413
4414enum {
4415 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4416 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4417 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4418};
4419
4420struct mlx5_ifc_query_flow_group_out_bits {
4421 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004423
4424 u8 syndrome[0x20];
4425
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004427
4428 u8 start_flow_index[0x20];
4429
Matan Barakb4ff3a32016-02-09 14:57:42 +02004430 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004431
4432 u8 end_flow_index[0x20];
4433
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004435
Matan Barakb4ff3a32016-02-09 14:57:42 +02004436 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004437 u8 match_criteria_enable[0x8];
4438
4439 struct mlx5_ifc_fte_match_param_bits match_criteria;
4440
Matan Barakb4ff3a32016-02-09 14:57:42 +02004441 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004442};
4443
4444struct mlx5_ifc_query_flow_group_in_bits {
4445 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447
Matan Barakb4ff3a32016-02-09 14:57:42 +02004448 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004449 u8 op_mod[0x10];
4450
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452
4453 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004454 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004455
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004457 u8 table_id[0x18];
4458
4459 u8 group_id[0x20];
4460
Matan Barakb4ff3a32016-02-09 14:57:42 +02004461 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004462};
4463
Amir Vadai9dc0b282016-05-13 12:55:39 +00004464struct mlx5_ifc_query_flow_counter_out_bits {
4465 u8 status[0x8];
4466 u8 reserved_at_8[0x18];
4467
4468 u8 syndrome[0x20];
4469
4470 u8 reserved_at_40[0x40];
4471
4472 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4473};
4474
4475struct mlx5_ifc_query_flow_counter_in_bits {
4476 u8 opcode[0x10];
4477 u8 reserved_at_10[0x10];
4478
4479 u8 reserved_at_20[0x10];
4480 u8 op_mod[0x10];
4481
4482 u8 reserved_at_40[0x80];
4483
4484 u8 clear[0x1];
4485 u8 reserved_at_c1[0xf];
4486 u8 num_of_counters[0x10];
4487
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004488 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004489};
4490
Saeed Mahameedd6666752015-12-01 18:03:22 +02004491struct mlx5_ifc_query_esw_vport_context_out_bits {
4492 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004493 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004494
4495 u8 syndrome[0x20];
4496
Matan Barakb4ff3a32016-02-09 14:57:42 +02004497 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004498
4499 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4500};
4501
4502struct mlx5_ifc_query_esw_vport_context_in_bits {
4503 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004504 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004505
Matan Barakb4ff3a32016-02-09 14:57:42 +02004506 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004507 u8 op_mod[0x10];
4508
4509 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004510 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004511 u8 vport_number[0x10];
4512
Matan Barakb4ff3a32016-02-09 14:57:42 +02004513 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004514};
4515
4516struct mlx5_ifc_modify_esw_vport_context_out_bits {
4517 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004518 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004519
4520 u8 syndrome[0x20];
4521
Matan Barakb4ff3a32016-02-09 14:57:42 +02004522 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004523};
4524
4525struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004526 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004527 u8 vport_cvlan_insert[0x1];
4528 u8 vport_svlan_insert[0x1];
4529 u8 vport_cvlan_strip[0x1];
4530 u8 vport_svlan_strip[0x1];
4531};
4532
4533struct mlx5_ifc_modify_esw_vport_context_in_bits {
4534 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004535 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004536
Matan Barakb4ff3a32016-02-09 14:57:42 +02004537 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004538 u8 op_mod[0x10];
4539
4540 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004541 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004542 u8 vport_number[0x10];
4543
4544 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4545
4546 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4547};
4548
Saeed Mahameede2816822015-05-28 22:28:40 +03004549struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004550 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004551 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004552
4553 u8 syndrome[0x20];
4554
Matan Barakb4ff3a32016-02-09 14:57:42 +02004555 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004556
4557 struct mlx5_ifc_eqc_bits eq_context_entry;
4558
Matan Barakb4ff3a32016-02-09 14:57:42 +02004559 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004560
4561 u8 event_bitmask[0x40];
4562
Matan Barakb4ff3a32016-02-09 14:57:42 +02004563 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004564
4565 u8 pas[0][0x40];
4566};
4567
4568struct mlx5_ifc_query_eq_in_bits {
4569 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004571
Matan Barakb4ff3a32016-02-09 14:57:42 +02004572 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004573 u8 op_mod[0x10];
4574
Matan Barakb4ff3a32016-02-09 14:57:42 +02004575 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004576 u8 eq_number[0x8];
4577
Matan Barakb4ff3a32016-02-09 14:57:42 +02004578 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004579};
4580
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004581struct mlx5_ifc_encap_header_in_bits {
4582 u8 reserved_at_0[0x5];
4583 u8 header_type[0x3];
4584 u8 reserved_at_8[0xe];
4585 u8 encap_header_size[0xa];
4586
4587 u8 reserved_at_20[0x10];
4588 u8 encap_header[2][0x8];
4589
4590 u8 more_encap_header[0][0x8];
4591};
4592
4593struct mlx5_ifc_query_encap_header_out_bits {
4594 u8 status[0x8];
4595 u8 reserved_at_8[0x18];
4596
4597 u8 syndrome[0x20];
4598
4599 u8 reserved_at_40[0xa0];
4600
4601 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4602};
4603
4604struct mlx5_ifc_query_encap_header_in_bits {
4605 u8 opcode[0x10];
4606 u8 reserved_at_10[0x10];
4607
4608 u8 reserved_at_20[0x10];
4609 u8 op_mod[0x10];
4610
4611 u8 encap_id[0x20];
4612
4613 u8 reserved_at_60[0xa0];
4614};
4615
4616struct mlx5_ifc_alloc_encap_header_out_bits {
4617 u8 status[0x8];
4618 u8 reserved_at_8[0x18];
4619
4620 u8 syndrome[0x20];
4621
4622 u8 encap_id[0x20];
4623
4624 u8 reserved_at_60[0x20];
4625};
4626
4627struct mlx5_ifc_alloc_encap_header_in_bits {
4628 u8 opcode[0x10];
4629 u8 reserved_at_10[0x10];
4630
4631 u8 reserved_at_20[0x10];
4632 u8 op_mod[0x10];
4633
4634 u8 reserved_at_40[0xa0];
4635
4636 struct mlx5_ifc_encap_header_in_bits encap_header;
4637};
4638
4639struct mlx5_ifc_dealloc_encap_header_out_bits {
4640 u8 status[0x8];
4641 u8 reserved_at_8[0x18];
4642
4643 u8 syndrome[0x20];
4644
4645 u8 reserved_at_40[0x40];
4646};
4647
4648struct mlx5_ifc_dealloc_encap_header_in_bits {
4649 u8 opcode[0x10];
4650 u8 reserved_at_10[0x10];
4651
4652 u8 reserved_20[0x10];
4653 u8 op_mod[0x10];
4654
4655 u8 encap_id[0x20];
4656
4657 u8 reserved_60[0x20];
4658};
4659
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004660struct mlx5_ifc_set_action_in_bits {
4661 u8 action_type[0x4];
4662 u8 field[0xc];
4663 u8 reserved_at_10[0x3];
4664 u8 offset[0x5];
4665 u8 reserved_at_18[0x3];
4666 u8 length[0x5];
4667
4668 u8 data[0x20];
4669};
4670
4671struct mlx5_ifc_add_action_in_bits {
4672 u8 action_type[0x4];
4673 u8 field[0xc];
4674 u8 reserved_at_10[0x10];
4675
4676 u8 data[0x20];
4677};
4678
4679union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4680 struct mlx5_ifc_set_action_in_bits set_action_in;
4681 struct mlx5_ifc_add_action_in_bits add_action_in;
4682 u8 reserved_at_0[0x40];
4683};
4684
4685enum {
4686 MLX5_ACTION_TYPE_SET = 0x1,
4687 MLX5_ACTION_TYPE_ADD = 0x2,
4688};
4689
4690enum {
4691 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4692 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4693 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4694 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4695 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4696 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4697 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4698 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4699 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4700 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4701 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4702 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4703 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4704 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4705 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4706 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4707 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4708 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4709 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4710 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4711 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4712 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004713 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004714};
4715
4716struct mlx5_ifc_alloc_modify_header_context_out_bits {
4717 u8 status[0x8];
4718 u8 reserved_at_8[0x18];
4719
4720 u8 syndrome[0x20];
4721
4722 u8 modify_header_id[0x20];
4723
4724 u8 reserved_at_60[0x20];
4725};
4726
4727struct mlx5_ifc_alloc_modify_header_context_in_bits {
4728 u8 opcode[0x10];
4729 u8 reserved_at_10[0x10];
4730
4731 u8 reserved_at_20[0x10];
4732 u8 op_mod[0x10];
4733
4734 u8 reserved_at_40[0x20];
4735
4736 u8 table_type[0x8];
4737 u8 reserved_at_68[0x10];
4738 u8 num_of_actions[0x8];
4739
4740 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4741};
4742
4743struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4744 u8 status[0x8];
4745 u8 reserved_at_8[0x18];
4746
4747 u8 syndrome[0x20];
4748
4749 u8 reserved_at_40[0x40];
4750};
4751
4752struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4753 u8 opcode[0x10];
4754 u8 reserved_at_10[0x10];
4755
4756 u8 reserved_at_20[0x10];
4757 u8 op_mod[0x10];
4758
4759 u8 modify_header_id[0x20];
4760
4761 u8 reserved_at_60[0x20];
4762};
4763
Saeed Mahameede2816822015-05-28 22:28:40 +03004764struct mlx5_ifc_query_dct_out_bits {
4765 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004766 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004767
4768 u8 syndrome[0x20];
4769
Matan Barakb4ff3a32016-02-09 14:57:42 +02004770 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004771
4772 struct mlx5_ifc_dctc_bits dct_context_entry;
4773
Matan Barakb4ff3a32016-02-09 14:57:42 +02004774 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004775};
4776
4777struct mlx5_ifc_query_dct_in_bits {
4778 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004779 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004780
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782 u8 op_mod[0x10];
4783
Matan Barakb4ff3a32016-02-09 14:57:42 +02004784 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004785 u8 dctn[0x18];
4786
Matan Barakb4ff3a32016-02-09 14:57:42 +02004787 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004788};
4789
4790struct mlx5_ifc_query_cq_out_bits {
4791 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004792 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004793
4794 u8 syndrome[0x20];
4795
Matan Barakb4ff3a32016-02-09 14:57:42 +02004796 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004797
4798 struct mlx5_ifc_cqc_bits cq_context;
4799
Matan Barakb4ff3a32016-02-09 14:57:42 +02004800 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004801
4802 u8 pas[0][0x40];
4803};
4804
4805struct mlx5_ifc_query_cq_in_bits {
4806 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004807 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004808
Matan Barakb4ff3a32016-02-09 14:57:42 +02004809 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004810 u8 op_mod[0x10];
4811
Matan Barakb4ff3a32016-02-09 14:57:42 +02004812 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004813 u8 cqn[0x18];
4814
Matan Barakb4ff3a32016-02-09 14:57:42 +02004815 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004816};
4817
4818struct mlx5_ifc_query_cong_status_out_bits {
4819 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004820 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004821
4822 u8 syndrome[0x20];
4823
Matan Barakb4ff3a32016-02-09 14:57:42 +02004824 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004825
4826 u8 enable[0x1];
4827 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004828 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004829};
4830
4831struct mlx5_ifc_query_cong_status_in_bits {
4832 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004833 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004834
Matan Barakb4ff3a32016-02-09 14:57:42 +02004835 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004836 u8 op_mod[0x10];
4837
Matan Barakb4ff3a32016-02-09 14:57:42 +02004838 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004839 u8 priority[0x4];
4840 u8 cong_protocol[0x4];
4841
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843};
4844
4845struct mlx5_ifc_query_cong_statistics_out_bits {
4846 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004847 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848
4849 u8 syndrome[0x20];
4850
Matan Barakb4ff3a32016-02-09 14:57:42 +02004851 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004852
Parav Pandite1f24a72017-04-16 07:29:29 +03004853 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854
4855 u8 sum_flows[0x20];
4856
Parav Pandite1f24a72017-04-16 07:29:29 +03004857 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858
Parav Pandite1f24a72017-04-16 07:29:29 +03004859 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004860
Parav Pandite1f24a72017-04-16 07:29:29 +03004861 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004862
Parav Pandite1f24a72017-04-16 07:29:29 +03004863 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004864
Matan Barakb4ff3a32016-02-09 14:57:42 +02004865 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004866
4867 u8 time_stamp_high[0x20];
4868
4869 u8 time_stamp_low[0x20];
4870
4871 u8 accumulators_period[0x20];
4872
Parav Pandite1f24a72017-04-16 07:29:29 +03004873 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004874
Parav Pandite1f24a72017-04-16 07:29:29 +03004875 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876
Parav Pandite1f24a72017-04-16 07:29:29 +03004877 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878
Parav Pandite1f24a72017-04-16 07:29:29 +03004879 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004880
Matan Barakb4ff3a32016-02-09 14:57:42 +02004881 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004882};
4883
4884struct mlx5_ifc_query_cong_statistics_in_bits {
4885 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887
Matan Barakb4ff3a32016-02-09 14:57:42 +02004888 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889 u8 op_mod[0x10];
4890
4891 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893
Matan Barakb4ff3a32016-02-09 14:57:42 +02004894 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004895};
4896
4897struct mlx5_ifc_query_cong_params_out_bits {
4898 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900
4901 u8 syndrome[0x20];
4902
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904
4905 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4906};
4907
4908struct mlx5_ifc_query_cong_params_in_bits {
4909 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004910 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004911
Matan Barakb4ff3a32016-02-09 14:57:42 +02004912 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913 u8 op_mod[0x10];
4914
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916 u8 cong_protocol[0x4];
4917
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919};
4920
4921struct mlx5_ifc_query_adapter_out_bits {
4922 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004923 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004924
4925 u8 syndrome[0x20];
4926
Matan Barakb4ff3a32016-02-09 14:57:42 +02004927 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928
4929 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4930};
4931
4932struct mlx5_ifc_query_adapter_in_bits {
4933 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004934 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937 u8 op_mod[0x10];
4938
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940};
4941
4942struct mlx5_ifc_qp_2rst_out_bits {
4943 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004944 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004945
4946 u8 syndrome[0x20];
4947
Matan Barakb4ff3a32016-02-09 14:57:42 +02004948 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004949};
4950
4951struct mlx5_ifc_qp_2rst_in_bits {
4952 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004953 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004954
Matan Barakb4ff3a32016-02-09 14:57:42 +02004955 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004956 u8 op_mod[0x10];
4957
Matan Barakb4ff3a32016-02-09 14:57:42 +02004958 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004959 u8 qpn[0x18];
4960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962};
4963
4964struct mlx5_ifc_qp_2err_out_bits {
4965 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967
4968 u8 syndrome[0x20];
4969
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971};
4972
4973struct mlx5_ifc_qp_2err_in_bits {
4974 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004978 u8 op_mod[0x10];
4979
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981 u8 qpn[0x18];
4982
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004984};
4985
4986struct mlx5_ifc_page_fault_resume_out_bits {
4987 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004988 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004989
4990 u8 syndrome[0x20];
4991
Matan Barakb4ff3a32016-02-09 14:57:42 +02004992 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004993};
4994
4995struct mlx5_ifc_page_fault_resume_in_bits {
4996 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004997 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004998
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000 u8 op_mod[0x10];
5001
5002 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005004 u8 page_fault_type[0x3];
5005 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005007 u8 reserved_at_60[0x8];
5008 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009};
5010
5011struct mlx5_ifc_nop_out_bits {
5012 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014
5015 u8 syndrome[0x20];
5016
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018};
5019
5020struct mlx5_ifc_nop_in_bits {
5021 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005022 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005023
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025 u8 op_mod[0x10];
5026
Matan Barakb4ff3a32016-02-09 14:57:42 +02005027 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005028};
5029
5030struct mlx5_ifc_modify_vport_state_out_bits {
5031 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005032 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005033
5034 u8 syndrome[0x20];
5035
Matan Barakb4ff3a32016-02-09 14:57:42 +02005036 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005037};
5038
5039struct mlx5_ifc_modify_vport_state_in_bits {
5040 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044 u8 op_mod[0x10];
5045
5046 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048 u8 vport_number[0x10];
5049
Matan Barakb4ff3a32016-02-09 14:57:42 +02005050 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005051 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053};
5054
5055struct mlx5_ifc_modify_tis_out_bits {
5056 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005057 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005058
5059 u8 syndrome[0x20];
5060
Matan Barakb4ff3a32016-02-09 14:57:42 +02005061 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005062};
5063
majd@mellanox.com75850d02016-01-14 19:13:06 +02005064struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005065 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005066
Aviv Heller84df61e2016-05-10 13:47:50 +03005067 u8 reserved_at_20[0x1d];
5068 u8 lag_tx_port_affinity[0x1];
5069 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005070 u8 prio[0x1];
5071};
5072
Saeed Mahameede2816822015-05-28 22:28:40 +03005073struct mlx5_ifc_modify_tis_in_bits {
5074 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005075 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005076
Matan Barakb4ff3a32016-02-09 14:57:42 +02005077 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005078 u8 op_mod[0x10];
5079
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081 u8 tisn[0x18];
5082
Matan Barakb4ff3a32016-02-09 14:57:42 +02005083 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005084
majd@mellanox.com75850d02016-01-14 19:13:06 +02005085 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005086
Matan Barakb4ff3a32016-02-09 14:57:42 +02005087 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005088
5089 struct mlx5_ifc_tisc_bits ctx;
5090};
5091
Achiad Shochatd9eea402015-08-04 14:05:42 +03005092struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005093 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005094
Matan Barakb4ff3a32016-02-09 14:57:42 +02005095 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005096 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005097 u8 reserved_at_3c[0x1];
5098 u8 hash[0x1];
5099 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005100 u8 lro[0x1];
5101};
5102
Saeed Mahameede2816822015-05-28 22:28:40 +03005103struct mlx5_ifc_modify_tir_out_bits {
5104 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106
5107 u8 syndrome[0x20];
5108
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005110};
5111
5112struct mlx5_ifc_modify_tir_in_bits {
5113 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005114 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005115
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117 u8 op_mod[0x10];
5118
Matan Barakb4ff3a32016-02-09 14:57:42 +02005119 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005120 u8 tirn[0x18];
5121
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005123
Achiad Shochatd9eea402015-08-04 14:05:42 +03005124 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005125
Matan Barakb4ff3a32016-02-09 14:57:42 +02005126 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005127
5128 struct mlx5_ifc_tirc_bits ctx;
5129};
5130
5131struct mlx5_ifc_modify_sq_out_bits {
5132 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005133 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005134
5135 u8 syndrome[0x20];
5136
Matan Barakb4ff3a32016-02-09 14:57:42 +02005137 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005138};
5139
5140struct mlx5_ifc_modify_sq_in_bits {
5141 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005142 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005143
Matan Barakb4ff3a32016-02-09 14:57:42 +02005144 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005145 u8 op_mod[0x10];
5146
5147 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005148 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005149 u8 sqn[0x18];
5150
Matan Barakb4ff3a32016-02-09 14:57:42 +02005151 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005152
5153 u8 modify_bitmask[0x40];
5154
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156
5157 struct mlx5_ifc_sqc_bits ctx;
5158};
5159
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005160struct mlx5_ifc_modify_scheduling_element_out_bits {
5161 u8 status[0x8];
5162 u8 reserved_at_8[0x18];
5163
5164 u8 syndrome[0x20];
5165
5166 u8 reserved_at_40[0x1c0];
5167};
5168
5169enum {
5170 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5171 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5172};
5173
5174struct mlx5_ifc_modify_scheduling_element_in_bits {
5175 u8 opcode[0x10];
5176 u8 reserved_at_10[0x10];
5177
5178 u8 reserved_at_20[0x10];
5179 u8 op_mod[0x10];
5180
5181 u8 scheduling_hierarchy[0x8];
5182 u8 reserved_at_48[0x18];
5183
5184 u8 scheduling_element_id[0x20];
5185
5186 u8 reserved_at_80[0x20];
5187
5188 u8 modify_bitmask[0x20];
5189
5190 u8 reserved_at_c0[0x40];
5191
5192 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5193
5194 u8 reserved_at_300[0x100];
5195};
5196
Saeed Mahameede2816822015-05-28 22:28:40 +03005197struct mlx5_ifc_modify_rqt_out_bits {
5198 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200
5201 u8 syndrome[0x20];
5202
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005204};
5205
Achiad Shochat5c503682015-08-04 14:05:43 +03005206struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005207 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005208
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005210 u8 rqn_list[0x1];
5211};
5212
Saeed Mahameede2816822015-05-28 22:28:40 +03005213struct mlx5_ifc_modify_rqt_in_bits {
5214 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005216
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005218 u8 op_mod[0x10];
5219
Matan Barakb4ff3a32016-02-09 14:57:42 +02005220 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005221 u8 rqtn[0x18];
5222
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
Achiad Shochat5c503682015-08-04 14:05:43 +03005225 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005226
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005228
5229 struct mlx5_ifc_rqtc_bits ctx;
5230};
5231
5232struct mlx5_ifc_modify_rq_out_bits {
5233 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005234 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005235
5236 u8 syndrome[0x20];
5237
Matan Barakb4ff3a32016-02-09 14:57:42 +02005238 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005239};
5240
Alex Vesker83b502a2016-08-04 17:32:02 +03005241enum {
5242 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005243 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005244 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005245};
5246
Saeed Mahameede2816822015-05-28 22:28:40 +03005247struct mlx5_ifc_modify_rq_in_bits {
5248 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250
Matan Barakb4ff3a32016-02-09 14:57:42 +02005251 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005252 u8 op_mod[0x10];
5253
5254 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005255 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005256 u8 rqn[0x18];
5257
Matan Barakb4ff3a32016-02-09 14:57:42 +02005258 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005259
5260 u8 modify_bitmask[0x40];
5261
Matan Barakb4ff3a32016-02-09 14:57:42 +02005262 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005263
5264 struct mlx5_ifc_rqc_bits ctx;
5265};
5266
5267struct mlx5_ifc_modify_rmp_out_bits {
5268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005270
5271 u8 syndrome[0x20];
5272
Matan Barakb4ff3a32016-02-09 14:57:42 +02005273 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005274};
5275
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005276struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005277 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005278
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005280 u8 lwm[0x1];
5281};
5282
Saeed Mahameede2816822015-05-28 22:28:40 +03005283struct mlx5_ifc_modify_rmp_in_bits {
5284 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005285 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005286
Matan Barakb4ff3a32016-02-09 14:57:42 +02005287 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005288 u8 op_mod[0x10];
5289
5290 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005291 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005292 u8 rmpn[0x18];
5293
Matan Barakb4ff3a32016-02-09 14:57:42 +02005294 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005295
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005296 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005297
Matan Barakb4ff3a32016-02-09 14:57:42 +02005298 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005299
5300 struct mlx5_ifc_rmpc_bits ctx;
5301};
5302
5303struct mlx5_ifc_modify_nic_vport_context_out_bits {
5304 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005305 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005306
5307 u8 syndrome[0x20];
5308
Matan Barakb4ff3a32016-02-09 14:57:42 +02005309 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005310};
5311
5312struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005313 u8 reserved_at_0[0x14];
5314 u8 disable_uc_local_lb[0x1];
5315 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005316 u8 node_guid[0x1];
5317 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005318 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005319 u8 mtu[0x1];
5320 u8 change_event[0x1];
5321 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005322 u8 permanent_address[0x1];
5323 u8 addresses_list[0x1];
5324 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326};
5327
5328struct mlx5_ifc_modify_nic_vport_context_in_bits {
5329 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005333 u8 op_mod[0x10];
5334
5335 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337 u8 vport_number[0x10];
5338
5339 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5340
Matan Barakb4ff3a32016-02-09 14:57:42 +02005341 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005342
5343 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5344};
5345
5346struct mlx5_ifc_modify_hca_vport_context_out_bits {
5347 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005348 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005349
5350 u8 syndrome[0x20];
5351
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353};
5354
5355struct mlx5_ifc_modify_hca_vport_context_in_bits {
5356 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360 u8 op_mod[0x10];
5361
5362 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005363 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005364 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005365 u8 vport_number[0x10];
5366
Matan Barakb4ff3a32016-02-09 14:57:42 +02005367 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005368
5369 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5370};
5371
5372struct mlx5_ifc_modify_cq_out_bits {
5373 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005374 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005375
5376 u8 syndrome[0x20];
5377
Matan Barakb4ff3a32016-02-09 14:57:42 +02005378 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005379};
5380
5381enum {
5382 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5383 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5384};
5385
5386struct mlx5_ifc_modify_cq_in_bits {
5387 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005388 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005389
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391 u8 op_mod[0x10];
5392
Matan Barakb4ff3a32016-02-09 14:57:42 +02005393 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005394 u8 cqn[0x18];
5395
5396 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5397
5398 struct mlx5_ifc_cqc_bits cq_context;
5399
Matan Barakb4ff3a32016-02-09 14:57:42 +02005400 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005401
5402 u8 pas[0][0x40];
5403};
5404
5405struct mlx5_ifc_modify_cong_status_out_bits {
5406 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408
5409 u8 syndrome[0x20];
5410
Matan Barakb4ff3a32016-02-09 14:57:42 +02005411 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005412};
5413
5414struct mlx5_ifc_modify_cong_status_in_bits {
5415 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417
Matan Barakb4ff3a32016-02-09 14:57:42 +02005418 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005419 u8 op_mod[0x10];
5420
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422 u8 priority[0x4];
5423 u8 cong_protocol[0x4];
5424
5425 u8 enable[0x1];
5426 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005428};
5429
5430struct mlx5_ifc_modify_cong_params_out_bits {
5431 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005432 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005433
5434 u8 syndrome[0x20];
5435
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437};
5438
5439struct mlx5_ifc_modify_cong_params_in_bits {
5440 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005441 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005442
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444 u8 op_mod[0x10];
5445
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447 u8 cong_protocol[0x4];
5448
5449 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5450
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452
5453 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5454};
5455
5456struct mlx5_ifc_manage_pages_out_bits {
5457 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005458 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005459
5460 u8 syndrome[0x20];
5461
5462 u8 output_num_entries[0x20];
5463
Matan Barakb4ff3a32016-02-09 14:57:42 +02005464 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005465
5466 u8 pas[0][0x40];
5467};
5468
5469enum {
5470 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5471 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5472 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5473};
5474
5475struct mlx5_ifc_manage_pages_in_bits {
5476 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478
Matan Barakb4ff3a32016-02-09 14:57:42 +02005479 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005480 u8 op_mod[0x10];
5481
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483 u8 function_id[0x10];
5484
5485 u8 input_num_entries[0x20];
5486
5487 u8 pas[0][0x40];
5488};
5489
5490struct mlx5_ifc_mad_ifc_out_bits {
5491 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005492 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005493
5494 u8 syndrome[0x20];
5495
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005497
5498 u8 response_mad_packet[256][0x8];
5499};
5500
5501struct mlx5_ifc_mad_ifc_in_bits {
5502 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005503 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005504
Matan Barakb4ff3a32016-02-09 14:57:42 +02005505 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005506 u8 op_mod[0x10];
5507
5508 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510 u8 port[0x8];
5511
Matan Barakb4ff3a32016-02-09 14:57:42 +02005512 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005513
5514 u8 mad[256][0x8];
5515};
5516
5517struct mlx5_ifc_init_hca_out_bits {
5518 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005519 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005520
5521 u8 syndrome[0x20];
5522
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524};
5525
5526struct mlx5_ifc_init_hca_in_bits {
5527 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529
Matan Barakb4ff3a32016-02-09 14:57:42 +02005530 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005531 u8 op_mod[0x10];
5532
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534};
5535
5536struct mlx5_ifc_init2rtr_qp_out_bits {
5537 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539
5540 u8 syndrome[0x20];
5541
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543};
5544
5545struct mlx5_ifc_init2rtr_qp_in_bits {
5546 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550 u8 op_mod[0x10];
5551
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553 u8 qpn[0x18];
5554
Matan Barakb4ff3a32016-02-09 14:57:42 +02005555 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005556
5557 u8 opt_param_mask[0x20];
5558
Matan Barakb4ff3a32016-02-09 14:57:42 +02005559 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005560
5561 struct mlx5_ifc_qpc_bits qpc;
5562
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564};
5565
5566struct mlx5_ifc_init2init_qp_out_bits {
5567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005568 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005569
5570 u8 syndrome[0x20];
5571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573};
5574
5575struct mlx5_ifc_init2init_qp_in_bits {
5576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005577 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580 u8 op_mod[0x10];
5581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583 u8 qpn[0x18];
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586
5587 u8 opt_param_mask[0x20];
5588
Matan Barakb4ff3a32016-02-09 14:57:42 +02005589 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005590
5591 struct mlx5_ifc_qpc_bits qpc;
5592
Matan Barakb4ff3a32016-02-09 14:57:42 +02005593 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005594};
5595
5596struct mlx5_ifc_get_dropped_packet_log_out_bits {
5597 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599
5600 u8 syndrome[0x20];
5601
Matan Barakb4ff3a32016-02-09 14:57:42 +02005602 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005603
5604 u8 packet_headers_log[128][0x8];
5605
5606 u8 packet_syndrome[64][0x8];
5607};
5608
5609struct mlx5_ifc_get_dropped_packet_log_in_bits {
5610 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005611 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005612
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614 u8 op_mod[0x10];
5615
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617};
5618
5619struct mlx5_ifc_gen_eqe_in_bits {
5620 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005621 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624 u8 op_mod[0x10];
5625
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627 u8 eq_number[0x8];
5628
Matan Barakb4ff3a32016-02-09 14:57:42 +02005629 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005630
5631 u8 eqe[64][0x8];
5632};
5633
5634struct mlx5_ifc_gen_eq_out_bits {
5635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637
5638 u8 syndrome[0x20];
5639
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641};
5642
5643struct mlx5_ifc_enable_hca_out_bits {
5644 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646
5647 u8 syndrome[0x20];
5648
Matan Barakb4ff3a32016-02-09 14:57:42 +02005649 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005650};
5651
5652struct mlx5_ifc_enable_hca_in_bits {
5653 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005654 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005655
Matan Barakb4ff3a32016-02-09 14:57:42 +02005656 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005657 u8 op_mod[0x10];
5658
Matan Barakb4ff3a32016-02-09 14:57:42 +02005659 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005660 u8 function_id[0x10];
5661
Matan Barakb4ff3a32016-02-09 14:57:42 +02005662 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005663};
5664
5665struct mlx5_ifc_drain_dct_out_bits {
5666 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668
5669 u8 syndrome[0x20];
5670
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672};
5673
5674struct mlx5_ifc_drain_dct_in_bits {
5675 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005676 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005677
Matan Barakb4ff3a32016-02-09 14:57:42 +02005678 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005679 u8 op_mod[0x10];
5680
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682 u8 dctn[0x18];
5683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685};
5686
5687struct mlx5_ifc_disable_hca_out_bits {
5688 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690
5691 u8 syndrome[0x20];
5692
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694};
5695
5696struct mlx5_ifc_disable_hca_in_bits {
5697 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699
Matan Barakb4ff3a32016-02-09 14:57:42 +02005700 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005701 u8 op_mod[0x10];
5702
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704 u8 function_id[0x10];
5705
Matan Barakb4ff3a32016-02-09 14:57:42 +02005706 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005707};
5708
5709struct mlx5_ifc_detach_from_mcg_out_bits {
5710 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712
5713 u8 syndrome[0x20];
5714
Matan Barakb4ff3a32016-02-09 14:57:42 +02005715 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005716};
5717
5718struct mlx5_ifc_detach_from_mcg_in_bits {
5719 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721
Matan Barakb4ff3a32016-02-09 14:57:42 +02005722 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005723 u8 op_mod[0x10];
5724
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726 u8 qpn[0x18];
5727
Matan Barakb4ff3a32016-02-09 14:57:42 +02005728 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005729
5730 u8 multicast_gid[16][0x8];
5731};
5732
Saeed Mahameed74862162016-06-09 15:11:34 +03005733struct mlx5_ifc_destroy_xrq_out_bits {
5734 u8 status[0x8];
5735 u8 reserved_at_8[0x18];
5736
5737 u8 syndrome[0x20];
5738
5739 u8 reserved_at_40[0x40];
5740};
5741
5742struct mlx5_ifc_destroy_xrq_in_bits {
5743 u8 opcode[0x10];
5744 u8 reserved_at_10[0x10];
5745
5746 u8 reserved_at_20[0x10];
5747 u8 op_mod[0x10];
5748
5749 u8 reserved_at_40[0x8];
5750 u8 xrqn[0x18];
5751
5752 u8 reserved_at_60[0x20];
5753};
5754
Saeed Mahameede2816822015-05-28 22:28:40 +03005755struct mlx5_ifc_destroy_xrc_srq_out_bits {
5756 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758
5759 u8 syndrome[0x20];
5760
Matan Barakb4ff3a32016-02-09 14:57:42 +02005761 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005762};
5763
5764struct mlx5_ifc_destroy_xrc_srq_in_bits {
5765 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005766 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005767
Matan Barakb4ff3a32016-02-09 14:57:42 +02005768 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005769 u8 op_mod[0x10];
5770
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772 u8 xrc_srqn[0x18];
5773
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775};
5776
5777struct mlx5_ifc_destroy_tis_out_bits {
5778 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780
5781 u8 syndrome[0x20];
5782
Matan Barakb4ff3a32016-02-09 14:57:42 +02005783 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005784};
5785
5786struct mlx5_ifc_destroy_tis_in_bits {
5787 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005788 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005789
Matan Barakb4ff3a32016-02-09 14:57:42 +02005790 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005791 u8 op_mod[0x10];
5792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794 u8 tisn[0x18];
5795
Matan Barakb4ff3a32016-02-09 14:57:42 +02005796 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005797};
5798
5799struct mlx5_ifc_destroy_tir_out_bits {
5800 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802
5803 u8 syndrome[0x20];
5804
Matan Barakb4ff3a32016-02-09 14:57:42 +02005805 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005806};
5807
5808struct mlx5_ifc_destroy_tir_in_bits {
5809 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005810 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005811
Matan Barakb4ff3a32016-02-09 14:57:42 +02005812 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005813 u8 op_mod[0x10];
5814
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816 u8 tirn[0x18];
5817
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819};
5820
5821struct mlx5_ifc_destroy_srq_out_bits {
5822 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824
5825 u8 syndrome[0x20];
5826
Matan Barakb4ff3a32016-02-09 14:57:42 +02005827 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005828};
5829
5830struct mlx5_ifc_destroy_srq_in_bits {
5831 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833
Matan Barakb4ff3a32016-02-09 14:57:42 +02005834 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005835 u8 op_mod[0x10];
5836
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838 u8 srqn[0x18];
5839
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841};
5842
5843struct mlx5_ifc_destroy_sq_out_bits {
5844 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846
5847 u8 syndrome[0x20];
5848
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850};
5851
5852struct mlx5_ifc_destroy_sq_in_bits {
5853 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855
Matan Barakb4ff3a32016-02-09 14:57:42 +02005856 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005857 u8 op_mod[0x10];
5858
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860 u8 sqn[0x18];
5861
Matan Barakb4ff3a32016-02-09 14:57:42 +02005862 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005863};
5864
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005865struct mlx5_ifc_destroy_scheduling_element_out_bits {
5866 u8 status[0x8];
5867 u8 reserved_at_8[0x18];
5868
5869 u8 syndrome[0x20];
5870
5871 u8 reserved_at_40[0x1c0];
5872};
5873
5874struct mlx5_ifc_destroy_scheduling_element_in_bits {
5875 u8 opcode[0x10];
5876 u8 reserved_at_10[0x10];
5877
5878 u8 reserved_at_20[0x10];
5879 u8 op_mod[0x10];
5880
5881 u8 scheduling_hierarchy[0x8];
5882 u8 reserved_at_48[0x18];
5883
5884 u8 scheduling_element_id[0x20];
5885
5886 u8 reserved_at_80[0x180];
5887};
5888
Saeed Mahameede2816822015-05-28 22:28:40 +03005889struct mlx5_ifc_destroy_rqt_out_bits {
5890 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892
5893 u8 syndrome[0x20];
5894
Matan Barakb4ff3a32016-02-09 14:57:42 +02005895 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005896};
5897
5898struct mlx5_ifc_destroy_rqt_in_bits {
5899 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005900 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005901
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903 u8 op_mod[0x10];
5904
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906 u8 rqtn[0x18];
5907
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909};
5910
5911struct mlx5_ifc_destroy_rq_out_bits {
5912 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914
5915 u8 syndrome[0x20];
5916
Matan Barakb4ff3a32016-02-09 14:57:42 +02005917 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005918};
5919
5920struct mlx5_ifc_destroy_rq_in_bits {
5921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005923
Matan Barakb4ff3a32016-02-09 14:57:42 +02005924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005925 u8 op_mod[0x10];
5926
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928 u8 rqn[0x18];
5929
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931};
5932
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005933struct mlx5_ifc_set_delay_drop_params_in_bits {
5934 u8 opcode[0x10];
5935 u8 reserved_at_10[0x10];
5936
5937 u8 reserved_at_20[0x10];
5938 u8 op_mod[0x10];
5939
5940 u8 reserved_at_40[0x20];
5941
5942 u8 reserved_at_60[0x10];
5943 u8 delay_drop_timeout[0x10];
5944};
5945
5946struct mlx5_ifc_set_delay_drop_params_out_bits {
5947 u8 status[0x8];
5948 u8 reserved_at_8[0x18];
5949
5950 u8 syndrome[0x20];
5951
5952 u8 reserved_at_40[0x40];
5953};
5954
Saeed Mahameede2816822015-05-28 22:28:40 +03005955struct mlx5_ifc_destroy_rmp_out_bits {
5956 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
5959 u8 syndrome[0x20];
5960
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962};
5963
5964struct mlx5_ifc_destroy_rmp_in_bits {
5965 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969 u8 op_mod[0x10];
5970
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972 u8 rmpn[0x18];
5973
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975};
5976
5977struct mlx5_ifc_destroy_qp_out_bits {
5978 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980
5981 u8 syndrome[0x20];
5982
Matan Barakb4ff3a32016-02-09 14:57:42 +02005983 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005984};
5985
5986struct mlx5_ifc_destroy_qp_in_bits {
5987 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989
Matan Barakb4ff3a32016-02-09 14:57:42 +02005990 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005991 u8 op_mod[0x10];
5992
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994 u8 qpn[0x18];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
5999struct mlx5_ifc_destroy_psv_out_bits {
6000 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002
6003 u8 syndrome[0x20];
6004
Matan Barakb4ff3a32016-02-09 14:57:42 +02006005 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006006};
6007
6008struct mlx5_ifc_destroy_psv_in_bits {
6009 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006010 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006011
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013 u8 op_mod[0x10];
6014
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016 u8 psvn[0x18];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019};
6020
6021struct mlx5_ifc_destroy_mkey_out_bits {
6022 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024
6025 u8 syndrome[0x20];
6026
Matan Barakb4ff3a32016-02-09 14:57:42 +02006027 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006028};
6029
6030struct mlx5_ifc_destroy_mkey_in_bits {
6031 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035 u8 op_mod[0x10];
6036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038 u8 mkey_index[0x18];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041};
6042
6043struct mlx5_ifc_destroy_flow_table_out_bits {
6044 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046
6047 u8 syndrome[0x20];
6048
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050};
6051
6052struct mlx5_ifc_destroy_flow_table_in_bits {
6053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057 u8 op_mod[0x10];
6058
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006059 u8 other_vport[0x1];
6060 u8 reserved_at_41[0xf];
6061 u8 vport_number[0x10];
6062
6063 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006064
6065 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067
Matan Barakb4ff3a32016-02-09 14:57:42 +02006068 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069 u8 table_id[0x18];
6070
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072};
6073
6074struct mlx5_ifc_destroy_flow_group_out_bits {
6075 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006076 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006077
6078 u8 syndrome[0x20];
6079
Matan Barakb4ff3a32016-02-09 14:57:42 +02006080 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006081};
6082
6083struct mlx5_ifc_destroy_flow_group_in_bits {
6084 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006085 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006086
Matan Barakb4ff3a32016-02-09 14:57:42 +02006087 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006088 u8 op_mod[0x10];
6089
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006090 u8 other_vport[0x1];
6091 u8 reserved_at_41[0xf];
6092 u8 vport_number[0x10];
6093
6094 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006095
6096 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006097 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006098
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100 u8 table_id[0x18];
6101
6102 u8 group_id[0x20];
6103
Matan Barakb4ff3a32016-02-09 14:57:42 +02006104 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006105};
6106
6107struct mlx5_ifc_destroy_eq_out_bits {
6108 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006109 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006110
6111 u8 syndrome[0x20];
6112
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114};
6115
6116struct mlx5_ifc_destroy_eq_in_bits {
6117 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119
Matan Barakb4ff3a32016-02-09 14:57:42 +02006120 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006121 u8 op_mod[0x10];
6122
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124 u8 eq_number[0x8];
6125
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127};
6128
6129struct mlx5_ifc_destroy_dct_out_bits {
6130 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132
6133 u8 syndrome[0x20];
6134
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136};
6137
6138struct mlx5_ifc_destroy_dct_in_bits {
6139 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141
Matan Barakb4ff3a32016-02-09 14:57:42 +02006142 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006143 u8 op_mod[0x10];
6144
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146 u8 dctn[0x18];
6147
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149};
6150
6151struct mlx5_ifc_destroy_cq_out_bits {
6152 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006153 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006154
6155 u8 syndrome[0x20];
6156
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158};
6159
6160struct mlx5_ifc_destroy_cq_in_bits {
6161 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163
Matan Barakb4ff3a32016-02-09 14:57:42 +02006164 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006165 u8 op_mod[0x10];
6166
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168 u8 cqn[0x18];
6169
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171};
6172
6173struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6174 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176
6177 u8 syndrome[0x20];
6178
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180};
6181
6182struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6183 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185
Matan Barakb4ff3a32016-02-09 14:57:42 +02006186 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006187 u8 op_mod[0x10];
6188
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192 u8 vxlan_udp_port[0x10];
6193};
6194
6195struct mlx5_ifc_delete_l2_table_entry_out_bits {
6196 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006197 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006198
6199 u8 syndrome[0x20];
6200
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202};
6203
6204struct mlx5_ifc_delete_l2_table_entry_in_bits {
6205 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207
Matan Barakb4ff3a32016-02-09 14:57:42 +02006208 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006209 u8 op_mod[0x10];
6210
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214 u8 table_index[0x18];
6215
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217};
6218
6219struct mlx5_ifc_delete_fte_out_bits {
6220 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222
6223 u8 syndrome[0x20];
6224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226};
6227
6228struct mlx5_ifc_delete_fte_in_bits {
6229 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006230 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006231
Matan Barakb4ff3a32016-02-09 14:57:42 +02006232 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006233 u8 op_mod[0x10];
6234
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006235 u8 other_vport[0x1];
6236 u8 reserved_at_41[0xf];
6237 u8 vport_number[0x10];
6238
6239 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240
6241 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243
Matan Barakb4ff3a32016-02-09 14:57:42 +02006244 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006245 u8 table_id[0x18];
6246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248
6249 u8 flow_index[0x20];
6250
Matan Barakb4ff3a32016-02-09 14:57:42 +02006251 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006252};
6253
6254struct mlx5_ifc_dealloc_xrcd_out_bits {
6255 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006256 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006257
6258 u8 syndrome[0x20];
6259
Matan Barakb4ff3a32016-02-09 14:57:42 +02006260 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006261};
6262
6263struct mlx5_ifc_dealloc_xrcd_in_bits {
6264 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006265 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006266
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268 u8 op_mod[0x10];
6269
Matan Barakb4ff3a32016-02-09 14:57:42 +02006270 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006271 u8 xrcd[0x18];
6272
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274};
6275
6276struct mlx5_ifc_dealloc_uar_out_bits {
6277 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279
6280 u8 syndrome[0x20];
6281
Matan Barakb4ff3a32016-02-09 14:57:42 +02006282 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006283};
6284
6285struct mlx5_ifc_dealloc_uar_in_bits {
6286 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288
Matan Barakb4ff3a32016-02-09 14:57:42 +02006289 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006290 u8 op_mod[0x10];
6291
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293 u8 uar[0x18];
6294
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296};
6297
6298struct mlx5_ifc_dealloc_transport_domain_out_bits {
6299 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301
6302 u8 syndrome[0x20];
6303
Matan Barakb4ff3a32016-02-09 14:57:42 +02006304 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006305};
6306
6307struct mlx5_ifc_dealloc_transport_domain_in_bits {
6308 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312 u8 op_mod[0x10];
6313
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315 u8 transport_domain[0x18];
6316
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318};
6319
6320struct mlx5_ifc_dealloc_q_counter_out_bits {
6321 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323
6324 u8 syndrome[0x20];
6325
Matan Barakb4ff3a32016-02-09 14:57:42 +02006326 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006327};
6328
6329struct mlx5_ifc_dealloc_q_counter_in_bits {
6330 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334 u8 op_mod[0x10];
6335
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337 u8 counter_set_id[0x8];
6338
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340};
6341
6342struct mlx5_ifc_dealloc_pd_out_bits {
6343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345
6346 u8 syndrome[0x20];
6347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349};
6350
6351struct mlx5_ifc_dealloc_pd_in_bits {
6352 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356 u8 op_mod[0x10];
6357
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359 u8 pd[0x18];
6360
Matan Barakb4ff3a32016-02-09 14:57:42 +02006361 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006362};
6363
Amir Vadai9dc0b282016-05-13 12:55:39 +00006364struct mlx5_ifc_dealloc_flow_counter_out_bits {
6365 u8 status[0x8];
6366 u8 reserved_at_8[0x18];
6367
6368 u8 syndrome[0x20];
6369
6370 u8 reserved_at_40[0x40];
6371};
6372
6373struct mlx5_ifc_dealloc_flow_counter_in_bits {
6374 u8 opcode[0x10];
6375 u8 reserved_at_10[0x10];
6376
6377 u8 reserved_at_20[0x10];
6378 u8 op_mod[0x10];
6379
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006380 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006381
6382 u8 reserved_at_60[0x20];
6383};
6384
Saeed Mahameed74862162016-06-09 15:11:34 +03006385struct mlx5_ifc_create_xrq_out_bits {
6386 u8 status[0x8];
6387 u8 reserved_at_8[0x18];
6388
6389 u8 syndrome[0x20];
6390
6391 u8 reserved_at_40[0x8];
6392 u8 xrqn[0x18];
6393
6394 u8 reserved_at_60[0x20];
6395};
6396
6397struct mlx5_ifc_create_xrq_in_bits {
6398 u8 opcode[0x10];
6399 u8 reserved_at_10[0x10];
6400
6401 u8 reserved_at_20[0x10];
6402 u8 op_mod[0x10];
6403
6404 u8 reserved_at_40[0x40];
6405
6406 struct mlx5_ifc_xrqc_bits xrq_context;
6407};
6408
Saeed Mahameede2816822015-05-28 22:28:40 +03006409struct mlx5_ifc_create_xrc_srq_out_bits {
6410 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412
6413 u8 syndrome[0x20];
6414
Matan Barakb4ff3a32016-02-09 14:57:42 +02006415 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006416 u8 xrc_srqn[0x18];
6417
Matan Barakb4ff3a32016-02-09 14:57:42 +02006418 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006419};
6420
6421struct mlx5_ifc_create_xrc_srq_in_bits {
6422 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424
Matan Barakb4ff3a32016-02-09 14:57:42 +02006425 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006426 u8 op_mod[0x10];
6427
Matan Barakb4ff3a32016-02-09 14:57:42 +02006428 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006429
6430 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6431
Matan Barakb4ff3a32016-02-09 14:57:42 +02006432 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006433
6434 u8 pas[0][0x40];
6435};
6436
6437struct mlx5_ifc_create_tis_out_bits {
6438 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006439 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006440
6441 u8 syndrome[0x20];
6442
Matan Barakb4ff3a32016-02-09 14:57:42 +02006443 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006444 u8 tisn[0x18];
6445
Matan Barakb4ff3a32016-02-09 14:57:42 +02006446 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006447};
6448
6449struct mlx5_ifc_create_tis_in_bits {
6450 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006451 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006452
Matan Barakb4ff3a32016-02-09 14:57:42 +02006453 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006454 u8 op_mod[0x10];
6455
Matan Barakb4ff3a32016-02-09 14:57:42 +02006456 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006457
6458 struct mlx5_ifc_tisc_bits ctx;
6459};
6460
6461struct mlx5_ifc_create_tir_out_bits {
6462 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006463 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006464
6465 u8 syndrome[0x20];
6466
Matan Barakb4ff3a32016-02-09 14:57:42 +02006467 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006468 u8 tirn[0x18];
6469
Matan Barakb4ff3a32016-02-09 14:57:42 +02006470 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006471};
6472
6473struct mlx5_ifc_create_tir_in_bits {
6474 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006475 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006476
Matan Barakb4ff3a32016-02-09 14:57:42 +02006477 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006478 u8 op_mod[0x10];
6479
Matan Barakb4ff3a32016-02-09 14:57:42 +02006480 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006481
6482 struct mlx5_ifc_tirc_bits ctx;
6483};
6484
6485struct mlx5_ifc_create_srq_out_bits {
6486 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006487 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006488
6489 u8 syndrome[0x20];
6490
Matan Barakb4ff3a32016-02-09 14:57:42 +02006491 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006492 u8 srqn[0x18];
6493
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495};
6496
6497struct mlx5_ifc_create_srq_in_bits {
6498 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502 u8 op_mod[0x10];
6503
Matan Barakb4ff3a32016-02-09 14:57:42 +02006504 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006505
6506 struct mlx5_ifc_srqc_bits srq_context_entry;
6507
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509
6510 u8 pas[0][0x40];
6511};
6512
6513struct mlx5_ifc_create_sq_out_bits {
6514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006516
6517 u8 syndrome[0x20];
6518
Matan Barakb4ff3a32016-02-09 14:57:42 +02006519 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006520 u8 sqn[0x18];
6521
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523};
6524
6525struct mlx5_ifc_create_sq_in_bits {
6526 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528
Matan Barakb4ff3a32016-02-09 14:57:42 +02006529 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006530 u8 op_mod[0x10];
6531
Matan Barakb4ff3a32016-02-09 14:57:42 +02006532 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006533
6534 struct mlx5_ifc_sqc_bits ctx;
6535};
6536
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006537struct mlx5_ifc_create_scheduling_element_out_bits {
6538 u8 status[0x8];
6539 u8 reserved_at_8[0x18];
6540
6541 u8 syndrome[0x20];
6542
6543 u8 reserved_at_40[0x40];
6544
6545 u8 scheduling_element_id[0x20];
6546
6547 u8 reserved_at_a0[0x160];
6548};
6549
6550struct mlx5_ifc_create_scheduling_element_in_bits {
6551 u8 opcode[0x10];
6552 u8 reserved_at_10[0x10];
6553
6554 u8 reserved_at_20[0x10];
6555 u8 op_mod[0x10];
6556
6557 u8 scheduling_hierarchy[0x8];
6558 u8 reserved_at_48[0x18];
6559
6560 u8 reserved_at_60[0xa0];
6561
6562 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6563
6564 u8 reserved_at_300[0x100];
6565};
6566
Saeed Mahameede2816822015-05-28 22:28:40 +03006567struct mlx5_ifc_create_rqt_out_bits {
6568 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006569 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006570
6571 u8 syndrome[0x20];
6572
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574 u8 rqtn[0x18];
6575
Matan Barakb4ff3a32016-02-09 14:57:42 +02006576 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006577};
6578
6579struct mlx5_ifc_create_rqt_in_bits {
6580 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006581 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006582
Matan Barakb4ff3a32016-02-09 14:57:42 +02006583 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006584 u8 op_mod[0x10];
6585
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587
6588 struct mlx5_ifc_rqtc_bits rqt_context;
6589};
6590
6591struct mlx5_ifc_create_rq_out_bits {
6592 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006593 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006594
6595 u8 syndrome[0x20];
6596
Matan Barakb4ff3a32016-02-09 14:57:42 +02006597 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006598 u8 rqn[0x18];
6599
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601};
6602
6603struct mlx5_ifc_create_rq_in_bits {
6604 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606
Matan Barakb4ff3a32016-02-09 14:57:42 +02006607 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006608 u8 op_mod[0x10];
6609
Matan Barakb4ff3a32016-02-09 14:57:42 +02006610 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006611
6612 struct mlx5_ifc_rqc_bits ctx;
6613};
6614
6615struct mlx5_ifc_create_rmp_out_bits {
6616 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006617 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006618
6619 u8 syndrome[0x20];
6620
Matan Barakb4ff3a32016-02-09 14:57:42 +02006621 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006622 u8 rmpn[0x18];
6623
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625};
6626
6627struct mlx5_ifc_create_rmp_in_bits {
6628 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006629 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006630
Matan Barakb4ff3a32016-02-09 14:57:42 +02006631 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006632 u8 op_mod[0x10];
6633
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635
6636 struct mlx5_ifc_rmpc_bits ctx;
6637};
6638
6639struct mlx5_ifc_create_qp_out_bits {
6640 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006641 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006642
6643 u8 syndrome[0x20];
6644
Matan Barakb4ff3a32016-02-09 14:57:42 +02006645 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006646 u8 qpn[0x18];
6647
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649};
6650
6651struct mlx5_ifc_create_qp_in_bits {
6652 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006653 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006654
Matan Barakb4ff3a32016-02-09 14:57:42 +02006655 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006656 u8 op_mod[0x10];
6657
Matan Barakb4ff3a32016-02-09 14:57:42 +02006658 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006659
6660 u8 opt_param_mask[0x20];
6661
Matan Barakb4ff3a32016-02-09 14:57:42 +02006662 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006663
6664 struct mlx5_ifc_qpc_bits qpc;
6665
Matan Barakb4ff3a32016-02-09 14:57:42 +02006666 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006667
6668 u8 pas[0][0x40];
6669};
6670
6671struct mlx5_ifc_create_psv_out_bits {
6672 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006673 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006674
6675 u8 syndrome[0x20];
6676
Matan Barakb4ff3a32016-02-09 14:57:42 +02006677 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678
Matan Barakb4ff3a32016-02-09 14:57:42 +02006679 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006680 u8 psv0_index[0x18];
6681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 psv1_index[0x18];
6684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686 u8 psv2_index[0x18];
6687
Matan Barakb4ff3a32016-02-09 14:57:42 +02006688 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006689 u8 psv3_index[0x18];
6690};
6691
6692struct mlx5_ifc_create_psv_in_bits {
6693 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006694 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006695
Matan Barakb4ff3a32016-02-09 14:57:42 +02006696 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006697 u8 op_mod[0x10];
6698
6699 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006700 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006701 u8 pd[0x18];
6702
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704};
6705
6706struct mlx5_ifc_create_mkey_out_bits {
6707 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006708 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006709
6710 u8 syndrome[0x20];
6711
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713 u8 mkey_index[0x18];
6714
Matan Barakb4ff3a32016-02-09 14:57:42 +02006715 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006716};
6717
6718struct mlx5_ifc_create_mkey_in_bits {
6719 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721
Matan Barakb4ff3a32016-02-09 14:57:42 +02006722 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006723 u8 op_mod[0x10];
6724
Matan Barakb4ff3a32016-02-09 14:57:42 +02006725 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006726
6727 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006728 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006729
6730 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6731
Matan Barakb4ff3a32016-02-09 14:57:42 +02006732 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006733
6734 u8 translations_octword_actual_size[0x20];
6735
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737
6738 u8 klm_pas_mtt[0][0x20];
6739};
6740
6741struct mlx5_ifc_create_flow_table_out_bits {
6742 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006743 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006744
6745 u8 syndrome[0x20];
6746
Matan Barakb4ff3a32016-02-09 14:57:42 +02006747 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748 u8 table_id[0x18];
6749
Matan Barakb4ff3a32016-02-09 14:57:42 +02006750 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006751};
6752
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006753struct mlx5_ifc_flow_table_context_bits {
6754 u8 encap_en[0x1];
6755 u8 decap_en[0x1];
6756 u8 reserved_at_2[0x2];
6757 u8 table_miss_action[0x4];
6758 u8 level[0x8];
6759 u8 reserved_at_10[0x8];
6760 u8 log_size[0x8];
6761
6762 u8 reserved_at_20[0x8];
6763 u8 table_miss_id[0x18];
6764
6765 u8 reserved_at_40[0x8];
6766 u8 lag_master_next_table_id[0x18];
6767
6768 u8 reserved_at_60[0xe0];
6769};
6770
Saeed Mahameede2816822015-05-28 22:28:40 +03006771struct mlx5_ifc_create_flow_table_in_bits {
6772 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006773 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006774
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776 u8 op_mod[0x10];
6777
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006778 u8 other_vport[0x1];
6779 u8 reserved_at_41[0xf];
6780 u8 vport_number[0x10];
6781
6782 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783
6784 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006785 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006786
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006789 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006790};
6791
6792struct mlx5_ifc_create_flow_group_out_bits {
6793 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795
6796 u8 syndrome[0x20];
6797
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799 u8 group_id[0x18];
6800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802};
6803
6804enum {
6805 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6806 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6807 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6808};
6809
6810struct mlx5_ifc_create_flow_group_in_bits {
6811 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815 u8 op_mod[0x10];
6816
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006817 u8 other_vport[0x1];
6818 u8 reserved_at_41[0xf];
6819 u8 vport_number[0x10];
6820
6821 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822
6823 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006824 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006825
Matan Barakb4ff3a32016-02-09 14:57:42 +02006826 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006827 u8 table_id[0x18];
6828
Matan Barakb4ff3a32016-02-09 14:57:42 +02006829 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006830
6831 u8 start_flow_index[0x20];
6832
Matan Barakb4ff3a32016-02-09 14:57:42 +02006833 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834
6835 u8 end_flow_index[0x20];
6836
Matan Barakb4ff3a32016-02-09 14:57:42 +02006837 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840 u8 match_criteria_enable[0x8];
6841
6842 struct mlx5_ifc_fte_match_param_bits match_criteria;
6843
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845};
6846
6847struct mlx5_ifc_create_eq_out_bits {
6848 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
6851 u8 syndrome[0x20];
6852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854 u8 eq_number[0x8];
6855
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857};
6858
6859struct mlx5_ifc_create_eq_in_bits {
6860 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006861 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006862
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864 u8 op_mod[0x10];
6865
Matan Barakb4ff3a32016-02-09 14:57:42 +02006866 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006867
6868 struct mlx5_ifc_eqc_bits eq_context_entry;
6869
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871
6872 u8 event_bitmask[0x40];
6873
Matan Barakb4ff3a32016-02-09 14:57:42 +02006874 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006875
6876 u8 pas[0][0x40];
6877};
6878
6879struct mlx5_ifc_create_dct_out_bits {
6880 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882
6883 u8 syndrome[0x20];
6884
Matan Barakb4ff3a32016-02-09 14:57:42 +02006885 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006886 u8 dctn[0x18];
6887
Matan Barakb4ff3a32016-02-09 14:57:42 +02006888 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006889};
6890
6891struct mlx5_ifc_create_dct_in_bits {
6892 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006893 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006894
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896 u8 op_mod[0x10];
6897
Matan Barakb4ff3a32016-02-09 14:57:42 +02006898 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006899
6900 struct mlx5_ifc_dctc_bits dct_context_entry;
6901
Matan Barakb4ff3a32016-02-09 14:57:42 +02006902 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006903};
6904
6905struct mlx5_ifc_create_cq_out_bits {
6906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006908
6909 u8 syndrome[0x20];
6910
Matan Barakb4ff3a32016-02-09 14:57:42 +02006911 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006912 u8 cqn[0x18];
6913
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915};
6916
6917struct mlx5_ifc_create_cq_in_bits {
6918 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920
Matan Barakb4ff3a32016-02-09 14:57:42 +02006921 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006922 u8 op_mod[0x10];
6923
Matan Barakb4ff3a32016-02-09 14:57:42 +02006924 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006925
6926 struct mlx5_ifc_cqc_bits cq_context;
6927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929
6930 u8 pas[0][0x40];
6931};
6932
6933struct mlx5_ifc_config_int_moderation_out_bits {
6934 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006935 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006936
6937 u8 syndrome[0x20];
6938
Matan Barakb4ff3a32016-02-09 14:57:42 +02006939 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006940 u8 min_delay[0xc];
6941 u8 int_vector[0x10];
6942
Matan Barakb4ff3a32016-02-09 14:57:42 +02006943 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006944};
6945
6946enum {
6947 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6948 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6949};
6950
6951struct mlx5_ifc_config_int_moderation_in_bits {
6952 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956 u8 op_mod[0x10];
6957
Matan Barakb4ff3a32016-02-09 14:57:42 +02006958 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006959 u8 min_delay[0xc];
6960 u8 int_vector[0x10];
6961
Matan Barakb4ff3a32016-02-09 14:57:42 +02006962 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006963};
6964
6965struct mlx5_ifc_attach_to_mcg_out_bits {
6966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006968
6969 u8 syndrome[0x20];
6970
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972};
6973
6974struct mlx5_ifc_attach_to_mcg_in_bits {
6975 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006976 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979 u8 op_mod[0x10];
6980
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982 u8 qpn[0x18];
6983
Matan Barakb4ff3a32016-02-09 14:57:42 +02006984 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006985
6986 u8 multicast_gid[16][0x8];
6987};
6988
Saeed Mahameed74862162016-06-09 15:11:34 +03006989struct mlx5_ifc_arm_xrq_out_bits {
6990 u8 status[0x8];
6991 u8 reserved_at_8[0x18];
6992
6993 u8 syndrome[0x20];
6994
6995 u8 reserved_at_40[0x40];
6996};
6997
6998struct mlx5_ifc_arm_xrq_in_bits {
6999 u8 opcode[0x10];
7000 u8 reserved_at_10[0x10];
7001
7002 u8 reserved_at_20[0x10];
7003 u8 op_mod[0x10];
7004
7005 u8 reserved_at_40[0x8];
7006 u8 xrqn[0x18];
7007
7008 u8 reserved_at_60[0x10];
7009 u8 lwm[0x10];
7010};
7011
Saeed Mahameede2816822015-05-28 22:28:40 +03007012struct mlx5_ifc_arm_xrc_srq_out_bits {
7013 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007014 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007015
7016 u8 syndrome[0x20];
7017
Matan Barakb4ff3a32016-02-09 14:57:42 +02007018 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007019};
7020
7021enum {
7022 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7023};
7024
7025struct mlx5_ifc_arm_xrc_srq_in_bits {
7026 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030 u8 op_mod[0x10];
7031
Matan Barakb4ff3a32016-02-09 14:57:42 +02007032 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007033 u8 xrc_srqn[0x18];
7034
Matan Barakb4ff3a32016-02-09 14:57:42 +02007035 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007036 u8 lwm[0x10];
7037};
7038
7039struct mlx5_ifc_arm_rq_out_bits {
7040 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042
7043 u8 syndrome[0x20];
7044
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046};
7047
7048enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007049 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7050 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007051};
7052
7053struct mlx5_ifc_arm_rq_in_bits {
7054 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058 u8 op_mod[0x10];
7059
Matan Barakb4ff3a32016-02-09 14:57:42 +02007060 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007061 u8 srq_number[0x18];
7062
Matan Barakb4ff3a32016-02-09 14:57:42 +02007063 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007064 u8 lwm[0x10];
7065};
7066
7067struct mlx5_ifc_arm_dct_out_bits {
7068 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007069 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007070
7071 u8 syndrome[0x20];
7072
Matan Barakb4ff3a32016-02-09 14:57:42 +02007073 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007074};
7075
7076struct mlx5_ifc_arm_dct_in_bits {
7077 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079
Matan Barakb4ff3a32016-02-09 14:57:42 +02007080 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007081 u8 op_mod[0x10];
7082
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084 u8 dct_number[0x18];
7085
Matan Barakb4ff3a32016-02-09 14:57:42 +02007086 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007087};
7088
7089struct mlx5_ifc_alloc_xrcd_out_bits {
7090 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007091 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007092
7093 u8 syndrome[0x20];
7094
Matan Barakb4ff3a32016-02-09 14:57:42 +02007095 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007096 u8 xrcd[0x18];
7097
Matan Barakb4ff3a32016-02-09 14:57:42 +02007098 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007099};
7100
7101struct mlx5_ifc_alloc_xrcd_in_bits {
7102 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007103 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007104
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106 u8 op_mod[0x10];
7107
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109};
7110
7111struct mlx5_ifc_alloc_uar_out_bits {
7112 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007113 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007114
7115 u8 syndrome[0x20];
7116
Matan Barakb4ff3a32016-02-09 14:57:42 +02007117 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007118 u8 uar[0x18];
7119
Matan Barakb4ff3a32016-02-09 14:57:42 +02007120 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007121};
7122
7123struct mlx5_ifc_alloc_uar_in_bits {
7124 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007125 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007126
Matan Barakb4ff3a32016-02-09 14:57:42 +02007127 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007128 u8 op_mod[0x10];
7129
Matan Barakb4ff3a32016-02-09 14:57:42 +02007130 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007131};
7132
7133struct mlx5_ifc_alloc_transport_domain_out_bits {
7134 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007135 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007136
7137 u8 syndrome[0x20];
7138
Matan Barakb4ff3a32016-02-09 14:57:42 +02007139 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007140 u8 transport_domain[0x18];
7141
Matan Barakb4ff3a32016-02-09 14:57:42 +02007142 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007143};
7144
7145struct mlx5_ifc_alloc_transport_domain_in_bits {
7146 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007147 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007148
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150 u8 op_mod[0x10];
7151
Matan Barakb4ff3a32016-02-09 14:57:42 +02007152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007153};
7154
7155struct mlx5_ifc_alloc_q_counter_out_bits {
7156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007158
7159 u8 syndrome[0x20];
7160
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162 u8 counter_set_id[0x8];
7163
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165};
7166
7167struct mlx5_ifc_alloc_q_counter_in_bits {
7168 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170
Matan Barakb4ff3a32016-02-09 14:57:42 +02007171 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007172 u8 op_mod[0x10];
7173
Matan Barakb4ff3a32016-02-09 14:57:42 +02007174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007175};
7176
7177struct mlx5_ifc_alloc_pd_out_bits {
7178 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007179 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007180
7181 u8 syndrome[0x20];
7182
Matan Barakb4ff3a32016-02-09 14:57:42 +02007183 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007184 u8 pd[0x18];
7185
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187};
7188
7189struct mlx5_ifc_alloc_pd_in_bits {
7190 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007191 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007192
Matan Barakb4ff3a32016-02-09 14:57:42 +02007193 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007194 u8 op_mod[0x10];
7195
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197};
7198
Amir Vadai9dc0b282016-05-13 12:55:39 +00007199struct mlx5_ifc_alloc_flow_counter_out_bits {
7200 u8 status[0x8];
7201 u8 reserved_at_8[0x18];
7202
7203 u8 syndrome[0x20];
7204
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007205 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007206
7207 u8 reserved_at_60[0x20];
7208};
7209
7210struct mlx5_ifc_alloc_flow_counter_in_bits {
7211 u8 opcode[0x10];
7212 u8 reserved_at_10[0x10];
7213
7214 u8 reserved_at_20[0x10];
7215 u8 op_mod[0x10];
7216
7217 u8 reserved_at_40[0x40];
7218};
7219
Saeed Mahameede2816822015-05-28 22:28:40 +03007220struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7221 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007222 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007223
7224 u8 syndrome[0x20];
7225
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227};
7228
7229struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7230 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007231 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007232
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234 u8 op_mod[0x10];
7235
Matan Barakb4ff3a32016-02-09 14:57:42 +02007236 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007237
Matan Barakb4ff3a32016-02-09 14:57:42 +02007238 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007239 u8 vxlan_udp_port[0x10];
7240};
7241
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007242struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007243 u8 status[0x8];
7244 u8 reserved_at_8[0x18];
7245
7246 u8 syndrome[0x20];
7247
7248 u8 reserved_at_40[0x40];
7249};
7250
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007251struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007252 u8 opcode[0x10];
7253 u8 reserved_at_10[0x10];
7254
7255 u8 reserved_at_20[0x10];
7256 u8 op_mod[0x10];
7257
7258 u8 reserved_at_40[0x10];
7259 u8 rate_limit_index[0x10];
7260
7261 u8 reserved_at_60[0x20];
7262
7263 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007264
7265 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007266};
7267
Saeed Mahameede2816822015-05-28 22:28:40 +03007268struct mlx5_ifc_access_register_out_bits {
7269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007271
7272 u8 syndrome[0x20];
7273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275
7276 u8 register_data[0][0x20];
7277};
7278
7279enum {
7280 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7281 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7282};
7283
7284struct mlx5_ifc_access_register_in_bits {
7285 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007286 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007287
Matan Barakb4ff3a32016-02-09 14:57:42 +02007288 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007289 u8 op_mod[0x10];
7290
Matan Barakb4ff3a32016-02-09 14:57:42 +02007291 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292 u8 register_id[0x10];
7293
7294 u8 argument[0x20];
7295
7296 u8 register_data[0][0x20];
7297};
7298
7299struct mlx5_ifc_sltp_reg_bits {
7300 u8 status[0x4];
7301 u8 version[0x4];
7302 u8 local_port[0x8];
7303 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007306 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007307
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309
Matan Barakb4ff3a32016-02-09 14:57:42 +02007310 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007311 u8 polarity[0x1];
7312 u8 ob_tap0[0x8];
7313 u8 ob_tap1[0x8];
7314 u8 ob_tap2[0x8];
7315
Matan Barakb4ff3a32016-02-09 14:57:42 +02007316 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007317 u8 ob_preemp_mode[0x4];
7318 u8 ob_reg[0x8];
7319 u8 ob_bias[0x8];
7320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322};
7323
7324struct mlx5_ifc_slrg_reg_bits {
7325 u8 status[0x4];
7326 u8 version[0x4];
7327 u8 local_port[0x8];
7328 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007329 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007330 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007331 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007332
7333 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007334 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007335 u8 grade_lane_speed[0x4];
7336
7337 u8 grade_version[0x8];
7338 u8 grade[0x18];
7339
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341 u8 height_grade_type[0x4];
7342 u8 height_grade[0x18];
7343
7344 u8 height_dz[0x10];
7345 u8 height_dv[0x10];
7346
Matan Barakb4ff3a32016-02-09 14:57:42 +02007347 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007348 u8 height_sigma[0x10];
7349
Matan Barakb4ff3a32016-02-09 14:57:42 +02007350 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007351
Matan Barakb4ff3a32016-02-09 14:57:42 +02007352 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007353 u8 phase_grade_type[0x4];
7354 u8 phase_grade[0x18];
7355
Matan Barakb4ff3a32016-02-09 14:57:42 +02007356 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007357 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007358 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007359 u8 phase_eo_neg[0x8];
7360
7361 u8 ffe_set_tested[0x10];
7362 u8 test_errors_per_lane[0x10];
7363};
7364
7365struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007368 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007369
Matan Barakb4ff3a32016-02-09 14:57:42 +02007370 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007371 u8 vl_hw_cap[0x4];
7372
Matan Barakb4ff3a32016-02-09 14:57:42 +02007373 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007374 u8 vl_admin[0x4];
7375
Matan Barakb4ff3a32016-02-09 14:57:42 +02007376 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007377 u8 vl_operational[0x4];
7378};
7379
7380struct mlx5_ifc_pude_reg_bits {
7381 u8 swid[0x8];
7382 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007383 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007384 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386 u8 oper_status[0x4];
7387
Matan Barakb4ff3a32016-02-09 14:57:42 +02007388 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007389};
7390
7391struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007392 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007393 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007394 u8 an_disable_cap[0x1];
7395 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007397 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398 u8 proto_mask[0x3];
7399
Saeed Mahameed74862162016-06-09 15:11:34 +03007400 u8 an_status[0x4];
7401 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402
7403 u8 eth_proto_capability[0x20];
7404
7405 u8 ib_link_width_capability[0x10];
7406 u8 ib_proto_capability[0x10];
7407
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409
7410 u8 eth_proto_admin[0x20];
7411
7412 u8 ib_link_width_admin[0x10];
7413 u8 ib_proto_admin[0x10];
7414
Matan Barakb4ff3a32016-02-09 14:57:42 +02007415 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416
7417 u8 eth_proto_oper[0x20];
7418
7419 u8 ib_link_width_oper[0x10];
7420 u8 ib_proto_oper[0x10];
7421
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007422 u8 reserved_at_160[0x1c];
7423 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007424
7425 u8 eth_proto_lp_advertise[0x20];
7426
Matan Barakb4ff3a32016-02-09 14:57:42 +02007427 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007428};
7429
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007430struct mlx5_ifc_mlcr_reg_bits {
7431 u8 reserved_at_0[0x8];
7432 u8 local_port[0x8];
7433 u8 reserved_at_10[0x20];
7434
7435 u8 beacon_duration[0x10];
7436 u8 reserved_at_40[0x10];
7437
7438 u8 beacon_remain[0x10];
7439};
7440
Saeed Mahameede2816822015-05-28 22:28:40 +03007441struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443
7444 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007445 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007446 u8 repetitions_mode[0x4];
7447 u8 num_of_repetitions[0x8];
7448
7449 u8 grade_version[0x8];
7450 u8 height_grade_type[0x4];
7451 u8 phase_grade_type[0x4];
7452 u8 height_grade_weight[0x8];
7453 u8 phase_grade_weight[0x8];
7454
7455 u8 gisim_measure_bits[0x10];
7456 u8 adaptive_tap_measure_bits[0x10];
7457
7458 u8 ber_bath_high_error_threshold[0x10];
7459 u8 ber_bath_mid_error_threshold[0x10];
7460
7461 u8 ber_bath_low_error_threshold[0x10];
7462 u8 one_ratio_high_threshold[0x10];
7463
7464 u8 one_ratio_high_mid_threshold[0x10];
7465 u8 one_ratio_low_mid_threshold[0x10];
7466
7467 u8 one_ratio_low_threshold[0x10];
7468 u8 ndeo_error_threshold[0x10];
7469
7470 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007471 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007472 u8 mix90_phase_for_voltage_bath[0x8];
7473
7474 u8 mixer_offset_start[0x10];
7475 u8 mixer_offset_end[0x10];
7476
Matan Barakb4ff3a32016-02-09 14:57:42 +02007477 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007478 u8 ber_test_time[0xb];
7479};
7480
7481struct mlx5_ifc_pspa_reg_bits {
7482 u8 swid[0x8];
7483 u8 local_port[0x8];
7484 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007485 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007486
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488};
7489
7490struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007495 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007496 u8 mode[0x2];
7497
Matan Barakb4ff3a32016-02-09 14:57:42 +02007498 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007499
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501 u8 min_threshold[0x10];
7502
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504 u8 max_threshold[0x10];
7505
Matan Barakb4ff3a32016-02-09 14:57:42 +02007506 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007507 u8 mark_probability_denominator[0x10];
7508
Matan Barakb4ff3a32016-02-09 14:57:42 +02007509 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007510};
7511
7512struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007513 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007514 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518
Matan Barakb4ff3a32016-02-09 14:57:42 +02007519 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007520 u8 wrps_admin[0x4];
7521
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 wrps_status[0x4];
7524
Matan Barakb4ff3a32016-02-09 14:57:42 +02007525 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007526 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007527 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007528 u8 down_threshold[0x8];
7529
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533 u8 srps_admin[0x4];
7534
Matan Barakb4ff3a32016-02-09 14:57:42 +02007535 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536 u8 srps_status[0x4];
7537
Matan Barakb4ff3a32016-02-09 14:57:42 +02007538 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007539};
7540
7541struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007544 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007545
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549 u8 lb_en[0x8];
7550};
7551
7552struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007553 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007554 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007555 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558
7559 u8 port_profile_mode[0x8];
7560 u8 static_port_profile[0x8];
7561 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007562 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007563
7564 u8 retransmission_active[0x8];
7565 u8 fec_mode_active[0x18];
7566
Matan Barakb4ff3a32016-02-09 14:57:42 +02007567 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007568};
7569
7570struct mlx5_ifc_ppcnt_reg_bits {
7571 u8 swid[0x8];
7572 u8 local_port[0x8];
7573 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 grp[0x6];
7576
7577 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007578 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007579 u8 prio_tc[0x3];
7580
7581 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7582};
7583
Gal Pressman8ed1a632016-11-17 13:46:01 +02007584struct mlx5_ifc_mpcnt_reg_bits {
7585 u8 reserved_at_0[0x8];
7586 u8 pcie_index[0x8];
7587 u8 reserved_at_10[0xa];
7588 u8 grp[0x6];
7589
7590 u8 clr[0x1];
7591 u8 reserved_at_21[0x1f];
7592
7593 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7594};
7595
Saeed Mahameede2816822015-05-28 22:28:40 +03007596struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007597 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007599 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007600 u8 local_port[0x8];
7601 u8 mac_47_32[0x10];
7602
7603 u8 mac_31_0[0x20];
7604
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606};
7607
7608struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007611 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007612
7613 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007614 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007615
7616 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618
7619 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007620 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007621};
7622
7623struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007624 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007625 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627
Matan Barakb4ff3a32016-02-09 14:57:42 +02007628 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007629 u8 attenuation_5g[0x8];
7630
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632 u8 attenuation_7g[0x8];
7633
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 attenuation_12g[0x8];
7636};
7637
7638struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007639 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007640 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642 u8 module_status[0x4];
7643
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645};
7646
7647struct mlx5_ifc_pmpc_reg_bits {
7648 u8 module_state_updated[32][0x8];
7649};
7650
7651struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007652 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007653 u8 mlpn_status[0x4];
7654 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656
7657 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659};
7660
7661struct mlx5_ifc_pmlp_reg_bits {
7662 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007663 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007664 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666 u8 width[0x8];
7667
7668 u8 lane0_module_mapping[0x20];
7669
7670 u8 lane1_module_mapping[0x20];
7671
7672 u8 lane2_module_mapping[0x20];
7673
7674 u8 lane3_module_mapping[0x20];
7675
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677};
7678
7679struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007684 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007685 u8 oper_status[0x4];
7686
7687 u8 ase[0x1];
7688 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690 u8 e[0x2];
7691
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693};
7694
7695struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007696 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007697 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007698 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007699 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007700 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007701
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 lane_speed[0x10];
7704
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 lpbf[0x1];
7707 u8 fec_mode_policy[0x8];
7708
7709 u8 retransmission_capability[0x8];
7710 u8 fec_mode_capability[0x18];
7711
7712 u8 retransmission_support_admin[0x8];
7713 u8 fec_mode_support_admin[0x18];
7714
7715 u8 retransmission_request_admin[0x8];
7716 u8 fec_mode_request_admin[0x18];
7717
Matan Barakb4ff3a32016-02-09 14:57:42 +02007718 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007719};
7720
7721struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007722 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007723 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007724 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007725 u8 ib_port[0x8];
7726
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728};
7729
7730struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734 u8 lbf_mode[0x3];
7735
Matan Barakb4ff3a32016-02-09 14:57:42 +02007736 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007737};
7738
7739struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007742 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007743
7744 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007747 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007748};
7749
7750struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007751 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007752 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007753 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007754
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756
7757 u8 port_filter[8][0x20];
7758
7759 u8 port_filter_update_en[8][0x20];
7760};
7761
7762struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766
7767 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007768 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007769 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007770 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007771 u8 prio_mask_rx[0x8];
7772
7773 u8 pptx[0x1];
7774 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007775 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007776 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007777 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007778
7779 u8 pprx[0x1];
7780 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007781 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007782 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007783 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007784
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786};
7787
7788struct mlx5_ifc_pelc_reg_bits {
7789 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007790 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007791 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007792 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007793
7794 u8 op_admin[0x8];
7795 u8 op_capability[0x8];
7796 u8 op_request[0x8];
7797 u8 op_active[0x8];
7798
7799 u8 admin[0x40];
7800
7801 u8 capability[0x40];
7802
7803 u8 request[0x40];
7804
7805 u8 active[0x40];
7806
Matan Barakb4ff3a32016-02-09 14:57:42 +02007807 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007808};
7809
7810struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007811 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007812 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007813 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007814
Matan Barakb4ff3a32016-02-09 14:57:42 +02007815 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007816 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007817 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007818
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007821 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007822 u8 error_type[0x8];
7823};
7824
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007825struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007826 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007827
Gal Pressman2dba0792017-06-18 14:56:45 +03007828 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007829 u8 ptys_connector_type[0x1];
7830 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007831 u8 ppcnt_discard_group[0x1];
7832 u8 ppcnt_statistical_group[0x1];
7833};
7834
7835struct mlx5_ifc_pcam_reg_bits {
7836 u8 reserved_at_0[0x8];
7837 u8 feature_group[0x8];
7838 u8 reserved_at_10[0x8];
7839 u8 access_reg_group[0x8];
7840
7841 u8 reserved_at_20[0x20];
7842
7843 union {
7844 u8 reserved_at_0[0x80];
7845 } port_access_reg_cap_mask;
7846
7847 u8 reserved_at_c0[0x80];
7848
7849 union {
7850 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7851 u8 reserved_at_0[0x80];
7852 } feature_cap_mask;
7853
7854 u8 reserved_at_1c0[0xc0];
7855};
7856
7857struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007858 u8 reserved_at_0[0x7b];
7859 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007860 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007861 u8 mtpps_enh_out_per_adj[0x1];
7862 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007863 u8 pcie_performance_group[0x1];
7864};
7865
Or Gerlitz0ab87742017-06-11 15:25:38 +03007866struct mlx5_ifc_mcam_access_reg_bits {
7867 u8 reserved_at_0[0x1c];
7868 u8 mcda[0x1];
7869 u8 mcc[0x1];
7870 u8 mcqi[0x1];
7871 u8 reserved_at_1f[0x1];
7872
7873 u8 regs_95_to_64[0x20];
7874 u8 regs_63_to_32[0x20];
7875 u8 regs_31_to_0[0x20];
7876};
7877
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007878struct mlx5_ifc_mcam_reg_bits {
7879 u8 reserved_at_0[0x8];
7880 u8 feature_group[0x8];
7881 u8 reserved_at_10[0x8];
7882 u8 access_reg_group[0x8];
7883
7884 u8 reserved_at_20[0x20];
7885
7886 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007887 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007888 u8 reserved_at_0[0x80];
7889 } mng_access_reg_cap_mask;
7890
7891 u8 reserved_at_c0[0x80];
7892
7893 union {
7894 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7895 u8 reserved_at_0[0x80];
7896 } mng_feature_cap_mask;
7897
7898 u8 reserved_at_1c0[0x80];
7899};
7900
Huy Nguyenc02762e2017-07-18 16:03:17 -05007901struct mlx5_ifc_qcam_access_reg_cap_mask {
7902 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7903 u8 qpdpm[0x1];
7904 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7905 u8 qdpm[0x1];
7906 u8 qpts[0x1];
7907 u8 qcap[0x1];
7908 u8 qcam_access_reg_cap_mask_0[0x1];
7909};
7910
7911struct mlx5_ifc_qcam_qos_feature_cap_mask {
7912 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7913 u8 qpts_trust_both[0x1];
7914};
7915
7916struct mlx5_ifc_qcam_reg_bits {
7917 u8 reserved_at_0[0x8];
7918 u8 feature_group[0x8];
7919 u8 reserved_at_10[0x8];
7920 u8 access_reg_group[0x8];
7921 u8 reserved_at_20[0x20];
7922
7923 union {
7924 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
7925 u8 reserved_at_0[0x80];
7926 } qos_access_reg_cap_mask;
7927
7928 u8 reserved_at_c0[0x80];
7929
7930 union {
7931 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
7932 u8 reserved_at_0[0x80];
7933 } qos_feature_cap_mask;
7934
7935 u8 reserved_at_1c0[0x80];
7936};
7937
Saeed Mahameede2816822015-05-28 22:28:40 +03007938struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007939 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007940 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007941 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007942
7943 u8 port_capability_mask[4][0x20];
7944};
7945
7946struct mlx5_ifc_paos_reg_bits {
7947 u8 swid[0x8];
7948 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007949 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007950 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007951 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007952 u8 oper_status[0x4];
7953
7954 u8 ase[0x1];
7955 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007956 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957 u8 e[0x2];
7958
Matan Barakb4ff3a32016-02-09 14:57:42 +02007959 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007960};
7961
7962struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007963 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007964 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007965 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007966 u8 opamp_group_type[0x4];
7967
7968 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007969 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007970 u8 num_of_indices[0xc];
7971
7972 u8 index_data[18][0x10];
7973};
7974
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007975struct mlx5_ifc_pcmr_reg_bits {
7976 u8 reserved_at_0[0x8];
7977 u8 local_port[0x8];
7978 u8 reserved_at_10[0x2e];
7979 u8 fcs_cap[0x1];
7980 u8 reserved_at_3f[0x1f];
7981 u8 fcs_chk[0x1];
7982 u8 reserved_at_5f[0x1];
7983};
7984
Saeed Mahameede2816822015-05-28 22:28:40 +03007985struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007986 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007987 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007988 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007989 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007990 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007991 u8 module[0x8];
7992};
7993
7994struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007995 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007996 u8 lossy[0x1];
7997 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007998 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007999 u8 size[0xc];
8000
8001 u8 xoff_threshold[0x10];
8002 u8 xon_threshold[0x10];
8003};
8004
8005struct mlx5_ifc_set_node_in_bits {
8006 u8 node_description[64][0x8];
8007};
8008
8009struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008010 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008011 u8 power_settings_level[0x8];
8012
Matan Barakb4ff3a32016-02-09 14:57:42 +02008013 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008014};
8015
8016struct mlx5_ifc_register_host_endianness_bits {
8017 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008018 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008019
Matan Barakb4ff3a32016-02-09 14:57:42 +02008020 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008021};
8022
8023struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008024 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008025
8026 u8 mkey[0x20];
8027
8028 u8 addressh_63_32[0x20];
8029
8030 u8 addressl_31_0[0x20];
8031};
8032
8033struct mlx5_ifc_ud_adrs_vector_bits {
8034 u8 dc_key[0x40];
8035
8036 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008037 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008038 u8 destination_qp_dct[0x18];
8039
8040 u8 static_rate[0x4];
8041 u8 sl_eth_prio[0x4];
8042 u8 fl[0x1];
8043 u8 mlid[0x7];
8044 u8 rlid_udp_sport[0x10];
8045
Matan Barakb4ff3a32016-02-09 14:57:42 +02008046 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008047
8048 u8 rmac_47_16[0x20];
8049
8050 u8 rmac_15_0[0x10];
8051 u8 tclass[0x8];
8052 u8 hop_limit[0x8];
8053
Matan Barakb4ff3a32016-02-09 14:57:42 +02008054 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008055 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008056 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008057 u8 src_addr_index[0x8];
8058 u8 flow_label[0x14];
8059
8060 u8 rgid_rip[16][0x8];
8061};
8062
8063struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008064 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008065 u8 function_id[0x10];
8066
8067 u8 num_pages[0x20];
8068
Matan Barakb4ff3a32016-02-09 14:57:42 +02008069 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008070};
8071
8072struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008073 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008074 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008075 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008076 u8 event_sub_type[0x8];
8077
Matan Barakb4ff3a32016-02-09 14:57:42 +02008078 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008079
8080 union mlx5_ifc_event_auto_bits event_data;
8081
Matan Barakb4ff3a32016-02-09 14:57:42 +02008082 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008083 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008084 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008085 u8 owner[0x1];
8086};
8087
8088enum {
8089 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8090};
8091
8092struct mlx5_ifc_cmd_queue_entry_bits {
8093 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008094 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008095
8096 u8 input_length[0x20];
8097
8098 u8 input_mailbox_pointer_63_32[0x20];
8099
8100 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008101 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008102
8103 u8 command_input_inline_data[16][0x8];
8104
8105 u8 command_output_inline_data[16][0x8];
8106
8107 u8 output_mailbox_pointer_63_32[0x20];
8108
8109 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008110 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008111
8112 u8 output_length[0x20];
8113
8114 u8 token[0x8];
8115 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008116 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008117 u8 status[0x7];
8118 u8 ownership[0x1];
8119};
8120
8121struct mlx5_ifc_cmd_out_bits {
8122 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008123 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008124
8125 u8 syndrome[0x20];
8126
8127 u8 command_output[0x20];
8128};
8129
8130struct mlx5_ifc_cmd_in_bits {
8131 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008132 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008133
Matan Barakb4ff3a32016-02-09 14:57:42 +02008134 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008135 u8 op_mod[0x10];
8136
8137 u8 command[0][0x20];
8138};
8139
8140struct mlx5_ifc_cmd_if_box_bits {
8141 u8 mailbox_data[512][0x8];
8142
Matan Barakb4ff3a32016-02-09 14:57:42 +02008143 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008144
8145 u8 next_pointer_63_32[0x20];
8146
8147 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008148 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008149
8150 u8 block_number[0x20];
8151
Matan Barakb4ff3a32016-02-09 14:57:42 +02008152 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008153 u8 token[0x8];
8154 u8 ctrl_signature[0x8];
8155 u8 signature[0x8];
8156};
8157
8158struct mlx5_ifc_mtt_bits {
8159 u8 ptag_63_32[0x20];
8160
8161 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008162 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008163 u8 wr_en[0x1];
8164 u8 rd_en[0x1];
8165};
8166
Tariq Toukan928cfe82016-02-22 18:17:29 +02008167struct mlx5_ifc_query_wol_rol_out_bits {
8168 u8 status[0x8];
8169 u8 reserved_at_8[0x18];
8170
8171 u8 syndrome[0x20];
8172
8173 u8 reserved_at_40[0x10];
8174 u8 rol_mode[0x8];
8175 u8 wol_mode[0x8];
8176
8177 u8 reserved_at_60[0x20];
8178};
8179
8180struct mlx5_ifc_query_wol_rol_in_bits {
8181 u8 opcode[0x10];
8182 u8 reserved_at_10[0x10];
8183
8184 u8 reserved_at_20[0x10];
8185 u8 op_mod[0x10];
8186
8187 u8 reserved_at_40[0x40];
8188};
8189
8190struct mlx5_ifc_set_wol_rol_out_bits {
8191 u8 status[0x8];
8192 u8 reserved_at_8[0x18];
8193
8194 u8 syndrome[0x20];
8195
8196 u8 reserved_at_40[0x40];
8197};
8198
8199struct mlx5_ifc_set_wol_rol_in_bits {
8200 u8 opcode[0x10];
8201 u8 reserved_at_10[0x10];
8202
8203 u8 reserved_at_20[0x10];
8204 u8 op_mod[0x10];
8205
8206 u8 rol_mode_valid[0x1];
8207 u8 wol_mode_valid[0x1];
8208 u8 reserved_at_42[0xe];
8209 u8 rol_mode[0x8];
8210 u8 wol_mode[0x8];
8211
8212 u8 reserved_at_60[0x20];
8213};
8214
Saeed Mahameede2816822015-05-28 22:28:40 +03008215enum {
8216 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8217 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8218 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8219};
8220
8221enum {
8222 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8223 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8224 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8225};
8226
8227enum {
8228 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8229 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8230 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8231 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8232 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8233 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8234 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8235 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8236 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8237 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8238 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8239};
8240
8241struct mlx5_ifc_initial_seg_bits {
8242 u8 fw_rev_minor[0x10];
8243 u8 fw_rev_major[0x10];
8244
8245 u8 cmd_interface_rev[0x10];
8246 u8 fw_rev_subminor[0x10];
8247
Matan Barakb4ff3a32016-02-09 14:57:42 +02008248 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008249
8250 u8 cmdq_phy_addr_63_32[0x20];
8251
8252 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008253 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008254 u8 nic_interface[0x2];
8255 u8 log_cmdq_size[0x4];
8256 u8 log_cmdq_stride[0x4];
8257
8258 u8 command_doorbell_vector[0x20];
8259
Matan Barakb4ff3a32016-02-09 14:57:42 +02008260 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008261
8262 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008263 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008264 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008265 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008266
8267 struct mlx5_ifc_health_buffer_bits health_buffer;
8268
8269 u8 no_dram_nic_offset[0x20];
8270
Matan Barakb4ff3a32016-02-09 14:57:42 +02008271 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008272
Matan Barakb4ff3a32016-02-09 14:57:42 +02008273 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008274 u8 clear_int[0x1];
8275
8276 u8 health_syndrome[0x8];
8277 u8 health_counter[0x18];
8278
Matan Barakb4ff3a32016-02-09 14:57:42 +02008279 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008280};
8281
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008282struct mlx5_ifc_mtpps_reg_bits {
8283 u8 reserved_at_0[0xc];
8284 u8 cap_number_of_pps_pins[0x4];
8285 u8 reserved_at_10[0x4];
8286 u8 cap_max_num_of_pps_in_pins[0x4];
8287 u8 reserved_at_18[0x4];
8288 u8 cap_max_num_of_pps_out_pins[0x4];
8289
8290 u8 reserved_at_20[0x24];
8291 u8 cap_pin_3_mode[0x4];
8292 u8 reserved_at_48[0x4];
8293 u8 cap_pin_2_mode[0x4];
8294 u8 reserved_at_50[0x4];
8295 u8 cap_pin_1_mode[0x4];
8296 u8 reserved_at_58[0x4];
8297 u8 cap_pin_0_mode[0x4];
8298
8299 u8 reserved_at_60[0x4];
8300 u8 cap_pin_7_mode[0x4];
8301 u8 reserved_at_68[0x4];
8302 u8 cap_pin_6_mode[0x4];
8303 u8 reserved_at_70[0x4];
8304 u8 cap_pin_5_mode[0x4];
8305 u8 reserved_at_78[0x4];
8306 u8 cap_pin_4_mode[0x4];
8307
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008308 u8 field_select[0x20];
8309 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008310
8311 u8 enable[0x1];
8312 u8 reserved_at_101[0xb];
8313 u8 pattern[0x4];
8314 u8 reserved_at_110[0x4];
8315 u8 pin_mode[0x4];
8316 u8 pin[0x8];
8317
8318 u8 reserved_at_120[0x20];
8319
8320 u8 time_stamp[0x40];
8321
8322 u8 out_pulse_duration[0x10];
8323 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008324 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008325
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008326 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008327};
8328
8329struct mlx5_ifc_mtppse_reg_bits {
8330 u8 reserved_at_0[0x18];
8331 u8 pin[0x8];
8332 u8 event_arm[0x1];
8333 u8 reserved_at_21[0x1b];
8334 u8 event_generation_mode[0x4];
8335 u8 reserved_at_40[0x40];
8336};
8337
Or Gerlitz47176282017-04-18 13:35:39 +03008338struct mlx5_ifc_mcqi_cap_bits {
8339 u8 supported_info_bitmask[0x20];
8340
8341 u8 component_size[0x20];
8342
8343 u8 max_component_size[0x20];
8344
8345 u8 log_mcda_word_size[0x4];
8346 u8 reserved_at_64[0xc];
8347 u8 mcda_max_write_size[0x10];
8348
8349 u8 rd_en[0x1];
8350 u8 reserved_at_81[0x1];
8351 u8 match_chip_id[0x1];
8352 u8 match_psid[0x1];
8353 u8 check_user_timestamp[0x1];
8354 u8 match_base_guid_mac[0x1];
8355 u8 reserved_at_86[0x1a];
8356};
8357
8358struct mlx5_ifc_mcqi_reg_bits {
8359 u8 read_pending_component[0x1];
8360 u8 reserved_at_1[0xf];
8361 u8 component_index[0x10];
8362
8363 u8 reserved_at_20[0x20];
8364
8365 u8 reserved_at_40[0x1b];
8366 u8 info_type[0x5];
8367
8368 u8 info_size[0x20];
8369
8370 u8 offset[0x20];
8371
8372 u8 reserved_at_a0[0x10];
8373 u8 data_size[0x10];
8374
8375 u8 data[0][0x20];
8376};
8377
8378struct mlx5_ifc_mcc_reg_bits {
8379 u8 reserved_at_0[0x4];
8380 u8 time_elapsed_since_last_cmd[0xc];
8381 u8 reserved_at_10[0x8];
8382 u8 instruction[0x8];
8383
8384 u8 reserved_at_20[0x10];
8385 u8 component_index[0x10];
8386
8387 u8 reserved_at_40[0x8];
8388 u8 update_handle[0x18];
8389
8390 u8 handle_owner_type[0x4];
8391 u8 handle_owner_host_id[0x4];
8392 u8 reserved_at_68[0x1];
8393 u8 control_progress[0x7];
8394 u8 error_code[0x8];
8395 u8 reserved_at_78[0x4];
8396 u8 control_state[0x4];
8397
8398 u8 component_size[0x20];
8399
8400 u8 reserved_at_a0[0x60];
8401};
8402
8403struct mlx5_ifc_mcda_reg_bits {
8404 u8 reserved_at_0[0x8];
8405 u8 update_handle[0x18];
8406
8407 u8 offset[0x20];
8408
8409 u8 reserved_at_40[0x10];
8410 u8 size[0x10];
8411
8412 u8 reserved_at_60[0x20];
8413
8414 u8 data[0][0x20];
8415};
8416
Saeed Mahameede2816822015-05-28 22:28:40 +03008417union mlx5_ifc_ports_control_registers_document_bits {
8418 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8419 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8420 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8421 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8422 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8423 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8424 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8425 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8426 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8427 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8428 struct mlx5_ifc_paos_reg_bits paos_reg;
8429 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8430 struct mlx5_ifc_peir_reg_bits peir_reg;
8431 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8432 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008433 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008434 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8435 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8436 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8437 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8438 struct mlx5_ifc_plib_reg_bits plib_reg;
8439 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8440 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8441 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8442 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8443 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8444 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8445 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8446 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8447 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8448 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008449 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008450 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8451 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8452 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8453 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8454 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8455 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8456 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008457 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008458 struct mlx5_ifc_pude_reg_bits pude_reg;
8459 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8460 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8461 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008462 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8463 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008464 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008465 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8466 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008467 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8468 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8469 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008470 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008471};
8472
8473union mlx5_ifc_debug_enhancements_document_bits {
8474 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008475 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008476};
8477
8478union mlx5_ifc_uplink_pci_interface_document_bits {
8479 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008480 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008481};
8482
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008483struct mlx5_ifc_set_flow_table_root_out_bits {
8484 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008485 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008486
8487 u8 syndrome[0x20];
8488
Matan Barakb4ff3a32016-02-09 14:57:42 +02008489 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008490};
8491
8492struct mlx5_ifc_set_flow_table_root_in_bits {
8493 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008494 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008495
Matan Barakb4ff3a32016-02-09 14:57:42 +02008496 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008497 u8 op_mod[0x10];
8498
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008499 u8 other_vport[0x1];
8500 u8 reserved_at_41[0xf];
8501 u8 vport_number[0x10];
8502
8503 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008504
8505 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008506 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008507
Matan Barakb4ff3a32016-02-09 14:57:42 +02008508 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008509 u8 table_id[0x18];
8510
Erez Shitrit500a3d02017-04-13 06:36:51 +03008511 u8 reserved_at_c0[0x8];
8512 u8 underlay_qpn[0x18];
8513 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008514};
8515
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008516enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008517 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8518 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008519};
8520
8521struct mlx5_ifc_modify_flow_table_out_bits {
8522 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008523 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008524
8525 u8 syndrome[0x20];
8526
Matan Barakb4ff3a32016-02-09 14:57:42 +02008527 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008528};
8529
8530struct mlx5_ifc_modify_flow_table_in_bits {
8531 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008532 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008533
Matan Barakb4ff3a32016-02-09 14:57:42 +02008534 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008535 u8 op_mod[0x10];
8536
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008537 u8 other_vport[0x1];
8538 u8 reserved_at_41[0xf];
8539 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008540
Matan Barakb4ff3a32016-02-09 14:57:42 +02008541 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008542 u8 modify_field_select[0x10];
8543
8544 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008545 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008546
Matan Barakb4ff3a32016-02-09 14:57:42 +02008547 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008548 u8 table_id[0x18];
8549
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008550 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008551};
8552
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008553struct mlx5_ifc_ets_tcn_config_reg_bits {
8554 u8 g[0x1];
8555 u8 b[0x1];
8556 u8 r[0x1];
8557 u8 reserved_at_3[0x9];
8558 u8 group[0x4];
8559 u8 reserved_at_10[0x9];
8560 u8 bw_allocation[0x7];
8561
8562 u8 reserved_at_20[0xc];
8563 u8 max_bw_units[0x4];
8564 u8 reserved_at_30[0x8];
8565 u8 max_bw_value[0x8];
8566};
8567
8568struct mlx5_ifc_ets_global_config_reg_bits {
8569 u8 reserved_at_0[0x2];
8570 u8 r[0x1];
8571 u8 reserved_at_3[0x1d];
8572
8573 u8 reserved_at_20[0xc];
8574 u8 max_bw_units[0x4];
8575 u8 reserved_at_30[0x8];
8576 u8 max_bw_value[0x8];
8577};
8578
8579struct mlx5_ifc_qetc_reg_bits {
8580 u8 reserved_at_0[0x8];
8581 u8 port_number[0x8];
8582 u8 reserved_at_10[0x30];
8583
8584 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8585 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8586};
8587
Huy Nguyen415a64a2017-07-18 16:08:46 -05008588struct mlx5_ifc_qpdpm_dscp_reg_bits {
8589 u8 e[0x1];
8590 u8 reserved_at_01[0x0b];
8591 u8 prio[0x04];
8592};
8593
8594struct mlx5_ifc_qpdpm_reg_bits {
8595 u8 reserved_at_0[0x8];
8596 u8 local_port[0x8];
8597 u8 reserved_at_10[0x10];
8598 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8599};
8600
8601struct mlx5_ifc_qpts_reg_bits {
8602 u8 reserved_at_0[0x8];
8603 u8 local_port[0x8];
8604 u8 reserved_at_10[0x2d];
8605 u8 trust_state[0x3];
8606};
8607
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008608struct mlx5_ifc_qtct_reg_bits {
8609 u8 reserved_at_0[0x8];
8610 u8 port_number[0x8];
8611 u8 reserved_at_10[0xd];
8612 u8 prio[0x3];
8613
8614 u8 reserved_at_20[0x1d];
8615 u8 tclass[0x3];
8616};
8617
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008618struct mlx5_ifc_mcia_reg_bits {
8619 u8 l[0x1];
8620 u8 reserved_at_1[0x7];
8621 u8 module[0x8];
8622 u8 reserved_at_10[0x8];
8623 u8 status[0x8];
8624
8625 u8 i2c_device_address[0x8];
8626 u8 page_number[0x8];
8627 u8 device_address[0x10];
8628
8629 u8 reserved_at_40[0x10];
8630 u8 size[0x10];
8631
8632 u8 reserved_at_60[0x20];
8633
8634 u8 dword_0[0x20];
8635 u8 dword_1[0x20];
8636 u8 dword_2[0x20];
8637 u8 dword_3[0x20];
8638 u8 dword_4[0x20];
8639 u8 dword_5[0x20];
8640 u8 dword_6[0x20];
8641 u8 dword_7[0x20];
8642 u8 dword_8[0x20];
8643 u8 dword_9[0x20];
8644 u8 dword_10[0x20];
8645 u8 dword_11[0x20];
8646};
8647
Saeed Mahameed74862162016-06-09 15:11:34 +03008648struct mlx5_ifc_dcbx_param_bits {
8649 u8 dcbx_cee_cap[0x1];
8650 u8 dcbx_ieee_cap[0x1];
8651 u8 dcbx_standby_cap[0x1];
8652 u8 reserved_at_0[0x5];
8653 u8 port_number[0x8];
8654 u8 reserved_at_10[0xa];
8655 u8 max_application_table_size[6];
8656 u8 reserved_at_20[0x15];
8657 u8 version_oper[0x3];
8658 u8 reserved_at_38[5];
8659 u8 version_admin[0x3];
8660 u8 willing_admin[0x1];
8661 u8 reserved_at_41[0x3];
8662 u8 pfc_cap_oper[0x4];
8663 u8 reserved_at_48[0x4];
8664 u8 pfc_cap_admin[0x4];
8665 u8 reserved_at_50[0x4];
8666 u8 num_of_tc_oper[0x4];
8667 u8 reserved_at_58[0x4];
8668 u8 num_of_tc_admin[0x4];
8669 u8 remote_willing[0x1];
8670 u8 reserved_at_61[3];
8671 u8 remote_pfc_cap[4];
8672 u8 reserved_at_68[0x14];
8673 u8 remote_num_of_tc[0x4];
8674 u8 reserved_at_80[0x18];
8675 u8 error[0x8];
8676 u8 reserved_at_a0[0x160];
8677};
Aviv Heller84df61e2016-05-10 13:47:50 +03008678
8679struct mlx5_ifc_lagc_bits {
8680 u8 reserved_at_0[0x1d];
8681 u8 lag_state[0x3];
8682
8683 u8 reserved_at_20[0x14];
8684 u8 tx_remap_affinity_2[0x4];
8685 u8 reserved_at_38[0x4];
8686 u8 tx_remap_affinity_1[0x4];
8687};
8688
8689struct mlx5_ifc_create_lag_out_bits {
8690 u8 status[0x8];
8691 u8 reserved_at_8[0x18];
8692
8693 u8 syndrome[0x20];
8694
8695 u8 reserved_at_40[0x40];
8696};
8697
8698struct mlx5_ifc_create_lag_in_bits {
8699 u8 opcode[0x10];
8700 u8 reserved_at_10[0x10];
8701
8702 u8 reserved_at_20[0x10];
8703 u8 op_mod[0x10];
8704
8705 struct mlx5_ifc_lagc_bits ctx;
8706};
8707
8708struct mlx5_ifc_modify_lag_out_bits {
8709 u8 status[0x8];
8710 u8 reserved_at_8[0x18];
8711
8712 u8 syndrome[0x20];
8713
8714 u8 reserved_at_40[0x40];
8715};
8716
8717struct mlx5_ifc_modify_lag_in_bits {
8718 u8 opcode[0x10];
8719 u8 reserved_at_10[0x10];
8720
8721 u8 reserved_at_20[0x10];
8722 u8 op_mod[0x10];
8723
8724 u8 reserved_at_40[0x20];
8725 u8 field_select[0x20];
8726
8727 struct mlx5_ifc_lagc_bits ctx;
8728};
8729
8730struct mlx5_ifc_query_lag_out_bits {
8731 u8 status[0x8];
8732 u8 reserved_at_8[0x18];
8733
8734 u8 syndrome[0x20];
8735
8736 u8 reserved_at_40[0x40];
8737
8738 struct mlx5_ifc_lagc_bits ctx;
8739};
8740
8741struct mlx5_ifc_query_lag_in_bits {
8742 u8 opcode[0x10];
8743 u8 reserved_at_10[0x10];
8744
8745 u8 reserved_at_20[0x10];
8746 u8 op_mod[0x10];
8747
8748 u8 reserved_at_40[0x40];
8749};
8750
8751struct mlx5_ifc_destroy_lag_out_bits {
8752 u8 status[0x8];
8753 u8 reserved_at_8[0x18];
8754
8755 u8 syndrome[0x20];
8756
8757 u8 reserved_at_40[0x40];
8758};
8759
8760struct mlx5_ifc_destroy_lag_in_bits {
8761 u8 opcode[0x10];
8762 u8 reserved_at_10[0x10];
8763
8764 u8 reserved_at_20[0x10];
8765 u8 op_mod[0x10];
8766
8767 u8 reserved_at_40[0x40];
8768};
8769
8770struct mlx5_ifc_create_vport_lag_out_bits {
8771 u8 status[0x8];
8772 u8 reserved_at_8[0x18];
8773
8774 u8 syndrome[0x20];
8775
8776 u8 reserved_at_40[0x40];
8777};
8778
8779struct mlx5_ifc_create_vport_lag_in_bits {
8780 u8 opcode[0x10];
8781 u8 reserved_at_10[0x10];
8782
8783 u8 reserved_at_20[0x10];
8784 u8 op_mod[0x10];
8785
8786 u8 reserved_at_40[0x40];
8787};
8788
8789struct mlx5_ifc_destroy_vport_lag_out_bits {
8790 u8 status[0x8];
8791 u8 reserved_at_8[0x18];
8792
8793 u8 syndrome[0x20];
8794
8795 u8 reserved_at_40[0x40];
8796};
8797
8798struct mlx5_ifc_destroy_vport_lag_in_bits {
8799 u8 opcode[0x10];
8800 u8 reserved_at_10[0x10];
8801
8802 u8 reserved_at_20[0x10];
8803 u8 op_mod[0x10];
8804
8805 u8 reserved_at_40[0x40];
8806};
8807
Eli Cohend29b7962014-10-02 12:19:43 +03008808#endif /* MLX5_IFC_H */