blob: 6c064748694542d15b90ca0619587c76397264b3 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Laurent Pinchart748471a52015-03-05 23:42:39 +020020#include <linux/wait.h>
21
22#include <drm/drm_atomic.h>
Laurent Pinchartcef77d42015-03-05 21:50:00 +020023#include <drm/drm_atomic_helper.h>
Laurent Pinchart2d278f52015-03-05 21:31:37 +020024#include <drm/drm_crtc_helper.h>
25#include <drm/drm_fb_helper.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060026
Andy Gross5c137792012-03-05 10:48:39 -060027#include "omap_dmm_tiler.h"
Laurent Pinchart2d278f52015-03-05 21:31:37 +020028#include "omap_drv.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060029
30#define DRIVER_NAME MODULE_NAME
31#define DRIVER_DESC "OMAP DRM"
32#define DRIVER_DATE "20110917"
33#define DRIVER_MAJOR 1
34#define DRIVER_MINOR 0
35#define DRIVER_PATCHLEVEL 0
36
Rob Clarkcd5351f2011-11-12 12:09:40 -060037static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
38
39MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
40module_param(num_crtc, int, 0600);
41
42/*
43 * mode config funcs
44 */
45
46/* Notes about mapping DSS and DRM entities:
47 * CRTC: overlay
48 * encoder: manager.. with some extension to allow one primary CRTC
49 * and zero or more video CRTC's to be mapped to one encoder?
50 * connector: dssdev.. manager can be attached/detached from different
51 * devices
52 */
53
54static void omap_fb_output_poll_changed(struct drm_device *dev)
55{
56 struct omap_drm_private *priv = dev->dev_private;
57 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090058 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060059 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060060}
61
Laurent Pinchart748471a52015-03-05 23:42:39 +020062struct omap_atomic_state_commit {
63 struct work_struct work;
64 struct drm_device *dev;
65 struct drm_atomic_state *state;
66 u32 crtcs;
67};
68
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030069static void omap_atomic_wait_for_completion(struct drm_device *dev,
70 struct drm_atomic_state *old_state)
71{
72 struct drm_crtc_state *old_crtc_state;
73 struct drm_crtc *crtc;
74 unsigned int i;
75 int ret;
76
77 for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
78 if (!crtc->state->enable)
79 continue;
80
81 ret = omap_crtc_wait_pending(crtc);
82
83 if (!ret)
84 dev_warn(dev->dev,
85 "atomic complete timeout (pipe %u)!\n", i);
86 }
87}
88
Laurent Pinchart748471a52015-03-05 23:42:39 +020089static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
90{
91 struct drm_device *dev = commit->dev;
92 struct omap_drm_private *priv = dev->dev_private;
93 struct drm_atomic_state *old_state = commit->state;
94
95 /* Apply the atomic update. */
Laurent Pinchart69fb7c82015-05-28 02:09:56 +030096 dispc_runtime_get();
97
Laurent Pinchart748471a52015-03-05 23:42:39 +020098 drm_atomic_helper_commit_modeset_disables(dev, old_state);
Daniel Vetteraef9dbb2015-09-08 12:02:07 +020099 drm_atomic_helper_commit_planes(dev, old_state, false);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200100 drm_atomic_helper_commit_modeset_enables(dev, old_state);
101
Tomi Valkeinen5f741b32015-05-29 16:01:18 +0300102 omap_atomic_wait_for_completion(dev, old_state);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200103
104 drm_atomic_helper_cleanup_planes(dev, old_state);
105
Laurent Pinchart69fb7c82015-05-28 02:09:56 +0300106 dispc_runtime_put();
107
Laurent Pinchart748471a52015-03-05 23:42:39 +0200108 drm_atomic_state_free(old_state);
109
110 /* Complete the commit, wake up any waiter. */
111 spin_lock(&priv->commit.lock);
112 priv->commit.pending &= ~commit->crtcs;
113 spin_unlock(&priv->commit.lock);
114
115 wake_up_all(&priv->commit.wait);
116
117 kfree(commit);
118}
119
120static void omap_atomic_work(struct work_struct *work)
121{
122 struct omap_atomic_state_commit *commit =
123 container_of(work, struct omap_atomic_state_commit, work);
124
125 omap_atomic_complete(commit);
126}
127
128static bool omap_atomic_is_pending(struct omap_drm_private *priv,
129 struct omap_atomic_state_commit *commit)
130{
131 bool pending;
132
133 spin_lock(&priv->commit.lock);
134 pending = priv->commit.pending & commit->crtcs;
135 spin_unlock(&priv->commit.lock);
136
137 return pending;
138}
139
140static int omap_atomic_commit(struct drm_device *dev,
Maarten Lankhorst6fc17fb2016-04-26 16:11:39 +0200141 struct drm_atomic_state *state, bool nonblock)
Laurent Pinchart748471a52015-03-05 23:42:39 +0200142{
143 struct omap_drm_private *priv = dev->dev_private;
144 struct omap_atomic_state_commit *commit;
145 unsigned int i;
146 int ret;
147
148 ret = drm_atomic_helper_prepare_planes(dev, state);
149 if (ret)
150 return ret;
151
152 /* Allocate the commit object. */
153 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
154 if (commit == NULL) {
155 ret = -ENOMEM;
156 goto error;
157 }
158
159 INIT_WORK(&commit->work, omap_atomic_work);
160 commit->dev = dev;
161 commit->state = state;
162
163 /* Wait until all affected CRTCs have completed previous commits and
164 * mark them as pending.
165 */
166 for (i = 0; i < dev->mode_config.num_crtc; ++i) {
167 if (state->crtcs[i])
168 commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
169 }
170
171 wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
172
173 spin_lock(&priv->commit.lock);
174 priv->commit.pending |= commit->crtcs;
175 spin_unlock(&priv->commit.lock);
176
177 /* Swap the state, this is the point of no return. */
178 drm_atomic_helper_swap_state(dev, state);
179
Maarten Lankhorst6fc17fb2016-04-26 16:11:39 +0200180 if (nonblock)
Laurent Pinchart748471a52015-03-05 23:42:39 +0200181 schedule_work(&commit->work);
182 else
183 omap_atomic_complete(commit);
184
185 return 0;
186
187error:
188 drm_atomic_helper_cleanup_planes(dev, state);
189 return ret;
190}
191
Laurent Pincharte6ecefa2012-05-17 13:27:23 +0200192static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600193 .fb_create = omap_framebuffer_create,
194 .output_poll_changed = omap_fb_output_poll_changed,
Laurent Pinchartcef77d42015-03-05 21:50:00 +0200195 .atomic_check = drm_atomic_helper_check,
Laurent Pinchart748471a52015-03-05 23:42:39 +0200196 .atomic_commit = omap_atomic_commit,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600197};
198
199static int get_connector_type(struct omap_dss_device *dssdev)
200{
201 switch (dssdev->type) {
202 case OMAP_DISPLAY_TYPE_HDMI:
203 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +0300204 case OMAP_DISPLAY_TYPE_DVI:
205 return DRM_MODE_CONNECTOR_DVID;
Sebastian Reichel4a64b902016-03-08 17:39:36 +0100206 case OMAP_DISPLAY_TYPE_DSI:
207 return DRM_MODE_CONNECTOR_DSI;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600208 default:
209 return DRM_MODE_CONNECTOR_Unknown;
210 }
211}
212
Archit Taneja0d8f3712013-03-26 19:15:19 +0530213static bool channel_used(struct drm_device *dev, enum omap_channel channel)
214{
215 struct omap_drm_private *priv = dev->dev_private;
216 int i;
217
218 for (i = 0; i < priv->num_crtcs; i++) {
219 struct drm_crtc *crtc = priv->crtcs[i];
220
221 if (omap_crtc_channel(crtc) == channel)
222 return true;
223 }
224
225 return false;
226}
Archit Tanejacc823bd2014-01-02 14:49:52 +0530227static void omap_disconnect_dssdevs(void)
228{
229 struct omap_dss_device *dssdev = NULL;
230
231 for_each_dss_dev(dssdev)
232 dssdev->driver->disconnect(dssdev);
233}
Archit Taneja0d8f3712013-03-26 19:15:19 +0530234
Archit Taneja3a01ab22014-01-02 14:49:51 +0530235static int omap_connect_dssdevs(void)
236{
237 int r;
238 struct omap_dss_device *dssdev = NULL;
239 bool no_displays = true;
240
241 for_each_dss_dev(dssdev) {
242 r = dssdev->driver->connect(dssdev);
243 if (r == -EPROBE_DEFER) {
244 omap_dss_put_device(dssdev);
245 goto cleanup;
246 } else if (r) {
247 dev_warn(dssdev->dev, "could not connect display: %s\n",
248 dssdev->name);
249 } else {
250 no_displays = false;
251 }
252 }
253
254 if (no_displays)
255 return -EPROBE_DEFER;
256
257 return 0;
258
259cleanup:
260 /*
261 * if we are deferring probe, we disconnect the devices we previously
262 * connected
263 */
Archit Tanejacc823bd2014-01-02 14:49:52 +0530264 omap_disconnect_dssdevs();
Archit Taneja3a01ab22014-01-02 14:49:51 +0530265
266 return r;
267}
Rob Clarkcd5351f2011-11-12 12:09:40 -0600268
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200269static int omap_modeset_create_crtc(struct drm_device *dev, int id,
270 enum omap_channel channel)
271{
272 struct omap_drm_private *priv = dev->dev_private;
273 struct drm_plane *plane;
274 struct drm_crtc *crtc;
275
Laurent Pinchartef6b0e02015-01-11 00:11:18 +0200276 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200277 if (IS_ERR(plane))
278 return PTR_ERR(plane);
279
280 crtc = omap_crtc_init(dev, plane, channel, id);
281
282 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
283 priv->crtcs[id] = crtc;
284 priv->num_crtcs++;
285
286 priv->planes[id] = plane;
287 priv->num_planes++;
288
289 return 0;
290}
291
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200292static int omap_modeset_init_properties(struct drm_device *dev)
293{
294 struct omap_drm_private *priv = dev->dev_private;
295
296 if (priv->has_dmm) {
297 dev->mode_config.rotation_property =
298 drm_mode_create_rotation_property(dev,
299 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
300 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
301 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
302 if (!dev->mode_config.rotation_property)
303 return -ENOMEM;
304 }
305
306 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
307 if (!priv->zorder_prop)
308 return -ENOMEM;
309
310 return 0;
311}
312
Rob Clarkcd5351f2011-11-12 12:09:40 -0600313static int omap_modeset_init(struct drm_device *dev)
314{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600315 struct omap_drm_private *priv = dev->dev_private;
316 struct omap_dss_device *dssdev = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600317 int num_ovls = dss_feat_get_num_ovls();
Archit Taneja0d8f3712013-03-26 19:15:19 +0530318 int num_mgrs = dss_feat_get_num_mgrs();
319 int num_crtcs;
320 int i, id = 0;
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200321 int ret;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300322
Rob Clarkcd5351f2011-11-12 12:09:40 -0600323 drm_mode_config_init(dev);
324
Rob Clarkf5f94542012-12-04 13:59:12 -0600325 omap_drm_irq_install(dev);
Andy Gross71e88312011-12-05 19:19:21 -0600326
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200327 ret = omap_modeset_init_properties(dev);
328 if (ret < 0)
329 return ret;
330
Rob Clarkf5f94542012-12-04 13:59:12 -0600331 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530332 * We usually don't want to create a CRTC for each manager, at least
333 * not until we have a way to expose private planes to userspace.
334 * Otherwise there would not be enough video pipes left for drm planes.
335 * We use the num_crtc argument to limit the number of crtcs we create.
Rob Clarkf5f94542012-12-04 13:59:12 -0600336 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530337 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600338
Archit Taneja0d8f3712013-03-26 19:15:19 +0530339 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600340
Rob Clarkf5f94542012-12-04 13:59:12 -0600341 for_each_dss_dev(dssdev) {
342 struct drm_connector *connector;
343 struct drm_encoder *encoder;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530344 enum omap_channel channel;
Tomi Valkeinen179df152015-10-21 16:17:23 +0300345 struct omap_dss_device *out;
Rob Clarkf5f94542012-12-04 13:59:12 -0600346
Archit Taneja3a01ab22014-01-02 14:49:51 +0530347 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530348 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300349
Rob Clarkf5f94542012-12-04 13:59:12 -0600350 encoder = omap_encoder_init(dev, dssdev);
351
352 if (!encoder) {
353 dev_err(dev->dev, "could not create encoder: %s\n",
354 dssdev->name);
355 return -ENOMEM;
356 }
357
358 connector = omap_connector_init(dev,
359 get_connector_type(dssdev), dssdev, encoder);
360
361 if (!connector) {
362 dev_err(dev->dev, "could not create connector: %s\n",
363 dssdev->name);
364 return -ENOMEM;
365 }
366
367 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
368 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
369
370 priv->encoders[priv->num_encoders++] = encoder;
371 priv->connectors[priv->num_connectors++] = connector;
372
373 drm_mode_connector_attach_encoder(connector, encoder);
374
Archit Taneja0d8f3712013-03-26 19:15:19 +0530375 /*
376 * if we have reached the limit of the crtcs we are allowed to
377 * create, let's not try to look for a crtc for this
378 * panel/encoder and onwards, we will, of course, populate the
379 * the possible_crtcs field for all the encoders with the final
380 * set of crtcs we create
381 */
382 if (id == num_crtcs)
383 continue;
384
385 /*
386 * get the recommended DISPC channel for this encoder. For now,
387 * we only try to get create a crtc out of the recommended, the
388 * other possible channels to which the encoder can connect are
389 * not considered.
390 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530391
Tomi Valkeinen179df152015-10-21 16:17:23 +0300392 out = omapdss_find_output_from_display(dssdev);
393 channel = out->dispc_channel;
394 omap_dss_put_device(out);
395
Archit Taneja0d8f3712013-03-26 19:15:19 +0530396 /*
397 * if this channel hasn't already been taken by a previously
398 * allocated crtc, we create a new crtc for it
399 */
400 if (!channel_used(dev, channel)) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200401 ret = omap_modeset_create_crtc(dev, id, channel);
402 if (ret < 0) {
403 dev_err(dev->dev,
404 "could not create CRTC (channel %u)\n",
405 channel);
406 return ret;
407 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530408
409 id++;
410 }
411 }
412
413 /*
414 * we have allocated crtcs according to the need of the panels/encoders,
415 * adding more crtcs here if needed
416 */
417 for (; id < num_crtcs; id++) {
418
419 /* find a free manager for this crtc */
420 for (i = 0; i < num_mgrs; i++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200421 if (!channel_used(dev, i))
Archit Taneja0d8f3712013-03-26 19:15:19 +0530422 break;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530423 }
424
425 if (i == num_mgrs) {
426 /* this shouldn't really happen */
427 dev_err(dev->dev, "no managers left for crtc\n");
428 return -ENOMEM;
429 }
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200430
431 ret = omap_modeset_create_crtc(dev, id, i);
432 if (ret < 0) {
433 dev_err(dev->dev,
434 "could not create CRTC (channel %u)\n", i);
435 return ret;
436 }
Archit Taneja0d8f3712013-03-26 19:15:19 +0530437 }
438
439 /*
440 * Create normal planes for the remaining overlays:
441 */
442 for (; id < num_ovls; id++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200443 struct drm_plane *plane;
444
Laurent Pinchartef6b0e02015-01-11 00:11:18 +0200445 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200446 if (IS_ERR(plane))
447 return PTR_ERR(plane);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530448
449 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
450 priv->planes[priv->num_planes++] = plane;
451 }
452
453 for (i = 0; i < priv->num_encoders; i++) {
454 struct drm_encoder *encoder = priv->encoders[i];
455 struct omap_dss_device *dssdev =
456 omap_encoder_get_dssdev(encoder);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300457 struct omap_dss_device *output;
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300458
459 output = omapdss_find_output_from_display(dssdev);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530460
Rob Clarkf5f94542012-12-04 13:59:12 -0600461 /* figure out which crtc's we can connect the encoder to: */
462 encoder->possible_crtcs = 0;
463 for (id = 0; id < priv->num_crtcs; id++) {
Archit Taneja0d8f3712013-03-26 19:15:19 +0530464 struct drm_crtc *crtc = priv->crtcs[id];
465 enum omap_channel crtc_channel;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530466
467 crtc_channel = omap_crtc_channel(crtc);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530468
Tomi Valkeinen17337292014-09-03 19:25:49 +0000469 if (output->dispc_channel == crtc_channel) {
Rob Clarkf5f94542012-12-04 13:59:12 -0600470 encoder->possible_crtcs |= (1 << id);
Tomi Valkeinen17337292014-09-03 19:25:49 +0000471 break;
472 }
Rob Clarkf5f94542012-12-04 13:59:12 -0600473 }
Tomi Valkeinen820caab2013-04-25 14:53:18 +0300474
475 omap_dss_put_device(output);
Rob Clarkf5f94542012-12-04 13:59:12 -0600476 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600477
Archit Taneja0d8f3712013-03-26 19:15:19 +0530478 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
479 priv->num_planes, priv->num_crtcs, priv->num_encoders,
480 priv->num_connectors);
481
Rob Clark6b8ca4c2012-01-08 19:37:37 -0600482 dev->mode_config.min_width = 32;
483 dev->mode_config.min_height = 32;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600484
485 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
486 * to fill in these limits properly on different OMAP generations..
487 */
488 dev->mode_config.max_width = 2048;
489 dev->mode_config.max_height = 2048;
490
491 dev->mode_config.funcs = &omap_mode_config_funcs;
492
Laurent Pinchart69a12262015-03-05 21:38:16 +0200493 drm_mode_config_reset(dev);
494
Rob Clarkcd5351f2011-11-12 12:09:40 -0600495 return 0;
496}
497
498static void omap_modeset_free(struct drm_device *dev)
499{
500 drm_mode_config_cleanup(dev);
501}
502
503/*
504 * drm ioctl funcs
505 */
506
507
508static int ioctl_get_param(struct drm_device *dev, void *data,
509 struct drm_file *file_priv)
510{
Rob Clark5e3b0872012-10-29 09:31:12 +0100511 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600512 struct drm_omap_param *args = data;
513
514 DBG("%p: param=%llu", dev, args->param);
515
516 switch (args->param) {
517 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100518 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600519 break;
520 default:
521 DBG("unknown parameter %lld", args->param);
522 return -EINVAL;
523 }
524
525 return 0;
526}
527
528static int ioctl_set_param(struct drm_device *dev, void *data,
529 struct drm_file *file_priv)
530{
531 struct drm_omap_param *args = data;
532
533 switch (args->param) {
534 default:
535 DBG("unknown parameter %lld", args->param);
536 return -EINVAL;
537 }
538
539 return 0;
540}
541
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200542#define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */
543
Rob Clarkcd5351f2011-11-12 12:09:40 -0600544static int ioctl_gem_new(struct drm_device *dev, void *data,
545 struct drm_file *file_priv)
546{
547 struct drm_omap_gem_new *args = data;
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200548 u32 flags = args->flags & OMAP_BO_USER_MASK;
549
Rob Clarkf5f94542012-12-04 13:59:12 -0600550 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200551 args->size.bytes, flags);
552
553 return omap_gem_new_handle(dev, file_priv, args->size, flags,
554 &args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600555}
556
557static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
558 struct drm_file *file_priv)
559{
560 struct drm_omap_gem_cpu_prep *args = data;
561 struct drm_gem_object *obj;
562 int ret;
563
564 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
565
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100566 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900567 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600568 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600569
570 ret = omap_gem_op_sync(obj, args->op);
571
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900572 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600573 ret = omap_gem_op_start(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600574
575 drm_gem_object_unreference_unlocked(obj);
576
577 return ret;
578}
579
580static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
581 struct drm_file *file_priv)
582{
583 struct drm_omap_gem_cpu_fini *args = data;
584 struct drm_gem_object *obj;
585 int ret;
586
587 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
588
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100589 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900590 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600591 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600592
593 /* XXX flushy, flushy */
594 ret = 0;
595
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900596 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600597 ret = omap_gem_op_finish(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600598
599 drm_gem_object_unreference_unlocked(obj);
600
601 return ret;
602}
603
604static int ioctl_gem_info(struct drm_device *dev, void *data,
605 struct drm_file *file_priv)
606{
607 struct drm_omap_gem_info *args = data;
608 struct drm_gem_object *obj;
609 int ret = 0;
610
Rob Clarkf5f94542012-12-04 13:59:12 -0600611 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600612
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100613 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900614 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600615 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600616
Rob Clarkf7f9f452011-12-05 19:19:22 -0600617 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600618 args->offset = omap_gem_mmap_offset(obj);
619
620 drm_gem_object_unreference_unlocked(obj);
621
622 return ret;
623}
624
Rob Clarkbaa70942013-08-02 13:27:49 -0400625static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Daniel Vetterf8c47142015-09-08 13:56:30 +0200626 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
627 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
628 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
629 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
630 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
631 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
Rob Clarkcd5351f2011-11-12 12:09:40 -0600632};
633
634/*
635 * drm driver funcs
636 */
637
638/**
639 * load - setup chip and create an initial config
640 * @dev: DRM device
641 * @flags: startup flags
642 *
643 * The driver load routine has to do several things:
644 * - initialize the memory manager
645 * - allocate initial config memory
646 * - setup the DRM framebuffer with the allocated memory
647 */
648static int dev_load(struct drm_device *dev, unsigned long flags)
649{
Rob Clark5e3b0872012-10-29 09:31:12 +0100650 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600651 struct omap_drm_private *priv;
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200652 unsigned int i;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600653 int ret;
654
655 DBG("load: dev=%p", dev);
656
Rob Clarkcd5351f2011-11-12 12:09:40 -0600657 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
Joe Perches78110bb2013-02-11 09:41:29 -0800658 if (!priv)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600659 return -ENOMEM;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600660
Rob Clark5e3b0872012-10-29 09:31:12 +0100661 priv->omaprev = pdata->omaprev;
662
Rob Clarkcd5351f2011-11-12 12:09:40 -0600663 dev->dev_private = priv;
664
Tejun Heo4619cdb2012-08-22 16:49:44 -0700665 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200666 init_waitqueue_head(&priv->commit.wait);
667 spin_lock_init(&priv->commit.lock);
Rob Clark5609f7f2012-03-05 10:48:32 -0600668
Tomi Valkeinen76c40552014-12-17 14:34:22 +0200669 spin_lock_init(&priv->list_lock);
Rob Clarkf6b60362012-03-05 10:48:36 -0600670 INIT_LIST_HEAD(&priv->obj_list);
671
Rob Clarkf7f9f452011-12-05 19:19:22 -0600672 omap_gem_init(dev);
673
Rob Clarkcd5351f2011-11-12 12:09:40 -0600674 ret = omap_modeset_init(dev);
675 if (ret) {
676 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
677 dev->dev_private = NULL;
678 kfree(priv);
679 return ret;
680 }
681
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200682 /* Initialize vblank handling, start with all CRTCs disabled. */
Rob Clarkf5f94542012-12-04 13:59:12 -0600683 ret = drm_vblank_init(dev, priv->num_crtcs);
684 if (ret)
685 dev_warn(dev->dev, "could not init vblank\n");
686
Laurent Pinchartc397cfd2015-01-25 22:42:30 +0200687 for (i = 0; i < priv->num_crtcs; i++)
688 drm_crtc_vblank_off(priv->crtcs[i]);
689
Rob Clarkcd5351f2011-11-12 12:09:40 -0600690 priv->fbdev = omap_fbdev_init(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600691
Andy Grosse78edba2012-12-19 14:53:37 -0600692 /* store off drm_device for use in pm ops */
693 dev_set_drvdata(dev->dev, dev);
694
Rob Clarkcd5351f2011-11-12 12:09:40 -0600695 drm_kms_helper_poll_init(dev);
696
Rob Clarkcd5351f2011-11-12 12:09:40 -0600697 return 0;
698}
699
700static int dev_unload(struct drm_device *dev)
701{
Rob Clark5609f7f2012-03-05 10:48:32 -0600702 struct omap_drm_private *priv = dev->dev_private;
703
Rob Clarkcd5351f2011-11-12 12:09:40 -0600704 DBG("unload: dev=%p", dev);
705
Rob Clarkcd5351f2011-11-12 12:09:40 -0600706 drm_kms_helper_poll_fini(dev);
707
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000708 if (priv->fbdev)
709 omap_fbdev_free(dev);
Tomi Valkeinene2f8fd72014-04-02 14:31:57 +0300710
Rob Clarkcd5351f2011-11-12 12:09:40 -0600711 omap_modeset_free(dev);
Rob Clarkf7f9f452011-12-05 19:19:22 -0600712 omap_gem_deinit(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600713
Rob Clark5609f7f2012-03-05 10:48:32 -0600714 destroy_workqueue(priv->wq);
715
Archit Taneja80e4ed52014-01-02 14:49:54 +0530716 drm_vblank_cleanup(dev);
717 omap_drm_irq_uninstall(dev);
718
Rob Clarkcd5351f2011-11-12 12:09:40 -0600719 kfree(dev->dev_private);
720 dev->dev_private = NULL;
721
Andy Grosse78edba2012-12-19 14:53:37 -0600722 dev_set_drvdata(dev->dev, NULL);
723
Rob Clarkcd5351f2011-11-12 12:09:40 -0600724 return 0;
725}
726
727static int dev_open(struct drm_device *dev, struct drm_file *file)
728{
729 file->driver_priv = NULL;
730
731 DBG("open: dev=%p, file=%p", dev, file);
732
733 return 0;
734}
735
Rob Clarkcd5351f2011-11-12 12:09:40 -0600736/**
737 * lastclose - clean up after all DRM clients have exited
738 * @dev: DRM device
739 *
740 * Take care of cleaning up after all DRM clients have exited. In the
741 * mode setting case, we want to restore the kernel's initial mode (just
742 * in case the last client left us in a bad state).
743 */
744static void dev_lastclose(struct drm_device *dev)
745{
Rob Clark3c810c62012-08-15 15:18:01 -0500746 int i;
747
Lukas Wunnerf15a66e2015-09-05 11:22:39 +0200748 /* we don't support vga_switcheroo.. so just make sure the fbdev
Rob Clarkcd5351f2011-11-12 12:09:40 -0600749 * mode is active
750 */
751 struct omap_drm_private *priv = dev->dev_private;
752 int ret;
753
754 DBG("lastclose: dev=%p", dev);
755
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200756 if (dev->mode_config.rotation_property) {
Rob Clarkc2a6a552012-10-25 17:14:13 -0500757 /* need to restore default rotation state.. not sure
758 * if there is a cleaner way to restore properties to
759 * default state? Maybe a flag that properties should
760 * automatically be restored to default state on
761 * lastclose?
762 */
763 for (i = 0; i < priv->num_crtcs; i++) {
764 drm_object_property_set_value(&priv->crtcs[i]->base,
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200765 dev->mode_config.rotation_property, 0);
Rob Clarkc2a6a552012-10-25 17:14:13 -0500766 }
Rob Clark3c810c62012-08-15 15:18:01 -0500767
Rob Clarkc2a6a552012-10-25 17:14:13 -0500768 for (i = 0; i < priv->num_planes; i++) {
769 drm_object_property_set_value(&priv->planes[i]->base,
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200770 dev->mode_config.rotation_property, 0);
Rob Clarkc2a6a552012-10-25 17:14:13 -0500771 }
Rob Clark3c810c62012-08-15 15:18:01 -0500772 }
773
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000774 if (priv->fbdev) {
775 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
776 if (ret)
777 DBG("failed to restore crtc mode");
778 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600779}
780
Laurent Pinchart78b68552012-05-17 13:27:22 +0200781static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600782 .fault = omap_gem_fault,
783 .open = drm_gem_vm_open,
784 .close = drm_gem_vm_close,
785};
786
Rob Clarkff4f3872012-01-16 12:51:14 -0600787static const struct file_operations omapdriver_fops = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200788 .owner = THIS_MODULE,
789 .open = drm_open,
790 .unlocked_ioctl = drm_ioctl,
791 .release = drm_release,
792 .mmap = omap_gem_mmap,
793 .poll = drm_poll,
794 .read = drm_read,
795 .llseek = noop_llseek,
Rob Clarkff4f3872012-01-16 12:51:14 -0600796};
797
Rob Clarkcd5351f2011-11-12 12:09:40 -0600798static struct drm_driver omap_drm_driver = {
Tomi Valkeinen728fea72015-10-02 11:10:41 +0300799 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
800 DRIVER_ATOMIC,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200801 .load = dev_load,
802 .unload = dev_unload,
803 .open = dev_open,
804 .lastclose = dev_lastclose,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200805 .set_busid = drm_platform_set_busid,
Ville Syrjäläb44f8402015-09-30 16:46:48 +0300806 .get_vblank_counter = drm_vblank_no_hw_counter,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200807 .enable_vblank = omap_irq_enable_vblank,
808 .disable_vblank = omap_irq_disable_vblank,
Andy Gross6169a1482011-12-15 21:05:17 -0600809#ifdef CONFIG_DEBUG_FS
Laurent Pinchart222025e2015-01-11 00:02:07 +0200810 .debugfs_init = omap_debugfs_init,
811 .debugfs_cleanup = omap_debugfs_cleanup,
Andy Gross6169a1482011-12-15 21:05:17 -0600812#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200813 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
814 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
815 .gem_prime_export = omap_gem_prime_export,
816 .gem_prime_import = omap_gem_prime_import,
817 .gem_free_object = omap_gem_free_object,
818 .gem_vm_ops = &omap_gem_vm_ops,
819 .dumb_create = omap_gem_dumb_create,
820 .dumb_map_offset = omap_gem_dumb_map_offset,
821 .dumb_destroy = drm_gem_dumb_destroy,
822 .ioctls = ioctls,
823 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
824 .fops = &omapdriver_fops,
825 .name = DRIVER_NAME,
826 .desc = DRIVER_DESC,
827 .date = DRIVER_DATE,
828 .major = DRIVER_MAJOR,
829 .minor = DRIVER_MINOR,
830 .patchlevel = DRIVER_PATCHLEVEL,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600831};
832
Rob Clarkcd5351f2011-11-12 12:09:40 -0600833static int pdev_probe(struct platform_device *device)
834{
Archit Taneja3a01ab22014-01-02 14:49:51 +0530835 int r;
836
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300837 if (omapdss_is_initialized() == false)
838 return -EPROBE_DEFER;
839
Archit Taneja3a01ab22014-01-02 14:49:51 +0530840 omap_crtc_pre_init();
841
842 r = omap_connect_dssdevs();
843 if (r) {
844 omap_crtc_pre_uninit();
845 return r;
846 }
847
Rob Clarkcd5351f2011-11-12 12:09:40 -0600848 DBG("%s", device->name);
849 return drm_platform_init(&omap_drm_driver, device);
850}
851
852static int pdev_remove(struct platform_device *device)
853{
854 DBG("");
Andy Gross5c137792012-03-05 10:48:39 -0600855
Tomi Valkeinen707cf582014-04-02 13:47:43 +0300856 drm_put_dev(platform_get_drvdata(device));
857
Archit Tanejacc823bd2014-01-02 14:49:52 +0530858 omap_disconnect_dssdevs();
859 omap_crtc_pre_uninit();
Daniel Vetterfd3c0252013-12-11 11:34:26 +0100860
Rob Clarkcd5351f2011-11-12 12:09:40 -0600861 return 0;
862}
863
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200864#ifdef CONFIG_PM_SLEEP
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300865static int omap_drm_suspend_all_displays(void)
866{
867 struct omap_dss_device *dssdev = NULL;
868
869 for_each_dss_dev(dssdev) {
870 if (!dssdev->driver)
871 continue;
872
873 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
874 dssdev->driver->disable(dssdev);
875 dssdev->activate_after_resume = true;
876 } else {
877 dssdev->activate_after_resume = false;
878 }
879 }
880
881 return 0;
882}
883
884static int omap_drm_resume_all_displays(void)
885{
886 struct omap_dss_device *dssdev = NULL;
887
888 for_each_dss_dev(dssdev) {
889 if (!dssdev->driver)
890 continue;
891
892 if (dssdev->activate_after_resume) {
893 dssdev->driver->enable(dssdev);
894 dssdev->activate_after_resume = false;
895 }
896 }
897
898 return 0;
899}
900
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200901static int omap_drm_suspend(struct device *dev)
902{
903 struct drm_device *drm_dev = dev_get_drvdata(dev);
904
905 drm_kms_helper_poll_disable(drm_dev);
906
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300907 drm_modeset_lock_all(drm_dev);
908 omap_drm_suspend_all_displays();
909 drm_modeset_unlock_all(drm_dev);
910
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200911 return 0;
912}
913
914static int omap_drm_resume(struct device *dev)
915{
916 struct drm_device *drm_dev = dev_get_drvdata(dev);
917
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300918 drm_modeset_lock_all(drm_dev);
919 omap_drm_resume_all_displays();
920 drm_modeset_unlock_all(drm_dev);
921
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200922 drm_kms_helper_poll_enable(drm_dev);
923
924 return omap_gem_resume(dev);
925}
Andy Grosse78edba2012-12-19 14:53:37 -0600926#endif
927
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200928static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
929
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300930static struct platform_driver pdev = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200931 .driver = {
932 .name = DRIVER_NAME,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200933 .pm = &omapdrm_pm_ops,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200934 },
935 .probe = pdev_probe,
936 .remove = pdev_remove,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600937};
938
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100939static struct platform_driver * const drivers[] = {
940 &omap_dmm_driver,
941 &pdev,
942};
943
Rob Clarkcd5351f2011-11-12 12:09:40 -0600944static int __init omap_drm_init(void)
945{
946 DBG("init");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300947
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100948 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600949}
950
951static void __exit omap_drm_fini(void)
952{
953 DBG("fini");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300954
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100955 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600956}
957
958/* need late_initcall() so we load after dss_driver's are loaded */
959late_initcall(omap_drm_init);
960module_exit(omap_drm_fini);
961
962MODULE_AUTHOR("Rob Clark <rob@ti.com>");
963MODULE_DESCRIPTION("OMAP DRM Display Driver");
964MODULE_ALIAS("platform:" DRIVER_NAME);
965MODULE_LICENSE("GPL v2");