Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
Shawn Guo | 36dffd8 | 2013-04-07 10:49:34 +0800 | [diff] [blame] | 13 | #include "skeleton.dtsi" |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 14 | |
| 15 | / { |
| 16 | aliases { |
Lothar Waßmann | 5f8fbc2 | 2013-12-12 14:27:57 +0100 | [diff] [blame^] | 17 | can0 = &can1; |
| 18 | can1 = &can2; |
Shawn Guo | 5230f8f | 2012-08-05 14:01:28 +0800 | [diff] [blame] | 19 | gpio0 = &gpio1; |
| 20 | gpio1 = &gpio2; |
| 21 | gpio2 = &gpio3; |
| 22 | gpio3 = &gpio4; |
| 23 | gpio4 = &gpio5; |
| 24 | gpio5 = &gpio6; |
| 25 | gpio6 = &gpio7; |
Sascha Hauer | 80fa058 | 2013-06-25 15:51:57 +0200 | [diff] [blame] | 26 | i2c0 = &i2c1; |
| 27 | i2c1 = &i2c2; |
| 28 | i2c2 = &i2c3; |
| 29 | serial0 = &uart1; |
| 30 | serial1 = &uart2; |
| 31 | serial2 = &uart3; |
| 32 | serial3 = &uart4; |
| 33 | serial4 = &uart5; |
| 34 | spi0 = &ecspi1; |
| 35 | spi1 = &ecspi2; |
| 36 | spi2 = &ecspi3; |
| 37 | spi3 = &ecspi4; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 38 | }; |
| 39 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 40 | intc: interrupt-controller@00a01000 { |
| 41 | compatible = "arm,cortex-a9-gic"; |
| 42 | #interrupt-cells = <3>; |
| 43 | #address-cells = <1>; |
| 44 | #size-cells = <1>; |
| 45 | interrupt-controller; |
| 46 | reg = <0x00a01000 0x1000>, |
| 47 | <0x00a00100 0x100>; |
| 48 | }; |
| 49 | |
| 50 | clocks { |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <0>; |
| 53 | |
| 54 | ckil { |
| 55 | compatible = "fsl,imx-ckil", "fixed-clock"; |
| 56 | clock-frequency = <32768>; |
| 57 | }; |
| 58 | |
| 59 | ckih1 { |
| 60 | compatible = "fsl,imx-ckih1", "fixed-clock"; |
| 61 | clock-frequency = <0>; |
| 62 | }; |
| 63 | |
| 64 | osc { |
| 65 | compatible = "fsl,imx-osc", "fixed-clock"; |
| 66 | clock-frequency = <24000000>; |
| 67 | }; |
| 68 | }; |
| 69 | |
| 70 | soc { |
| 71 | #address-cells = <1>; |
| 72 | #size-cells = <1>; |
| 73 | compatible = "simple-bus"; |
| 74 | interrupt-parent = <&intc>; |
| 75 | ranges; |
| 76 | |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 77 | dma_apbh: dma-apbh@00110000 { |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 78 | compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; |
| 79 | reg = <0x00110000 0x2000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 80 | interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 81 | <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 82 | <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 83 | <0 13 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 84 | interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; |
| 85 | #dma-cells = <1>; |
| 86 | dma-channels = <4>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 87 | clocks = <&clks 106>; |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 88 | }; |
| 89 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 90 | gpmi: gpmi-nand@00112000 { |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 91 | compatible = "fsl,imx6q-gpmi-nand"; |
| 92 | #address-cells = <1>; |
| 93 | #size-cells = <1>; |
| 94 | reg = <0x00112000 0x2000>, <0x00114000 0x2000>; |
| 95 | reg-names = "gpmi-nand", "bch"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 96 | interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | c7aa12a | 2013-07-16 17:13:00 +0800 | [diff] [blame] | 97 | interrupt-names = "bch"; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 98 | clocks = <&clks 152>, <&clks 153>, <&clks 151>, |
| 99 | <&clks 150>, <&clks 149>; |
| 100 | clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", |
| 101 | "gpmi_bch_apb", "per1_bch"; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 102 | dmas = <&dma_apbh 0>; |
| 103 | dma-names = "rx-tx"; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 104 | status = "disabled"; |
Huang Shijie | cf922fa | 2012-07-01 23:38:46 -0400 | [diff] [blame] | 105 | }; |
| 106 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 107 | timer@00a00600 { |
Marc Zyngier | 58458e0 | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 108 | compatible = "arm,cortex-a9-twd-timer"; |
| 109 | reg = <0x00a00600 0x20>; |
| 110 | interrupts = <1 13 0xf01>; |
Shawn Guo | 2bb4b70 | 2013-04-03 23:50:09 +0800 | [diff] [blame] | 111 | clocks = <&clks 15>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 112 | }; |
| 113 | |
| 114 | L2: l2-cache@00a02000 { |
| 115 | compatible = "arm,pl310-cache"; |
| 116 | reg = <0x00a02000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 117 | interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 118 | cache-unified; |
| 119 | cache-level = <2>; |
Dirk Behme | 5a5ca56 | 2013-04-26 10:13:55 +0200 | [diff] [blame] | 120 | arm,tag-latency = <4 2 3>; |
| 121 | arm,data-latency = <4 2 3>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 122 | }; |
| 123 | |
Sean Cross | 3a57291 | 2013-09-26 10:51:09 +0800 | [diff] [blame] | 124 | pcie: pcie@0x01000000 { |
| 125 | compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; |
| 126 | reg = <0x01ffc000 0x4000>; /* DBI */ |
| 127 | #address-cells = <3>; |
| 128 | #size-cells = <2>; |
| 129 | device_type = "pci"; |
| 130 | ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */ |
| 131 | 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ |
| 132 | 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ |
| 133 | num-lanes = <1>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 134 | interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; |
Sean Cross | 3a57291 | 2013-09-26 10:51:09 +0800 | [diff] [blame] | 135 | clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; |
| 136 | clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; |
| 137 | status = "disabled"; |
| 138 | }; |
| 139 | |
Dirk Behme | 218abe6 | 2013-02-15 15:10:01 +0100 | [diff] [blame] | 140 | pmu { |
| 141 | compatible = "arm,cortex-a9-pmu"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 142 | interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; |
Dirk Behme | 218abe6 | 2013-02-15 15:10:01 +0100 | [diff] [blame] | 143 | }; |
| 144 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 145 | aips-bus@02000000 { /* AIPS1 */ |
| 146 | compatible = "fsl,aips-bus", "simple-bus"; |
| 147 | #address-cells = <1>; |
| 148 | #size-cells = <1>; |
| 149 | reg = <0x02000000 0x100000>; |
| 150 | ranges; |
| 151 | |
| 152 | spba-bus@02000000 { |
| 153 | compatible = "fsl,spba-bus", "simple-bus"; |
| 154 | #address-cells = <1>; |
| 155 | #size-cells = <1>; |
| 156 | reg = <0x02000000 0x40000>; |
| 157 | ranges; |
| 158 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 159 | spdif: spdif@02004000 { |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 160 | compatible = "fsl,imx35-spdif"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 161 | reg = <0x02004000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 162 | interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 163 | dmas = <&sdma 14 18 0>, |
| 164 | <&sdma 15 18 0>; |
| 165 | dma-names = "rx", "tx"; |
| 166 | clocks = <&clks 197>, <&clks 3>, |
| 167 | <&clks 197>, <&clks 107>, |
| 168 | <&clks 0>, <&clks 118>, |
Shawn Guo | 793b4b1 | 2013-11-16 22:38:29 +0800 | [diff] [blame] | 169 | <&clks 0>, <&clks 139>, |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 170 | <&clks 0>; |
| 171 | clock-names = "core", "rxtx0", |
| 172 | "rxtx1", "rxtx2", |
| 173 | "rxtx3", "rxtx4", |
| 174 | "rxtx5", "rxtx6", |
| 175 | "rxtx7"; |
| 176 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 177 | }; |
| 178 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 179 | ecspi1: ecspi@02008000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 180 | #address-cells = <1>; |
| 181 | #size-cells = <0>; |
| 182 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 183 | reg = <0x02008000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 184 | interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 185 | clocks = <&clks 112>, <&clks 112>; |
| 186 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 187 | status = "disabled"; |
| 188 | }; |
| 189 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 190 | ecspi2: ecspi@0200c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 191 | #address-cells = <1>; |
| 192 | #size-cells = <0>; |
| 193 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 194 | reg = <0x0200c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 195 | interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 196 | clocks = <&clks 113>, <&clks 113>; |
| 197 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 198 | status = "disabled"; |
| 199 | }; |
| 200 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 201 | ecspi3: ecspi@02010000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 202 | #address-cells = <1>; |
| 203 | #size-cells = <0>; |
| 204 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 205 | reg = <0x02010000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 206 | interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 207 | clocks = <&clks 114>, <&clks 114>; |
| 208 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 209 | status = "disabled"; |
| 210 | }; |
| 211 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 212 | ecspi4: ecspi@02014000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 213 | #address-cells = <1>; |
| 214 | #size-cells = <0>; |
| 215 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 216 | reg = <0x02014000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 217 | interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 218 | clocks = <&clks 115>, <&clks 115>; |
| 219 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 220 | status = "disabled"; |
| 221 | }; |
| 222 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 223 | uart1: serial@02020000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 224 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 225 | reg = <0x02020000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 226 | interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 227 | clocks = <&clks 160>, <&clks 161>; |
| 228 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 229 | dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; |
| 230 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 231 | status = "disabled"; |
| 232 | }; |
| 233 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 234 | esai: esai@02024000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 235 | reg = <0x02024000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 236 | interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 237 | }; |
| 238 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 239 | ssi1: ssi@02028000 { |
| 240 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 241 | reg = <0x02028000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 242 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 243 | clocks = <&clks 178>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 244 | dmas = <&sdma 37 1 0>, |
| 245 | <&sdma 38 1 0>; |
| 246 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 247 | fsl,fifo-depth = <15>; |
| 248 | fsl,ssi-dma-events = <38 37>; |
| 249 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 250 | }; |
| 251 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 252 | ssi2: ssi@0202c000 { |
| 253 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 254 | reg = <0x0202c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 255 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 256 | clocks = <&clks 179>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 257 | dmas = <&sdma 41 1 0>, |
| 258 | <&sdma 42 1 0>; |
| 259 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 260 | fsl,fifo-depth = <15>; |
| 261 | fsl,ssi-dma-events = <42 41>; |
| 262 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 263 | }; |
| 264 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 265 | ssi3: ssi@02030000 { |
| 266 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 267 | reg = <0x02030000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 268 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 269 | clocks = <&clks 180>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 270 | dmas = <&sdma 45 1 0>, |
| 271 | <&sdma 46 1 0>; |
| 272 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 273 | fsl,fifo-depth = <15>; |
| 274 | fsl,ssi-dma-events = <46 45>; |
| 275 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 276 | }; |
| 277 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 278 | asrc: asrc@02034000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 279 | reg = <0x02034000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 280 | interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 281 | }; |
| 282 | |
| 283 | spba@0203c000 { |
| 284 | reg = <0x0203c000 0x4000>; |
| 285 | }; |
| 286 | }; |
| 287 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 288 | vpu: vpu@02040000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 289 | reg = <0x02040000 0x3c000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 290 | interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>, |
| 291 | <0 12 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 292 | }; |
| 293 | |
| 294 | aipstz@0207c000 { /* AIPSTZ1 */ |
| 295 | reg = <0x0207c000 0x4000>; |
| 296 | }; |
| 297 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 298 | pwm1: pwm@02080000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 299 | #pwm-cells = <2>; |
| 300 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 301 | reg = <0x02080000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 302 | interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 303 | clocks = <&clks 62>, <&clks 145>; |
| 304 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 305 | }; |
| 306 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 307 | pwm2: pwm@02084000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 308 | #pwm-cells = <2>; |
| 309 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 310 | reg = <0x02084000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 311 | interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 312 | clocks = <&clks 62>, <&clks 146>; |
| 313 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 314 | }; |
| 315 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 316 | pwm3: pwm@02088000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 317 | #pwm-cells = <2>; |
| 318 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 319 | reg = <0x02088000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 320 | interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 321 | clocks = <&clks 62>, <&clks 147>; |
| 322 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 323 | }; |
| 324 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 325 | pwm4: pwm@0208c000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 326 | #pwm-cells = <2>; |
| 327 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 328 | reg = <0x0208c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 329 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 330 | clocks = <&clks 62>, <&clks 148>; |
| 331 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 332 | }; |
| 333 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 334 | can1: flexcan@02090000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 335 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 336 | reg = <0x02090000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 337 | interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 338 | clocks = <&clks 108>, <&clks 109>; |
| 339 | clock-names = "ipg", "per"; |
Tim Harvey | a113533 | 2013-10-22 21:51:27 -0700 | [diff] [blame] | 340 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 341 | }; |
| 342 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 343 | can2: flexcan@02094000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 344 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 345 | reg = <0x02094000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 346 | interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 347 | clocks = <&clks 110>, <&clks 111>; |
| 348 | clock-names = "ipg", "per"; |
Tim Harvey | a113533 | 2013-10-22 21:51:27 -0700 | [diff] [blame] | 349 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 350 | }; |
| 351 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 352 | gpt: gpt@02098000 { |
Sascha Hauer | 97b108f | 2013-06-25 15:51:47 +0200 | [diff] [blame] | 353 | compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 354 | reg = <0x02098000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 355 | interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 4efccad | 2013-03-14 13:09:01 +0100 | [diff] [blame] | 356 | clocks = <&clks 119>, <&clks 120>; |
| 357 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 358 | }; |
| 359 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 360 | gpio1: gpio@0209c000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 361 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 362 | reg = <0x0209c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 363 | interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>, |
| 364 | <0 67 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 365 | gpio-controller; |
| 366 | #gpio-cells = <2>; |
| 367 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 368 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 369 | }; |
| 370 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 371 | gpio2: gpio@020a0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 372 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 373 | reg = <0x020a0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 374 | interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>, |
| 375 | <0 69 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 376 | gpio-controller; |
| 377 | #gpio-cells = <2>; |
| 378 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 379 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 380 | }; |
| 381 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 382 | gpio3: gpio@020a4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 383 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 384 | reg = <0x020a4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 385 | interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>, |
| 386 | <0 71 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 387 | gpio-controller; |
| 388 | #gpio-cells = <2>; |
| 389 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 390 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 391 | }; |
| 392 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 393 | gpio4: gpio@020a8000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 394 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 395 | reg = <0x020a8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 396 | interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>, |
| 397 | <0 73 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 398 | gpio-controller; |
| 399 | #gpio-cells = <2>; |
| 400 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 401 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 402 | }; |
| 403 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 404 | gpio5: gpio@020ac000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 405 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 406 | reg = <0x020ac000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 407 | interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>, |
| 408 | <0 75 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 409 | gpio-controller; |
| 410 | #gpio-cells = <2>; |
| 411 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 412 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 413 | }; |
| 414 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 415 | gpio6: gpio@020b0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 416 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 417 | reg = <0x020b0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 418 | interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>, |
| 419 | <0 77 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 420 | gpio-controller; |
| 421 | #gpio-cells = <2>; |
| 422 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 423 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 424 | }; |
| 425 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 426 | gpio7: gpio@020b4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 427 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 428 | reg = <0x020b4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 429 | interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>, |
| 430 | <0 79 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 431 | gpio-controller; |
| 432 | #gpio-cells = <2>; |
| 433 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 434 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 435 | }; |
| 436 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 437 | kpp: kpp@020b8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 438 | reg = <0x020b8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 439 | interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 440 | }; |
| 441 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 442 | wdog1: wdog@020bc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 443 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 444 | reg = <0x020bc000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 445 | interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 446 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 447 | }; |
| 448 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 449 | wdog2: wdog@020c0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 450 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 451 | reg = <0x020c0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 452 | interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 453 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 454 | status = "disabled"; |
| 455 | }; |
| 456 | |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 457 | clks: ccm@020c4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 458 | compatible = "fsl,imx6q-ccm"; |
| 459 | reg = <0x020c4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 460 | interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, |
| 461 | <0 88 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 462 | #clock-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 463 | }; |
| 464 | |
Dong Aisheng | baa6415 | 2012-09-05 10:57:15 +0800 | [diff] [blame] | 465 | anatop: anatop@020c8000 { |
| 466 | compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 467 | reg = <0x020c8000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 468 | interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, |
| 469 | <0 54 IRQ_TYPE_LEVEL_HIGH>, |
| 470 | <0 127 IRQ_TYPE_LEVEL_HIGH>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 471 | |
| 472 | regulator-1p1@110 { |
| 473 | compatible = "fsl,anatop-regulator"; |
| 474 | regulator-name = "vdd1p1"; |
| 475 | regulator-min-microvolt = <800000>; |
| 476 | regulator-max-microvolt = <1375000>; |
| 477 | regulator-always-on; |
| 478 | anatop-reg-offset = <0x110>; |
| 479 | anatop-vol-bit-shift = <8>; |
| 480 | anatop-vol-bit-width = <5>; |
| 481 | anatop-min-bit-val = <4>; |
| 482 | anatop-min-voltage = <800000>; |
| 483 | anatop-max-voltage = <1375000>; |
| 484 | }; |
| 485 | |
| 486 | regulator-3p0@120 { |
| 487 | compatible = "fsl,anatop-regulator"; |
| 488 | regulator-name = "vdd3p0"; |
| 489 | regulator-min-microvolt = <2800000>; |
| 490 | regulator-max-microvolt = <3150000>; |
| 491 | regulator-always-on; |
| 492 | anatop-reg-offset = <0x120>; |
| 493 | anatop-vol-bit-shift = <8>; |
| 494 | anatop-vol-bit-width = <5>; |
| 495 | anatop-min-bit-val = <0>; |
| 496 | anatop-min-voltage = <2625000>; |
| 497 | anatop-max-voltage = <3400000>; |
| 498 | }; |
| 499 | |
| 500 | regulator-2p5@130 { |
| 501 | compatible = "fsl,anatop-regulator"; |
| 502 | regulator-name = "vdd2p5"; |
| 503 | regulator-min-microvolt = <2000000>; |
| 504 | regulator-max-microvolt = <2750000>; |
| 505 | regulator-always-on; |
| 506 | anatop-reg-offset = <0x130>; |
| 507 | anatop-vol-bit-shift = <8>; |
| 508 | anatop-vol-bit-width = <5>; |
| 509 | anatop-min-bit-val = <0>; |
| 510 | anatop-min-voltage = <2000000>; |
| 511 | anatop-max-voltage = <2750000>; |
| 512 | }; |
| 513 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 514 | reg_arm: regulator-vddcore@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 515 | compatible = "fsl,anatop-regulator"; |
| 516 | regulator-name = "cpu"; |
| 517 | regulator-min-microvolt = <725000>; |
| 518 | regulator-max-microvolt = <1450000>; |
| 519 | regulator-always-on; |
| 520 | anatop-reg-offset = <0x140>; |
| 521 | anatop-vol-bit-shift = <0>; |
| 522 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 523 | anatop-delay-reg-offset = <0x170>; |
| 524 | anatop-delay-bit-shift = <24>; |
| 525 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 526 | anatop-min-bit-val = <1>; |
| 527 | anatop-min-voltage = <725000>; |
| 528 | anatop-max-voltage = <1450000>; |
| 529 | }; |
| 530 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 531 | reg_pu: regulator-vddpu@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 532 | compatible = "fsl,anatop-regulator"; |
| 533 | regulator-name = "vddpu"; |
| 534 | regulator-min-microvolt = <725000>; |
| 535 | regulator-max-microvolt = <1450000>; |
| 536 | regulator-always-on; |
| 537 | anatop-reg-offset = <0x140>; |
| 538 | anatop-vol-bit-shift = <9>; |
| 539 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 540 | anatop-delay-reg-offset = <0x170>; |
| 541 | anatop-delay-bit-shift = <26>; |
| 542 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 543 | anatop-min-bit-val = <1>; |
| 544 | anatop-min-voltage = <725000>; |
| 545 | anatop-max-voltage = <1450000>; |
| 546 | }; |
| 547 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 548 | reg_soc: regulator-vddsoc@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 549 | compatible = "fsl,anatop-regulator"; |
| 550 | regulator-name = "vddsoc"; |
| 551 | regulator-min-microvolt = <725000>; |
| 552 | regulator-max-microvolt = <1450000>; |
| 553 | regulator-always-on; |
| 554 | anatop-reg-offset = <0x140>; |
| 555 | anatop-vol-bit-shift = <18>; |
| 556 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 557 | anatop-delay-reg-offset = <0x170>; |
| 558 | anatop-delay-bit-shift = <28>; |
| 559 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 560 | anatop-min-bit-val = <1>; |
| 561 | anatop-min-voltage = <725000>; |
| 562 | anatop-max-voltage = <1450000>; |
| 563 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 564 | }; |
| 565 | |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 566 | tempmon: tempmon { |
| 567 | compatible = "fsl,imx6q-tempmon"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 568 | interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 569 | fsl,tempmon = <&anatop>; |
| 570 | fsl,tempmon-data = <&ocotp>; |
| 571 | }; |
| 572 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 573 | usbphy1: usbphy@020c9000 { |
| 574 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 575 | reg = <0x020c9000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 576 | interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 577 | clocks = <&clks 182>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 578 | }; |
| 579 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 580 | usbphy2: usbphy@020ca000 { |
| 581 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 582 | reg = <0x020ca000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 583 | interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 584 | clocks = <&clks 183>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 585 | }; |
| 586 | |
| 587 | snvs@020cc000 { |
Shawn Guo | c925038 | 2012-07-02 20:13:03 +0800 | [diff] [blame] | 588 | compatible = "fsl,sec-v4.0-mon", "simple-bus"; |
| 589 | #address-cells = <1>; |
| 590 | #size-cells = <1>; |
| 591 | ranges = <0 0x020cc000 0x4000>; |
| 592 | |
| 593 | snvs-rtc-lp@34 { |
| 594 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; |
| 595 | reg = <0x34 0x58>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 596 | interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, |
| 597 | <0 20 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | c925038 | 2012-07-02 20:13:03 +0800 | [diff] [blame] | 598 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 599 | }; |
| 600 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 601 | epit1: epit@020d0000 { /* EPIT1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 602 | reg = <0x020d0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 603 | interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 604 | }; |
| 605 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 606 | epit2: epit@020d4000 { /* EPIT2 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 607 | reg = <0x020d4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 608 | interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 609 | }; |
| 610 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 611 | src: src@020d8000 { |
Philipp Zabel | bd3d924 | 2013-03-28 17:35:22 +0100 | [diff] [blame] | 612 | compatible = "fsl,imx6q-src", "fsl,imx51-src"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 613 | reg = <0x020d8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 614 | interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>, |
| 615 | <0 96 IRQ_TYPE_LEVEL_HIGH>; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 616 | #reset-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 617 | }; |
| 618 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 619 | gpc: gpc@020dc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 620 | compatible = "fsl,imx6q-gpc"; |
| 621 | reg = <0x020dc000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 622 | interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, |
| 623 | <0 90 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 624 | }; |
| 625 | |
Dong Aisheng | df37e0c | 2012-09-05 10:57:14 +0800 | [diff] [blame] | 626 | gpr: iomuxc-gpr@020e0000 { |
| 627 | compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; |
| 628 | reg = <0x020e0000 0x38>; |
| 629 | }; |
| 630 | |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 631 | iomuxc: iomuxc@020e0000 { |
| 632 | compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; |
| 633 | reg = <0x020e0000 0x4000>; |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 634 | }; |
| 635 | |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 636 | ldb: ldb@020e0008 { |
| 637 | #address-cells = <1>; |
| 638 | #size-cells = <0>; |
| 639 | compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb"; |
| 640 | gpr = <&gpr>; |
| 641 | status = "disabled"; |
| 642 | |
| 643 | lvds-channel@0 { |
| 644 | reg = <0>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 645 | status = "disabled"; |
| 646 | }; |
| 647 | |
| 648 | lvds-channel@1 { |
| 649 | reg = <1>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 650 | status = "disabled"; |
| 651 | }; |
| 652 | }; |
| 653 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 654 | dcic1: dcic@020e4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 655 | reg = <0x020e4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 656 | interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 657 | }; |
| 658 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 659 | dcic2: dcic@020e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 660 | reg = <0x020e8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 661 | interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 662 | }; |
| 663 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 664 | sdma: sdma@020ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 665 | compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; |
| 666 | reg = <0x020ec000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 667 | interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 668 | clocks = <&clks 155>, <&clks 155>; |
| 669 | clock-names = "ipg", "ahb"; |
Huang Shijie | fb72bb2 | 2013-07-02 10:15:29 +0800 | [diff] [blame] | 670 | #dma-cells = <3>; |
Fabio Estevam | d6b9c59 | 2013-01-17 12:13:25 -0200 | [diff] [blame] | 671 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 672 | }; |
| 673 | }; |
| 674 | |
| 675 | aips-bus@02100000 { /* AIPS2 */ |
| 676 | compatible = "fsl,aips-bus", "simple-bus"; |
| 677 | #address-cells = <1>; |
| 678 | #size-cells = <1>; |
| 679 | reg = <0x02100000 0x100000>; |
| 680 | ranges; |
| 681 | |
| 682 | caam@02100000 { |
| 683 | reg = <0x02100000 0x40000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 684 | interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>, |
| 685 | <0 106 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 686 | }; |
| 687 | |
| 688 | aipstz@0217c000 { /* AIPSTZ2 */ |
| 689 | reg = <0x0217c000 0x4000>; |
| 690 | }; |
| 691 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 692 | usbotg: usb@02184000 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 693 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 694 | reg = <0x02184000 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 695 | interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 696 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 697 | fsl,usbphy = <&usbphy1>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 698 | fsl,usbmisc = <&usbmisc 0>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 699 | status = "disabled"; |
| 700 | }; |
| 701 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 702 | usbh1: usb@02184200 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 703 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 704 | reg = <0x02184200 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 705 | interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 706 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 707 | fsl,usbphy = <&usbphy2>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 708 | fsl,usbmisc = <&usbmisc 1>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 709 | status = "disabled"; |
| 710 | }; |
| 711 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 712 | usbh2: usb@02184400 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 713 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 714 | reg = <0x02184400 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 715 | interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 716 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 717 | fsl,usbmisc = <&usbmisc 2>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 718 | status = "disabled"; |
| 719 | }; |
| 720 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 721 | usbh3: usb@02184600 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 722 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 723 | reg = <0x02184600 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 724 | interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 725 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 726 | fsl,usbmisc = <&usbmisc 3>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 727 | status = "disabled"; |
| 728 | }; |
| 729 | |
Shawn Guo | 60984bd | 2013-04-28 09:59:54 +0800 | [diff] [blame] | 730 | usbmisc: usbmisc@02184800 { |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 731 | #index-cells = <1>; |
| 732 | compatible = "fsl,imx6q-usbmisc"; |
| 733 | reg = <0x02184800 0x200>; |
| 734 | clocks = <&clks 162>; |
| 735 | }; |
| 736 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 737 | fec: ethernet@02188000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 738 | compatible = "fsl,imx6q-fec"; |
| 739 | reg = <0x02188000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 740 | interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>, |
| 741 | <0 119 IRQ_TYPE_LEVEL_HIGH>; |
Frank Li | 8dd5c66 | 2013-02-05 14:21:06 +0800 | [diff] [blame] | 742 | clocks = <&clks 117>, <&clks 117>, <&clks 190>; |
Frank Li | 7629838 | 2012-10-30 18:24:57 +0000 | [diff] [blame] | 743 | clock-names = "ipg", "ahb", "ptp"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 744 | status = "disabled"; |
| 745 | }; |
| 746 | |
| 747 | mlb@0218c000 { |
| 748 | reg = <0x0218c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 749 | interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>, |
| 750 | <0 117 IRQ_TYPE_LEVEL_HIGH>, |
| 751 | <0 126 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 752 | }; |
| 753 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 754 | usdhc1: usdhc@02190000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 755 | compatible = "fsl,imx6q-usdhc"; |
| 756 | reg = <0x02190000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 757 | interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 758 | clocks = <&clks 163>, <&clks 163>, <&clks 163>; |
| 759 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 760 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 761 | status = "disabled"; |
| 762 | }; |
| 763 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 764 | usdhc2: usdhc@02194000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 765 | compatible = "fsl,imx6q-usdhc"; |
| 766 | reg = <0x02194000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 767 | interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 768 | clocks = <&clks 164>, <&clks 164>, <&clks 164>; |
| 769 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 770 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 771 | status = "disabled"; |
| 772 | }; |
| 773 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 774 | usdhc3: usdhc@02198000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 775 | compatible = "fsl,imx6q-usdhc"; |
| 776 | reg = <0x02198000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 777 | interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 778 | clocks = <&clks 165>, <&clks 165>, <&clks 165>; |
| 779 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 780 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 781 | status = "disabled"; |
| 782 | }; |
| 783 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 784 | usdhc4: usdhc@0219c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 785 | compatible = "fsl,imx6q-usdhc"; |
| 786 | reg = <0x0219c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 787 | interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 788 | clocks = <&clks 166>, <&clks 166>, <&clks 166>; |
| 789 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 790 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 791 | status = "disabled"; |
| 792 | }; |
| 793 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 794 | i2c1: i2c@021a0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 795 | #address-cells = <1>; |
| 796 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 797 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 798 | reg = <0x021a0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 799 | interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 800 | clocks = <&clks 125>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 801 | status = "disabled"; |
| 802 | }; |
| 803 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 804 | i2c2: i2c@021a4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 805 | #address-cells = <1>; |
| 806 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 807 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 808 | reg = <0x021a4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 809 | interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 810 | clocks = <&clks 126>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 811 | status = "disabled"; |
| 812 | }; |
| 813 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 814 | i2c3: i2c@021a8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 815 | #address-cells = <1>; |
| 816 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 817 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 818 | reg = <0x021a8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 819 | interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 820 | clocks = <&clks 127>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 821 | status = "disabled"; |
| 822 | }; |
| 823 | |
| 824 | romcp@021ac000 { |
| 825 | reg = <0x021ac000 0x4000>; |
| 826 | }; |
| 827 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 828 | mmdc0: mmdc@021b0000 { /* MMDC0 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 829 | compatible = "fsl,imx6q-mmdc"; |
| 830 | reg = <0x021b0000 0x4000>; |
| 831 | }; |
| 832 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 833 | mmdc1: mmdc@021b4000 { /* MMDC1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 834 | reg = <0x021b4000 0x4000>; |
| 835 | }; |
| 836 | |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 837 | weim: weim@021b8000 { |
| 838 | compatible = "fsl,imx6q-weim"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 839 | reg = <0x021b8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 840 | interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 841 | clocks = <&clks 196>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 842 | }; |
| 843 | |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 844 | ocotp: ocotp@021bc000 { |
| 845 | compatible = "fsl,imx6q-ocotp", "syscon"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 846 | reg = <0x021bc000 0x4000>; |
| 847 | }; |
| 848 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 849 | tzasc@021d0000 { /* TZASC1 */ |
| 850 | reg = <0x021d0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 851 | interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 852 | }; |
| 853 | |
| 854 | tzasc@021d4000 { /* TZASC2 */ |
| 855 | reg = <0x021d4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 856 | interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 857 | }; |
| 858 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 859 | audmux: audmux@021d8000 { |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 860 | compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 861 | reg = <0x021d8000 0x4000>; |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 862 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 863 | }; |
| 864 | |
Troy Kisky | 5e0c7cd | 2013-11-14 14:02:08 -0700 | [diff] [blame] | 865 | mipi_csi: mipi@021dc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 866 | reg = <0x021dc000 0x4000>; |
| 867 | }; |
| 868 | |
| 869 | mipi@021e0000 { /* MIPI-DSI */ |
| 870 | reg = <0x021e0000 0x4000>; |
| 871 | }; |
| 872 | |
| 873 | vdoa@021e4000 { |
| 874 | reg = <0x021e4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 875 | interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 876 | }; |
| 877 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 878 | uart2: serial@021e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 879 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 880 | reg = <0x021e8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 881 | interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 882 | clocks = <&clks 160>, <&clks 161>; |
| 883 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 884 | dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; |
| 885 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 886 | status = "disabled"; |
| 887 | }; |
| 888 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 889 | uart3: serial@021ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 890 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 891 | reg = <0x021ec000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 892 | interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 893 | clocks = <&clks 160>, <&clks 161>; |
| 894 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 895 | dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; |
| 896 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 897 | status = "disabled"; |
| 898 | }; |
| 899 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 900 | uart4: serial@021f0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 901 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 902 | reg = <0x021f0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 903 | interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 904 | clocks = <&clks 160>, <&clks 161>; |
| 905 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 906 | dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; |
| 907 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 908 | status = "disabled"; |
| 909 | }; |
| 910 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 911 | uart5: serial@021f4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 912 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 913 | reg = <0x021f4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 914 | interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 915 | clocks = <&clks 160>, <&clks 161>; |
| 916 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 917 | dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; |
| 918 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 919 | status = "disabled"; |
| 920 | }; |
| 921 | }; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 922 | |
| 923 | ipu1: ipu@02400000 { |
| 924 | #crtc-cells = <1>; |
| 925 | compatible = "fsl,imx6q-ipu"; |
| 926 | reg = <0x02400000 0x400000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 927 | interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>, |
| 928 | <0 5 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 929 | clocks = <&clks 130>, <&clks 131>, <&clks 132>; |
| 930 | clock-names = "bus", "di0", "di1"; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 931 | resets = <&src 2>; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 932 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 933 | }; |
| 934 | }; |