Chander Kashyap | 34dcedf | 2013-06-19 00:29:35 +0900 | [diff] [blame] | 1 | /* |
| 2 | * SAMSUNG EXYNOS5420 SoC device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file. |
| 8 | * EXYNOS5420 based board files can include this file and provide |
| 9 | * values for board specfic bindings. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | */ |
| 15 | |
Krzysztof Kozlowski | c9cf996 | 2016-05-08 18:41:57 +0200 | [diff] [blame] | 16 | #include "exynos54xx.dtsi" |
Andrzej Hajda | 1dd4e59 | 2014-02-26 09:53:30 +0900 | [diff] [blame] | 17 | #include <dt-bindings/clock/exynos5420.h> |
Tushar Behera | 602408e | 2014-03-21 04:31:30 +0900 | [diff] [blame] | 18 | #include <dt-bindings/clock/exynos-audss-clk.h> |
Krzysztof Kozlowski | e5995e6 | 2016-05-31 20:39:02 +0200 | [diff] [blame] | 19 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
Andrew Bresticker | 35e8277 | 2013-08-19 04:58:38 +0900 | [diff] [blame] | 20 | |
Chander Kashyap | 34dcedf | 2013-06-19 00:29:35 +0900 | [diff] [blame] | 21 | / { |
Sachin Kamat | 8bdb31b | 2014-03-21 02:17:22 +0900 | [diff] [blame] | 22 | compatible = "samsung,exynos5420", "samsung,exynos5"; |
Chander Kashyap | 34dcedf | 2013-06-19 00:29:35 +0900 | [diff] [blame] | 23 | |
Leela Krishna Amudala | d81c6cb | 2013-06-19 22:16:06 +0900 | [diff] [blame] | 24 | aliases { |
Yuvaraj Kumar C D | 0e2c591 | 2013-10-21 05:57:00 +0900 | [diff] [blame] | 25 | mshc0 = &mmc_0; |
| 26 | mshc1 = &mmc_1; |
| 27 | mshc2 = &mmc_2; |
Leela Krishna Amudala | d81c6cb | 2013-06-19 22:16:06 +0900 | [diff] [blame] | 28 | pinctrl0 = &pinctrl_0; |
| 29 | pinctrl1 = &pinctrl_1; |
| 30 | pinctrl2 = &pinctrl_2; |
| 31 | pinctrl3 = &pinctrl_3; |
| 32 | pinctrl4 = &pinctrl_4; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 33 | i2c8 = &hsi2c_8; |
| 34 | i2c9 = &hsi2c_9; |
| 35 | i2c10 = &hsi2c_10; |
Leela Krishna Amudala | 01eb463 | 2013-10-21 05:59:06 +0900 | [diff] [blame] | 36 | gsc0 = &gsc_0; |
| 37 | gsc1 = &gsc_1; |
Leela Krishna Amudala | e84a2d9 | 2013-12-19 02:36:37 +0900 | [diff] [blame] | 38 | spi0 = &spi_0; |
| 39 | spi1 = &spi_1; |
| 40 | spi2 = &spi_2; |
Thomas Abraham | 66a4a1f | 2015-12-15 18:33:17 +0100 | [diff] [blame] | 41 | }; |
| 42 | |
Krzysztof Kozlowski | 4f0d20e | 2015-12-11 15:05:56 +0900 | [diff] [blame] | 43 | /* |
| 44 | * The 'cpus' node is not present here but instead it is provided |
| 45 | * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi. |
| 46 | */ |
Andrew Bresticker | 5b56642 | 2014-05-16 04:23:26 +0900 | [diff] [blame] | 47 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 48 | soc: soc { |
| 49 | cluster_a15_opp_table: opp_table0 { |
| 50 | compatible = "operating-points-v2"; |
| 51 | opp-shared; |
| 52 | opp@1800000000 { |
| 53 | opp-hz = /bits/ 64 <1800000000>; |
| 54 | opp-microvolt = <1250000>; |
| 55 | clock-latency-ns = <140000>; |
| 56 | }; |
| 57 | opp@1700000000 { |
| 58 | opp-hz = /bits/ 64 <1700000000>; |
| 59 | opp-microvolt = <1212500>; |
| 60 | clock-latency-ns = <140000>; |
| 61 | }; |
| 62 | opp@1600000000 { |
| 63 | opp-hz = /bits/ 64 <1600000000>; |
| 64 | opp-microvolt = <1175000>; |
| 65 | clock-latency-ns = <140000>; |
| 66 | }; |
| 67 | opp@1500000000 { |
| 68 | opp-hz = /bits/ 64 <1500000000>; |
| 69 | opp-microvolt = <1137500>; |
| 70 | clock-latency-ns = <140000>; |
| 71 | }; |
| 72 | opp@1400000000 { |
| 73 | opp-hz = /bits/ 64 <1400000000>; |
| 74 | opp-microvolt = <1112500>; |
| 75 | clock-latency-ns = <140000>; |
| 76 | }; |
| 77 | opp@1300000000 { |
| 78 | opp-hz = /bits/ 64 <1300000000>; |
| 79 | opp-microvolt = <1062500>; |
| 80 | clock-latency-ns = <140000>; |
| 81 | }; |
| 82 | opp@1200000000 { |
| 83 | opp-hz = /bits/ 64 <1200000000>; |
| 84 | opp-microvolt = <1037500>; |
| 85 | clock-latency-ns = <140000>; |
| 86 | }; |
| 87 | opp@1100000000 { |
| 88 | opp-hz = /bits/ 64 <1100000000>; |
| 89 | opp-microvolt = <1012500>; |
| 90 | clock-latency-ns = <140000>; |
| 91 | }; |
| 92 | opp@1000000000 { |
| 93 | opp-hz = /bits/ 64 <1000000000>; |
| 94 | opp-microvolt = < 987500>; |
| 95 | clock-latency-ns = <140000>; |
| 96 | }; |
| 97 | opp@900000000 { |
| 98 | opp-hz = /bits/ 64 <900000000>; |
| 99 | opp-microvolt = < 962500>; |
| 100 | clock-latency-ns = <140000>; |
| 101 | }; |
| 102 | opp@800000000 { |
| 103 | opp-hz = /bits/ 64 <800000000>; |
| 104 | opp-microvolt = < 937500>; |
| 105 | clock-latency-ns = <140000>; |
| 106 | }; |
| 107 | opp@700000000 { |
| 108 | opp-hz = /bits/ 64 <700000000>; |
| 109 | opp-microvolt = < 912500>; |
| 110 | clock-latency-ns = <140000>; |
| 111 | }; |
Sachin Kamat | b3205de | 2014-05-13 07:13:44 +0900 | [diff] [blame] | 112 | }; |
| 113 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 114 | cluster_a7_opp_table: opp_table1 { |
| 115 | compatible = "operating-points-v2"; |
| 116 | opp-shared; |
| 117 | opp@1300000000 { |
| 118 | opp-hz = /bits/ 64 <1300000000>; |
| 119 | opp-microvolt = <1275000>; |
| 120 | clock-latency-ns = <140000>; |
| 121 | }; |
| 122 | opp@1200000000 { |
| 123 | opp-hz = /bits/ 64 <1200000000>; |
| 124 | opp-microvolt = <1212500>; |
| 125 | clock-latency-ns = <140000>; |
| 126 | }; |
| 127 | opp@1100000000 { |
| 128 | opp-hz = /bits/ 64 <1100000000>; |
| 129 | opp-microvolt = <1162500>; |
| 130 | clock-latency-ns = <140000>; |
| 131 | }; |
| 132 | opp@1000000000 { |
| 133 | opp-hz = /bits/ 64 <1000000000>; |
| 134 | opp-microvolt = <1112500>; |
| 135 | clock-latency-ns = <140000>; |
| 136 | }; |
| 137 | opp@900000000 { |
| 138 | opp-hz = /bits/ 64 <900000000>; |
| 139 | opp-microvolt = <1062500>; |
| 140 | clock-latency-ns = <140000>; |
| 141 | }; |
| 142 | opp@800000000 { |
| 143 | opp-hz = /bits/ 64 <800000000>; |
| 144 | opp-microvolt = <1025000>; |
| 145 | clock-latency-ns = <140000>; |
| 146 | }; |
| 147 | opp@700000000 { |
| 148 | opp-hz = /bits/ 64 <700000000>; |
| 149 | opp-microvolt = <975000>; |
| 150 | clock-latency-ns = <140000>; |
| 151 | }; |
| 152 | opp@600000000 { |
| 153 | opp-hz = /bits/ 64 <600000000>; |
| 154 | opp-microvolt = <937500>; |
| 155 | clock-latency-ns = <140000>; |
| 156 | }; |
Chander Kashyap | 1c0e085 | 2013-12-02 07:49:59 +0900 | [diff] [blame] | 157 | }; |
Chander Kashyap | 34dcedf | 2013-06-19 00:29:35 +0900 | [diff] [blame] | 158 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 159 | cci: cci@10d20000 { |
| 160 | compatible = "arm,cci-400"; |
| 161 | #address-cells = <1>; |
| 162 | #size-cells = <1>; |
| 163 | reg = <0x10d20000 0x1000>; |
| 164 | ranges = <0x0 0x10d20000 0x6000>; |
Chander Kashyap | 34dcedf | 2013-06-19 00:29:35 +0900 | [diff] [blame] | 165 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 166 | cci_control0: slave-if@4000 { |
| 167 | compatible = "arm,cci-400-ctrl-if"; |
| 168 | interface-type = "ace"; |
| 169 | reg = <0x4000 0x1000>; |
| 170 | }; |
| 171 | cci_control1: slave-if@5000 { |
| 172 | compatible = "arm,cci-400-ctrl-if"; |
| 173 | interface-type = "ace"; |
| 174 | reg = <0x5000 0x1000>; |
| 175 | }; |
| 176 | }; |
Andrew Bresticker | 35e8277 | 2013-08-19 04:58:38 +0900 | [diff] [blame] | 177 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 178 | clock: clock-controller@10010000 { |
| 179 | compatible = "samsung,exynos5420-clock"; |
| 180 | reg = <0x10010000 0x30000>; |
| 181 | #clock-cells = <1>; |
| 182 | }; |
Arun Kumar K | f09d062 | 2013-08-19 04:43:01 +0900 | [diff] [blame] | 183 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 184 | clock_audss: audss-clock-controller@3810000 { |
| 185 | compatible = "samsung,exynos5420-audss-clock"; |
| 186 | reg = <0x03810000 0x0C>; |
| 187 | #clock-cells = <1>; |
| 188 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>, |
| 189 | <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>; |
| 190 | clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; |
| 191 | }; |
Yuvaraj Kumar C D | 0e2c591 | 2013-10-21 05:57:00 +0900 | [diff] [blame] | 192 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 193 | mfc: codec@11000000 { |
| 194 | compatible = "samsung,mfc-v7"; |
| 195 | reg = <0x11000000 0x10000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 196 | interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 197 | clocks = <&clock CLK_MFC>; |
| 198 | clock-names = "mfc"; |
| 199 | power-domains = <&mfc_pd>; |
| 200 | iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>; |
| 201 | iommu-names = "left", "right"; |
| 202 | }; |
Yuvaraj Kumar C D | 0e2c591 | 2013-10-21 05:57:00 +0900 | [diff] [blame] | 203 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 204 | mmc_0: mmc@12200000 { |
| 205 | compatible = "samsung,exynos5420-dw-mshc-smu"; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 206 | interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 207 | #address-cells = <1>; |
Chander Kashyap | 34dcedf | 2013-06-19 00:29:35 +0900 | [diff] [blame] | 208 | #size-cells = <0>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 209 | reg = <0x12200000 0x2000>; |
| 210 | clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>; |
| 211 | clock-names = "biu", "ciu"; |
| 212 | fifo-depth = <0x40>; |
Seungwon Jeon | e6015c1 | 2014-05-09 07:02:33 +0900 | [diff] [blame] | 213 | status = "disabled"; |
Padmavathi Venna | e318853 | 2013-12-19 02:32:41 +0900 | [diff] [blame] | 214 | }; |
Padmavathi Venna | e318853 | 2013-12-19 02:32:41 +0900 | [diff] [blame] | 215 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 216 | mmc_1: mmc@12210000 { |
| 217 | compatible = "samsung,exynos5420-dw-mshc-smu"; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 218 | interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 219 | #address-cells = <1>; |
| 220 | #size-cells = <0>; |
| 221 | reg = <0x12210000 0x2000>; |
| 222 | clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>; |
| 223 | clock-names = "biu", "ciu"; |
| 224 | fifo-depth = <0x40>; |
| 225 | status = "disabled"; |
| 226 | }; |
Sachin Kamat | 98bcb54 | 2014-02-24 08:47:28 +0900 | [diff] [blame] | 227 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 228 | mmc_2: mmc@12220000 { |
| 229 | compatible = "samsung,exynos5420-dw-mshc"; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 230 | interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 231 | #address-cells = <1>; |
| 232 | #size-cells = <0>; |
| 233 | reg = <0x12220000 0x1000>; |
| 234 | clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>; |
| 235 | clock-names = "biu", "ciu"; |
| 236 | fifo-depth = <0x40>; |
| 237 | status = "disabled"; |
| 238 | }; |
Sachin Kamat | 98bcb54 | 2014-02-24 08:47:28 +0900 | [diff] [blame] | 239 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 240 | nocp_mem0_0: nocp@10CA1000 { |
| 241 | compatible = "samsung,exynos5420-nocp"; |
| 242 | reg = <0x10CA1000 0x200>; |
| 243 | status = "disabled"; |
| 244 | }; |
Sachin Kamat | 98bcb54 | 2014-02-24 08:47:28 +0900 | [diff] [blame] | 245 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 246 | nocp_mem0_1: nocp@10CA1400 { |
| 247 | compatible = "samsung,exynos5420-nocp"; |
| 248 | reg = <0x10CA1400 0x200>; |
| 249 | status = "disabled"; |
| 250 | }; |
Leela Krishna Amudala | e84a2d9 | 2013-12-19 02:36:37 +0900 | [diff] [blame] | 251 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 252 | nocp_mem1_0: nocp@10CA1800 { |
| 253 | compatible = "samsung,exynos5420-nocp"; |
| 254 | reg = <0x10CA1800 0x200>; |
| 255 | status = "disabled"; |
| 256 | }; |
Leela Krishna Amudala | e84a2d9 | 2013-12-19 02:36:37 +0900 | [diff] [blame] | 257 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 258 | nocp_mem1_1: nocp@10CA1C00 { |
| 259 | compatible = "samsung,exynos5420-nocp"; |
| 260 | reg = <0x10CA1C00 0x200>; |
| 261 | status = "disabled"; |
| 262 | }; |
Leela Krishna Amudala | e84a2d9 | 2013-12-19 02:36:37 +0900 | [diff] [blame] | 263 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 264 | nocp_g3d_0: nocp@11A51000 { |
| 265 | compatible = "samsung,exynos5420-nocp"; |
| 266 | reg = <0x11A51000 0x200>; |
| 267 | status = "disabled"; |
| 268 | }; |
Leela Krishna Amudala | 022cf30 | 2013-12-19 02:41:02 +0900 | [diff] [blame] | 269 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 270 | nocp_g3d_1: nocp@11A51400 { |
| 271 | compatible = "samsung,exynos5420-nocp"; |
| 272 | reg = <0x11A51400 0x200>; |
| 273 | status = "disabled"; |
| 274 | }; |
Vikas Sajjan | 1339d33 | 2013-08-14 17:15:06 +0900 | [diff] [blame] | 275 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 276 | gsc_pd: power-domain@10044000 { |
| 277 | compatible = "samsung,exynos4210-pd"; |
| 278 | reg = <0x10044000 0x20>; |
| 279 | #power-domain-cells = <0>; |
| 280 | clocks = <&clock CLK_FIN_PLL>, |
| 281 | <&clock CLK_MOUT_USER_ACLK300_GSCL>, |
| 282 | <&clock CLK_GSCL0>, <&clock CLK_GSCL1>; |
| 283 | clock-names = "oscclk", "clk0", "asb0", "asb1"; |
| 284 | }; |
YoungJun Cho | dc9ec8c | 2014-07-17 18:01:28 +0900 | [diff] [blame] | 285 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 286 | isp_pd: power-domain@10044020 { |
| 287 | compatible = "samsung,exynos4210-pd"; |
| 288 | reg = <0x10044020 0x20>; |
| 289 | #power-domain-cells = <0>; |
| 290 | }; |
YoungJun Cho | 5a8da52 | 2014-07-17 18:01:29 +0900 | [diff] [blame] | 291 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 292 | mfc_pd: power-domain@10044060 { |
| 293 | compatible = "samsung,exynos4210-pd"; |
| 294 | reg = <0x10044060 0x20>; |
Olof Johansson | 95eb940 | 2016-06-13 14:51:58 -0700 | [diff] [blame] | 295 | clocks = <&clock CLK_FIN_PLL>, |
| 296 | <&clock CLK_MOUT_USER_ACLK333>, |
| 297 | <&clock CLK_ACLK333>; |
| 298 | clock-names = "oscclk", "clk0","asb0"; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 299 | #power-domain-cells = <0>; |
| 300 | }; |
Andrew Bresticker | f49e347 | 2013-10-08 06:49:46 +0900 | [diff] [blame] | 301 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 302 | msc_pd: power-domain@10044120 { |
| 303 | compatible = "samsung,exynos4210-pd"; |
| 304 | reg = <0x10044120 0x20>; |
| 305 | #power-domain-cells = <0>; |
| 306 | }; |
Andrew Bresticker | f49e347 | 2013-10-08 06:49:46 +0900 | [diff] [blame] | 307 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 308 | disp_pd: power-domain@100440C0 { |
| 309 | compatible = "samsung,exynos4210-pd"; |
| 310 | reg = <0x100440C0 0x20>; |
| 311 | #power-domain-cells = <0>; |
| 312 | clocks = <&clock CLK_FIN_PLL>, |
| 313 | <&clock CLK_MOUT_USER_ACLK200_DISP1>, |
| 314 | <&clock CLK_MOUT_USER_ACLK300_DISP1>, |
| 315 | <&clock CLK_MOUT_USER_ACLK400_DISP1>, |
| 316 | <&clock CLK_FIMD1>, <&clock CLK_MIXER>; |
| 317 | clock-names = "oscclk", "clk0", "clk1", "clk2", "asb0", "asb1"; |
| 318 | }; |
Andrew Bresticker | f49e347 | 2013-10-08 06:49:46 +0900 | [diff] [blame] | 319 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 320 | pinctrl_0: pinctrl@13400000 { |
| 321 | compatible = "samsung,exynos5420-pinctrl"; |
| 322 | reg = <0x13400000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 323 | interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; |
Andrew Bresticker | f49e347 | 2013-10-08 06:49:46 +0900 | [diff] [blame] | 324 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 325 | wakeup-interrupt-controller { |
| 326 | compatible = "samsung,exynos4210-wakeup-eint"; |
| 327 | interrupt-parent = <&gic>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 328 | interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 329 | }; |
| 330 | }; |
Rahul Sharma | b0e505c | 2013-10-08 06:49:46 +0900 | [diff] [blame] | 331 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 332 | pinctrl_1: pinctrl@13410000 { |
| 333 | compatible = "samsung,exynos5420-pinctrl"; |
| 334 | reg = <0x13410000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 335 | interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 336 | }; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 337 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 338 | pinctrl_2: pinctrl@14000000 { |
| 339 | compatible = "samsung,exynos5420-pinctrl"; |
| 340 | reg = <0x14000000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 341 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 342 | }; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 343 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 344 | pinctrl_3: pinctrl@14010000 { |
| 345 | compatible = "samsung,exynos5420-pinctrl"; |
| 346 | reg = <0x14010000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 347 | interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 348 | }; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 349 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 350 | pinctrl_4: pinctrl@03860000 { |
| 351 | compatible = "samsung,exynos5420-pinctrl"; |
| 352 | reg = <0x03860000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 353 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 354 | }; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 355 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 356 | amba { |
| 357 | #address-cells = <1>; |
| 358 | #size-cells = <1>; |
| 359 | compatible = "simple-bus"; |
| 360 | interrupt-parent = <&gic>; |
| 361 | ranges; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 362 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 363 | adma: adma@03880000 { |
| 364 | compatible = "arm,pl330", "arm,primecell"; |
| 365 | reg = <0x03880000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 366 | interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 367 | clocks = <&clock_audss EXYNOS_ADMA>; |
| 368 | clock-names = "apb_pclk"; |
| 369 | #dma-cells = <1>; |
| 370 | #dma-channels = <6>; |
| 371 | #dma-requests = <16>; |
| 372 | }; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 373 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 374 | pdma0: pdma@121A0000 { |
| 375 | compatible = "arm,pl330", "arm,primecell"; |
| 376 | reg = <0x121A0000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 377 | interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 378 | clocks = <&clock CLK_PDMA0>; |
| 379 | clock-names = "apb_pclk"; |
| 380 | #dma-cells = <1>; |
| 381 | #dma-channels = <8>; |
| 382 | #dma-requests = <32>; |
| 383 | }; |
Sachin Kamat | 1a9110d | 2013-12-12 07:01:11 +0900 | [diff] [blame] | 384 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 385 | pdma1: pdma@121B0000 { |
| 386 | compatible = "arm,pl330", "arm,primecell"; |
| 387 | reg = <0x121B0000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 388 | interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 389 | clocks = <&clock CLK_PDMA1>; |
| 390 | clock-names = "apb_pclk"; |
| 391 | #dma-cells = <1>; |
| 392 | #dma-channels = <8>; |
| 393 | #dma-requests = <32>; |
| 394 | }; |
Rahul Sharma | b0e505c | 2013-10-08 06:49:46 +0900 | [diff] [blame] | 395 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 396 | mdma0: mdma@10800000 { |
| 397 | compatible = "arm,pl330", "arm,primecell"; |
| 398 | reg = <0x10800000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 399 | interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 400 | clocks = <&clock CLK_MDMA0>; |
| 401 | clock-names = "apb_pclk"; |
| 402 | #dma-cells = <1>; |
| 403 | #dma-channels = <8>; |
| 404 | #dma-requests = <1>; |
| 405 | }; |
Rahul Sharma | 6ac189f | 2014-05-16 05:23:21 +0900 | [diff] [blame] | 406 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 407 | mdma1: mdma@11C10000 { |
| 408 | compatible = "arm,pl330", "arm,primecell"; |
| 409 | reg = <0x11C10000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 410 | interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 411 | clocks = <&clock CLK_MDMA1>; |
| 412 | clock-names = "apb_pclk"; |
| 413 | #dma-cells = <1>; |
| 414 | #dma-channels = <8>; |
| 415 | #dma-requests = <1>; |
| 416 | /* |
| 417 | * MDMA1 can support both secure and non-secure |
| 418 | * AXI transactions. When this is enabled in |
| 419 | * the kernel for boards that run in secure |
| 420 | * mode, we are getting imprecise external |
| 421 | * aborts causing the kernel to oops. |
| 422 | */ |
| 423 | status = "disabled"; |
| 424 | }; |
| 425 | }; |
Leela Krishna Amudala | 01eb463 | 2013-10-21 05:59:06 +0900 | [diff] [blame] | 426 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 427 | i2s0: i2s@03830000 { |
| 428 | compatible = "samsung,exynos5420-i2s"; |
| 429 | reg = <0x03830000 0x100>; |
| 430 | dmas = <&adma 0 |
| 431 | &adma 2 |
| 432 | &adma 1>; |
| 433 | dma-names = "tx", "rx", "tx-sec"; |
| 434 | clocks = <&clock_audss EXYNOS_I2S_BUS>, |
| 435 | <&clock_audss EXYNOS_I2S_BUS>, |
| 436 | <&clock_audss EXYNOS_SCLK_I2S>; |
| 437 | clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; |
| 438 | #clock-cells = <1>; |
| 439 | clock-output-names = "i2s_cdclk0"; |
| 440 | #sound-dai-cells = <1>; |
| 441 | samsung,idma-addr = <0x03000000>; |
| 442 | pinctrl-names = "default"; |
| 443 | pinctrl-0 = <&i2s0_bus>; |
| 444 | status = "disabled"; |
| 445 | }; |
Marek Szyprowski | e8769d3 | 2015-11-13 14:29:46 +0100 | [diff] [blame] | 446 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 447 | i2s1: i2s@12D60000 { |
| 448 | compatible = "samsung,exynos5420-i2s"; |
| 449 | reg = <0x12D60000 0x100>; |
| 450 | dmas = <&pdma1 12 |
| 451 | &pdma1 11>; |
| 452 | dma-names = "tx", "rx"; |
| 453 | clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>; |
| 454 | clock-names = "iis", "i2s_opclk0"; |
| 455 | #clock-cells = <1>; |
| 456 | clock-output-names = "i2s_cdclk1"; |
| 457 | #sound-dai-cells = <1>; |
| 458 | pinctrl-names = "default"; |
| 459 | pinctrl-0 = <&i2s1_bus>; |
| 460 | status = "disabled"; |
| 461 | }; |
Leela Krishna Amudala | 01eb463 | 2013-10-21 05:59:06 +0900 | [diff] [blame] | 462 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 463 | i2s2: i2s@12D70000 { |
| 464 | compatible = "samsung,exynos5420-i2s"; |
| 465 | reg = <0x12D70000 0x100>; |
| 466 | dmas = <&pdma0 12 |
| 467 | &pdma0 11>; |
| 468 | dma-names = "tx", "rx"; |
| 469 | clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>; |
| 470 | clock-names = "iis", "i2s_opclk0"; |
| 471 | #clock-cells = <1>; |
| 472 | clock-output-names = "i2s_cdclk2"; |
| 473 | #sound-dai-cells = <1>; |
| 474 | pinctrl-names = "default"; |
| 475 | pinctrl-0 = <&i2s2_bus>; |
| 476 | status = "disabled"; |
| 477 | }; |
Naveen Krishna Chatradhi | 655de64 | 2013-12-21 05:59:49 +0900 | [diff] [blame] | 478 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 479 | spi_0: spi@12d20000 { |
| 480 | compatible = "samsung,exynos4210-spi"; |
| 481 | reg = <0x12d20000 0x100>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 482 | interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 483 | dmas = <&pdma0 5 |
| 484 | &pdma0 4>; |
| 485 | dma-names = "tx", "rx"; |
| 486 | #address-cells = <1>; |
| 487 | #size-cells = <0>; |
| 488 | pinctrl-names = "default"; |
| 489 | pinctrl-0 = <&spi0_bus>; |
| 490 | clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; |
| 491 | clock-names = "spi", "spi_busclk0"; |
| 492 | status = "disabled"; |
| 493 | }; |
Andrzej Pietrasiewicz | 15b7f08 | 2015-03-09 13:32:45 +0100 | [diff] [blame] | 494 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 495 | spi_1: spi@12d30000 { |
| 496 | compatible = "samsung,exynos4210-spi"; |
| 497 | reg = <0x12d30000 0x100>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 498 | interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 499 | dmas = <&pdma1 5 |
| 500 | &pdma1 4>; |
| 501 | dma-names = "tx", "rx"; |
| 502 | #address-cells = <1>; |
| 503 | #size-cells = <0>; |
| 504 | pinctrl-names = "default"; |
| 505 | pinctrl-0 = <&spi1_bus>; |
| 506 | clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; |
| 507 | clock-names = "spi", "spi_busclk0"; |
| 508 | status = "disabled"; |
| 509 | }; |
Andrzej Pietrasiewicz | 15b7f08 | 2015-03-09 13:32:45 +0100 | [diff] [blame] | 510 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 511 | spi_2: spi@12d40000 { |
| 512 | compatible = "samsung,exynos4210-spi"; |
| 513 | reg = <0x12d40000 0x100>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 514 | interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 515 | dmas = <&pdma0 7 |
| 516 | &pdma0 6>; |
| 517 | dma-names = "tx", "rx"; |
| 518 | #address-cells = <1>; |
| 519 | #size-cells = <0>; |
| 520 | pinctrl-names = "default"; |
| 521 | pinctrl-0 = <&spi2_bus>; |
| 522 | clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; |
| 523 | clock-names = "spi", "spi_busclk0"; |
| 524 | status = "disabled"; |
| 525 | }; |
Leela Krishna Amudala | c680036 | 2014-02-16 01:57:56 +0900 | [diff] [blame] | 526 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 527 | dp_phy: dp-video-phy { |
| 528 | compatible = "samsung,exynos5420-dp-video-phy"; |
| 529 | samsung,pmu-syscon = <&pmu_system_controller>; |
| 530 | #phy-cells = <0>; |
| 531 | }; |
Vivek Gautam | dfbbdbf | 2014-05-22 07:49:13 +0900 | [diff] [blame] | 532 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 533 | mipi_phy: mipi-video-phy { |
| 534 | compatible = "samsung,s5pv210-mipi-video-phy"; |
| 535 | syscon = <&pmu_system_controller>; |
| 536 | #phy-cells = <1>; |
| 537 | }; |
Naveen Krishna Chatradhi | 655de64 | 2013-12-21 05:59:49 +0900 | [diff] [blame] | 538 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 539 | dsi@14500000 { |
| 540 | compatible = "samsung,exynos5410-mipi-dsi"; |
| 541 | reg = <0x14500000 0x10000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 542 | interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 543 | phys = <&mipi_phy 1>; |
| 544 | phy-names = "dsim"; |
| 545 | clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>; |
| 546 | clock-names = "bus_clk", "pll_clk"; |
| 547 | #address-cells = <1>; |
| 548 | #size-cells = <0>; |
| 549 | status = "disabled"; |
| 550 | }; |
Naveen Krishna Chatradhi | 655de64 | 2013-12-21 05:59:49 +0900 | [diff] [blame] | 551 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 552 | adc: adc@12D10000 { |
| 553 | compatible = "samsung,exynos-adc-v2"; |
| 554 | reg = <0x12D10000 0x100>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 555 | interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 556 | clocks = <&clock CLK_TSADC>; |
| 557 | clock-names = "adc"; |
| 558 | #io-channel-cells = <1>; |
| 559 | io-channel-ranges; |
| 560 | samsung,syscon-phandle = <&pmu_system_controller>; |
| 561 | status = "disabled"; |
| 562 | }; |
Naveen Krishna Chatradhi | 655de64 | 2013-12-21 05:59:49 +0900 | [diff] [blame] | 563 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 564 | hsi2c_8: i2c@12E00000 { |
| 565 | compatible = "samsung,exynos5250-hsi2c"; |
| 566 | reg = <0x12E00000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 567 | interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 568 | #address-cells = <1>; |
| 569 | #size-cells = <0>; |
| 570 | pinctrl-names = "default"; |
| 571 | pinctrl-0 = <&i2c8_hs_bus>; |
| 572 | clocks = <&clock CLK_USI4>; |
| 573 | clock-names = "hsi2c"; |
| 574 | status = "disabled"; |
| 575 | }; |
Naveen Krishna Chatradhi | 655de64 | 2013-12-21 05:59:49 +0900 | [diff] [blame] | 576 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 577 | hsi2c_9: i2c@12E10000 { |
| 578 | compatible = "samsung,exynos5250-hsi2c"; |
| 579 | reg = <0x12E10000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 580 | interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 581 | #address-cells = <1>; |
| 582 | #size-cells = <0>; |
| 583 | pinctrl-names = "default"; |
| 584 | pinctrl-0 = <&i2c9_hs_bus>; |
| 585 | clocks = <&clock CLK_USI5>; |
| 586 | clock-names = "hsi2c"; |
| 587 | status = "disabled"; |
| 588 | }; |
| 589 | |
| 590 | hsi2c_10: i2c@12E20000 { |
| 591 | compatible = "samsung,exynos5250-hsi2c"; |
| 592 | reg = <0x12E20000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 593 | interrupts = <0 203 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 594 | #address-cells = <1>; |
| 595 | #size-cells = <0>; |
| 596 | pinctrl-names = "default"; |
| 597 | pinctrl-0 = <&i2c10_hs_bus>; |
| 598 | clocks = <&clock CLK_USI6>; |
| 599 | clock-names = "hsi2c"; |
| 600 | status = "disabled"; |
| 601 | }; |
| 602 | |
| 603 | hdmi: hdmi@14530000 { |
| 604 | compatible = "samsung,exynos5420-hdmi"; |
| 605 | reg = <0x14530000 0x70000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 606 | interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 607 | clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, |
| 608 | <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, |
| 609 | <&clock CLK_MOUT_HDMI>; |
| 610 | clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", |
| 611 | "sclk_hdmiphy", "mout_hdmi"; |
| 612 | phy = <&hdmiphy>; |
| 613 | samsung,syscon-phandle = <&pmu_system_controller>; |
| 614 | status = "disabled"; |
| 615 | power-domains = <&disp_pd>; |
| 616 | }; |
| 617 | |
| 618 | hdmiphy: hdmiphy@145D0000 { |
| 619 | reg = <0x145D0000 0x20>; |
| 620 | }; |
| 621 | |
| 622 | mixer: mixer@14450000 { |
| 623 | compatible = "samsung,exynos5420-mixer"; |
| 624 | reg = <0x14450000 0x10000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 625 | interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 626 | clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, |
| 627 | <&clock CLK_SCLK_HDMI>; |
| 628 | clock-names = "mixer", "hdmi", "sclk_hdmi"; |
| 629 | power-domains = <&disp_pd>; |
| 630 | iommus = <&sysmmu_tv>; |
| 631 | }; |
| 632 | |
| 633 | rotator: rotator@11C00000 { |
| 634 | compatible = "samsung,exynos5250-rotator"; |
| 635 | reg = <0x11C00000 0x64>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 636 | interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 637 | clocks = <&clock CLK_ROTATOR>; |
| 638 | clock-names = "rotator"; |
| 639 | iommus = <&sysmmu_rotator>; |
| 640 | }; |
| 641 | |
| 642 | gsc_0: video-scaler@13e00000 { |
| 643 | compatible = "samsung,exynos5-gsc"; |
| 644 | reg = <0x13e00000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 645 | interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 646 | clocks = <&clock CLK_GSCL0>; |
| 647 | clock-names = "gscl"; |
| 648 | power-domains = <&gsc_pd>; |
| 649 | iommus = <&sysmmu_gscl0>; |
| 650 | }; |
| 651 | |
| 652 | gsc_1: video-scaler@13e10000 { |
| 653 | compatible = "samsung,exynos5-gsc"; |
| 654 | reg = <0x13e10000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 655 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 656 | clocks = <&clock CLK_GSCL1>; |
| 657 | clock-names = "gscl"; |
| 658 | power-domains = <&gsc_pd>; |
| 659 | iommus = <&sysmmu_gscl1>; |
| 660 | }; |
| 661 | |
| 662 | jpeg_0: jpeg@11F50000 { |
| 663 | compatible = "samsung,exynos5420-jpeg"; |
| 664 | reg = <0x11F50000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 665 | interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 666 | clock-names = "jpeg"; |
| 667 | clocks = <&clock CLK_JPEG>; |
| 668 | iommus = <&sysmmu_jpeg0>; |
| 669 | }; |
| 670 | |
| 671 | jpeg_1: jpeg@11F60000 { |
| 672 | compatible = "samsung,exynos5420-jpeg"; |
| 673 | reg = <0x11F60000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 674 | interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 675 | clock-names = "jpeg"; |
| 676 | clocks = <&clock CLK_JPEG2>; |
| 677 | iommus = <&sysmmu_jpeg1>; |
| 678 | }; |
| 679 | |
| 680 | pmu_system_controller: system-controller@10040000 { |
| 681 | compatible = "samsung,exynos5420-pmu", "syscon"; |
| 682 | reg = <0x10040000 0x5000>; |
| 683 | clock-names = "clkout16"; |
| 684 | clocks = <&clock CLK_FIN_PLL>; |
| 685 | #clock-cells = <1>; |
| 686 | interrupt-controller; |
| 687 | #interrupt-cells = <3>; |
| 688 | interrupt-parent = <&gic>; |
| 689 | }; |
| 690 | |
| 691 | tmu_cpu0: tmu@10060000 { |
| 692 | compatible = "samsung,exynos5420-tmu"; |
| 693 | reg = <0x10060000 0x100>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 694 | interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 695 | clocks = <&clock CLK_TMU>; |
| 696 | clock-names = "tmu_apbif"; |
| 697 | #include "exynos4412-tmu-sensor-conf.dtsi" |
| 698 | }; |
| 699 | |
| 700 | tmu_cpu1: tmu@10064000 { |
| 701 | compatible = "samsung,exynos5420-tmu"; |
| 702 | reg = <0x10064000 0x100>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 703 | interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 704 | clocks = <&clock CLK_TMU>; |
| 705 | clock-names = "tmu_apbif"; |
| 706 | #include "exynos4412-tmu-sensor-conf.dtsi" |
| 707 | }; |
| 708 | |
| 709 | tmu_cpu2: tmu@10068000 { |
| 710 | compatible = "samsung,exynos5420-tmu-ext-triminfo"; |
| 711 | reg = <0x10068000 0x100>, <0x1006c000 0x4>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 712 | interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 713 | clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; |
| 714 | clock-names = "tmu_apbif", "tmu_triminfo_apbif"; |
| 715 | #include "exynos4412-tmu-sensor-conf.dtsi" |
| 716 | }; |
| 717 | |
| 718 | tmu_cpu3: tmu@1006c000 { |
| 719 | compatible = "samsung,exynos5420-tmu-ext-triminfo"; |
| 720 | reg = <0x1006c000 0x100>, <0x100a0000 0x4>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 721 | interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 722 | clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; |
| 723 | clock-names = "tmu_apbif", "tmu_triminfo_apbif"; |
| 724 | #include "exynos4412-tmu-sensor-conf.dtsi" |
| 725 | }; |
| 726 | |
| 727 | tmu_gpu: tmu@100a0000 { |
| 728 | compatible = "samsung,exynos5420-tmu-ext-triminfo"; |
| 729 | reg = <0x100a0000 0x100>, <0x10068000 0x4>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 730 | interrupts = <0 215 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 731 | clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; |
| 732 | clock-names = "tmu_apbif", "tmu_triminfo_apbif"; |
| 733 | #include "exynos4412-tmu-sensor-conf.dtsi" |
| 734 | }; |
| 735 | |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 736 | sysmmu_g2dr: sysmmu@0x10A60000 { |
| 737 | compatible = "samsung,exynos-sysmmu"; |
| 738 | reg = <0x10A60000 0x1000>; |
| 739 | interrupt-parent = <&combiner>; |
| 740 | interrupts = <24 5>; |
| 741 | clock-names = "sysmmu", "master"; |
| 742 | clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>; |
| 743 | #iommu-cells = <0>; |
| 744 | }; |
| 745 | |
| 746 | sysmmu_g2dw: sysmmu@0x10A70000 { |
| 747 | compatible = "samsung,exynos-sysmmu"; |
| 748 | reg = <0x10A70000 0x1000>; |
| 749 | interrupt-parent = <&combiner>; |
| 750 | interrupts = <22 2>; |
| 751 | clock-names = "sysmmu", "master"; |
| 752 | clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>; |
| 753 | #iommu-cells = <0>; |
| 754 | }; |
| 755 | |
| 756 | sysmmu_tv: sysmmu@0x14650000 { |
| 757 | compatible = "samsung,exynos-sysmmu"; |
| 758 | reg = <0x14650000 0x1000>; |
| 759 | interrupt-parent = <&combiner>; |
| 760 | interrupts = <7 4>; |
| 761 | clock-names = "sysmmu", "master"; |
| 762 | clocks = <&clock CLK_SMMU_MIXER>, <&clock CLK_MIXER>; |
| 763 | power-domains = <&disp_pd>; |
| 764 | #iommu-cells = <0>; |
| 765 | }; |
| 766 | |
| 767 | sysmmu_gscl0: sysmmu@0x13E80000 { |
| 768 | compatible = "samsung,exynos-sysmmu"; |
| 769 | reg = <0x13E80000 0x1000>; |
| 770 | interrupt-parent = <&combiner>; |
| 771 | interrupts = <2 0>; |
| 772 | clock-names = "sysmmu", "master"; |
| 773 | clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>; |
| 774 | power-domains = <&gsc_pd>; |
| 775 | #iommu-cells = <0>; |
| 776 | }; |
| 777 | |
| 778 | sysmmu_gscl1: sysmmu@0x13E90000 { |
| 779 | compatible = "samsung,exynos-sysmmu"; |
| 780 | reg = <0x13E90000 0x1000>; |
| 781 | interrupt-parent = <&combiner>; |
| 782 | interrupts = <2 2>; |
| 783 | clock-names = "sysmmu", "master"; |
| 784 | clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>; |
| 785 | power-domains = <&gsc_pd>; |
| 786 | #iommu-cells = <0>; |
| 787 | }; |
| 788 | |
| 789 | sysmmu_scaler0r: sysmmu@0x12880000 { |
| 790 | compatible = "samsung,exynos-sysmmu"; |
| 791 | reg = <0x12880000 0x1000>; |
| 792 | interrupt-parent = <&combiner>; |
| 793 | interrupts = <22 4>; |
| 794 | clock-names = "sysmmu", "master"; |
| 795 | clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>; |
| 796 | #iommu-cells = <0>; |
| 797 | }; |
| 798 | |
| 799 | sysmmu_scaler1r: sysmmu@0x12890000 { |
| 800 | compatible = "samsung,exynos-sysmmu"; |
| 801 | reg = <0x12890000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 802 | interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 803 | clock-names = "sysmmu", "master"; |
| 804 | clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; |
| 805 | #iommu-cells = <0>; |
| 806 | }; |
| 807 | |
| 808 | sysmmu_scaler2r: sysmmu@0x128A0000 { |
| 809 | compatible = "samsung,exynos-sysmmu"; |
| 810 | reg = <0x128A0000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 811 | interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 812 | clock-names = "sysmmu", "master"; |
| 813 | clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; |
| 814 | #iommu-cells = <0>; |
| 815 | }; |
| 816 | |
| 817 | sysmmu_scaler0w: sysmmu@0x128C0000 { |
| 818 | compatible = "samsung,exynos-sysmmu"; |
| 819 | reg = <0x128C0000 0x1000>; |
| 820 | interrupt-parent = <&combiner>; |
| 821 | interrupts = <27 2>; |
| 822 | clock-names = "sysmmu", "master"; |
| 823 | clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>; |
| 824 | #iommu-cells = <0>; |
| 825 | }; |
| 826 | |
| 827 | sysmmu_scaler1w: sysmmu@0x128D0000 { |
| 828 | compatible = "samsung,exynos-sysmmu"; |
| 829 | reg = <0x128D0000 0x1000>; |
| 830 | interrupt-parent = <&combiner>; |
| 831 | interrupts = <22 6>; |
| 832 | clock-names = "sysmmu", "master"; |
| 833 | clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; |
| 834 | #iommu-cells = <0>; |
| 835 | }; |
| 836 | |
| 837 | sysmmu_scaler2w: sysmmu@0x128E0000 { |
| 838 | compatible = "samsung,exynos-sysmmu"; |
| 839 | reg = <0x128E0000 0x1000>; |
| 840 | interrupt-parent = <&combiner>; |
| 841 | interrupts = <19 6>; |
| 842 | clock-names = "sysmmu", "master"; |
| 843 | clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; |
| 844 | #iommu-cells = <0>; |
| 845 | }; |
| 846 | |
| 847 | sysmmu_rotator: sysmmu@0x11D40000 { |
| 848 | compatible = "samsung,exynos-sysmmu"; |
| 849 | reg = <0x11D40000 0x1000>; |
| 850 | interrupt-parent = <&combiner>; |
| 851 | interrupts = <4 0>; |
| 852 | clock-names = "sysmmu", "master"; |
| 853 | clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>; |
| 854 | #iommu-cells = <0>; |
| 855 | }; |
| 856 | |
| 857 | sysmmu_jpeg0: sysmmu@0x11F10000 { |
| 858 | compatible = "samsung,exynos-sysmmu"; |
| 859 | reg = <0x11F10000 0x1000>; |
| 860 | interrupt-parent = <&combiner>; |
| 861 | interrupts = <4 2>; |
| 862 | clock-names = "sysmmu", "master"; |
| 863 | clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>; |
| 864 | #iommu-cells = <0>; |
| 865 | }; |
| 866 | |
| 867 | sysmmu_jpeg1: sysmmu@0x11F20000 { |
| 868 | compatible = "samsung,exynos-sysmmu"; |
| 869 | reg = <0x11F20000 0x1000>; |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 870 | interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | 5d99cc5 | 2016-05-03 18:53:04 +0200 | [diff] [blame] | 871 | clock-names = "sysmmu", "master"; |
| 872 | clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>; |
| 873 | #iommu-cells = <0>; |
| 874 | }; |
| 875 | |
| 876 | sysmmu_mfc_l: sysmmu@0x11200000 { |
| 877 | compatible = "samsung,exynos-sysmmu"; |
| 878 | reg = <0x11200000 0x1000>; |
| 879 | interrupt-parent = <&combiner>; |
| 880 | interrupts = <6 2>; |
| 881 | clock-names = "sysmmu", "master"; |
| 882 | clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>; |
| 883 | power-domains = <&mfc_pd>; |
| 884 | #iommu-cells = <0>; |
| 885 | }; |
| 886 | |
| 887 | sysmmu_mfc_r: sysmmu@0x11210000 { |
| 888 | compatible = "samsung,exynos-sysmmu"; |
| 889 | reg = <0x11210000 0x1000>; |
| 890 | interrupt-parent = <&combiner>; |
| 891 | interrupts = <8 5>; |
| 892 | clock-names = "sysmmu", "master"; |
| 893 | clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>; |
| 894 | power-domains = <&mfc_pd>; |
| 895 | #iommu-cells = <0>; |
| 896 | }; |
| 897 | |
| 898 | sysmmu_fimd1_0: sysmmu@0x14640000 { |
| 899 | compatible = "samsung,exynos-sysmmu"; |
| 900 | reg = <0x14640000 0x1000>; |
| 901 | interrupt-parent = <&combiner>; |
| 902 | interrupts = <3 2>; |
| 903 | clock-names = "sysmmu", "master"; |
| 904 | clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>; |
| 905 | power-domains = <&disp_pd>; |
| 906 | #iommu-cells = <0>; |
| 907 | }; |
| 908 | |
| 909 | sysmmu_fimd1_1: sysmmu@0x14680000 { |
| 910 | compatible = "samsung,exynos-sysmmu"; |
| 911 | reg = <0x14680000 0x1000>; |
| 912 | interrupt-parent = <&combiner>; |
| 913 | interrupts = <3 0>; |
| 914 | clock-names = "sysmmu", "master"; |
| 915 | clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>; |
| 916 | power-domains = <&disp_pd>; |
| 917 | #iommu-cells = <0>; |
| 918 | }; |
| 919 | |
| 920 | bus_wcore: bus_wcore { |
| 921 | compatible = "samsung,exynos-bus"; |
| 922 | clocks = <&clock CLK_DOUT_ACLK400_WCORE>; |
| 923 | clock-names = "bus"; |
| 924 | operating-points-v2 = <&bus_wcore_opp_table>; |
| 925 | status = "disabled"; |
| 926 | }; |
| 927 | |
| 928 | bus_noc: bus_noc { |
| 929 | compatible = "samsung,exynos-bus"; |
| 930 | clocks = <&clock CLK_DOUT_ACLK100_NOC>; |
| 931 | clock-names = "bus"; |
| 932 | operating-points-v2 = <&bus_noc_opp_table>; |
| 933 | status = "disabled"; |
| 934 | }; |
| 935 | |
| 936 | bus_fsys_apb: bus_fsys_apb { |
| 937 | compatible = "samsung,exynos-bus"; |
| 938 | clocks = <&clock CLK_DOUT_PCLK200_FSYS>; |
| 939 | clock-names = "bus"; |
| 940 | operating-points-v2 = <&bus_fsys_apb_opp_table>; |
| 941 | status = "disabled"; |
| 942 | }; |
| 943 | |
| 944 | bus_fsys: bus_fsys { |
| 945 | compatible = "samsung,exynos-bus"; |
| 946 | clocks = <&clock CLK_DOUT_ACLK200_FSYS>; |
| 947 | clock-names = "bus"; |
| 948 | operating-points-v2 = <&bus_fsys_apb_opp_table>; |
| 949 | status = "disabled"; |
| 950 | }; |
| 951 | |
| 952 | bus_fsys2: bus_fsys2 { |
| 953 | compatible = "samsung,exynos-bus"; |
| 954 | clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; |
| 955 | clock-names = "bus"; |
| 956 | operating-points-v2 = <&bus_fsys2_opp_table>; |
| 957 | status = "disabled"; |
| 958 | }; |
| 959 | |
| 960 | bus_mfc: bus_mfc { |
| 961 | compatible = "samsung,exynos-bus"; |
| 962 | clocks = <&clock CLK_DOUT_ACLK333>; |
| 963 | clock-names = "bus"; |
| 964 | operating-points-v2 = <&bus_mfc_opp_table>; |
| 965 | status = "disabled"; |
| 966 | }; |
| 967 | |
| 968 | bus_gen: bus_gen { |
| 969 | compatible = "samsung,exynos-bus"; |
| 970 | clocks = <&clock CLK_DOUT_ACLK266>; |
| 971 | clock-names = "bus"; |
| 972 | operating-points-v2 = <&bus_gen_opp_table>; |
| 973 | status = "disabled"; |
| 974 | }; |
| 975 | |
| 976 | bus_peri: bus_peri { |
| 977 | compatible = "samsung,exynos-bus"; |
| 978 | clocks = <&clock CLK_DOUT_ACLK66>; |
| 979 | clock-names = "bus"; |
| 980 | operating-points-v2 = <&bus_peri_opp_table>; |
| 981 | status = "disabled"; |
| 982 | }; |
| 983 | |
| 984 | bus_g2d: bus_g2d { |
| 985 | compatible = "samsung,exynos-bus"; |
| 986 | clocks = <&clock CLK_DOUT_ACLK333_G2D>; |
| 987 | clock-names = "bus"; |
| 988 | operating-points-v2 = <&bus_g2d_opp_table>; |
| 989 | status = "disabled"; |
| 990 | }; |
| 991 | |
| 992 | bus_g2d_acp: bus_g2d_acp { |
| 993 | compatible = "samsung,exynos-bus"; |
| 994 | clocks = <&clock CLK_DOUT_ACLK266_G2D>; |
| 995 | clock-names = "bus"; |
| 996 | operating-points-v2 = <&bus_g2d_acp_opp_table>; |
| 997 | status = "disabled"; |
| 998 | }; |
| 999 | |
| 1000 | bus_jpeg: bus_jpeg { |
| 1001 | compatible = "samsung,exynos-bus"; |
| 1002 | clocks = <&clock CLK_DOUT_ACLK300_JPEG>; |
| 1003 | clock-names = "bus"; |
| 1004 | operating-points-v2 = <&bus_jpeg_opp_table>; |
| 1005 | status = "disabled"; |
| 1006 | }; |
| 1007 | |
| 1008 | bus_jpeg_apb: bus_jpeg_apb { |
| 1009 | compatible = "samsung,exynos-bus"; |
| 1010 | clocks = <&clock CLK_DOUT_ACLK166>; |
| 1011 | clock-names = "bus"; |
| 1012 | operating-points-v2 = <&bus_jpeg_apb_opp_table>; |
| 1013 | status = "disabled"; |
| 1014 | }; |
| 1015 | |
| 1016 | bus_disp1_fimd: bus_disp1_fimd { |
| 1017 | compatible = "samsung,exynos-bus"; |
| 1018 | clocks = <&clock CLK_DOUT_ACLK300_DISP1>; |
| 1019 | clock-names = "bus"; |
| 1020 | operating-points-v2 = <&bus_disp1_fimd_opp_table>; |
| 1021 | status = "disabled"; |
| 1022 | }; |
| 1023 | |
| 1024 | bus_disp1: bus_disp1 { |
| 1025 | compatible = "samsung,exynos-bus"; |
| 1026 | clocks = <&clock CLK_DOUT_ACLK400_DISP1>; |
| 1027 | clock-names = "bus"; |
| 1028 | operating-points-v2 = <&bus_disp1_opp_table>; |
| 1029 | status = "disabled"; |
| 1030 | }; |
| 1031 | |
| 1032 | bus_gscl_scaler: bus_gscl_scaler { |
| 1033 | compatible = "samsung,exynos-bus"; |
| 1034 | clocks = <&clock CLK_DOUT_ACLK300_GSCL>; |
| 1035 | clock-names = "bus"; |
| 1036 | operating-points-v2 = <&bus_gscl_opp_table>; |
| 1037 | status = "disabled"; |
| 1038 | }; |
| 1039 | |
| 1040 | bus_mscl: bus_mscl { |
| 1041 | compatible = "samsung,exynos-bus"; |
| 1042 | clocks = <&clock CLK_DOUT_ACLK400_MSCL>; |
| 1043 | clock-names = "bus"; |
| 1044 | operating-points-v2 = <&bus_mscl_opp_table>; |
| 1045 | status = "disabled"; |
| 1046 | }; |
| 1047 | |
| 1048 | bus_wcore_opp_table: opp_table2 { |
| 1049 | compatible = "operating-points-v2"; |
| 1050 | |
| 1051 | opp00 { |
| 1052 | opp-hz = /bits/ 64 <84000000>; |
| 1053 | opp-microvolt = <925000>; |
| 1054 | }; |
| 1055 | opp01 { |
| 1056 | opp-hz = /bits/ 64 <111000000>; |
| 1057 | opp-microvolt = <950000>; |
| 1058 | }; |
| 1059 | opp02 { |
| 1060 | opp-hz = /bits/ 64 <222000000>; |
| 1061 | opp-microvolt = <950000>; |
| 1062 | }; |
| 1063 | opp03 { |
| 1064 | opp-hz = /bits/ 64 <333000000>; |
| 1065 | opp-microvolt = <950000>; |
| 1066 | }; |
| 1067 | opp04 { |
| 1068 | opp-hz = /bits/ 64 <400000000>; |
| 1069 | opp-microvolt = <987500>; |
| 1070 | }; |
| 1071 | }; |
| 1072 | |
| 1073 | bus_noc_opp_table: opp_table3 { |
| 1074 | compatible = "operating-points-v2"; |
| 1075 | |
| 1076 | opp00 { |
| 1077 | opp-hz = /bits/ 64 <67000000>; |
| 1078 | }; |
| 1079 | opp01 { |
| 1080 | opp-hz = /bits/ 64 <75000000>; |
| 1081 | }; |
| 1082 | opp02 { |
| 1083 | opp-hz = /bits/ 64 <86000000>; |
| 1084 | }; |
| 1085 | opp03 { |
| 1086 | opp-hz = /bits/ 64 <100000000>; |
| 1087 | }; |
| 1088 | }; |
| 1089 | |
| 1090 | bus_fsys_apb_opp_table: opp_table4 { |
| 1091 | compatible = "operating-points-v2"; |
| 1092 | opp-shared; |
| 1093 | |
| 1094 | opp00 { |
| 1095 | opp-hz = /bits/ 64 <100000000>; |
| 1096 | }; |
| 1097 | opp01 { |
| 1098 | opp-hz = /bits/ 64 <200000000>; |
| 1099 | }; |
| 1100 | }; |
| 1101 | |
| 1102 | bus_fsys2_opp_table: opp_table5 { |
| 1103 | compatible = "operating-points-v2"; |
| 1104 | |
| 1105 | opp00 { |
| 1106 | opp-hz = /bits/ 64 <75000000>; |
| 1107 | }; |
| 1108 | opp01 { |
| 1109 | opp-hz = /bits/ 64 <100000000>; |
| 1110 | }; |
| 1111 | opp02 { |
| 1112 | opp-hz = /bits/ 64 <150000000>; |
| 1113 | }; |
| 1114 | }; |
| 1115 | |
| 1116 | bus_mfc_opp_table: opp_table6 { |
| 1117 | compatible = "operating-points-v2"; |
| 1118 | |
| 1119 | opp00 { |
| 1120 | opp-hz = /bits/ 64 <96000000>; |
| 1121 | }; |
| 1122 | opp01 { |
| 1123 | opp-hz = /bits/ 64 <111000000>; |
| 1124 | }; |
| 1125 | opp02 { |
| 1126 | opp-hz = /bits/ 64 <167000000>; |
| 1127 | }; |
| 1128 | opp03 { |
| 1129 | opp-hz = /bits/ 64 <222000000>; |
| 1130 | }; |
| 1131 | opp04 { |
| 1132 | opp-hz = /bits/ 64 <333000000>; |
| 1133 | }; |
| 1134 | }; |
| 1135 | |
| 1136 | bus_gen_opp_table: opp_table7 { |
| 1137 | compatible = "operating-points-v2"; |
| 1138 | |
| 1139 | opp00 { |
| 1140 | opp-hz = /bits/ 64 <89000000>; |
| 1141 | }; |
| 1142 | opp01 { |
| 1143 | opp-hz = /bits/ 64 <133000000>; |
| 1144 | }; |
| 1145 | opp02 { |
| 1146 | opp-hz = /bits/ 64 <178000000>; |
| 1147 | }; |
| 1148 | opp03 { |
| 1149 | opp-hz = /bits/ 64 <267000000>; |
| 1150 | }; |
| 1151 | }; |
| 1152 | |
| 1153 | bus_peri_opp_table: opp_table8 { |
| 1154 | compatible = "operating-points-v2"; |
| 1155 | |
| 1156 | opp00 { |
| 1157 | opp-hz = /bits/ 64 <67000000>; |
| 1158 | }; |
| 1159 | }; |
| 1160 | |
| 1161 | bus_g2d_opp_table: opp_table9 { |
| 1162 | compatible = "operating-points-v2"; |
| 1163 | |
| 1164 | opp00 { |
| 1165 | opp-hz = /bits/ 64 <84000000>; |
| 1166 | }; |
| 1167 | opp01 { |
| 1168 | opp-hz = /bits/ 64 <167000000>; |
| 1169 | }; |
| 1170 | opp02 { |
| 1171 | opp-hz = /bits/ 64 <222000000>; |
| 1172 | }; |
| 1173 | opp03 { |
| 1174 | opp-hz = /bits/ 64 <300000000>; |
| 1175 | }; |
| 1176 | opp04 { |
| 1177 | opp-hz = /bits/ 64 <333000000>; |
| 1178 | }; |
| 1179 | }; |
| 1180 | |
| 1181 | bus_g2d_acp_opp_table: opp_table10 { |
| 1182 | compatible = "operating-points-v2"; |
| 1183 | |
| 1184 | opp00 { |
| 1185 | opp-hz = /bits/ 64 <67000000>; |
| 1186 | }; |
| 1187 | opp01 { |
| 1188 | opp-hz = /bits/ 64 <133000000>; |
| 1189 | }; |
| 1190 | opp02 { |
| 1191 | opp-hz = /bits/ 64 <178000000>; |
| 1192 | }; |
| 1193 | opp03 { |
| 1194 | opp-hz = /bits/ 64 <267000000>; |
| 1195 | }; |
| 1196 | }; |
| 1197 | |
| 1198 | bus_jpeg_opp_table: opp_table11 { |
| 1199 | compatible = "operating-points-v2"; |
| 1200 | |
| 1201 | opp00 { |
| 1202 | opp-hz = /bits/ 64 <75000000>; |
| 1203 | }; |
| 1204 | opp01 { |
| 1205 | opp-hz = /bits/ 64 <150000000>; |
| 1206 | }; |
| 1207 | opp02 { |
| 1208 | opp-hz = /bits/ 64 <200000000>; |
| 1209 | }; |
| 1210 | opp03 { |
| 1211 | opp-hz = /bits/ 64 <300000000>; |
| 1212 | }; |
| 1213 | }; |
| 1214 | |
| 1215 | bus_jpeg_apb_opp_table: opp_table12 { |
| 1216 | compatible = "operating-points-v2"; |
| 1217 | |
| 1218 | opp00 { |
| 1219 | opp-hz = /bits/ 64 <84000000>; |
| 1220 | }; |
| 1221 | opp01 { |
| 1222 | opp-hz = /bits/ 64 <111000000>; |
| 1223 | }; |
| 1224 | opp02 { |
| 1225 | opp-hz = /bits/ 64 <134000000>; |
| 1226 | }; |
| 1227 | opp03 { |
| 1228 | opp-hz = /bits/ 64 <167000000>; |
| 1229 | }; |
| 1230 | }; |
| 1231 | |
| 1232 | bus_disp1_fimd_opp_table: opp_table13 { |
| 1233 | compatible = "operating-points-v2"; |
| 1234 | |
| 1235 | opp00 { |
| 1236 | opp-hz = /bits/ 64 <120000000>; |
| 1237 | }; |
| 1238 | opp01 { |
| 1239 | opp-hz = /bits/ 64 <200000000>; |
| 1240 | }; |
| 1241 | }; |
| 1242 | |
| 1243 | bus_disp1_opp_table: opp_table14 { |
| 1244 | compatible = "operating-points-v2"; |
| 1245 | |
| 1246 | opp00 { |
| 1247 | opp-hz = /bits/ 64 <120000000>; |
| 1248 | }; |
| 1249 | opp01 { |
| 1250 | opp-hz = /bits/ 64 <200000000>; |
| 1251 | }; |
| 1252 | opp02 { |
| 1253 | opp-hz = /bits/ 64 <300000000>; |
| 1254 | }; |
| 1255 | }; |
| 1256 | |
| 1257 | bus_gscl_opp_table: opp_table15 { |
| 1258 | compatible = "operating-points-v2"; |
| 1259 | |
| 1260 | opp00 { |
| 1261 | opp-hz = /bits/ 64 <150000000>; |
| 1262 | }; |
| 1263 | opp01 { |
| 1264 | opp-hz = /bits/ 64 <200000000>; |
| 1265 | }; |
| 1266 | opp02 { |
| 1267 | opp-hz = /bits/ 64 <300000000>; |
| 1268 | }; |
| 1269 | }; |
| 1270 | |
| 1271 | bus_mscl_opp_table: opp_table16 { |
| 1272 | compatible = "operating-points-v2"; |
| 1273 | |
| 1274 | opp00 { |
| 1275 | opp-hz = /bits/ 64 <84000000>; |
| 1276 | }; |
| 1277 | opp01 { |
| 1278 | opp-hz = /bits/ 64 <167000000>; |
| 1279 | }; |
| 1280 | opp02 { |
| 1281 | opp-hz = /bits/ 64 <222000000>; |
| 1282 | }; |
| 1283 | opp03 { |
| 1284 | opp-hz = /bits/ 64 <333000000>; |
| 1285 | }; |
| 1286 | opp04 { |
| 1287 | opp-hz = /bits/ 64 <400000000>; |
| 1288 | }; |
| 1289 | }; |
Lukasz Majewski | 9843a22 | 2015-01-30 08:26:03 +0900 | [diff] [blame] | 1290 | }; |
| 1291 | |
| 1292 | thermal-zones { |
| 1293 | cpu0_thermal: cpu0-thermal { |
| 1294 | thermal-sensors = <&tmu_cpu0>; |
| 1295 | #include "exynos5420-trip-points.dtsi" |
| 1296 | }; |
| 1297 | cpu1_thermal: cpu1-thermal { |
| 1298 | thermal-sensors = <&tmu_cpu1>; |
| 1299 | #include "exynos5420-trip-points.dtsi" |
| 1300 | }; |
| 1301 | cpu2_thermal: cpu2-thermal { |
| 1302 | thermal-sensors = <&tmu_cpu2>; |
| 1303 | #include "exynos5420-trip-points.dtsi" |
| 1304 | }; |
| 1305 | cpu3_thermal: cpu3-thermal { |
| 1306 | thermal-sensors = <&tmu_cpu3>; |
| 1307 | #include "exynos5420-trip-points.dtsi" |
| 1308 | }; |
| 1309 | gpu_thermal: gpu-thermal { |
| 1310 | thermal-sensors = <&tmu_gpu>; |
| 1311 | #include "exynos5420-trip-points.dtsi" |
| 1312 | }; |
Naveen Krishna Chatradhi | 655de64 | 2013-12-21 05:59:49 +0900 | [diff] [blame] | 1313 | }; |
Chander Kashyap | 34dcedf | 2013-06-19 00:29:35 +0900 | [diff] [blame] | 1314 | }; |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1315 | |
| 1316 | &dp { |
| 1317 | clocks = <&clock CLK_DP1>; |
| 1318 | clock-names = "dp"; |
| 1319 | phys = <&dp_phy>; |
| 1320 | phy-names = "dp"; |
| 1321 | power-domains = <&disp_pd>; |
| 1322 | }; |
| 1323 | |
| 1324 | &fimd { |
Chanho Park | 6dc62f1 | 2016-02-12 22:31:40 +0900 | [diff] [blame] | 1325 | compatible = "samsung,exynos5420-fimd"; |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1326 | clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; |
| 1327 | clock-names = "sclk_fimd", "fimd"; |
| 1328 | power-domains = <&disp_pd>; |
Marek Szyprowski | b700451 | 2015-06-04 08:09:42 +0900 | [diff] [blame] | 1329 | iommus = <&sysmmu_fimd1_0>, <&sysmmu_fimd1_1>; |
| 1330 | iommu-names = "m0", "m1"; |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1331 | }; |
| 1332 | |
Krzysztof Kozlowski | 5a124fe | 2016-05-03 14:51:25 +0200 | [diff] [blame] | 1333 | &i2c_0 { |
| 1334 | clocks = <&clock CLK_I2C0>; |
| 1335 | clock-names = "i2c"; |
| 1336 | pinctrl-names = "default"; |
| 1337 | pinctrl-0 = <&i2c0_bus>; |
| 1338 | }; |
| 1339 | |
| 1340 | &i2c_1 { |
| 1341 | clocks = <&clock CLK_I2C1>; |
| 1342 | clock-names = "i2c"; |
| 1343 | pinctrl-names = "default"; |
| 1344 | pinctrl-0 = <&i2c1_bus>; |
| 1345 | }; |
| 1346 | |
| 1347 | &i2c_2 { |
| 1348 | clocks = <&clock CLK_I2C2>; |
| 1349 | clock-names = "i2c"; |
| 1350 | pinctrl-names = "default"; |
| 1351 | pinctrl-0 = <&i2c2_bus>; |
| 1352 | }; |
| 1353 | |
| 1354 | &i2c_3 { |
| 1355 | clocks = <&clock CLK_I2C3>; |
| 1356 | clock-names = "i2c"; |
| 1357 | pinctrl-names = "default"; |
| 1358 | pinctrl-0 = <&i2c3_bus>; |
| 1359 | }; |
| 1360 | |
Krzysztof Kozlowski | 538fc7a | 2016-05-10 20:17:23 +0200 | [diff] [blame] | 1361 | &hsi2c_4 { |
| 1362 | clocks = <&clock CLK_USI0>; |
| 1363 | clock-names = "hsi2c"; |
| 1364 | pinctrl-names = "default"; |
| 1365 | pinctrl-0 = <&i2c4_hs_bus>; |
| 1366 | }; |
| 1367 | |
| 1368 | &hsi2c_5 { |
| 1369 | clocks = <&clock CLK_USI1>; |
| 1370 | clock-names = "hsi2c"; |
| 1371 | pinctrl-names = "default"; |
| 1372 | pinctrl-0 = <&i2c5_hs_bus>; |
| 1373 | }; |
| 1374 | |
| 1375 | &hsi2c_6 { |
| 1376 | clocks = <&clock CLK_USI2>; |
| 1377 | clock-names = "hsi2c"; |
| 1378 | pinctrl-names = "default"; |
| 1379 | pinctrl-0 = <&i2c6_hs_bus>; |
| 1380 | }; |
| 1381 | |
| 1382 | &hsi2c_7 { |
| 1383 | clocks = <&clock CLK_USI3>; |
| 1384 | clock-names = "hsi2c"; |
| 1385 | pinctrl-names = "default"; |
| 1386 | pinctrl-0 = <&i2c7_hs_bus>; |
| 1387 | }; |
| 1388 | |
Krzysztof Kozlowski | c9cf996 | 2016-05-08 18:41:57 +0200 | [diff] [blame] | 1389 | &mct { |
| 1390 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; |
| 1391 | clock-names = "fin_pll", "mct"; |
| 1392 | }; |
| 1393 | |
Krzysztof Kozlowski | 5a124fe | 2016-05-03 14:51:25 +0200 | [diff] [blame] | 1394 | &pwm { |
| 1395 | clocks = <&clock CLK_PWM>; |
| 1396 | clock-names = "timers"; |
| 1397 | }; |
| 1398 | |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1399 | &rtc { |
| 1400 | clocks = <&clock CLK_RTC>; |
| 1401 | clock-names = "rtc"; |
| 1402 | interrupt-parent = <&pmu_system_controller>; |
| 1403 | status = "disabled"; |
| 1404 | }; |
| 1405 | |
| 1406 | &serial_0 { |
| 1407 | clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; |
| 1408 | clock-names = "uart", "clk_uart_baud0"; |
Marek Szyprowski | 3590312 | 2016-12-19 11:00:48 +0100 | [diff] [blame] | 1409 | dmas = <&pdma0 13>, <&pdma0 14>; |
| 1410 | dma-names = "rx", "tx"; |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1411 | }; |
| 1412 | |
| 1413 | &serial_1 { |
| 1414 | clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; |
| 1415 | clock-names = "uart", "clk_uart_baud0"; |
Marek Szyprowski | 3590312 | 2016-12-19 11:00:48 +0100 | [diff] [blame] | 1416 | dmas = <&pdma1 15>, <&pdma1 16>; |
| 1417 | dma-names = "rx", "tx"; |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1418 | }; |
| 1419 | |
| 1420 | &serial_2 { |
| 1421 | clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; |
| 1422 | clock-names = "uart", "clk_uart_baud0"; |
Marek Szyprowski | 3590312 | 2016-12-19 11:00:48 +0100 | [diff] [blame] | 1423 | dmas = <&pdma0 15>, <&pdma0 16>; |
| 1424 | dma-names = "rx", "tx"; |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1425 | }; |
| 1426 | |
| 1427 | &serial_3 { |
| 1428 | clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; |
| 1429 | clock-names = "uart", "clk_uart_baud0"; |
Marek Szyprowski | 3590312 | 2016-12-19 11:00:48 +0100 | [diff] [blame] | 1430 | dmas = <&pdma1 17>, <&pdma1 18>; |
| 1431 | dma-names = "rx", "tx"; |
Krzysztof Kozlowski | 3a3cf6c | 2015-04-12 20:57:36 +0900 | [diff] [blame] | 1432 | }; |
Javier Martinez Canillas | c07f827 | 2015-07-07 22:36:29 -0700 | [diff] [blame] | 1433 | |
Krzysztof Kozlowski | b8bd7e2 | 2016-06-01 11:45:51 +0200 | [diff] [blame] | 1434 | &sss { |
| 1435 | clocks = <&clock CLK_SSS>; |
| 1436 | clock-names = "secss"; |
| 1437 | }; |
| 1438 | |
Krzysztof Kozlowski | cb08965 | 2016-05-08 19:42:11 +0200 | [diff] [blame] | 1439 | &usbdrd3_0 { |
| 1440 | clocks = <&clock CLK_USBD300>; |
| 1441 | clock-names = "usbdrd30"; |
| 1442 | }; |
| 1443 | |
| 1444 | &usbdrd_phy0 { |
| 1445 | clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>; |
| 1446 | clock-names = "phy", "ref"; |
| 1447 | samsung,pmu-syscon = <&pmu_system_controller>; |
| 1448 | }; |
| 1449 | |
| 1450 | &usbdrd3_1 { |
| 1451 | clocks = <&clock CLK_USBD301>; |
| 1452 | clock-names = "usbdrd30"; |
| 1453 | }; |
| 1454 | |
Krzysztof Kozlowski | e5995e6 | 2016-05-31 20:39:02 +0200 | [diff] [blame] | 1455 | &usbdrd_dwc3_1 { |
Krzysztof Kozlowski | 6abdf8d | 2016-09-16 21:42:49 +0200 | [diff] [blame] | 1456 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
Krzysztof Kozlowski | e5995e6 | 2016-05-31 20:39:02 +0200 | [diff] [blame] | 1457 | }; |
| 1458 | |
Krzysztof Kozlowski | cb08965 | 2016-05-08 19:42:11 +0200 | [diff] [blame] | 1459 | &usbdrd_phy1 { |
| 1460 | clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>; |
| 1461 | clock-names = "phy", "ref"; |
| 1462 | samsung,pmu-syscon = <&pmu_system_controller>; |
| 1463 | }; |
| 1464 | |
| 1465 | &usbhost1 { |
| 1466 | clocks = <&clock CLK_USBH20>; |
| 1467 | clock-names = "usbhost"; |
| 1468 | }; |
| 1469 | |
| 1470 | &usbhost2 { |
| 1471 | clocks = <&clock CLK_USBH20>; |
| 1472 | clock-names = "usbhost"; |
| 1473 | }; |
| 1474 | |
| 1475 | &usb2_phy { |
| 1476 | clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>; |
| 1477 | clock-names = "phy", "ref"; |
| 1478 | samsung,sysreg-phandle = <&sysreg_system_controller>; |
| 1479 | samsung,pmureg-phandle = <&pmu_system_controller>; |
| 1480 | }; |
| 1481 | |
Krzysztof Kozlowski | b8bd7e2 | 2016-06-01 11:45:51 +0200 | [diff] [blame] | 1482 | &watchdog { |
| 1483 | clocks = <&clock CLK_WDT>; |
| 1484 | clock-names = "watchdog"; |
| 1485 | samsung,syscon-phandle = <&pmu_system_controller>; |
| 1486 | }; |
| 1487 | |
Javier Martinez Canillas | c07f827 | 2015-07-07 22:36:29 -0700 | [diff] [blame] | 1488 | #include "exynos5420-pinctrl.dtsi" |