blob: e31d93e3e98b194e5177a157fc82a23e5720a86f [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045
46static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020047static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030048
Kalle Valo5e3dd152013-06-12 20:52:10 +030049static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
50{
51 int size;
52
53 /*
54 * It is expected that the host CPU will typically be able to
55 * service the rx indication from one A-MPDU before the rx
56 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
57 * later. However, the rx ring should be sized very conservatively,
58 * to accomodate the worst reasonable delay before the host CPU
59 * services a rx indication interrupt.
60 *
61 * The rx ring need not be kept full of empty buffers. In theory,
62 * the htt host SW can dynamically track the low-water mark in the
63 * rx ring, and dynamically adjust the level to which the rx ring
64 * is filled with empty buffers, to dynamically meet the desired
65 * low-water mark.
66 *
67 * In contrast, it's difficult to resize the rx ring itself, once
68 * it's in use. Thus, the ring itself should be sized very
69 * conservatively, while the degree to which the ring is filled
70 * with empty buffers should be sized moderately conservatively.
71 */
72
73 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
74 size =
75 htt->max_throughput_mbps +
76 1000 /
77 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
78
79 if (size < HTT_RX_RING_SIZE_MIN)
80 size = HTT_RX_RING_SIZE_MIN;
81
82 if (size > HTT_RX_RING_SIZE_MAX)
83 size = HTT_RX_RING_SIZE_MAX;
84
85 size = roundup_pow_of_two(size);
86
87 return size;
88}
89
90static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
91{
92 int size;
93
94 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
95 size =
96 htt->max_throughput_mbps *
97 1000 /
98 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
99
100 /*
101 * Make sure the fill level is at least 1 less than the ring size.
102 * Leaving 1 element empty allows the SW to easily distinguish
103 * between a full ring vs. an empty ring.
104 */
105 if (size >= htt->rx_ring.size)
106 size = htt->rx_ring.size - 1;
107
108 return size;
109}
110
111static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
112{
113 struct sk_buff *skb;
114 struct ath10k_skb_cb *cb;
115 int i;
116
117 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
118 skb = htt->rx_ring.netbufs_ring[i];
119 cb = ATH10K_SKB_CB(skb);
120 dma_unmap_single(htt->ar->dev, cb->paddr,
121 skb->len + skb_tailroom(skb),
122 DMA_FROM_DEVICE);
123 dev_kfree_skb_any(skb);
124 }
125
126 htt->rx_ring.fill_cnt = 0;
127}
128
129static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
130{
131 struct htt_rx_desc *rx_desc;
132 struct sk_buff *skb;
133 dma_addr_t paddr;
134 int ret = 0, idx;
135
136 idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
137 while (num > 0) {
138 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
139 if (!skb) {
140 ret = -ENOMEM;
141 goto fail;
142 }
143
144 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
145 skb_pull(skb,
146 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
147 skb->data);
148
149 /* Clear rx_desc attention word before posting to Rx ring */
150 rx_desc = (struct htt_rx_desc *)skb->data;
151 rx_desc->attention.flags = __cpu_to_le32(0);
152
153 paddr = dma_map_single(htt->ar->dev, skb->data,
154 skb->len + skb_tailroom(skb),
155 DMA_FROM_DEVICE);
156
157 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
158 dev_kfree_skb_any(skb);
159 ret = -ENOMEM;
160 goto fail;
161 }
162
163 ATH10K_SKB_CB(skb)->paddr = paddr;
164 htt->rx_ring.netbufs_ring[idx] = skb;
165 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
166 htt->rx_ring.fill_cnt++;
167
168 num--;
169 idx++;
170 idx &= htt->rx_ring.size_mask;
171 }
172
173fail:
174 *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
175 return ret;
176}
177
178static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
179{
180 lockdep_assert_held(&htt->rx_ring.lock);
181 return __ath10k_htt_rx_ring_fill_n(htt, num);
182}
183
184static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
185{
Michal Kazior6e712d42013-09-24 10:18:36 +0200186 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187
Michal Kazior6e712d42013-09-24 10:18:36 +0200188 /* Refilling the whole RX ring buffer proves to be a bad idea. The
189 * reason is RX may take up significant amount of CPU cycles and starve
190 * other tasks, e.g. TX on an ethernet device while acting as a bridge
191 * with ath10k wlan interface. This ended up with very poor performance
192 * once CPU the host system was overwhelmed with RX on ath10k.
193 *
194 * By limiting the number of refills the replenishing occurs
195 * progressively. This in turns makes use of the fact tasklets are
196 * processed in FIFO order. This means actual RX processing can starve
197 * out refilling. If there's not enough buffers on RX ring FW will not
198 * report RX until it is refilled with enough buffers. This
199 * automatically balances load wrt to CPU power.
200 *
201 * This probably comes at a cost of lower maximum throughput but
202 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300203 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200204 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
205 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
206 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300207 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
208 if (ret == -ENOMEM) {
209 /*
210 * Failed to fill it to the desired level -
211 * we'll start a timer and try again next time.
212 * As long as enough buffers are left in the ring for
213 * another A-MPDU rx, no special recovery is needed.
214 */
215 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
216 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200217 } else if (num_deficit > 0) {
218 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300219 }
220 spin_unlock_bh(&htt->rx_ring.lock);
221}
222
223static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
224{
225 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
274 int idx;
275 struct sk_buff *msdu;
276
Michal Kazior45967082014-02-27 18:50:05 +0200277 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300278
Michal Kazior8d60ee82014-02-27 18:50:05 +0200279 if (htt->rx_ring.fill_cnt == 0) {
280 ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
281 return NULL;
282 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283
284 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
285 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300286 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300287
288 idx++;
289 idx &= htt->rx_ring.size_mask;
290 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
291 htt->rx_ring.fill_cnt--;
292
Kalle Valo5e3dd152013-06-12 20:52:10 +0300293 return msdu;
294}
295
296static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
297{
298 struct sk_buff *next;
299
300 while (skb) {
301 next = skb->next;
302 dev_kfree_skb_any(skb);
303 skb = next;
304 }
305}
306
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100307/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300308static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
309 u8 **fw_desc, int *fw_desc_len,
310 struct sk_buff **head_msdu,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300311 struct sk_buff **tail_msdu,
312 u32 *attention)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300313{
314 int msdu_len, msdu_chaining = 0;
315 struct sk_buff *msdu;
316 struct htt_rx_desc *rx_desc;
317
Michal Kazior45967082014-02-27 18:50:05 +0200318 lockdep_assert_held(&htt->rx_ring.lock);
319
Kalle Valo5e3dd152013-06-12 20:52:10 +0300320 if (htt->rx_confused) {
321 ath10k_warn("htt is confused. refusing rx\n");
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100322 return -1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300323 }
324
325 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
326 while (msdu) {
327 int last_msdu, msdu_len_invalid, msdu_chained;
328
329 dma_unmap_single(htt->ar->dev,
330 ATH10K_SKB_CB(msdu)->paddr,
331 msdu->len + skb_tailroom(msdu),
332 DMA_FROM_DEVICE);
333
Ben Greear75fb2f92014-02-05 13:58:34 -0800334 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300335 msdu->data, msdu->len + skb_tailroom(msdu));
336
337 rx_desc = (struct htt_rx_desc *)msdu->data;
338
339 /* FIXME: we must report msdu payload since this is what caller
340 * expects now */
341 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
342 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
343
344 /*
345 * Sanity check - confirm the HW is finished filling in the
346 * rx data.
347 * If the HW and SW are working correctly, then it's guaranteed
348 * that the HW's MAC DMA is done before this point in the SW.
349 * To prevent the case that we handle a stale Rx descriptor,
350 * just assert for now until we have a way to recover.
351 */
352 if (!(__le32_to_cpu(rx_desc->attention.flags)
353 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
354 ath10k_htt_rx_free_msdu_chain(*head_msdu);
355 *head_msdu = NULL;
356 msdu = NULL;
357 ath10k_err("htt rx stopped. cannot recover\n");
358 htt->rx_confused = true;
359 break;
360 }
361
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300362 *attention |= __le32_to_cpu(rx_desc->attention.flags) &
363 (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
364 RX_ATTENTION_FLAGS_DECRYPT_ERR |
365 RX_ATTENTION_FLAGS_FCS_ERR |
366 RX_ATTENTION_FLAGS_MGMT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300367 /*
368 * Copy the FW rx descriptor for this MSDU from the rx
369 * indication message into the MSDU's netbuf. HL uses the
370 * same rx indication message definition as LL, and simply
371 * appends new info (fields from the HW rx desc, and the
372 * MSDU payload itself). So, the offset into the rx
373 * indication message only has to account for the standard
374 * offset of the per-MSDU FW rx desc info within the
375 * message, and how many bytes of the per-MSDU FW rx desc
376 * info have already been consumed. (And the endianness of
377 * the host, since for a big-endian host, the rx ind
378 * message contents, including the per-MSDU rx desc bytes,
379 * were byteswapped during upload.)
380 */
381 if (*fw_desc_len > 0) {
382 rx_desc->fw_desc.info0 = **fw_desc;
383 /*
384 * The target is expected to only provide the basic
385 * per-MSDU rx descriptors. Just to be sure, verify
386 * that the target has not attached extension data
387 * (e.g. LRO flow ID).
388 */
389
390 /* or more, if there's extension data */
391 (*fw_desc)++;
392 (*fw_desc_len)--;
393 } else {
394 /*
395 * When an oversized AMSDU happened, FW will lost
396 * some of MSDU status - in this case, the FW
397 * descriptors provided will be less than the
398 * actual MSDUs inside this MPDU. Mark the FW
399 * descriptors so that it will still deliver to
400 * upper stack, if no CRC error for this MPDU.
401 *
402 * FIX THIS - the FW descriptors are actually for
403 * MSDUs in the end of this A-MSDU instead of the
404 * beginning.
405 */
406 rx_desc->fw_desc.info0 = 0;
407 }
408
409 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
410 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
411 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
412 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
413 RX_MSDU_START_INFO0_MSDU_LENGTH);
414 msdu_chained = rx_desc->frag_info.ring2_more_count;
415
416 if (msdu_len_invalid)
417 msdu_len = 0;
418
419 skb_trim(msdu, 0);
420 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
421 msdu_len -= msdu->len;
422
423 /* FIXME: Do chained buffers include htt_rx_desc or not? */
424 while (msdu_chained--) {
425 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
426
427 dma_unmap_single(htt->ar->dev,
428 ATH10K_SKB_CB(next)->paddr,
429 next->len + skb_tailroom(next),
430 DMA_FROM_DEVICE);
431
Ben Greear75fb2f92014-02-05 13:58:34 -0800432 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
433 "htt rx chained: ", next->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300434 next->len + skb_tailroom(next));
435
436 skb_trim(next, 0);
437 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
438 msdu_len -= next->len;
439
440 msdu->next = next;
441 msdu = next;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300442 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300443 }
444
Kalle Valo5e3dd152013-06-12 20:52:10 +0300445 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
446 RX_MSDU_END_INFO0_LAST_MSDU;
447
448 if (last_msdu) {
449 msdu->next = NULL;
450 break;
451 } else {
452 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
453 msdu->next = next;
454 msdu = next;
455 }
456 }
457 *tail_msdu = msdu;
458
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100459 if (*head_msdu == NULL)
460 msdu_chaining = -1;
461
Kalle Valo5e3dd152013-06-12 20:52:10 +0300462 /*
463 * Don't refill the ring yet.
464 *
465 * First, the elements popped here are still in use - it is not
466 * safe to overwrite them until the matching call to
467 * mpdu_desc_list_next. Second, for efficiency it is preferable to
468 * refill the rx ring with 1 PPDU's worth of rx buffers (something
469 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
470 * (something like 3 buffers). Consequently, we'll rely on the txrx
471 * SW to tell us when it is done pulling all the PPDU's rx buffers
472 * out of the rx ring, and then refill it just once.
473 */
474
475 return msdu_chaining;
476}
477
Michal Kazior6e712d42013-09-24 10:18:36 +0200478static void ath10k_htt_rx_replenish_task(unsigned long ptr)
479{
480 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
481 ath10k_htt_rx_msdu_buff_replenish(htt);
482}
483
Michal Kazior95bf21f2014-05-16 17:15:39 +0300484int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300485{
486 dma_addr_t paddr;
487 void *vaddr;
488 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
489
490 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
491 if (!is_power_of_2(htt->rx_ring.size)) {
492 ath10k_warn("htt rx ring size is not power of 2\n");
493 return -EINVAL;
494 }
495
496 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
497
498 /*
499 * Set the initial value for the level to which the rx ring
500 * should be filled, based on the max throughput and the
501 * worst likely latency for the host to fill the rx ring
502 * with new buffers. In theory, this fill level can be
503 * dynamically adjusted from the initial value set here, to
504 * reflect the actual host latency rather than a
505 * conservative assumption about the host latency.
506 */
507 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
508
509 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300510 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300511 GFP_KERNEL);
512 if (!htt->rx_ring.netbufs_ring)
513 goto err_netbuf;
514
515 vaddr = dma_alloc_coherent(htt->ar->dev,
516 (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
517 &paddr, GFP_DMA);
518 if (!vaddr)
519 goto err_dma_ring;
520
521 htt->rx_ring.paddrs_ring = vaddr;
522 htt->rx_ring.base_paddr = paddr;
523
524 vaddr = dma_alloc_coherent(htt->ar->dev,
525 sizeof(*htt->rx_ring.alloc_idx.vaddr),
526 &paddr, GFP_DMA);
527 if (!vaddr)
528 goto err_dma_idx;
529
530 htt->rx_ring.alloc_idx.vaddr = vaddr;
531 htt->rx_ring.alloc_idx.paddr = paddr;
532 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
533 *htt->rx_ring.alloc_idx.vaddr = 0;
534
535 /* Initialize the Rx refill retry timer */
536 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
537
538 spin_lock_init(&htt->rx_ring.lock);
539
540 htt->rx_ring.fill_cnt = 0;
541 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
542 goto err_fill_ring;
543
Michal Kazior6e712d42013-09-24 10:18:36 +0200544 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
545 (unsigned long)htt);
546
Michal Kazior6c5151a2014-02-27 18:50:04 +0200547 skb_queue_head_init(&htt->tx_compl_q);
548 skb_queue_head_init(&htt->rx_compl_q);
549
550 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
551 (unsigned long)htt);
552
Kalle Valoaad0b652013-09-08 17:56:02 +0300553 ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300554 htt->rx_ring.size, htt->rx_ring.fill_level);
555 return 0;
556
557err_fill_ring:
558 ath10k_htt_rx_ring_free(htt);
559 dma_free_coherent(htt->ar->dev,
560 sizeof(*htt->rx_ring.alloc_idx.vaddr),
561 htt->rx_ring.alloc_idx.vaddr,
562 htt->rx_ring.alloc_idx.paddr);
563err_dma_idx:
564 dma_free_coherent(htt->ar->dev,
565 (htt->rx_ring.size *
566 sizeof(htt->rx_ring.paddrs_ring)),
567 htt->rx_ring.paddrs_ring,
568 htt->rx_ring.base_paddr);
569err_dma_ring:
570 kfree(htt->rx_ring.netbufs_ring);
571err_netbuf:
572 return -ENOMEM;
573}
574
575static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
576{
577 switch (type) {
578 case HTT_RX_MPDU_ENCRYPT_WEP40:
579 case HTT_RX_MPDU_ENCRYPT_WEP104:
580 return 4;
581 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
582 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
583 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
584 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
585 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
586 return 8;
587 case HTT_RX_MPDU_ENCRYPT_NONE:
588 return 0;
589 }
590
591 ath10k_warn("unknown encryption type %d\n", type);
592 return 0;
593}
594
595static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
596{
597 switch (type) {
598 case HTT_RX_MPDU_ENCRYPT_NONE:
599 case HTT_RX_MPDU_ENCRYPT_WEP40:
600 case HTT_RX_MPDU_ENCRYPT_WEP104:
601 case HTT_RX_MPDU_ENCRYPT_WEP128:
602 case HTT_RX_MPDU_ENCRYPT_WAPI:
603 return 0;
604 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
605 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
606 return 4;
607 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
608 return 8;
609 }
610
611 ath10k_warn("unknown encryption type %d\n", type);
612 return 0;
613}
614
615/* Applies for first msdu in chain, before altering it. */
616static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
617{
618 struct htt_rx_desc *rxd;
619 enum rx_msdu_decap_format fmt;
620
621 rxd = (void *)skb->data - sizeof(*rxd);
622 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
623 RX_MSDU_START_INFO1_DECAP_FORMAT);
624
625 if (fmt == RX_MSDU_DECAP_RAW)
626 return (void *)skb->data;
627 else
628 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
629}
630
631/* This function only applies for first msdu in an msdu chain */
632static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
633{
634 if (ieee80211_is_data_qos(hdr->frame_control)) {
635 u8 *qc = ieee80211_get_qos_ctl(hdr);
636 if (qc[0] & 0x80)
637 return true;
638 }
639 return false;
640}
641
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300642struct rfc1042_hdr {
643 u8 llc_dsap;
644 u8 llc_ssap;
645 u8 llc_ctrl;
646 u8 snap_oui[3];
647 __be16 snap_type;
648} __packed;
649
650struct amsdu_subframe_hdr {
651 u8 dst[ETH_ALEN];
652 u8 src[ETH_ALEN];
653 __be16 len;
654} __packed;
655
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100656static const u8 rx_legacy_rate_idx[] = {
657 3, /* 0x00 - 11Mbps */
658 2, /* 0x01 - 5.5Mbps */
659 1, /* 0x02 - 2Mbps */
660 0, /* 0x03 - 1Mbps */
661 3, /* 0x04 - 11Mbps */
662 2, /* 0x05 - 5.5Mbps */
663 1, /* 0x06 - 2Mbps */
664 0, /* 0x07 - 1Mbps */
665 10, /* 0x08 - 48Mbps */
666 8, /* 0x09 - 24Mbps */
667 6, /* 0x0A - 12Mbps */
668 4, /* 0x0B - 6Mbps */
669 11, /* 0x0C - 54Mbps */
670 9, /* 0x0D - 36Mbps */
671 7, /* 0x0E - 18Mbps */
672 5, /* 0x0F - 9Mbps */
673};
674
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100675static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100676 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100677 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100678 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100679{
680 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100681 u8 preamble = 0;
682
683 /* Check if valid fields */
684 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
685 return;
686
687 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
688
689 switch (preamble) {
690 case HTT_RX_LEGACY:
691 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
692 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
693 rate_idx = 0;
694
695 if (rate < 0x08 || rate > 0x0F)
696 break;
697
698 switch (band) {
699 case IEEE80211_BAND_2GHZ:
700 if (cck)
701 rate &= ~BIT(3);
702 rate_idx = rx_legacy_rate_idx[rate];
703 break;
704 case IEEE80211_BAND_5GHZ:
705 rate_idx = rx_legacy_rate_idx[rate];
706 /* We are using same rate table registering
707 HW - ath10k_rates[]. In case of 5GHz skip
708 CCK rates, so -4 here */
709 rate_idx -= 4;
710 break;
711 default:
712 break;
713 }
714
715 status->rate_idx = rate_idx;
716 break;
717 case HTT_RX_HT:
718 case HTT_RX_HT_WITH_TXBF:
719 /* HT-SIG - Table 20-11 in info1 and info2 */
720 mcs = info1 & 0x1F;
721 nss = mcs >> 3;
722 bw = (info1 >> 7) & 1;
723 sgi = (info2 >> 7) & 1;
724
725 status->rate_idx = mcs;
726 status->flag |= RX_FLAG_HT;
727 if (sgi)
728 status->flag |= RX_FLAG_SHORT_GI;
729 if (bw)
730 status->flag |= RX_FLAG_40MHZ;
731 break;
732 case HTT_RX_VHT:
733 case HTT_RX_VHT_WITH_TXBF:
734 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
735 TODO check this */
736 mcs = (info2 >> 4) & 0x0F;
737 nss = ((info1 >> 10) & 0x07) + 1;
738 bw = info1 & 3;
739 sgi = info2 & 1;
740
741 status->rate_idx = mcs;
742 status->vht_nss = nss;
743
744 if (sgi)
745 status->flag |= RX_FLAG_SHORT_GI;
746
747 switch (bw) {
748 /* 20MHZ */
749 case 0:
750 break;
751 /* 40MHZ */
752 case 1:
753 status->flag |= RX_FLAG_40MHZ;
754 break;
755 /* 80MHZ */
756 case 2:
757 status->vht_flag |= RX_VHT_FLAG_80MHZ;
758 }
759
760 status->flag |= RX_FLAG_VHT;
761 break;
762 default:
763 break;
764 }
765}
766
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100767static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100768 struct ieee80211_rx_status *rx_status,
769 struct sk_buff *skb,
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300770 enum htt_rx_mpdu_encrypt_type enctype,
771 enum rx_msdu_decap_format fmt,
772 bool dot11frag)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100773{
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100774 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100775
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300776 rx_status->flag &= ~(RX_FLAG_DECRYPTED |
777 RX_FLAG_IV_STRIPPED |
778 RX_FLAG_MMIC_STRIPPED);
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100779
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300780 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100781 return;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300782
783 /*
784 * There's no explicit rx descriptor flag to indicate whether a given
785 * frame has been decrypted or not. We're forced to use the decap
786 * format as an implicit indication. However fragmentation rx is always
787 * raw and it probably never reports undecrypted raws.
788 *
789 * This makes sure sniffed frames are reported as-is without stripping
790 * the protected flag.
791 */
792 if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
793 return;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100794
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100795 rx_status->flag |= RX_FLAG_DECRYPTED |
796 RX_FLAG_IV_STRIPPED |
797 RX_FLAG_MMIC_STRIPPED;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100798 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
799 ~IEEE80211_FCTL_PROTECTED);
800}
801
Janusz Dziedzic36653f052014-03-24 21:23:18 +0100802static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
803 struct ieee80211_rx_status *status)
804{
805 struct ieee80211_channel *ch;
806
807 spin_lock_bh(&ar->data_lock);
808 ch = ar->scan_channel;
809 if (!ch)
810 ch = ar->rx_channel;
811 spin_unlock_bh(&ar->data_lock);
812
813 if (!ch)
814 return false;
815
816 status->band = ch->band;
817 status->freq = ch->center_freq;
818
819 return true;
820}
821
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100822static void ath10k_process_rx(struct ath10k *ar,
823 struct ieee80211_rx_status *rx_status,
824 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100825{
826 struct ieee80211_rx_status *status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100827
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100828 status = IEEE80211_SKB_RXCB(skb);
829 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100830
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100831 ath10k_dbg(ATH10K_DBG_DATA,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100832 "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %imic-err %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100833 skb,
834 skb->len,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100835 status->flag == 0 ? "legacy" : "",
836 status->flag & RX_FLAG_HT ? "ht" : "",
837 status->flag & RX_FLAG_VHT ? "vht" : "",
838 status->flag & RX_FLAG_40MHZ ? "40" : "",
839 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
840 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
841 status->rate_idx,
842 status->vht_nss,
843 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100844 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100845 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
846 !!(status->flag & RX_FLAG_MMIC_ERROR));
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100847 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100848 skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100849
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100850 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100851}
852
Michal Kaziord960c362014-02-25 09:29:57 +0200853static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
854{
855 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
856 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
857}
858
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300859static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100860 struct ieee80211_rx_status *rx_status,
861 struct sk_buff *skb_in)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300862{
863 struct htt_rx_desc *rxd;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100864 struct sk_buff *skb = skb_in;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300865 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300866 enum rx_msdu_decap_format fmt;
867 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300868 struct ieee80211_hdr *hdr;
Michal Kazior72bdeb82014-07-28 23:59:42 +0300869 u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300870 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300871
872 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300873 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
874 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
875
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300876 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
877 hdr_len = ieee80211_hdrlen(hdr->frame_control);
878 memcpy(hdr_buf, hdr, hdr_len);
879 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300880
Kalle Valo5e3dd152013-06-12 20:52:10 +0300881 first = skb;
882 while (skb) {
883 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300884 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300885
886 rxd = (void *)skb->data - sizeof(*rxd);
887 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300888 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300889 decap_hdr = (void *)rxd->rx_hdr_status;
890
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300891 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
892
893 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300894 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300895 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
896 len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
897 4);
898 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300899 }
900
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300901 switch (fmt) {
902 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300903 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300904 skb_trim(skb, skb->len - FCS_LEN);
905 break;
906 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior72bdeb82014-07-28 23:59:42 +0300907 /* pull decapped header and copy SA & DA */
Michal Kazior784f69d2013-09-26 10:12:23 +0300908 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200909 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior72bdeb82014-07-28 23:59:42 +0300910 memcpy(da, ieee80211_get_DA(hdr), ETH_ALEN);
911 memcpy(sa, ieee80211_get_SA(hdr), ETH_ALEN);
Michal Kazior784f69d2013-09-26 10:12:23 +0300912 skb_pull(skb, hdr_len);
913
914 /* push original 802.11 header */
915 hdr = (struct ieee80211_hdr *)hdr_buf;
916 hdr_len = ieee80211_hdrlen(hdr->frame_control);
917 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
918
919 /* original A-MSDU header has the bit set but we're
920 * not including A-MSDU subframe header */
921 hdr = (struct ieee80211_hdr *)skb->data;
922 qos = ieee80211_get_qos_ctl(hdr);
923 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
924
Michal Kazior72bdeb82014-07-28 23:59:42 +0300925 /* original 802.11 header has a different DA and in
926 * case of 4addr it may also have different SA
927 */
928 memcpy(ieee80211_get_DA(hdr), da, ETH_ALEN);
929 memcpy(ieee80211_get_SA(hdr), sa, ETH_ALEN);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300930 break;
931 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300932 /* strip ethernet header and insert decapped 802.11
933 * header, amsdu subframe header and rfc1042 header */
934
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300935 len = 0;
936 len += sizeof(struct rfc1042_hdr);
937 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200938
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300939 skb_pull(skb, sizeof(struct ethhdr));
940 memcpy(skb_push(skb, len), decap_hdr, len);
941 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
942 break;
943 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300944 /* insert decapped 802.11 header making a singly
945 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300946 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
947 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300948 }
949
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100950 skb_in = skb;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300951 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
952 false);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300953 skb = skb->next;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100954 skb_in->next = NULL;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300955
Kalle Valo652de352013-11-13 15:23:30 +0200956 if (skb)
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100957 rx_status->flag |= RX_FLAG_AMSDU_MORE;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100958 else
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100959 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
Kalle Valo652de352013-11-13 15:23:30 +0200960
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100961 ath10k_process_rx(htt->ar, rx_status, skb_in);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300962 }
963
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300964 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
965 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300966}
967
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100968static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
969 struct ieee80211_rx_status *rx_status,
970 struct sk_buff *skb)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300971{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300972 struct htt_rx_desc *rxd;
973 struct ieee80211_hdr *hdr;
974 enum rx_msdu_decap_format fmt;
975 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300976 int hdr_len;
977 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300978
979 /* This shouldn't happen. If it does than it may be a FW bug. */
980 if (skb->next) {
Ben Greear75fb2f92014-02-05 13:58:34 -0800981 ath10k_warn("htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300982 ath10k_htt_rx_free_msdu_chain(skb->next);
983 skb->next = NULL;
984 }
985
986 rxd = (void *)skb->data - sizeof(*rxd);
987 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
988 RX_MSDU_START_INFO1_DECAP_FORMAT);
989 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
990 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300991 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
992 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300993
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300994 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
995
Kalle Valo5e3dd152013-06-12 20:52:10 +0300996 switch (fmt) {
997 case RX_MSDU_DECAP_RAW:
998 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300999 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001000 break;
1001 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +03001002 /* Pull decapped header */
1003 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +02001004 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +03001005 skb_pull(skb, hdr_len);
1006
1007 /* Push original header */
1008 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1009 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1010 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001011 break;
1012 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001013 /* strip ethernet header and insert decapped 802.11 header and
1014 * rfc1042 header */
1015
1016 rfc1042 = hdr;
1017 rfc1042 += roundup(hdr_len, 4);
1018 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
1019
1020 skb_pull(skb, sizeof(struct ethhdr));
1021 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
1022 rfc1042, sizeof(struct rfc1042_hdr));
1023 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001024 break;
1025 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001026 /* remove A-MSDU subframe header and insert
1027 * decapped 802.11 header. rfc1042 header is already there */
1028
1029 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1030 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001031 break;
1032 }
1033
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001034 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001035
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001036 ath10k_process_rx(htt->ar, rx_status, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001037}
1038
Michal Kazior605f81a2013-07-31 10:47:56 +02001039static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1040{
1041 struct htt_rx_desc *rxd;
1042 u32 flags, info;
1043 bool is_ip4, is_ip6;
1044 bool is_tcp, is_udp;
1045 bool ip_csum_ok, tcpudp_csum_ok;
1046
1047 rxd = (void *)skb->data - sizeof(*rxd);
1048 flags = __le32_to_cpu(rxd->attention.flags);
1049 info = __le32_to_cpu(rxd->msdu_start.info1);
1050
1051 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1052 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1053 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1054 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1055 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1056 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1057
1058 if (!is_ip4 && !is_ip6)
1059 return CHECKSUM_NONE;
1060 if (!is_tcp && !is_udp)
1061 return CHECKSUM_NONE;
1062 if (!ip_csum_ok)
1063 return CHECKSUM_NONE;
1064 if (!tcpudp_csum_ok)
1065 return CHECKSUM_NONE;
1066
1067 return CHECKSUM_UNNECESSARY;
1068}
1069
Ben Greearbfa35362014-03-03 14:07:09 -08001070static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1071{
1072 struct sk_buff *next = msdu_head->next;
1073 struct sk_buff *to_free = next;
1074 int space;
1075 int total_len = 0;
1076
1077 /* TODO: Might could optimize this by using
1078 * skb_try_coalesce or similar method to
1079 * decrease copying, or maybe get mac80211 to
1080 * provide a way to just receive a list of
1081 * skb?
1082 */
1083
1084 msdu_head->next = NULL;
1085
1086 /* Allocate total length all at once. */
1087 while (next) {
1088 total_len += next->len;
1089 next = next->next;
1090 }
1091
1092 space = total_len - skb_tailroom(msdu_head);
1093 if ((space > 0) &&
1094 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1095 /* TODO: bump some rx-oom error stat */
1096 /* put it back together so we can free the
1097 * whole list at once.
1098 */
1099 msdu_head->next = to_free;
1100 return -1;
1101 }
1102
1103 /* Walk list again, copying contents into
1104 * msdu_head
1105 */
1106 next = to_free;
1107 while (next) {
1108 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1109 next->len);
1110 next = next->next;
1111 }
1112
1113 /* If here, we have consolidated skb. Free the
1114 * fragments and pass the main skb on up the
1115 * stack.
1116 */
1117 ath10k_htt_rx_free_msdu_chain(to_free);
1118 return 0;
1119}
1120
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001121static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1122 struct sk_buff *head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001123 enum htt_rx_mpdu_status status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001124 bool channel_set,
1125 u32 attention)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001126{
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001127 if (head->len == 0) {
1128 ath10k_dbg(ATH10K_DBG_HTT,
1129 "htt rx dropping due to zero-len\n");
1130 return false;
1131 }
1132
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001133 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001134 ath10k_dbg(ATH10K_DBG_HTT,
1135 "htt rx dropping due to decrypt-err\n");
1136 return false;
1137 }
1138
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001139 if (!channel_set) {
1140 ath10k_warn("no channel configured; ignoring frame!\n");
1141 return false;
1142 }
1143
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001144 /* Skip mgmt frames while we handle this in WMI */
1145 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001146 attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001147 ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
1148 return false;
1149 }
1150
1151 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1152 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1153 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
Michal Kazior1bbc0972014-04-08 09:45:47 +03001154 !htt->ar->monitor_started) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001155 ath10k_dbg(ATH10K_DBG_HTT,
1156 "htt rx ignoring frame w/ status %d\n",
1157 status);
1158 return false;
1159 }
1160
1161 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
1162 ath10k_dbg(ATH10K_DBG_HTT,
1163 "htt rx CAC running\n");
1164 return false;
1165 }
1166
1167 return true;
1168}
1169
Kalle Valo5e3dd152013-06-12 20:52:10 +03001170static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1171 struct htt_rx_indication *rx)
1172{
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001173 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001174 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001175 struct htt_rx_desc *rxd;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001176 enum htt_rx_mpdu_status status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001177 struct ieee80211_hdr *hdr;
1178 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001179 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001180 int fw_desc_len;
1181 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001182 bool channel_set;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001183 int i, j;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001184 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001185
Michal Kazior45967082014-02-27 18:50:05 +02001186 lockdep_assert_held(&htt->rx_ring.lock);
1187
Kalle Valo5e3dd152013-06-12 20:52:10 +03001188 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1189 fw_desc = (u8 *)&rx->fw_desc;
1190
1191 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1192 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1193 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1194
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001195 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001196 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1197 memset(rx_status, 0, sizeof(*rx_status));
1198 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1199 rx->ppdu.combined_rssi;
1200 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001201
1202 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1203 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001204 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1205 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001206 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001207
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001208 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001209
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001210 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001211 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001212 rx->ppdu.info0,
1213 __le32_to_cpu(rx->ppdu.info1),
1214 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001215 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001216 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001217
Kalle Valo5e3dd152013-06-12 20:52:10 +03001218 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
1219 rx, sizeof(*rx) +
1220 (sizeof(struct htt_rx_indication_mpdu_range) *
1221 num_mpdu_ranges));
1222
1223 for (i = 0; i < num_mpdu_ranges; i++) {
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001224 status = mpdu_ranges[i].mpdu_range_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001225
1226 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1227 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001228
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001229 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001230 msdu_head = NULL;
1231 msdu_tail = NULL;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001232 ret = ath10k_htt_rx_amsdu_pop(htt,
1233 &fw_desc,
1234 &fw_desc_len,
1235 &msdu_head,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001236 &msdu_tail,
1237 &attention);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001238
1239 if (ret < 0) {
1240 ath10k_warn("failed to pop amsdu from htt rx ring %d\n",
1241 ret);
1242 ath10k_htt_rx_free_msdu_chain(msdu_head);
1243 continue;
1244 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001245
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001246 rxd = container_of((void *)msdu_head->data,
1247 struct htt_rx_desc,
1248 msdu_payload);
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001249
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001250 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001251 status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001252 channel_set,
1253 attention)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001254 ath10k_htt_rx_free_msdu_chain(msdu_head);
1255 continue;
1256 }
1257
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001258 if (ret > 0 &&
1259 ath10k_unchain_msdu(msdu_head) < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001260 ath10k_htt_rx_free_msdu_chain(msdu_head);
1261 continue;
1262 }
1263
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001264 if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001265 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001266 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001267 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001268
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001269 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001270 rx_status->flag |= RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001271 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001272 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001273
Kalle Valo5e3dd152013-06-12 20:52:10 +03001274 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1275
1276 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001277 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001278 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001279 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001280 }
1281 }
1282
Michal Kazior6e712d42013-09-24 10:18:36 +02001283 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001284}
1285
1286static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
1287 struct htt_rx_fragment_indication *frag)
1288{
1289 struct sk_buff *msdu_head, *msdu_tail;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001290 enum htt_rx_mpdu_encrypt_type enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001291 struct htt_rx_desc *rxd;
1292 enum rx_msdu_decap_format fmt;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001293 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001294 struct ieee80211_hdr *hdr;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001295 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001296 bool tkip_mic_err;
1297 bool decrypt_err;
1298 u8 *fw_desc;
1299 int fw_desc_len, hdrlen, paramlen;
1300 int trim;
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001301 u32 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001302
1303 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1304 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1305
1306 msdu_head = NULL;
1307 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001308
1309 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001310 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001311 &msdu_head, &msdu_tail,
1312 &attention);
Michal Kazior45967082014-02-27 18:50:05 +02001313 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001314
1315 ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
1316
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001317 if (ret) {
1318 ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n",
1319 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001320 ath10k_htt_rx_free_msdu_chain(msdu_head);
1321 return;
1322 }
1323
1324 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001325 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001326
1327 hdr = (struct ieee80211_hdr *)msdu_head->data;
1328 rxd = (void *)msdu_head->data - sizeof(*rxd);
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001329 tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1330 decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001331 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1332 RX_MSDU_START_INFO1_DECAP_FORMAT);
1333
1334 if (fmt != RX_MSDU_DECAP_RAW) {
1335 ath10k_warn("we dont support non-raw fragmented rx yet\n");
1336 dev_kfree_skb_any(msdu_head);
1337 goto end;
1338 }
1339
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001340 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1341 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001342 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
1343 true);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001344 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001345
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001346 if (tkip_mic_err)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001347 ath10k_warn("tkip mic error\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001348
1349 if (decrypt_err) {
1350 ath10k_warn("decryption err in fragmented rx\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001351 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001352 goto end;
1353 }
1354
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001355 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001356 hdrlen = ieee80211_hdrlen(hdr->frame_control);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001357 paramlen = ath10k_htt_rx_crypto_param_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001358
1359 /* It is more efficient to move the header than the payload */
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001360 memmove((void *)msdu_head->data + paramlen,
1361 (void *)msdu_head->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001362 hdrlen);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001363 skb_pull(msdu_head, paramlen);
1364 hdr = (struct ieee80211_hdr *)msdu_head->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001365 }
1366
1367 /* remove trailing FCS */
1368 trim = 4;
1369
1370 /* remove crypto trailer */
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001371 trim += ath10k_htt_rx_crypto_tail_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001372
1373 /* last fragment of TKIP frags has MIC */
1374 if (!ieee80211_has_morefrags(hdr->frame_control) &&
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001375 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001376 trim += 8;
1377
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001378 if (trim > msdu_head->len) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001379 ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001380 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001381 goto end;
1382 }
1383
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001384 skb_trim(msdu_head, msdu_head->len - trim);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001385
Ben Greear75fb2f92014-02-05 13:58:34 -08001386 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001387 msdu_head->data, msdu_head->len);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001388 ath10k_process_rx(htt->ar, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001389
1390end:
1391 if (fw_desc_len > 0) {
1392 ath10k_dbg(ATH10K_DBG_HTT,
1393 "expecting more fragmented rx in one indication %d\n",
1394 fw_desc_len);
1395 }
1396}
1397
Michal Kazior6c5151a2014-02-27 18:50:04 +02001398static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1399 struct sk_buff *skb)
1400{
1401 struct ath10k_htt *htt = &ar->htt;
1402 struct htt_resp *resp = (struct htt_resp *)skb->data;
1403 struct htt_tx_done tx_done = {};
1404 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1405 __le16 msdu_id;
1406 int i;
1407
Michal Kazior45967082014-02-27 18:50:05 +02001408 lockdep_assert_held(&htt->tx_lock);
1409
Michal Kazior6c5151a2014-02-27 18:50:04 +02001410 switch (status) {
1411 case HTT_DATA_TX_STATUS_NO_ACK:
1412 tx_done.no_ack = true;
1413 break;
1414 case HTT_DATA_TX_STATUS_OK:
1415 break;
1416 case HTT_DATA_TX_STATUS_DISCARD:
1417 case HTT_DATA_TX_STATUS_POSTPONE:
1418 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1419 tx_done.discard = true;
1420 break;
1421 default:
1422 ath10k_warn("unhandled tx completion status %d\n", status);
1423 tx_done.discard = true;
1424 break;
1425 }
1426
1427 ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1428 resp->data_tx_completion.num_msdus);
1429
1430 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1431 msdu_id = resp->data_tx_completion.msdus[i];
1432 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1433 ath10k_txrx_tx_unref(htt, &tx_done);
1434 }
1435}
1436
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001437static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1438{
1439 struct htt_rx_addba *ev = &resp->rx_addba;
1440 struct ath10k_peer *peer;
1441 struct ath10k_vif *arvif;
1442 u16 info0, tid, peer_id;
1443
1444 info0 = __le16_to_cpu(ev->info0);
1445 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1446 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1447
1448 ath10k_dbg(ATH10K_DBG_HTT,
1449 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1450 tid, peer_id, ev->window_size);
1451
1452 spin_lock_bh(&ar->data_lock);
1453 peer = ath10k_peer_find_by_id(ar, peer_id);
1454 if (!peer) {
1455 ath10k_warn("received addba event for invalid peer_id: %hu\n",
1456 peer_id);
1457 spin_unlock_bh(&ar->data_lock);
1458 return;
1459 }
1460
1461 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1462 if (!arvif) {
1463 ath10k_warn("received addba event for invalid vdev_id: %u\n",
1464 peer->vdev_id);
1465 spin_unlock_bh(&ar->data_lock);
1466 return;
1467 }
1468
1469 ath10k_dbg(ATH10K_DBG_HTT,
1470 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1471 peer->addr, tid, ev->window_size);
1472
1473 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1474 spin_unlock_bh(&ar->data_lock);
1475}
1476
1477static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1478{
1479 struct htt_rx_delba *ev = &resp->rx_delba;
1480 struct ath10k_peer *peer;
1481 struct ath10k_vif *arvif;
1482 u16 info0, tid, peer_id;
1483
1484 info0 = __le16_to_cpu(ev->info0);
1485 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1486 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1487
1488 ath10k_dbg(ATH10K_DBG_HTT,
1489 "htt rx delba tid %hu peer_id %hu\n",
1490 tid, peer_id);
1491
1492 spin_lock_bh(&ar->data_lock);
1493 peer = ath10k_peer_find_by_id(ar, peer_id);
1494 if (!peer) {
1495 ath10k_warn("received addba event for invalid peer_id: %hu\n",
1496 peer_id);
1497 spin_unlock_bh(&ar->data_lock);
1498 return;
1499 }
1500
1501 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1502 if (!arvif) {
1503 ath10k_warn("received addba event for invalid vdev_id: %u\n",
1504 peer->vdev_id);
1505 spin_unlock_bh(&ar->data_lock);
1506 return;
1507 }
1508
1509 ath10k_dbg(ATH10K_DBG_HTT,
1510 "htt rx stop rx ba session sta %pM tid %hu\n",
1511 peer->addr, tid);
1512
1513 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1514 spin_unlock_bh(&ar->data_lock);
1515}
1516
Kalle Valo5e3dd152013-06-12 20:52:10 +03001517void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1518{
Michal Kazioredb82362013-07-05 16:15:14 +03001519 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001520 struct htt_resp *resp = (struct htt_resp *)skb->data;
1521
1522 /* confirm alignment */
1523 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1524 ath10k_warn("unaligned htt message, expect trouble\n");
1525
Ben Greear75fb2f92014-02-05 13:58:34 -08001526 ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001527 resp->hdr.msg_type);
1528 switch (resp->hdr.msg_type) {
1529 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1530 htt->target_version_major = resp->ver_resp.major;
1531 htt->target_version_minor = resp->ver_resp.minor;
1532 complete(&htt->target_version_received);
1533 break;
1534 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001535 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001536 spin_lock_bh(&htt->rx_ring.lock);
1537 __skb_queue_tail(&htt->rx_compl_q, skb);
1538 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001539 tasklet_schedule(&htt->txrx_compl_task);
1540 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001541 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1542 struct htt_peer_map_event ev = {
1543 .vdev_id = resp->peer_map.vdev_id,
1544 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1545 };
1546 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1547 ath10k_peer_map_event(htt, &ev);
1548 break;
1549 }
1550 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1551 struct htt_peer_unmap_event ev = {
1552 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1553 };
1554 ath10k_peer_unmap_event(htt, &ev);
1555 break;
1556 }
1557 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1558 struct htt_tx_done tx_done = {};
1559 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1560
1561 tx_done.msdu_id =
1562 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1563
1564 switch (status) {
1565 case HTT_MGMT_TX_STATUS_OK:
1566 break;
1567 case HTT_MGMT_TX_STATUS_RETRY:
1568 tx_done.no_ack = true;
1569 break;
1570 case HTT_MGMT_TX_STATUS_DROP:
1571 tx_done.discard = true;
1572 break;
1573 }
1574
Michal Kazior6c5151a2014-02-27 18:50:04 +02001575 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001576 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001577 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001578 break;
1579 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001580 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1581 spin_lock_bh(&htt->tx_lock);
1582 __skb_queue_tail(&htt->tx_compl_q, skb);
1583 spin_unlock_bh(&htt->tx_lock);
1584 tasklet_schedule(&htt->txrx_compl_task);
1585 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001586 case HTT_T2H_MSG_TYPE_SEC_IND: {
1587 struct ath10k *ar = htt->ar;
1588 struct htt_security_indication *ev = &resp->security_indication;
1589
1590 ath10k_dbg(ATH10K_DBG_HTT,
1591 "sec ind peer_id %d unicast %d type %d\n",
1592 __le16_to_cpu(ev->peer_id),
1593 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1594 MS(ev->flags, HTT_SECURITY_TYPE));
1595 complete(&ar->install_key_done);
1596 break;
1597 }
1598 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
1599 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1600 skb->data, skb->len);
1601 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1602 break;
1603 }
1604 case HTT_T2H_MSG_TYPE_TEST:
1605 /* FIX THIS */
1606 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001607 case HTT_T2H_MSG_TYPE_STATS_CONF:
Kalle Valoa9bf0502013-09-03 11:43:55 +03001608 trace_ath10k_htt_stats(skb->data, skb->len);
1609 break;
1610 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001611 /* Firmware can return tx frames if it's unable to fully
1612 * process them and suspects host may be able to fix it. ath10k
1613 * sends all tx frames as already inspected so this shouldn't
1614 * happen unless fw has a bug.
1615 */
1616 ath10k_warn("received an unexpected htt tx inspect event\n");
1617 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001618 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001619 ath10k_htt_rx_addba(ar, resp);
1620 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001621 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001622 ath10k_htt_rx_delba(ar, resp);
1623 break;
1624 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1625 /* Ignore this event because mac80211 takes care of Rx
1626 * aggregation reordering.
1627 */
1628 break;
1629 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001630 default:
1631 ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
1632 resp->hdr.msg_type);
1633 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1634 skb->data, skb->len);
1635 break;
1636 };
1637
1638 /* Free the indication buffer */
1639 dev_kfree_skb_any(skb);
1640}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001641
1642static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1643{
1644 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1645 struct htt_resp *resp;
1646 struct sk_buff *skb;
1647
Michal Kazior45967082014-02-27 18:50:05 +02001648 spin_lock_bh(&htt->tx_lock);
1649 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001650 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1651 dev_kfree_skb_any(skb);
1652 }
Michal Kazior45967082014-02-27 18:50:05 +02001653 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001654
Michal Kazior45967082014-02-27 18:50:05 +02001655 spin_lock_bh(&htt->rx_ring.lock);
1656 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001657 resp = (struct htt_resp *)skb->data;
1658 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1659 dev_kfree_skb_any(skb);
1660 }
Michal Kazior45967082014-02-27 18:50:05 +02001661 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001662}