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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +000017menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +000023config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
Robin Murphyffcb6d12015-09-17 17:42:16 +010026 depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST)
Will Deacone1d3c0f2014-11-14 17:18:23 +000027 help
28 Enable support for the ARM long descriptor pagetable format.
29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
30 sizes at both stage-1 and stage-2, as well as address spaces
31 up to 48-bits in size.
32
Will Deaconfe4b9912014-11-17 23:31:12 +000033config IOMMU_IO_PGTABLE_LPAE_SELFTEST
34 bool "LPAE selftests"
35 depends on IOMMU_IO_PGTABLE_LPAE
36 help
37 Enable self-tests for LPAE page table allocator. This performs
38 a series of page-table consistency checks during boot.
39
40 If unsure, say N here.
41
Will Deaconfdb1d7b2014-11-14 17:16:49 +000042endmenu
43
Robin Murphy114150d2015-01-12 17:51:13 +000044config IOMMU_IOVA
Sakari Ailus15bbdec2015-07-13 14:31:30 +030045 tristate
Robin Murphy114150d2015-01-12 17:51:13 +000046
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030047config OF_IOMMU
48 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010049 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030050
Robin Murphy0db2e5d2015-10-01 20:13:58 +010051# IOMMU-agnostic DMA-mapping layer
52config IOMMU_DMA
53 bool
54 depends on NEED_SG_DMA_LENGTH
55 select IOMMU_API
56 select IOMMU_IOVA
57
Varun Sethi695093e2013-07-15 10:20:57 +053058config FSL_PAMU
59 bool "Freescale IOMMU support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010060 depends on PPC32
61 depends on PPC_E500MC || COMPILE_TEST
Varun Sethi695093e2013-07-15 10:20:57 +053062 select IOMMU_API
63 select GENERIC_ALLOCATOR
64 help
65 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
66 PAMU can authorize memory access, remap the memory address, and remap I/O
67 transaction types.
68
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030069# MSM IOMMU support
70config MSM_IOMMU
71 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010072 depends on ARM
73 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Thierry Redinga3f447a2015-02-06 11:44:08 +010074 depends on BROKEN
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030075 select IOMMU_API
76 help
77 Support for the IOMMUs found on certain Qualcomm SOCs.
78 These IOMMUs allow virtualization of the address space used by most
79 cores within the multimedia subsystem.
80
81 If unsure, say N here.
82
83config IOMMU_PGTABLES_L2
84 def_bool y
85 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030086
87# AMD IOMMU support
88config AMD_IOMMU
89 bool "AMD IOMMU support"
90 select SWIOTLB
91 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010092 select PCI_ATS
93 select PCI_PRI
94 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030095 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020096 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030097 ---help---
98 With this option you can enable support for AMD IOMMU hardware in
99 your system. An IOMMU is a hardware component which provides
100 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +0900101 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +0300102 system from misbehaving device drivers or hardware.
103
104 You can find out if your system has an AMD IOMMU if you look into
105 your BIOS for an option to enable it or if you have an IVRS ACPI
106 table.
107
108config AMD_IOMMU_STATS
109 bool "Export AMD IOMMU statistics to debugfs"
110 depends on AMD_IOMMU
111 select DEBUG_FS
112 ---help---
113 This option enables code in the AMD IOMMU driver to collect various
114 statistics about whats happening in the driver and exports that
115 information to userspace via debugfs.
116 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300117
Joerg Roedele3c495c2011-11-09 12:31:15 +0100118config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800119 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200120 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100121 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100122 ---help---
123 This option enables support for the AMD IOMMUv2 features of the IOMMU
124 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900125 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100126
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300127# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700128config DMAR_TABLE
129 bool
130
131config INTEL_IOMMU
132 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300133 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
134 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000135 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -0700136 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300137 help
138 DMA remapping (DMAR) devices support enables independent address
139 translations for Direct Memory Access (DMA) from devices.
140 These DMA remapping devices are reported via ACPI tables
141 and include PCI device scope covered by these DMA
142 remapping devices.
143
David Woodhouse8a94ade2015-03-24 14:54:56 +0000144config INTEL_IOMMU_SVM
145 bool "Support for Shared Virtual Memory with Intel IOMMU"
146 depends on INTEL_IOMMU && X86
David Woodhouseb16d0cb2015-10-12 14:17:37 +0100147 select PCI_PASID
David Woodhouse2f26e0a2015-09-09 11:40:47 +0100148 select MMU_NOTIFIER
David Woodhouse8a94ade2015-03-24 14:54:56 +0000149 help
150 Shared Virtual Memory (SVM) provides a facility for devices
151 to access DMA resources through process address space by
152 means of a Process Address Space ID (PASID).
153
Suresh Siddhad3f13812011-08-23 17:05:25 -0700154config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300155 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700156 prompt "Enable Intel DMA Remapping Devices by default"
157 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300158 help
159 Selecting this option will enable a DMAR device at boot time if
160 one is found. If this option is not selected, DMAR support can
161 be enabled by passing intel_iommu=on to the kernel.
162
Suresh Siddhad3f13812011-08-23 17:05:25 -0700163config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300164 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700165 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300166 ---help---
167 Current Graphics drivers tend to use physical address
168 for DMA and avoid using DMA APIs. Setting this config
169 option permits the IOMMU driver to set a unity map for
170 all the OS-visible memory. Hence the driver can continue
171 to use physical addresses for DMA, at least until this
172 option is removed in the 2.6.32 kernel.
173
Suresh Siddhad3f13812011-08-23 17:05:25 -0700174config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300175 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700176 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300177 ---help---
178 Floppy disk drivers are known to bypass DMA API calls
179 thereby failing to work when IOMMU is enabled. This
180 workaround will setup a 1:1 mapping for the first
181 16MiB to make floppy (an ISA device) work.
182
Suresh Siddhad3f13812011-08-23 17:05:25 -0700183config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800184 bool "Support for Interrupt Remapping"
185 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700186 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300187 ---help---
188 Supports Interrupt remapping for IO-APIC and MSI devices.
189 To use x2apic mode in the CPU's which support x2APIC enhancements or
190 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200191
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300192# OMAP IOMMU support
193config OMAP_IOMMU
194 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100195 depends on ARM && MMU
196 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300197 select IOMMU_API
Gerd Hoffmann06b718c2014-11-11 09:17:00 +0100198 ---help---
199 The OMAP3 media platform drivers depend on iommu support,
200 if you need them say Y here.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300201
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300202config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500203 bool "Export OMAP IOMMU internals in DebugFS"
204 depends on OMAP_IOMMU && DEBUG_FS
205 ---help---
206 Select this to see extensive information about
207 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300208
Suman Anna61c75352014-10-22 17:22:30 -0500209 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300210
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800211config ROCKCHIP_IOMMU
212 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100213 depends on ARM
214 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800215 select IOMMU_API
216 select ARM_DMA_USE_IOMMU
217 help
218 Support for IOMMUs found on Rockchip rk32xx SOCs.
219 These IOMMUs allow virtualization of the address space used by most
220 cores within the multimedia subsystem.
221 Say Y here if you are using a Rockchip SoC that includes an IOMMU
222 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300223
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200224config TEGRA_IOMMU_GART
225 bool "Tegra GART IOMMU Support"
226 depends on ARCH_TEGRA_2x_SOC
227 select IOMMU_API
228 help
229 Enables support for remapping discontiguous physical memory
230 shared with the operating system into contiguous I/O virtual
231 space through the GART (Graphics Address Relocation Table)
232 hardware included on Tegra SoCs.
233
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200234config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200235 bool "NVIDIA Tegra SMMU Support"
236 depends on ARCH_TEGRA
237 depends on TEGRA_AHB
238 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200239 select IOMMU_API
240 help
Thierry Reding89184652014-04-16 09:24:44 +0200241 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
Thierry Reding588c43a2015-03-23 10:45:12 +0100242 SoCs (Tegra30 up to Tegra210).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200243
KyongHo Cho2a965362012-05-12 05:56:09 +0900244config EXYNOS_IOMMU
245 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100246 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900247 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530248 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900249 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530250 Support for the IOMMU (System MMU) of Samsung Exynos application
251 processor family. This enables H/W multimedia accelerators to see
252 non-linear physical memory chunks as linear memory in their
253 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900254
255 If unsure, say N here.
256
257config EXYNOS_IOMMU_DEBUG
258 bool "Debugging log for Exynos IOMMU"
259 depends on EXYNOS_IOMMU
260 help
261 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530262 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900263
Sachin Kamat5455d702014-05-22 09:50:55 +0530264 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900265
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900266config SHMOBILE_IPMMU
267 bool
268
269config SHMOBILE_IPMMU_TLB
270 bool
271
272config SHMOBILE_IOMMU
273 bool "IOMMU for Renesas IPMMU/IPMMUI"
274 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100275 depends on ARM && MMU
Paul Bolleb8354432014-02-08 22:21:54 +0100276 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900277 select IOMMU_API
278 select ARM_DMA_USE_IOMMU
279 select SHMOBILE_IPMMU
280 select SHMOBILE_IPMMU_TLB
281 help
282 Support for Renesas IPMMU/IPMMUI. This option enables
283 remapping of DMA memory accesses from all of the IP blocks
284 on the ICB.
285
286 Warning: Drivers (including userspace drivers of UIO
287 devices) of the IP blocks on the ICB *must* use addresses
288 allocated from the IPMMU (iova) for DMA with this option
289 enabled.
290
291 If unsure, say N.
292
293choice
294 prompt "IPMMU/IPMMUI address space size"
295 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
296 depends on SHMOBILE_IOMMU
297 help
298 This option sets IPMMU/IPMMUI address space size by
299 adjusting the 1st level page table size. The page table size
300 is calculated as follows:
301
302 page table size = number of page table entries * 4 bytes
303 number of page table entries = address space size / 1 MiB
304
305 For example, when the address space size is 2048 MiB, the
306 1st level page table size is 8192 bytes.
307
308 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
309 bool "2 GiB"
310
311 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
312 bool "1 GiB"
313
314 config SHMOBILE_IOMMU_ADDRSIZE_512MB
315 bool "512 MiB"
316
317 config SHMOBILE_IOMMU_ADDRSIZE_256MB
318 bool "256 MiB"
319
320 config SHMOBILE_IOMMU_ADDRSIZE_128MB
321 bool "128 MiB"
322
323 config SHMOBILE_IOMMU_ADDRSIZE_64MB
324 bool "64 MiB"
325
326 config SHMOBILE_IOMMU_ADDRSIZE_32MB
327 bool "32 MiB"
328
329endchoice
330
331config SHMOBILE_IOMMU_L1SIZE
332 int
333 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
334 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
335 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
336 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
337 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
338 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
339 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
340
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200341config IPMMU_VMSA
342 bool "Renesas VMSA-compatible IPMMU"
343 depends on ARM_LPAE
344 depends on ARCH_SHMOBILE || COMPILE_TEST
345 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200346 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200347 select ARM_DMA_USE_IOMMU
348 help
349 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
350 R-Mobile APE6 and R-Car H2/M2 SoCs.
351
352 If unsure, say N.
353
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000354config SPAPR_TCE_IOMMU
355 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000356 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000357 select IOMMU_API
358 help
359 Enables bits of IOMMU API required by VFIO. The iommu_ops
360 is not implemented as it is not necessary for VFIO.
361
Will Deacon48ec83b2015-05-27 17:25:59 +0100362# ARM IOMMU support
Will Deacon45ae7cf2013-06-24 18:31:25 +0100363config ARM_SMMU
364 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100365 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100366 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000367 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100368 select ARM_DMA_USE_IOMMU if ARM
369 help
370 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000371 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100372
373 Say Y here if your SoC includes an IOMMU device implementing
374 the ARM SMMU architecture.
375
Will Deacon48ec83b2015-05-27 17:25:59 +0100376config ARM_SMMU_V3
377 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
378 depends on ARM64 && PCI
379 select IOMMU_API
380 select IOMMU_IO_PGTABLE_LPAE
Marc Zyngier166bdbd2015-10-13 18:32:30 +0100381 select GENERIC_MSI_IRQ_DOMAIN
Will Deacon48ec83b2015-05-27 17:25:59 +0100382 help
383 Support for implementations of the ARM System MMU architecture
384 version 3 providing translation support to a PCIe root complex.
385
386 Say Y here if your system includes an IOMMU device implementing
387 the ARM SMMUv3 architecture.
388
Gerald Schaefer8128f23c2015-08-27 15:33:03 +0200389config S390_IOMMU
390 def_bool y if S390 && PCI
391 depends on S390 && PCI
392 select IOMMU_API
393 help
394 Support for the IOMMU API for s390 PCI devices.
395
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300396endif # IOMMU_SUPPORT