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Sergei Shtylyovf138e542015-10-01 02:02:27 +03001/*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r8a7791.dtsi"
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030013#include <dt-bindings/gpio/gpio.h>
Sergei Shtylyovf138e542015-10-01 02:02:27 +030014
15/ {
16 model = "Porter";
17 compatible = "renesas,porter", "renesas,r8a7791";
18
19 aliases {
20 serial0 = &scif0;
21 };
22
23 chosen {
Sergei Shtylyov08770982015-10-06 01:51:01 +030024 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
Geert Uytterhoevenbf204762015-12-08 18:54:17 +010025 stdout-path = "serial0:115200n8";
Sergei Shtylyovf138e542015-10-01 02:02:27 +030026 };
27
28 memory@40000000 {
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
31 };
32
33 memory@200000000 {
34 device_type = "memory";
35 reg = <2 0x00000000 0 0x40000000>;
36 };
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +030037
38 vcc_sdhi0: regulator@0 {
39 compatible = "regulator-fixed";
40
41 regulator-name = "SDHI0 Vcc";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-always-on;
45 };
46
47 vccq_sdhi0: regulator@1 {
48 compatible = "regulator-gpio";
49
50 regulator-name = "SDHI0 VccQ";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <3300000>;
53
54 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
55 gpios-states = <1>;
56 states = <3300000 1
57 1800000 0>;
58 };
59
60 vcc_sdhi2: regulator@2 {
61 compatible = "regulator-fixed";
62
63 regulator-name = "SDHI2 Vcc";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-always-on;
67 };
68
69 vccq_sdhi2: regulator@3 {
70 compatible = "regulator-gpio";
71
72 regulator-name = "SDHI2 VccQ";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <3300000>;
75
76 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
77 gpios-states = <1>;
78 states = <3300000 1
79 1800000 0>;
80 };
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +030081
82 hdmi-out {
83 compatible = "hdmi-connector";
84 type = "a";
85
86 port {
87 hdmi_con: endpoint {
88 remote-endpoint = <&adv7511_out>;
89 };
90 };
91 };
92
93 x3_clk: x3-clock {
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 clock-frequency = <148500000>;
97 };
98
99 x16_clk: x16-clock {
100 compatible = "fixed-clock";
101 #clock-cells = <0>;
102 clock-frequency = <74250000>;
103 };
Sergei Shtylyovf138e542015-10-01 02:02:27 +0300104};
105
106&extal_clk {
107 clock-frequency = <20000000>;
108};
109
110&pfc {
111 scif0_pins: serial0 {
112 renesas,groups = "scif0_data_d";
113 renesas,function = "scif0";
114 };
Sergei Shtylyov08770982015-10-06 01:51:01 +0300115
116 ether_pins: ether {
117 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
118 renesas,function = "eth";
119 };
120
121 phy1_pins: phy1 {
122 renesas,groups = "intc_irq0";
123 renesas,function = "intc";
124 };
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300125
126 sdhi0_pins: sd0 {
127 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
128 renesas,function = "sdhi0";
129 };
130
131 sdhi2_pins: sd2 {
132 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
133 renesas,function = "sdhi2";
134 };
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300135
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300136 qspi_pins: spi0 {
137 renesas,groups = "qspi_ctrl", "qspi_data4";
138 renesas,function = "qspi";
139 };
140
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300141 i2c2_pins: i2c2 {
142 renesas,groups = "i2c2";
143 renesas,function = "i2c2";
144 };
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300145
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300146 usb0_pins: usb0 {
147 renesas,groups = "usb0";
148 renesas,function = "usb0";
149 };
150
151 usb1_pins: usb1 {
152 renesas,groups = "usb1";
153 renesas,function = "usb1";
154 };
155
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300156 vin0_pins: vin0 {
157 renesas,groups = "vin0_data8", "vin0_clk";
158 renesas,function = "vin0";
159 };
Sergei Shtylyov0768fba2015-10-28 00:03:22 +0300160
161 can0_pins: can0 {
162 renesas,groups = "can0_data";
163 renesas,function = "can0";
164 };
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +0300165
166 du_pins: du {
167 renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
168 renesas,function = "du";
169 };
Sergei Shtylyovf138e542015-10-01 02:02:27 +0300170};
171
172&scif0 {
173 pinctrl-0 = <&scif0_pins>;
174 pinctrl-names = "default";
175
176 status = "okay";
177};
Sergei Shtylyov08770982015-10-06 01:51:01 +0300178
179&ether {
180 pinctrl-0 = <&ether_pins &phy1_pins>;
181 pinctrl-names = "default";
182
183 phy-handle = <&phy1>;
184 renesas,ether-link-active-low;
185 status = "ok";
186
187 phy1: ethernet-phy@1 {
188 reg = <1>;
189 interrupt-parent = <&irqc0>;
190 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
191 micrel,led-mode = <1>;
192 };
193};
Sergei Shtylyovb941a5c2015-10-07 02:05:41 +0300194
195&sdhi0 {
196 pinctrl-0 = <&sdhi0_pins>;
197 pinctrl-names = "default";
198
199 vmmc-supply = <&vcc_sdhi0>;
200 vqmmc-supply = <&vccq_sdhi0>;
201 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
202 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
203 status = "okay";
204};
205
206&sdhi2 {
207 pinctrl-0 = <&sdhi2_pins>;
208 pinctrl-names = "default";
209
210 vmmc-supply = <&vcc_sdhi2>;
211 vqmmc-supply = <&vccq_sdhi2>;
212 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
213 status = "okay";
214};
Sergei Shtylyovefbb05c22015-10-08 01:00:06 +0300215
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300216&qspi {
217 pinctrl-0 = <&qspi_pins>;
218 pinctrl-names = "default";
219
220 status = "okay";
221
222 flash@0 {
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300223 compatible = "spansion,s25fl512s", "jedec,spi-nor";
224 reg = <0>;
225 spi-max-frequency = <30000000>;
226 spi-tx-bus-width = <4>;
227 spi-rx-bus-width = <4>;
228 m25p,fast-read;
229
Geert Uytterhoeven26fac0e2015-11-20 11:38:54 -0800230 partitions {
Geert Uytterhoeven947ef622015-12-21 11:33:50 +0100231 compatible = "fixed-partitions";
Geert Uytterhoeven26fac0e2015-11-20 11:38:54 -0800232 #address-cells = <1>;
233 #size-cells = <1>;
234
235 partition@0 {
236 label = "loader_prg";
237 reg = <0x00000000 0x00040000>;
238 read-only;
239 };
240 partition@40000 {
241 label = "user_prg";
242 reg = <0x00040000 0x00400000>;
243 read-only;
244 };
245 partition@440000 {
246 label = "flash_fs";
247 reg = <0x00440000 0x03bc0000>;
248 };
Sergei Shtylyov2685a2c2015-10-10 00:40:31 +0300249 };
250 };
251};
252
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300253&i2c2 {
254 pinctrl-0 = <&i2c2_pins>;
255 pinctrl-names = "default";
256
257 status = "okay";
258 clock-frequency = <400000>;
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300259
260 composite-in@20 {
261 compatible = "adi,adv7180";
262 reg = <0x20>;
263 remote = <&vin0>;
264
265 port {
266 adv7180: endpoint {
267 bus-width = <8>;
268 remote-endpoint = <&vin0ep>;
269 };
270 };
271 };
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +0300272
273 hdmi@39 {
274 compatible = "adi,adv7511w";
275 reg = <0x39>;
276 interrupt-parent = <&gpio3>;
277 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
278
279 adi,input-depth = <8>;
280 adi,input-colorspace = "rgb";
281 adi,input-clock = "1x";
282 adi,input-style = <1>;
283 adi,input-justification = "evenly";
284
285 ports {
286 #address-cells = <1>;
287 #size-cells = <0>;
288
289 port@0 {
290 reg = <0>;
291 adv7511_in: endpoint {
292 remote-endpoint = <&du_out_rgb>;
293 };
294 };
295
296 port@1 {
297 reg = <1>;
298 adv7511_out: endpoint {
299 remote-endpoint = <&hdmi_con>;
300 };
301 };
302 };
303 };
Sergei Shtylyovd6b94032015-10-09 00:44:18 +0300304};
305
Sergei Shtylyovefbb05c22015-10-08 01:00:06 +0300306&sata0 {
307 status = "okay";
308};
Sergei Shtylyov778f2e72015-10-09 00:45:49 +0300309
310/* composite video input */
311&vin0 {
312 status = "ok";
313 pinctrl-0 = <&vin0_pins>;
314 pinctrl-names = "default";
315
316 port {
317 #address-cells = <1>;
318 #size-cells = <0>;
319
320 vin0ep: endpoint {
321 remote-endpoint = <&adv7180>;
322 bus-width = <8>;
323 };
324 };
325};
Sergei Shtylyovf9953c52015-10-10 00:41:26 +0300326
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300327&pci0 {
328 pinctrl-0 = <&usb0_pins>;
329 pinctrl-names = "default";
330
331 status = "okay";
332};
333
334&pci1 {
335 pinctrl-0 = <&usb1_pins>;
336 pinctrl-names = "default";
337
338 status = "okay";
339};
340
Sergei Shtylyovc794f6a2015-10-14 22:35:46 +0300341&hsusb {
342 pinctrl-0 = <&usb0_pins>;
343 pinctrl-names = "default";
344
345 status = "okay";
346 renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
347};
348
Sergei Shtylyov99f74452015-10-13 01:12:18 +0300349&usbphy {
350 status = "okay";
351};
352
Sergei Shtylyovf9953c52015-10-10 00:41:26 +0300353&pcie_bus_clk {
354 status = "okay";
355};
356
357&pciec {
358 status = "okay";
359};
Sergei Shtylyov0768fba2015-10-28 00:03:22 +0300360
361&can0 {
362 pinctrl-0 = <&can0_pins>;
363 pinctrl-names = "default";
364
365 status = "okay";
366};
Sergei Shtylyovc5af8a42015-12-25 01:45:30 +0300367
368&du {
369 pinctrl-0 = <&du_pins>;
370 pinctrl-names = "default";
371 status = "okay";
372
373 clocks = <&mstp7_clks R8A7791_CLK_DU0>,
374 <&mstp7_clks R8A7791_CLK_DU1>,
375 <&mstp7_clks R8A7791_CLK_LVDS0>,
376 <&x3_clk>, <&x16_clk>;
377 clock-names = "du.0", "du.1", "lvds.0",
378 "dclkin.0", "dclkin.1";
379
380 ports {
381 port@1 {
382 endpoint {
383 remote-endpoint = <&adv7511_in>;
384 };
385 };
386 };
387};