blob: 72bde5d1c3581c83b8f010a43af0b3cd539db353 [file] [log] [blame]
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001/*
Vasundhara Volam40263822014-02-12 16:09:07 +05302 * Copyright (C) 2005 - 2014 Emulex
Sathya Perla6b7c5b92009-03-11 23:32:03 -07003 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
Ajit Khaparded2145cd2011-03-16 08:20:46 +000011 * linux-drivers@emulex.com
Sathya Perla6b7c5b92009-03-11 23:32:03 -070012 *
Ajit Khaparded2145cd2011-03-16 08:20:46 +000013 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
Sathya Perla6b7c5b92009-03-11 23:32:03 -070016 */
17
Parav Pandit6a4ab662012-03-26 14:27:12 +000018#include <linux/module.h>
Sathya Perla6b7c5b92009-03-11 23:32:03 -070019#include "be.h"
Sathya Perla8788fdc2009-07-27 22:52:03 +000020#include "be_cmds.h"
Sathya Perla6b7c5b92009-03-11 23:32:03 -070021
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +000022static struct be_cmd_priv_map cmd_priv_map[] = {
23 {
24 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG,
25 CMD_SUBSYSTEM_ETH,
26 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
27 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
28 },
29 {
30 OPCODE_COMMON_GET_FLOW_CONTROL,
31 CMD_SUBSYSTEM_COMMON,
32 BE_PRIV_LNKQUERY | BE_PRIV_VHADM |
33 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
34 },
35 {
36 OPCODE_COMMON_SET_FLOW_CONTROL,
37 CMD_SUBSYSTEM_COMMON,
38 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
39 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
40 },
41 {
42 OPCODE_ETH_GET_PPORT_STATS,
43 CMD_SUBSYSTEM_ETH,
44 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
45 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
46 },
47 {
48 OPCODE_COMMON_GET_PHY_DETAILS,
49 CMD_SUBSYSTEM_COMMON,
50 BE_PRIV_LNKMGMT | BE_PRIV_VHADM |
51 BE_PRIV_DEVCFG | BE_PRIV_DEVSEC
52 }
53};
54
55static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode,
56 u8 subsystem)
57{
58 int i;
59 int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map);
60 u32 cmd_privileges = adapter->cmd_privileges;
61
62 for (i = 0; i < num_entries; i++)
63 if (opcode == cmd_priv_map[i].opcode &&
64 subsystem == cmd_priv_map[i].subsystem)
65 if (!(cmd_privileges & cmd_priv_map[i].priv_mask))
66 return false;
67
68 return true;
69}
70
Somnath Kotur3de09452011-09-30 07:25:05 +000071static inline void *embedded_payload(struct be_mcc_wrb *wrb)
72{
73 return wrb->payload.embedded_payload;
74}
Ajit Khaparde609ff3b2011-02-20 11:42:07 +000075
Sathya Perla8788fdc2009-07-27 22:52:03 +000076static void be_mcc_notify(struct be_adapter *adapter)
Sathya Perla5fb379e2009-06-18 00:02:59 +000077{
Sathya Perla8788fdc2009-07-27 22:52:03 +000078 struct be_queue_info *mccq = &adapter->mcc_obj.q;
Sathya Perla5fb379e2009-06-18 00:02:59 +000079 u32 val = 0;
80
Sathya Perla6589ade2011-11-10 19:18:00 +000081 if (be_error(adapter))
Ajit Khaparde7acc2082011-02-11 13:38:17 +000082 return;
Ajit Khaparde7acc2082011-02-11 13:38:17 +000083
Sathya Perla5fb379e2009-06-18 00:02:59 +000084 val |= mccq->id & DB_MCCQ_RING_ID_MASK;
85 val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT;
Sathya Perlaf3eb62d2010-06-29 00:11:17 +000086
87 wmb();
Sathya Perla8788fdc2009-07-27 22:52:03 +000088 iowrite32(val, adapter->db + DB_MCCQ_OFFSET);
Sathya Perla5fb379e2009-06-18 00:02:59 +000089}
90
91/* To check if valid bit is set, check the entire word as we don't know
92 * the endianness of the data (old entry is host endian while a new entry is
93 * little endian) */
Sathya Perlaefd2e402009-07-27 22:53:10 +000094static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl)
Sathya Perla5fb379e2009-06-18 00:02:59 +000095{
Sathya Perla9e9ff4b2013-02-12 23:05:19 +000096 u32 flags;
97
Sathya Perla5fb379e2009-06-18 00:02:59 +000098 if (compl->flags != 0) {
Sathya Perla9e9ff4b2013-02-12 23:05:19 +000099 flags = le32_to_cpu(compl->flags);
100 if (flags & CQE_FLAGS_VALID_MASK) {
101 compl->flags = flags;
102 return true;
103 }
Sathya Perla5fb379e2009-06-18 00:02:59 +0000104 }
Sathya Perla9e9ff4b2013-02-12 23:05:19 +0000105 return false;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000106}
107
108/* Need to reset the entire word that houses the valid bit */
Sathya Perlaefd2e402009-07-27 22:53:10 +0000109static inline void be_mcc_compl_use(struct be_mcc_compl *compl)
Sathya Perla5fb379e2009-06-18 00:02:59 +0000110{
111 compl->flags = 0;
112}
113
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000114static struct be_cmd_resp_hdr *be_decode_resp_hdr(u32 tag0, u32 tag1)
115{
116 unsigned long addr;
117
118 addr = tag1;
119 addr = ((addr << 16) << 16) | tag0;
120 return (void *)addr;
121}
122
Sathya Perla8788fdc2009-07-27 22:52:03 +0000123static int be_mcc_compl_process(struct be_adapter *adapter,
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000124 struct be_mcc_compl *compl)
Sathya Perla5fb379e2009-06-18 00:02:59 +0000125{
126 u16 compl_status, extd_status;
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000127 struct be_cmd_resp_hdr *resp_hdr;
128 u8 opcode = 0, subsystem = 0;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000129
130 /* Just swap the status to host endian; mcc tag is opaquely copied
131 * from mcc_wrb */
132 be_dws_le_to_cpu(compl, 4);
133
134 compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) &
135 CQE_STATUS_COMPL_MASK;
Sarveshwar Bandidd131e72010-05-25 16:16:32 -0700136
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000137 resp_hdr = be_decode_resp_hdr(compl->tag0, compl->tag1);
138
139 if (resp_hdr) {
140 opcode = resp_hdr->opcode;
141 subsystem = resp_hdr->subsystem;
142 }
143
Suresh Reddy5eeff632014-01-06 13:02:24 +0530144 if (opcode == OPCODE_LOWLEVEL_LOOPBACK_TEST &&
145 subsystem == CMD_SUBSYSTEM_LOWLEVEL) {
146 complete(&adapter->et_cmd_compl);
147 return 0;
148 }
149
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000150 if (((opcode == OPCODE_COMMON_WRITE_FLASHROM) ||
151 (opcode == OPCODE_COMMON_WRITE_OBJECT)) &&
152 (subsystem == CMD_SUBSYSTEM_COMMON)) {
Sarveshwar Bandidd131e72010-05-25 16:16:32 -0700153 adapter->flash_status = compl_status;
Suresh Reddy5eeff632014-01-06 13:02:24 +0530154 complete(&adapter->et_cmd_compl);
Sarveshwar Bandidd131e72010-05-25 16:16:32 -0700155 }
156
Sathya Perlab31c50a2009-09-17 10:30:13 -0700157 if (compl_status == MCC_STATUS_SUCCESS) {
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000158 if (((opcode == OPCODE_ETH_GET_STATISTICS) ||
159 (opcode == OPCODE_ETH_GET_PPORT_STATS)) &&
160 (subsystem == CMD_SUBSYSTEM_ETH)) {
Ajit Khaparde89a88ab2011-05-16 07:36:18 +0000161 be_parse_stats(adapter);
Ajit Khapardeb2aebe62011-02-20 11:41:39 +0000162 adapter->stats_cmd_sent = false;
Sathya Perlab31c50a2009-09-17 10:30:13 -0700163 }
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000164 if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES &&
165 subsystem == CMD_SUBSYSTEM_COMMON) {
Somnath Kotur3de09452011-09-30 07:25:05 +0000166 struct be_cmd_resp_get_cntl_addnl_attribs *resp =
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000167 (void *)resp_hdr;
Somnath Kotur3de09452011-09-30 07:25:05 +0000168 adapter->drv_stats.be_on_die_temperature =
169 resp->on_die_temperature;
170 }
Sathya Perla2b3f2912011-06-29 23:32:56 +0000171 } else {
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000172 if (opcode == OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES)
Padmanabh Ratnakar7aeb2152012-07-12 03:56:46 +0000173 adapter->be_get_temp_freq = 0;
Somnath Kotur3de09452011-09-30 07:25:05 +0000174
Sathya Perla2b3f2912011-06-29 23:32:56 +0000175 if (compl_status == MCC_STATUS_NOT_SUPPORTED ||
176 compl_status == MCC_STATUS_ILLEGAL_REQUEST)
177 goto done;
178
179 if (compl_status == MCC_STATUS_UNAUTHORIZED_REQUEST) {
Vasundhara Volam97f1d8c2012-06-13 19:51:44 +0000180 dev_warn(&adapter->pdev->dev,
Vasundhara Volam522609f2012-08-28 20:37:44 +0000181 "VF is not privileged to issue opcode %d-%d\n",
Vasundhara Volam97f1d8c2012-06-13 19:51:44 +0000182 opcode, subsystem);
Sathya Perla2b3f2912011-06-29 23:32:56 +0000183 } else {
184 extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) &
185 CQE_STATUS_EXTD_MASK;
Vasundhara Volam97f1d8c2012-06-13 19:51:44 +0000186 dev_err(&adapter->pdev->dev,
187 "opcode %d-%d failed:status %d-%d\n",
188 opcode, subsystem, compl_status, extd_status);
Ajit Khaparded9d604f2013-09-27 15:17:58 -0500189
190 if (extd_status == MCC_ADDL_STS_INSUFFICIENT_RESOURCES)
191 return extd_status;
Sathya Perla2b3f2912011-06-29 23:32:56 +0000192 }
Sathya Perla5fb379e2009-06-18 00:02:59 +0000193 }
Sathya Perla2b3f2912011-06-29 23:32:56 +0000194done:
Sathya Perlab31c50a2009-09-17 10:30:13 -0700195 return compl_status;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000196}
197
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000198/* Link state evt is a string of bytes; no need for endian swapping */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000199static void be_async_link_state_process(struct be_adapter *adapter,
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000200 struct be_async_event_link_state *evt)
201{
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000202 /* When link status changes, link speed must be re-queried from FW */
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000203 adapter->phy.link_speed = -1;
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000204
Padmanabh Ratnakar2e177a52012-07-18 02:52:15 +0000205 /* Ignore physical link event */
206 if (lancer_chip(adapter) &&
207 !(evt->port_link_status & LOGICAL_LINK_STATUS_MASK))
208 return;
209
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000210 /* For the initial link status do not rely on the ASYNC event as
211 * it may not be received in some cases.
212 */
213 if (adapter->flags & BE_FLAGS_LINK_STATUS_INIT)
214 be_link_status_update(adapter, evt->port_link_status);
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000215}
216
Somnath Koturcc4ce022010-10-21 07:11:14 -0700217/* Grp5 CoS Priority evt */
218static void be_async_grp5_cos_priority_process(struct be_adapter *adapter,
219 struct be_async_event_grp5_cos_priority *evt)
220{
221 if (evt->valid) {
222 adapter->vlan_prio_bmap = evt->available_priority_bmap;
Ajit Khaparde60964dd2011-02-11 13:37:25 +0000223 adapter->recommended_prio &= ~VLAN_PRIO_MASK;
Somnath Koturcc4ce022010-10-21 07:11:14 -0700224 adapter->recommended_prio =
225 evt->reco_default_priority << VLAN_PRIO_SHIFT;
226 }
227}
228
Sathya Perla323ff712012-09-28 04:39:43 +0000229/* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */
Somnath Koturcc4ce022010-10-21 07:11:14 -0700230static void be_async_grp5_qos_speed_process(struct be_adapter *adapter,
231 struct be_async_event_grp5_qos_link_speed *evt)
232{
Sathya Perla323ff712012-09-28 04:39:43 +0000233 if (adapter->phy.link_speed >= 0 &&
234 evt->physical_port == adapter->port_num)
235 adapter->phy.link_speed = le16_to_cpu(evt->qos_link_speed) * 10;
Somnath Koturcc4ce022010-10-21 07:11:14 -0700236}
237
Ajit Khaparde3968fa12011-02-20 11:41:53 +0000238/*Grp5 PVID evt*/
239static void be_async_grp5_pvid_state_process(struct be_adapter *adapter,
240 struct be_async_event_grp5_pvid_state *evt)
241{
242 if (evt->enabled)
Somnath Kotur939cf302011-08-18 21:51:49 -0700243 adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK;
Ajit Khaparde3968fa12011-02-20 11:41:53 +0000244 else
245 adapter->pvid = 0;
246}
247
Somnath Koturcc4ce022010-10-21 07:11:14 -0700248static void be_async_grp5_evt_process(struct be_adapter *adapter,
249 u32 trailer, struct be_mcc_compl *evt)
250{
251 u8 event_type = 0;
252
253 event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) &
254 ASYNC_TRAILER_EVENT_TYPE_MASK;
255
256 switch (event_type) {
257 case ASYNC_EVENT_COS_PRIORITY:
258 be_async_grp5_cos_priority_process(adapter,
259 (struct be_async_event_grp5_cos_priority *)evt);
260 break;
261 case ASYNC_EVENT_QOS_SPEED:
262 be_async_grp5_qos_speed_process(adapter,
263 (struct be_async_event_grp5_qos_link_speed *)evt);
264 break;
Ajit Khaparde3968fa12011-02-20 11:41:53 +0000265 case ASYNC_EVENT_PVID_STATE:
266 be_async_grp5_pvid_state_process(adapter,
267 (struct be_async_event_grp5_pvid_state *)evt);
268 break;
Somnath Koturcc4ce022010-10-21 07:11:14 -0700269 default:
Vasundhara Volam05ccaa22013-08-06 09:27:19 +0530270 dev_warn(&adapter->pdev->dev, "Unknown grp5 event 0x%x!\n",
271 event_type);
Somnath Koturcc4ce022010-10-21 07:11:14 -0700272 break;
273 }
274}
275
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000276static void be_async_dbg_evt_process(struct be_adapter *adapter,
277 u32 trailer, struct be_mcc_compl *cmp)
278{
279 u8 event_type = 0;
280 struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp;
281
282 event_type = (trailer >> ASYNC_TRAILER_EVENT_TYPE_SHIFT) &
283 ASYNC_TRAILER_EVENT_TYPE_MASK;
284
285 switch (event_type) {
286 case ASYNC_DEBUG_EVENT_TYPE_QNQ:
287 if (evt->valid)
288 adapter->qnq_vid = le16_to_cpu(evt->vlan_tag);
289 adapter->flags |= BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
290 break;
291 default:
Vasundhara Volam05ccaa22013-08-06 09:27:19 +0530292 dev_warn(&adapter->pdev->dev, "Unknown debug event 0x%x!\n",
293 event_type);
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000294 break;
295 }
296}
297
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000298static inline bool is_link_state_evt(u32 trailer)
299{
Eric Dumazet807540b2010-09-23 05:40:09 +0000300 return ((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000301 ASYNC_TRAILER_EVENT_CODE_MASK) ==
Eric Dumazet807540b2010-09-23 05:40:09 +0000302 ASYNC_EVENT_CODE_LINK_STATE;
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000303}
Sathya Perla5fb379e2009-06-18 00:02:59 +0000304
Somnath Koturcc4ce022010-10-21 07:11:14 -0700305static inline bool is_grp5_evt(u32 trailer)
306{
307 return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
308 ASYNC_TRAILER_EVENT_CODE_MASK) ==
309 ASYNC_EVENT_CODE_GRP_5);
310}
311
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000312static inline bool is_dbg_evt(u32 trailer)
313{
314 return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
315 ASYNC_TRAILER_EVENT_CODE_MASK) ==
316 ASYNC_EVENT_CODE_QNQ);
317}
318
Sathya Perlaefd2e402009-07-27 22:53:10 +0000319static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter)
Sathya Perla5fb379e2009-06-18 00:02:59 +0000320{
Sathya Perla8788fdc2009-07-27 22:52:03 +0000321 struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq;
Sathya Perlaefd2e402009-07-27 22:53:10 +0000322 struct be_mcc_compl *compl = queue_tail_node(mcc_cq);
Sathya Perla5fb379e2009-06-18 00:02:59 +0000323
324 if (be_mcc_compl_is_new(compl)) {
325 queue_tail_inc(mcc_cq);
326 return compl;
327 }
328 return NULL;
329}
330
Sathya Perla7a1e9b22010-02-17 01:35:11 +0000331void be_async_mcc_enable(struct be_adapter *adapter)
332{
333 spin_lock_bh(&adapter->mcc_cq_lock);
334
335 be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, 0);
336 adapter->mcc_obj.rearm_cq = true;
337
338 spin_unlock_bh(&adapter->mcc_cq_lock);
339}
340
341void be_async_mcc_disable(struct be_adapter *adapter)
342{
Sathya Perlaa323d9b2012-12-17 19:38:50 +0000343 spin_lock_bh(&adapter->mcc_cq_lock);
344
Sathya Perla7a1e9b22010-02-17 01:35:11 +0000345 adapter->mcc_obj.rearm_cq = false;
Sathya Perlaa323d9b2012-12-17 19:38:50 +0000346 be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0);
347
348 spin_unlock_bh(&adapter->mcc_cq_lock);
Sathya Perla7a1e9b22010-02-17 01:35:11 +0000349}
350
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000351int be_process_mcc(struct be_adapter *adapter)
Sathya Perla5fb379e2009-06-18 00:02:59 +0000352{
Sathya Perlaefd2e402009-07-27 22:53:10 +0000353 struct be_mcc_compl *compl;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000354 int num = 0, status = 0;
Sathya Perla7a1e9b22010-02-17 01:35:11 +0000355 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000356
Amerigo Wang072a9c42012-08-24 21:41:11 +0000357 spin_lock(&adapter->mcc_cq_lock);
Sathya Perla8788fdc2009-07-27 22:52:03 +0000358 while ((compl = be_mcc_compl_get(adapter))) {
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000359 if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
360 /* Interpret flags as an async trailer */
Ajit Khaparde323f30b2010-09-03 06:24:13 +0000361 if (is_link_state_evt(compl->flags))
362 be_async_link_state_process(adapter,
Sathya Perlaa8f447bd2009-06-18 00:10:27 +0000363 (struct be_async_event_link_state *) compl);
Somnath Koturcc4ce022010-10-21 07:11:14 -0700364 else if (is_grp5_evt(compl->flags))
365 be_async_grp5_evt_process(adapter,
366 compl->flags, compl);
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000367 else if (is_dbg_evt(compl->flags))
368 be_async_dbg_evt_process(adapter,
369 compl->flags, compl);
Sathya Perlab31c50a2009-09-17 10:30:13 -0700370 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) {
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000371 status = be_mcc_compl_process(adapter, compl);
Sathya Perla7a1e9b22010-02-17 01:35:11 +0000372 atomic_dec(&mcc_obj->q.used);
Sathya Perla5fb379e2009-06-18 00:02:59 +0000373 }
374 be_mcc_compl_use(compl);
375 num++;
376 }
Sathya Perlab31c50a2009-09-17 10:30:13 -0700377
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000378 if (num)
379 be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num);
380
Amerigo Wang072a9c42012-08-24 21:41:11 +0000381 spin_unlock(&adapter->mcc_cq_lock);
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000382 return status;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000383}
384
Sathya Perla6ac7b682009-06-18 00:05:54 +0000385/* Wait till no more pending mcc requests are present */
Sathya Perlab31c50a2009-09-17 10:30:13 -0700386static int be_mcc_wait_compl(struct be_adapter *adapter)
Sathya Perla6ac7b682009-06-18 00:05:54 +0000387{
Sathya Perlab31c50a2009-09-17 10:30:13 -0700388#define mcc_timeout 120000 /* 12s timeout */
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000389 int i, status = 0;
Sathya Perlaf31e50a2010-03-02 03:56:39 -0800390 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
Sathya Perlab31c50a2009-09-17 10:30:13 -0700391
Sathya Perlaf31e50a2010-03-02 03:56:39 -0800392 for (i = 0; i < mcc_timeout; i++) {
Sathya Perla6589ade2011-11-10 19:18:00 +0000393 if (be_error(adapter))
394 return -EIO;
395
Amerigo Wang072a9c42012-08-24 21:41:11 +0000396 local_bh_disable();
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000397 status = be_process_mcc(adapter);
Amerigo Wang072a9c42012-08-24 21:41:11 +0000398 local_bh_enable();
Sathya Perlaf31e50a2010-03-02 03:56:39 -0800399
400 if (atomic_read(&mcc_obj->q.used) == 0)
Sathya Perla6ac7b682009-06-18 00:05:54 +0000401 break;
402 udelay(100);
403 }
Sathya Perlab31c50a2009-09-17 10:30:13 -0700404 if (i == mcc_timeout) {
Sathya Perla6589ade2011-11-10 19:18:00 +0000405 dev_err(&adapter->pdev->dev, "FW not responding\n");
406 adapter->fw_timeout = true;
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000407 return -EIO;
Sathya Perlab31c50a2009-09-17 10:30:13 -0700408 }
Sathya Perlaf31e50a2010-03-02 03:56:39 -0800409 return status;
Sathya Perla6ac7b682009-06-18 00:05:54 +0000410}
411
412/* Notify MCC requests and wait for completion */
Sathya Perlab31c50a2009-09-17 10:30:13 -0700413static int be_mcc_notify_wait(struct be_adapter *adapter)
Sathya Perla6ac7b682009-06-18 00:05:54 +0000414{
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000415 int status;
416 struct be_mcc_wrb *wrb;
417 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
418 u16 index = mcc_obj->q.head;
419 struct be_cmd_resp_hdr *resp;
420
421 index_dec(&index, mcc_obj->q.len);
422 wrb = queue_index_node(&mcc_obj->q, index);
423
424 resp = be_decode_resp_hdr(wrb->tag0, wrb->tag1);
425
Sathya Perla8788fdc2009-07-27 22:52:03 +0000426 be_mcc_notify(adapter);
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000427
428 status = be_mcc_wait_compl(adapter);
429 if (status == -EIO)
430 goto out;
431
432 status = resp->status;
433out:
434 return status;
Sathya Perla6ac7b682009-06-18 00:05:54 +0000435}
436
Sathya Perla5f0b8492009-07-27 22:52:56 +0000437static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700438{
Sathya Perlaf25b03a2010-05-30 23:34:14 +0000439 int msecs = 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700440 u32 ready;
441
442 do {
Sathya Perla6589ade2011-11-10 19:18:00 +0000443 if (be_error(adapter))
444 return -EIO;
445
Sathya Perlacf588472010-02-14 21:22:01 +0000446 ready = ioread32(db);
Sathya Perla434b3642011-11-10 19:17:59 +0000447 if (ready == 0xffffffff)
Sathya Perlacf588472010-02-14 21:22:01 +0000448 return -1;
Sathya Perlacf588472010-02-14 21:22:01 +0000449
450 ready &= MPU_MAILBOX_DB_RDY_MASK;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700451 if (ready)
452 break;
453
Sathya Perlaf25b03a2010-05-30 23:34:14 +0000454 if (msecs > 4000) {
Sathya Perla6589ade2011-11-10 19:18:00 +0000455 dev_err(&adapter->pdev->dev, "FW not responding\n");
456 adapter->fw_timeout = true;
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000457 be_detect_error(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700458 return -1;
459 }
460
Sathya Perla1dbf53a2011-05-12 19:32:16 +0000461 msleep(1);
Sathya Perlaf25b03a2010-05-30 23:34:14 +0000462 msecs++;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700463 } while (true);
464
465 return 0;
466}
467
468/*
469 * Insert the mailbox address into the doorbell in two steps
Sathya Perla5fb379e2009-06-18 00:02:59 +0000470 * Polls on the mbox doorbell till a command completion (or a timeout) occurs
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700471 */
Sathya Perlab31c50a2009-09-17 10:30:13 -0700472static int be_mbox_notify_wait(struct be_adapter *adapter)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700473{
474 int status;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700475 u32 val = 0;
Sathya Perla8788fdc2009-07-27 22:52:03 +0000476 void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET;
477 struct be_dma_mem *mbox_mem = &adapter->mbox_mem;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700478 struct be_mcc_mailbox *mbox = mbox_mem->va;
Sathya Perlaefd2e402009-07-27 22:53:10 +0000479 struct be_mcc_compl *compl = &mbox->compl;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700480
Sathya Perlacf588472010-02-14 21:22:01 +0000481 /* wait for ready to be set */
482 status = be_mbox_db_ready_wait(adapter, db);
483 if (status != 0)
484 return status;
485
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700486 val |= MPU_MAILBOX_DB_HI_MASK;
487 /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
488 val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
489 iowrite32(val, db);
490
491 /* wait for ready to be set */
Sathya Perla5f0b8492009-07-27 22:52:56 +0000492 status = be_mbox_db_ready_wait(adapter, db);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700493 if (status != 0)
494 return status;
495
496 val = 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700497 /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
498 val |= (u32)(mbox_mem->dma >> 4) << 2;
499 iowrite32(val, db);
500
Sathya Perla5f0b8492009-07-27 22:52:56 +0000501 status = be_mbox_db_ready_wait(adapter, db);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700502 if (status != 0)
503 return status;
504
Sathya Perla5fb379e2009-06-18 00:02:59 +0000505 /* A cq entry has been made now */
Sathya Perlaefd2e402009-07-27 22:53:10 +0000506 if (be_mcc_compl_is_new(compl)) {
507 status = be_mcc_compl_process(adapter, &mbox->compl);
508 be_mcc_compl_use(compl);
Sathya Perla5fb379e2009-06-18 00:02:59 +0000509 if (status)
510 return status;
511 } else {
Sathya Perla5f0b8492009-07-27 22:52:56 +0000512 dev_err(&adapter->pdev->dev, "invalid mailbox completion\n");
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700513 return -1;
514 }
Sathya Perla5fb379e2009-06-18 00:02:59 +0000515 return 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700516}
517
Sathya Perlac5b3ad42013-03-05 22:23:20 +0000518static u16 be_POST_stage_get(struct be_adapter *adapter)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700519{
Sathya Perlafe6d2a32010-11-21 23:25:50 +0000520 u32 sem;
521
Sathya Perlac5b3ad42013-03-05 22:23:20 +0000522 if (BEx_chip(adapter))
523 sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700524 else
Sathya Perlac5b3ad42013-03-05 22:23:20 +0000525 pci_read_config_dword(adapter->pdev,
526 SLIPORT_SEMAPHORE_OFFSET_SH, &sem);
527
528 return sem & POST_STAGE_MASK;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700529}
530
Gavin Shan87f20c22013-10-29 17:30:57 +0800531static int lancer_wait_ready(struct be_adapter *adapter)
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000532{
533#define SLIPORT_READY_TIMEOUT 30
534 u32 sliport_status;
535 int status = 0, i;
536
537 for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) {
538 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
539 if (sliport_status & SLIPORT_STATUS_RDY_MASK)
540 break;
541
542 msleep(1000);
543 }
544
545 if (i == SLIPORT_READY_TIMEOUT)
546 status = -1;
547
548 return status;
549}
550
Padmanabh Ratnakar67297ad2012-10-20 06:02:27 +0000551static bool lancer_provisioning_error(struct be_adapter *adapter)
552{
553 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
554 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
555 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
556 sliport_err1 = ioread32(adapter->db +
557 SLIPORT_ERROR1_OFFSET);
558 sliport_err2 = ioread32(adapter->db +
559 SLIPORT_ERROR2_OFFSET);
560
561 if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 &&
562 sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2)
563 return true;
564 }
565 return false;
566}
567
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000568int lancer_test_and_set_rdy_state(struct be_adapter *adapter)
569{
570 int status;
571 u32 sliport_status, err, reset_needed;
Padmanabh Ratnakar67297ad2012-10-20 06:02:27 +0000572 bool resource_error;
573
574 resource_error = lancer_provisioning_error(adapter);
575 if (resource_error)
Somnath Kotur01e5b2c2013-05-29 22:56:17 +0000576 return -EAGAIN;
Padmanabh Ratnakar67297ad2012-10-20 06:02:27 +0000577
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000578 status = lancer_wait_ready(adapter);
579 if (!status) {
580 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
581 err = sliport_status & SLIPORT_STATUS_ERR_MASK;
582 reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK;
583 if (err && reset_needed) {
584 iowrite32(SLI_PORT_CONTROL_IP_MASK,
585 adapter->db + SLIPORT_CONTROL_OFFSET);
586
587 /* check adapter has corrected the error */
588 status = lancer_wait_ready(adapter);
589 sliport_status = ioread32(adapter->db +
590 SLIPORT_STATUS_OFFSET);
591 sliport_status &= (SLIPORT_STATUS_ERR_MASK |
592 SLIPORT_STATUS_RN_MASK);
593 if (status || sliport_status)
594 status = -1;
595 } else if (err || reset_needed) {
596 status = -1;
597 }
598 }
Padmanabh Ratnakar67297ad2012-10-20 06:02:27 +0000599 /* Stop error recovery if error is not recoverable.
600 * No resource error is temporary errors and will go away
601 * when PF provisions resources.
602 */
603 resource_error = lancer_provisioning_error(adapter);
Somnath Kotur01e5b2c2013-05-29 22:56:17 +0000604 if (resource_error)
605 status = -EAGAIN;
Padmanabh Ratnakar67297ad2012-10-20 06:02:27 +0000606
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000607 return status;
608}
609
610int be_fw_wait_ready(struct be_adapter *adapter)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700611{
Sathya Perla43a04fdc2009-10-14 20:21:17 +0000612 u16 stage;
613 int status, timeout = 0;
Sathya Perla6ed35ee2011-05-12 19:32:15 +0000614 struct device *dev = &adapter->pdev->dev;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700615
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000616 if (lancer_chip(adapter)) {
617 status = lancer_wait_ready(adapter);
618 return status;
619 }
620
Sathya Perla43a04fdc2009-10-14 20:21:17 +0000621 do {
Sathya Perlac5b3ad42013-03-05 22:23:20 +0000622 stage = be_POST_stage_get(adapter);
Gavin Shan66d29cb2013-03-03 21:48:46 +0000623 if (stage == POST_STAGE_ARMFW_RDY)
Sathya Perla43a04fdc2009-10-14 20:21:17 +0000624 return 0;
Gavin Shan66d29cb2013-03-03 21:48:46 +0000625
626 dev_info(dev, "Waiting for POST, %ds elapsed\n",
627 timeout);
628 if (msleep_interruptible(2000)) {
629 dev_err(dev, "Waiting for POST aborted\n");
630 return -EINTR;
Sathya Perla43a04fdc2009-10-14 20:21:17 +0000631 }
Gavin Shan66d29cb2013-03-03 21:48:46 +0000632 timeout += 2;
Somnath Kotur3ab81b52011-10-03 08:10:57 +0000633 } while (timeout < 60);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700634
Sathya Perla6ed35ee2011-05-12 19:32:15 +0000635 dev_err(dev, "POST timeout; stage=0x%x\n", stage);
Sathya Perla43a04fdc2009-10-14 20:21:17 +0000636 return -1;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700637}
638
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700639
640static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
641{
642 return &wrb->payload.sgl[0];
643}
644
Sathya Perlabea50982013-08-27 16:57:33 +0530645static inline void fill_wrb_tags(struct be_mcc_wrb *wrb,
646 unsigned long addr)
647{
648 wrb->tag0 = addr & 0xFFFFFFFF;
649 wrb->tag1 = upper_32_bits(addr);
650}
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700651
652/* Don't touch the hdr after it's prepared */
Somnath Kotur106df1e2011-10-27 07:12:13 +0000653/* mem will be NULL for embedded commands */
654static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
655 u8 subsystem, u8 opcode, int cmd_len,
656 struct be_mcc_wrb *wrb, struct be_dma_mem *mem)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700657{
Somnath Kotur106df1e2011-10-27 07:12:13 +0000658 struct be_sge *sge;
659
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700660 req_hdr->opcode = opcode;
661 req_hdr->subsystem = subsystem;
662 req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
Ajit Khaparde07793d32010-02-16 00:18:46 +0000663 req_hdr->version = 0;
Sathya Perlabea50982013-08-27 16:57:33 +0530664 fill_wrb_tags(wrb, (ulong) req_hdr);
Somnath Kotur106df1e2011-10-27 07:12:13 +0000665 wrb->payload_length = cmd_len;
666 if (mem) {
667 wrb->embedded |= (1 & MCC_WRB_SGE_CNT_MASK) <<
668 MCC_WRB_SGE_CNT_SHIFT;
669 sge = nonembedded_sgl(wrb);
670 sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma));
671 sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF);
672 sge->len = cpu_to_le32(mem->size);
673 } else
674 wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
675 be_dws_cpu_to_le(wrb, 8);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700676}
677
678static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
679 struct be_dma_mem *mem)
680{
681 int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
682 u64 dma = (u64)mem->dma;
683
684 for (i = 0; i < buf_pages; i++) {
685 pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
686 pages[i].hi = cpu_to_le32(upper_32_bits(dma));
687 dma += PAGE_SIZE_4K;
688 }
689}
690
Sathya Perlab31c50a2009-09-17 10:30:13 -0700691static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700692{
Sathya Perlab31c50a2009-09-17 10:30:13 -0700693 struct be_dma_mem *mbox_mem = &adapter->mbox_mem;
694 struct be_mcc_wrb *wrb
695 = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
696 memset(wrb, 0, sizeof(*wrb));
697 return wrb;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700698}
699
Sathya Perlab31c50a2009-09-17 10:30:13 -0700700static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter)
Sathya Perla5fb379e2009-06-18 00:02:59 +0000701{
Sathya Perlab31c50a2009-09-17 10:30:13 -0700702 struct be_queue_info *mccq = &adapter->mcc_obj.q;
703 struct be_mcc_wrb *wrb;
704
Padmanabh Ratnakaraa790db2012-10-20 06:03:25 +0000705 if (!mccq->created)
706 return NULL;
707
Vasundhara Volam4d277122013-04-21 23:28:15 +0000708 if (atomic_read(&mccq->used) >= mccq->len)
Sathya Perla713d03942009-11-22 22:02:45 +0000709 return NULL;
Sathya Perla713d03942009-11-22 22:02:45 +0000710
Sathya Perlab31c50a2009-09-17 10:30:13 -0700711 wrb = queue_head_node(mccq);
712 queue_head_inc(mccq);
713 atomic_inc(&mccq->used);
714 memset(wrb, 0, sizeof(*wrb));
Sathya Perla5fb379e2009-06-18 00:02:59 +0000715 return wrb;
716}
717
Sathya Perlabea50982013-08-27 16:57:33 +0530718static bool use_mcc(struct be_adapter *adapter)
719{
720 return adapter->mcc_obj.q.created;
721}
722
723/* Must be used only in process context */
724static int be_cmd_lock(struct be_adapter *adapter)
725{
726 if (use_mcc(adapter)) {
727 spin_lock_bh(&adapter->mcc_lock);
728 return 0;
729 } else {
730 return mutex_lock_interruptible(&adapter->mbox_lock);
731 }
732}
733
734/* Must be used only in process context */
735static void be_cmd_unlock(struct be_adapter *adapter)
736{
737 if (use_mcc(adapter))
738 spin_unlock_bh(&adapter->mcc_lock);
739 else
740 return mutex_unlock(&adapter->mbox_lock);
741}
742
743static struct be_mcc_wrb *be_cmd_copy(struct be_adapter *adapter,
744 struct be_mcc_wrb *wrb)
745{
746 struct be_mcc_wrb *dest_wrb;
747
748 if (use_mcc(adapter)) {
749 dest_wrb = wrb_from_mccq(adapter);
750 if (!dest_wrb)
751 return NULL;
752 } else {
753 dest_wrb = wrb_from_mbox(adapter);
754 }
755
756 memcpy(dest_wrb, wrb, sizeof(*wrb));
757 if (wrb->embedded & cpu_to_le32(MCC_WRB_EMBEDDED_MASK))
758 fill_wrb_tags(dest_wrb, (ulong) embedded_payload(wrb));
759
760 return dest_wrb;
761}
762
763/* Must be used only in process context */
764static int be_cmd_notify_wait(struct be_adapter *adapter,
765 struct be_mcc_wrb *wrb)
766{
767 struct be_mcc_wrb *dest_wrb;
768 int status;
769
770 status = be_cmd_lock(adapter);
771 if (status)
772 return status;
773
774 dest_wrb = be_cmd_copy(adapter, wrb);
775 if (!dest_wrb)
776 return -EBUSY;
777
778 if (use_mcc(adapter))
779 status = be_mcc_notify_wait(adapter);
780 else
781 status = be_mbox_notify_wait(adapter);
782
783 if (!status)
784 memcpy(wrb, dest_wrb, sizeof(*wrb));
785
786 be_cmd_unlock(adapter);
787 return status;
788}
789
Sathya Perla2243e2e2009-11-22 22:02:03 +0000790/* Tell fw we're about to start firing cmds by writing a
791 * special pattern across the wrb hdr; uses mbox
792 */
793int be_cmd_fw_init(struct be_adapter *adapter)
794{
795 u8 *wrb;
796 int status;
797
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000798 if (lancer_chip(adapter))
799 return 0;
800
Ivan Vecera29849612010-12-14 05:43:19 +0000801 if (mutex_lock_interruptible(&adapter->mbox_lock))
802 return -1;
Sathya Perla2243e2e2009-11-22 22:02:03 +0000803
804 wrb = (u8 *)wrb_from_mbox(adapter);
Sathya Perla359a9722010-12-01 01:03:36 +0000805 *wrb++ = 0xFF;
806 *wrb++ = 0x12;
807 *wrb++ = 0x34;
808 *wrb++ = 0xFF;
809 *wrb++ = 0xFF;
810 *wrb++ = 0x56;
811 *wrb++ = 0x78;
812 *wrb = 0xFF;
Sathya Perla2243e2e2009-11-22 22:02:03 +0000813
814 status = be_mbox_notify_wait(adapter);
815
Ivan Vecera29849612010-12-14 05:43:19 +0000816 mutex_unlock(&adapter->mbox_lock);
Sathya Perla2243e2e2009-11-22 22:02:03 +0000817 return status;
818}
819
820/* Tell fw we're done with firing cmds by writing a
821 * special pattern across the wrb hdr; uses mbox
822 */
823int be_cmd_fw_clean(struct be_adapter *adapter)
824{
825 u8 *wrb;
826 int status;
827
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000828 if (lancer_chip(adapter))
829 return 0;
830
Ivan Vecera29849612010-12-14 05:43:19 +0000831 if (mutex_lock_interruptible(&adapter->mbox_lock))
832 return -1;
Sathya Perla2243e2e2009-11-22 22:02:03 +0000833
834 wrb = (u8 *)wrb_from_mbox(adapter);
835 *wrb++ = 0xFF;
836 *wrb++ = 0xAA;
837 *wrb++ = 0xBB;
838 *wrb++ = 0xFF;
839 *wrb++ = 0xFF;
840 *wrb++ = 0xCC;
841 *wrb++ = 0xDD;
842 *wrb = 0xFF;
843
844 status = be_mbox_notify_wait(adapter);
845
Ivan Vecera29849612010-12-14 05:43:19 +0000846 mutex_unlock(&adapter->mbox_lock);
Sathya Perla2243e2e2009-11-22 22:02:03 +0000847 return status;
848}
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +0000849
Sathya Perlaf2f781a2013-08-27 16:57:30 +0530850int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700851{
Sathya Perlab31c50a2009-09-17 10:30:13 -0700852 struct be_mcc_wrb *wrb;
853 struct be_cmd_req_eq_create *req;
Sathya Perlaf2f781a2013-08-27 16:57:30 +0530854 struct be_dma_mem *q_mem = &eqo->q.dma_mem;
855 int status, ver = 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700856
Ivan Vecera29849612010-12-14 05:43:19 +0000857 if (mutex_lock_interruptible(&adapter->mbox_lock))
858 return -1;
Sathya Perlab31c50a2009-09-17 10:30:13 -0700859
860 wrb = wrb_from_mbox(adapter);
861 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700862
Somnath Kotur106df1e2011-10-27 07:12:13 +0000863 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
864 OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700865
Sathya Perlaf2f781a2013-08-27 16:57:30 +0530866 /* Support for EQ_CREATEv2 available only SH-R onwards */
867 if (!(BEx_chip(adapter) || lancer_chip(adapter)))
868 ver = 2;
869
870 req->hdr.version = ver;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700871 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
872
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700873 AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
874 /* 4byte eqe*/
875 AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
876 AMAP_SET_BITS(struct amap_eq_context, count, req->context,
Sathya Perlaf2f781a2013-08-27 16:57:30 +0530877 __ilog2_u32(eqo->q.len / 256));
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700878 be_dws_cpu_to_le(req->context, sizeof(req->context));
879
880 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
881
Sathya Perlab31c50a2009-09-17 10:30:13 -0700882 status = be_mbox_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700883 if (!status) {
Sathya Perlab31c50a2009-09-17 10:30:13 -0700884 struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
Sathya Perlaf2f781a2013-08-27 16:57:30 +0530885 eqo->q.id = le16_to_cpu(resp->eq_id);
886 eqo->msix_idx =
887 (ver == 2) ? le16_to_cpu(resp->msix_idx) : eqo->idx;
888 eqo->q.created = true;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700889 }
Sathya Perlab31c50a2009-09-17 10:30:13 -0700890
Ivan Vecera29849612010-12-14 05:43:19 +0000891 mutex_unlock(&adapter->mbox_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700892 return status;
893}
894
Sathya Perlaf9449ab2011-10-24 02:45:01 +0000895/* Use MCC */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000896int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
Sathya Perla5ee49792012-09-28 04:39:41 +0000897 bool permanent, u32 if_handle, u32 pmac_id)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700898{
Sathya Perlab31c50a2009-09-17 10:30:13 -0700899 struct be_mcc_wrb *wrb;
900 struct be_cmd_req_mac_query *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700901 int status;
902
Sathya Perlaf9449ab2011-10-24 02:45:01 +0000903 spin_lock_bh(&adapter->mcc_lock);
Sathya Perlab31c50a2009-09-17 10:30:13 -0700904
Sathya Perlaf9449ab2011-10-24 02:45:01 +0000905 wrb = wrb_from_mccq(adapter);
906 if (!wrb) {
907 status = -EBUSY;
908 goto err;
909 }
Sathya Perlab31c50a2009-09-17 10:30:13 -0700910 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700911
Somnath Kotur106df1e2011-10-27 07:12:13 +0000912 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
913 OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL);
Sathya Perla5ee49792012-09-28 04:39:41 +0000914 req->type = MAC_ADDRESS_TYPE_NETWORK;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700915 if (permanent) {
916 req->permanent = 1;
917 } else {
Sathya Perlab31c50a2009-09-17 10:30:13 -0700918 req->if_id = cpu_to_le16((u16) if_handle);
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +0000919 req->pmac_id = cpu_to_le32(pmac_id);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700920 req->permanent = 0;
921 }
922
Sathya Perlaf9449ab2011-10-24 02:45:01 +0000923 status = be_mcc_notify_wait(adapter);
Sathya Perlab31c50a2009-09-17 10:30:13 -0700924 if (!status) {
925 struct be_cmd_resp_mac_query *resp = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700926 memcpy(mac_addr, resp->mac.addr, ETH_ALEN);
Sathya Perlab31c50a2009-09-17 10:30:13 -0700927 }
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700928
Sathya Perlaf9449ab2011-10-24 02:45:01 +0000929err:
930 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700931 return status;
932}
933
Sathya Perlab31c50a2009-09-17 10:30:13 -0700934/* Uses synchronous MCCQ */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000935int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
Ajit Khapardef8617e02011-02-11 13:36:37 +0000936 u32 if_id, u32 *pmac_id, u32 domain)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700937{
Sathya Perlab31c50a2009-09-17 10:30:13 -0700938 struct be_mcc_wrb *wrb;
939 struct be_cmd_req_pmac_add *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700940 int status;
941
Sathya Perlab31c50a2009-09-17 10:30:13 -0700942 spin_lock_bh(&adapter->mcc_lock);
943
944 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +0000945 if (!wrb) {
946 status = -EBUSY;
947 goto err;
948 }
Sathya Perlab31c50a2009-09-17 10:30:13 -0700949 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700950
Somnath Kotur106df1e2011-10-27 07:12:13 +0000951 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
952 OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700953
Ajit Khapardef8617e02011-02-11 13:36:37 +0000954 req->hdr.domain = domain;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700955 req->if_id = cpu_to_le32(if_id);
956 memcpy(req->mac_address, mac_addr, ETH_ALEN);
957
Sathya Perlab31c50a2009-09-17 10:30:13 -0700958 status = be_mcc_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700959 if (!status) {
960 struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb);
961 *pmac_id = le32_to_cpu(resp->pmac_id);
962 }
963
Sathya Perla713d03942009-11-22 22:02:45 +0000964err:
Sathya Perlab31c50a2009-09-17 10:30:13 -0700965 spin_unlock_bh(&adapter->mcc_lock);
Somnath Koture3a7ae22011-10-27 07:14:05 +0000966
967 if (status == MCC_STATUS_UNAUTHORIZED_REQUEST)
968 status = -EPERM;
969
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700970 return status;
971}
972
Sathya Perlab31c50a2009-09-17 10:30:13 -0700973/* Uses synchronous MCCQ */
Sathya Perla30128032011-11-10 19:17:57 +0000974int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700975{
Sathya Perlab31c50a2009-09-17 10:30:13 -0700976 struct be_mcc_wrb *wrb;
977 struct be_cmd_req_pmac_del *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700978 int status;
979
Sathya Perla30128032011-11-10 19:17:57 +0000980 if (pmac_id == -1)
981 return 0;
982
Sathya Perlab31c50a2009-09-17 10:30:13 -0700983 spin_lock_bh(&adapter->mcc_lock);
984
985 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +0000986 if (!wrb) {
987 status = -EBUSY;
988 goto err;
989 }
Sathya Perlab31c50a2009-09-17 10:30:13 -0700990 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700991
Somnath Kotur106df1e2011-10-27 07:12:13 +0000992 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
993 OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700994
Ajit Khapardef8617e02011-02-11 13:36:37 +0000995 req->hdr.domain = dom;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700996 req->if_id = cpu_to_le32(if_id);
997 req->pmac_id = cpu_to_le32(pmac_id);
998
Sathya Perlab31c50a2009-09-17 10:30:13 -0700999 status = be_mcc_notify_wait(adapter);
1000
Sathya Perla713d03942009-11-22 22:02:45 +00001001err:
Sathya Perlab31c50a2009-09-17 10:30:13 -07001002 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001003 return status;
1004}
1005
Sathya Perlab31c50a2009-09-17 10:30:13 -07001006/* Uses Mbox */
Sathya Perla10ef9ab2012-02-09 18:05:27 +00001007int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
1008 struct be_queue_info *eq, bool no_delay, int coalesce_wm)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001009{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001010 struct be_mcc_wrb *wrb;
1011 struct be_cmd_req_cq_create *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001012 struct be_dma_mem *q_mem = &cq->dma_mem;
Sathya Perlab31c50a2009-09-17 10:30:13 -07001013 void *ctxt;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001014 int status;
1015
Ivan Vecera29849612010-12-14 05:43:19 +00001016 if (mutex_lock_interruptible(&adapter->mbox_lock))
1017 return -1;
Sathya Perlab31c50a2009-09-17 10:30:13 -07001018
1019 wrb = wrb_from_mbox(adapter);
1020 req = embedded_payload(wrb);
1021 ctxt = &req->context;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001022
Somnath Kotur106df1e2011-10-27 07:12:13 +00001023 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1024 OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001025
1026 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
Ajit Khapardebbdc42f2013-05-01 09:37:17 +00001027
1028 if (BEx_chip(adapter)) {
Sathya Perlafe6d2a32010-11-21 23:25:50 +00001029 AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt,
1030 coalesce_wm);
1031 AMAP_SET_BITS(struct amap_cq_context_be, nodelay,
1032 ctxt, no_delay);
1033 AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt,
1034 __ilog2_u32(cq->len/256));
1035 AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1);
Sathya Perlafe6d2a32010-11-21 23:25:50 +00001036 AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1);
1037 AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id);
Ajit Khapardebbdc42f2013-05-01 09:37:17 +00001038 } else {
1039 req->hdr.version = 2;
1040 req->page_size = 1; /* 1 for 4K */
Ajit Khaparde09e83a92013-11-22 12:51:20 -06001041
1042 /* coalesce-wm field in this cmd is not relevant to Lancer.
1043 * Lancer uses COMMON_MODIFY_CQ to set this field
1044 */
1045 if (!lancer_chip(adapter))
1046 AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
1047 ctxt, coalesce_wm);
Ajit Khapardebbdc42f2013-05-01 09:37:17 +00001048 AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt,
1049 no_delay);
1050 AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
1051 __ilog2_u32(cq->len/256));
1052 AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
1053 AMAP_SET_BITS(struct amap_cq_context_v2, eventable,
1054 ctxt, 1);
1055 AMAP_SET_BITS(struct amap_cq_context_v2, eqid,
1056 ctxt, eq->id);
Sathya Perlafe6d2a32010-11-21 23:25:50 +00001057 }
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001058
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001059 be_dws_cpu_to_le(ctxt, sizeof(req->context));
1060
1061 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1062
Sathya Perlab31c50a2009-09-17 10:30:13 -07001063 status = be_mbox_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001064 if (!status) {
Sathya Perlab31c50a2009-09-17 10:30:13 -07001065 struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001066 cq->id = le16_to_cpu(resp->cq_id);
1067 cq->created = true;
1068 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001069
Ivan Vecera29849612010-12-14 05:43:19 +00001070 mutex_unlock(&adapter->mbox_lock);
Sathya Perla5fb379e2009-06-18 00:02:59 +00001071
1072 return status;
1073}
1074
1075static u32 be_encoded_q_len(int q_len)
1076{
1077 u32 len_encoded = fls(q_len); /* log2(len) + 1 */
1078 if (len_encoded == 16)
1079 len_encoded = 0;
1080 return len_encoded;
1081}
1082
Jingoo Han4188e7d2013-08-05 18:02:02 +09001083static int be_cmd_mccq_ext_create(struct be_adapter *adapter,
1084 struct be_queue_info *mccq,
1085 struct be_queue_info *cq)
Sathya Perla5fb379e2009-06-18 00:02:59 +00001086{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001087 struct be_mcc_wrb *wrb;
Somnath Kotur34b1ef02011-06-01 00:33:22 +00001088 struct be_cmd_req_mcc_ext_create *req;
Sathya Perla5fb379e2009-06-18 00:02:59 +00001089 struct be_dma_mem *q_mem = &mccq->dma_mem;
Sathya Perlab31c50a2009-09-17 10:30:13 -07001090 void *ctxt;
Sathya Perla5fb379e2009-06-18 00:02:59 +00001091 int status;
1092
Ivan Vecera29849612010-12-14 05:43:19 +00001093 if (mutex_lock_interruptible(&adapter->mbox_lock))
1094 return -1;
Sathya Perlab31c50a2009-09-17 10:30:13 -07001095
1096 wrb = wrb_from_mbox(adapter);
1097 req = embedded_payload(wrb);
1098 ctxt = &req->context;
Sathya Perla5fb379e2009-06-18 00:02:59 +00001099
Somnath Kotur106df1e2011-10-27 07:12:13 +00001100 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1101 OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL);
Sathya Perla5fb379e2009-06-18 00:02:59 +00001102
Ajit Khaparded4a2ac32010-03-11 01:35:59 +00001103 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
Vasundhara Volam666d39c2014-01-15 13:23:31 +05301104 if (BEx_chip(adapter)) {
Sathya Perlafe6d2a32010-11-21 23:25:50 +00001105 AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1);
1106 AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt,
1107 be_encoded_q_len(mccq->len));
1108 AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id);
Vasundhara Volam666d39c2014-01-15 13:23:31 +05301109 } else {
1110 req->hdr.version = 1;
1111 req->cq_id = cpu_to_le16(cq->id);
1112
1113 AMAP_SET_BITS(struct amap_mcc_context_v1, ring_size, ctxt,
1114 be_encoded_q_len(mccq->len));
1115 AMAP_SET_BITS(struct amap_mcc_context_v1, valid, ctxt, 1);
1116 AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_id,
1117 ctxt, cq->id);
1118 AMAP_SET_BITS(struct amap_mcc_context_v1, async_cq_valid,
1119 ctxt, 1);
Sathya Perlafe6d2a32010-11-21 23:25:50 +00001120 }
1121
Somnath Koturcc4ce022010-10-21 07:11:14 -07001122 /* Subscribe to Link State and Group 5 Events(bits 1 and 5 set) */
Sathya Perlafe6d2a32010-11-21 23:25:50 +00001123 req->async_event_bitmap[0] = cpu_to_le32(0x00000022);
Ajit Khapardebc0c3402013-04-24 11:52:50 +00001124 req->async_event_bitmap[0] |= cpu_to_le32(1 << ASYNC_EVENT_CODE_QNQ);
Sathya Perla5fb379e2009-06-18 00:02:59 +00001125 be_dws_cpu_to_le(ctxt, sizeof(req->context));
1126
1127 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1128
Sathya Perlab31c50a2009-09-17 10:30:13 -07001129 status = be_mbox_notify_wait(adapter);
Sathya Perla5fb379e2009-06-18 00:02:59 +00001130 if (!status) {
1131 struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb);
1132 mccq->id = le16_to_cpu(resp->id);
1133 mccq->created = true;
1134 }
Ivan Vecera29849612010-12-14 05:43:19 +00001135 mutex_unlock(&adapter->mbox_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001136
1137 return status;
1138}
1139
Jingoo Han4188e7d2013-08-05 18:02:02 +09001140static int be_cmd_mccq_org_create(struct be_adapter *adapter,
1141 struct be_queue_info *mccq,
1142 struct be_queue_info *cq)
Somnath Kotur34b1ef02011-06-01 00:33:22 +00001143{
1144 struct be_mcc_wrb *wrb;
1145 struct be_cmd_req_mcc_create *req;
1146 struct be_dma_mem *q_mem = &mccq->dma_mem;
1147 void *ctxt;
1148 int status;
1149
1150 if (mutex_lock_interruptible(&adapter->mbox_lock))
1151 return -1;
1152
1153 wrb = wrb_from_mbox(adapter);
1154 req = embedded_payload(wrb);
1155 ctxt = &req->context;
1156
Somnath Kotur106df1e2011-10-27 07:12:13 +00001157 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1158 OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL);
Somnath Kotur34b1ef02011-06-01 00:33:22 +00001159
1160 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
1161
1162 AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1);
1163 AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt,
1164 be_encoded_q_len(mccq->len));
1165 AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id);
1166
1167 be_dws_cpu_to_le(ctxt, sizeof(req->context));
1168
1169 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1170
1171 status = be_mbox_notify_wait(adapter);
1172 if (!status) {
1173 struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb);
1174 mccq->id = le16_to_cpu(resp->id);
1175 mccq->created = true;
1176 }
1177
1178 mutex_unlock(&adapter->mbox_lock);
1179 return status;
1180}
1181
1182int be_cmd_mccq_create(struct be_adapter *adapter,
1183 struct be_queue_info *mccq,
1184 struct be_queue_info *cq)
1185{
1186 int status;
1187
1188 status = be_cmd_mccq_ext_create(adapter, mccq, cq);
Vasundhara Volam666d39c2014-01-15 13:23:31 +05301189 if (status && BEx_chip(adapter)) {
Somnath Kotur34b1ef02011-06-01 00:33:22 +00001190 dev_warn(&adapter->pdev->dev, "Upgrade to F/W ver 2.102.235.0 "
1191 "or newer to avoid conflicting priorities between NIC "
1192 "and FCoE traffic");
1193 status = be_cmd_mccq_org_create(adapter, mccq, cq);
1194 }
1195 return status;
1196}
1197
Vasundhara Volam94d73aa2013-04-21 23:28:14 +00001198int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001199{
Sathya Perla77071332013-08-27 16:57:34 +05301200 struct be_mcc_wrb wrb = {0};
Sathya Perlab31c50a2009-09-17 10:30:13 -07001201 struct be_cmd_req_eth_tx_create *req;
Vasundhara Volam94d73aa2013-04-21 23:28:14 +00001202 struct be_queue_info *txq = &txo->q;
1203 struct be_queue_info *cq = &txo->cq;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001204 struct be_dma_mem *q_mem = &txq->dma_mem;
Vasundhara Volam94d73aa2013-04-21 23:28:14 +00001205 int status, ver = 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001206
Sathya Perla77071332013-08-27 16:57:34 +05301207 req = embedded_payload(&wrb);
Somnath Kotur106df1e2011-10-27 07:12:13 +00001208 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
Sathya Perla77071332013-08-27 16:57:34 +05301209 OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001210
Padmanabh Ratnakar8b7756c2011-03-07 03:08:52 +00001211 if (lancer_chip(adapter)) {
1212 req->hdr.version = 1;
Vasundhara Volam94d73aa2013-04-21 23:28:14 +00001213 } else if (BEx_chip(adapter)) {
1214 if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC)
1215 req->hdr.version = 2;
1216 } else { /* For SH */
1217 req->hdr.version = 2;
Padmanabh Ratnakar8b7756c2011-03-07 03:08:52 +00001218 }
1219
Vasundhara Volam81b02652013-10-01 15:59:57 +05301220 if (req->hdr.version > 0)
1221 req->if_id = cpu_to_le16(adapter->if_handle);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001222 req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
1223 req->ulp_num = BE_ULP1_NUM;
1224 req->type = BE_ETH_TX_RING_TYPE_STANDARD;
Vasundhara Volam94d73aa2013-04-21 23:28:14 +00001225 req->cq_id = cpu_to_le16(cq->id);
1226 req->queue_size = be_encoded_q_len(txq->len);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001227 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
Vasundhara Volam94d73aa2013-04-21 23:28:14 +00001228 ver = req->hdr.version;
1229
Sathya Perla77071332013-08-27 16:57:34 +05301230 status = be_cmd_notify_wait(adapter, &wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001231 if (!status) {
Sathya Perla77071332013-08-27 16:57:34 +05301232 struct be_cmd_resp_eth_tx_create *resp = embedded_payload(&wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001233 txq->id = le16_to_cpu(resp->cid);
Vasundhara Volam94d73aa2013-04-21 23:28:14 +00001234 if (ver == 2)
1235 txo->db_offset = le32_to_cpu(resp->db_offset);
1236 else
1237 txo->db_offset = DB_TXULP1_OFFSET;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001238 txq->created = true;
1239 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001240
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001241 return status;
1242}
1243
Sathya Perla482c9e72011-06-29 23:33:17 +00001244/* Uses MCC */
Sathya Perla8788fdc2009-07-27 22:52:03 +00001245int be_cmd_rxq_create(struct be_adapter *adapter,
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001246 struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
Sathya Perla10ef9ab2012-02-09 18:05:27 +00001247 u32 if_id, u32 rss, u8 *rss_id)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001248{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001249 struct be_mcc_wrb *wrb;
1250 struct be_cmd_req_eth_rx_create *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001251 struct be_dma_mem *q_mem = &rxq->dma_mem;
1252 int status;
1253
Sathya Perla482c9e72011-06-29 23:33:17 +00001254 spin_lock_bh(&adapter->mcc_lock);
Sathya Perlab31c50a2009-09-17 10:30:13 -07001255
Sathya Perla482c9e72011-06-29 23:33:17 +00001256 wrb = wrb_from_mccq(adapter);
1257 if (!wrb) {
1258 status = -EBUSY;
1259 goto err;
1260 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001261 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001262
Somnath Kotur106df1e2011-10-27 07:12:13 +00001263 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1264 OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001265
1266 req->cq_id = cpu_to_le16(cq_id);
1267 req->frag_size = fls(frag_size) - 1;
1268 req->num_pages = 2;
1269 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1270 req->interface_id = cpu_to_le32(if_id);
Sathya Perla10ef9ab2012-02-09 18:05:27 +00001271 req->max_frame_size = cpu_to_le16(BE_MAX_JUMBO_FRAME_SIZE);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001272 req->rss_queue = cpu_to_le32(rss);
1273
Sathya Perla482c9e72011-06-29 23:33:17 +00001274 status = be_mcc_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001275 if (!status) {
1276 struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb);
1277 rxq->id = le16_to_cpu(resp->id);
1278 rxq->created = true;
Sathya Perla3abcded2010-10-03 22:12:27 -07001279 *rss_id = resp->rss_id;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001280 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001281
Sathya Perla482c9e72011-06-29 23:33:17 +00001282err:
1283 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001284 return status;
1285}
1286
Sathya Perlab31c50a2009-09-17 10:30:13 -07001287/* Generic destroyer function for all types of queues
1288 * Uses Mbox
1289 */
Sathya Perla8788fdc2009-07-27 22:52:03 +00001290int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001291 int queue_type)
1292{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001293 struct be_mcc_wrb *wrb;
1294 struct be_cmd_req_q_destroy *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001295 u8 subsys = 0, opcode = 0;
1296 int status;
1297
Ivan Vecera29849612010-12-14 05:43:19 +00001298 if (mutex_lock_interruptible(&adapter->mbox_lock))
1299 return -1;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001300
Sathya Perlab31c50a2009-09-17 10:30:13 -07001301 wrb = wrb_from_mbox(adapter);
1302 req = embedded_payload(wrb);
1303
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001304 switch (queue_type) {
1305 case QTYPE_EQ:
1306 subsys = CMD_SUBSYSTEM_COMMON;
1307 opcode = OPCODE_COMMON_EQ_DESTROY;
1308 break;
1309 case QTYPE_CQ:
1310 subsys = CMD_SUBSYSTEM_COMMON;
1311 opcode = OPCODE_COMMON_CQ_DESTROY;
1312 break;
1313 case QTYPE_TXQ:
1314 subsys = CMD_SUBSYSTEM_ETH;
1315 opcode = OPCODE_ETH_TX_DESTROY;
1316 break;
1317 case QTYPE_RXQ:
1318 subsys = CMD_SUBSYSTEM_ETH;
1319 opcode = OPCODE_ETH_RX_DESTROY;
1320 break;
Sathya Perla5fb379e2009-06-18 00:02:59 +00001321 case QTYPE_MCCQ:
1322 subsys = CMD_SUBSYSTEM_COMMON;
1323 opcode = OPCODE_COMMON_MCC_DESTROY;
1324 break;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001325 default:
Sathya Perla5f0b8492009-07-27 22:52:56 +00001326 BUG();
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001327 }
Ajit Khaparded744b442009-12-03 06:12:06 +00001328
Somnath Kotur106df1e2011-10-27 07:12:13 +00001329 be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb,
1330 NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001331 req->id = cpu_to_le16(q->id);
1332
Sathya Perlab31c50a2009-09-17 10:30:13 -07001333 status = be_mbox_notify_wait(adapter);
Padmanabh Ratnakaraa790db2012-10-20 06:03:25 +00001334 q->created = false;
Sathya Perla5f0b8492009-07-27 22:52:56 +00001335
Ivan Vecera29849612010-12-14 05:43:19 +00001336 mutex_unlock(&adapter->mbox_lock);
Sathya Perla482c9e72011-06-29 23:33:17 +00001337 return status;
1338}
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001339
Sathya Perla482c9e72011-06-29 23:33:17 +00001340/* Uses MCC */
1341int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q)
1342{
1343 struct be_mcc_wrb *wrb;
1344 struct be_cmd_req_q_destroy *req;
1345 int status;
1346
1347 spin_lock_bh(&adapter->mcc_lock);
1348
1349 wrb = wrb_from_mccq(adapter);
1350 if (!wrb) {
1351 status = -EBUSY;
1352 goto err;
1353 }
1354 req = embedded_payload(wrb);
1355
Somnath Kotur106df1e2011-10-27 07:12:13 +00001356 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1357 OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL);
Sathya Perla482c9e72011-06-29 23:33:17 +00001358 req->id = cpu_to_le16(q->id);
1359
1360 status = be_mcc_notify_wait(adapter);
Padmanabh Ratnakaraa790db2012-10-20 06:03:25 +00001361 q->created = false;
Sathya Perla482c9e72011-06-29 23:33:17 +00001362
1363err:
1364 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001365 return status;
1366}
1367
Sathya Perlab31c50a2009-09-17 10:30:13 -07001368/* Create an rx filtering policy configuration on an i/f
Sathya Perlabea50982013-08-27 16:57:33 +05301369 * Will use MBOX only if MCCQ has not been created.
Sathya Perlab31c50a2009-09-17 10:30:13 -07001370 */
Sathya Perla73d540f2009-10-14 20:20:42 +00001371int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
Padmanabh Ratnakar1578e772012-06-07 04:37:08 +00001372 u32 *if_handle, u32 domain)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001373{
Sathya Perlabea50982013-08-27 16:57:33 +05301374 struct be_mcc_wrb wrb = {0};
Sathya Perlab31c50a2009-09-17 10:30:13 -07001375 struct be_cmd_req_if_create *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001376 int status;
1377
Sathya Perlabea50982013-08-27 16:57:33 +05301378 req = embedded_payload(&wrb);
Somnath Kotur106df1e2011-10-27 07:12:13 +00001379 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
Sathya Perlabea50982013-08-27 16:57:33 +05301380 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), &wrb, NULL);
Sarveshwar Bandiba343c72010-03-31 02:56:12 +00001381 req->hdr.domain = domain;
Sathya Perla73d540f2009-10-14 20:20:42 +00001382 req->capability_flags = cpu_to_le32(cap_flags);
1383 req->enable_flags = cpu_to_le32(en_flags);
Padmanabh Ratnakar1578e772012-06-07 04:37:08 +00001384 req->pmac_invalid = true;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001385
Sathya Perlabea50982013-08-27 16:57:33 +05301386 status = be_cmd_notify_wait(adapter, &wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001387 if (!status) {
Sathya Perlabea50982013-08-27 16:57:33 +05301388 struct be_cmd_resp_if_create *resp = embedded_payload(&wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001389 *if_handle = le32_to_cpu(resp->interface_id);
Sathya Perlab5bb9772013-07-23 15:25:01 +05301390
1391 /* Hack to retrieve VF's pmac-id on BE3 */
1392 if (BE3_chip(adapter) && !be_physfn(adapter))
1393 adapter->pmac_id[0] = le32_to_cpu(resp->pmac_id);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001394 }
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001395 return status;
1396}
1397
Sathya Perlaf9449ab2011-10-24 02:45:01 +00001398/* Uses MCCQ */
Sathya Perla30128032011-11-10 19:17:57 +00001399int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001400{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001401 struct be_mcc_wrb *wrb;
1402 struct be_cmd_req_if_destroy *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001403 int status;
1404
Sathya Perla30128032011-11-10 19:17:57 +00001405 if (interface_id == -1)
Sathya Perlaf9449ab2011-10-24 02:45:01 +00001406 return 0;
Sathya Perlab31c50a2009-09-17 10:30:13 -07001407
Sathya Perlaf9449ab2011-10-24 02:45:01 +00001408 spin_lock_bh(&adapter->mcc_lock);
1409
1410 wrb = wrb_from_mccq(adapter);
1411 if (!wrb) {
1412 status = -EBUSY;
1413 goto err;
1414 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001415 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001416
Somnath Kotur106df1e2011-10-27 07:12:13 +00001417 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1418 OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL);
Ajit Khaparde658681f2011-02-11 13:34:46 +00001419 req->hdr.domain = domain;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001420 req->interface_id = cpu_to_le32(interface_id);
Sathya Perlab31c50a2009-09-17 10:30:13 -07001421
Sathya Perlaf9449ab2011-10-24 02:45:01 +00001422 status = be_mcc_notify_wait(adapter);
1423err:
1424 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001425 return status;
1426}
1427
1428/* Get stats is a non embedded command: the request is not embedded inside
1429 * WRB but is a separate dma memory block
Sathya Perlab31c50a2009-09-17 10:30:13 -07001430 * Uses asynchronous MCC
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001431 */
Sathya Perla8788fdc2009-07-27 22:52:03 +00001432int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001433{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001434 struct be_mcc_wrb *wrb;
Ajit Khaparde89a88ab2011-05-16 07:36:18 +00001435 struct be_cmd_req_hdr *hdr;
Sathya Perla713d03942009-11-22 22:02:45 +00001436 int status = 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001437
Sathya Perlab31c50a2009-09-17 10:30:13 -07001438 spin_lock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001439
Sathya Perlab31c50a2009-09-17 10:30:13 -07001440 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001441 if (!wrb) {
1442 status = -EBUSY;
1443 goto err;
1444 }
Ajit Khaparde89a88ab2011-05-16 07:36:18 +00001445 hdr = nonemb_cmd->va;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001446
Somnath Kotur106df1e2011-10-27 07:12:13 +00001447 be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH,
1448 OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd);
Ajit Khaparde89a88ab2011-05-16 07:36:18 +00001449
Sathya Perlaca34fe32012-11-06 17:48:56 +00001450 /* version 1 of the cmd is not supported only by BE2 */
Ajit Khaparde61000862013-10-03 16:16:33 -05001451 if (BE2_chip(adapter))
1452 hdr->version = 0;
1453 if (BE3_chip(adapter) || lancer_chip(adapter))
Ajit Khaparde89a88ab2011-05-16 07:36:18 +00001454 hdr->version = 1;
Ajit Khaparde61000862013-10-03 16:16:33 -05001455 else
1456 hdr->version = 2;
Ajit Khaparde89a88ab2011-05-16 07:36:18 +00001457
Sathya Perlab31c50a2009-09-17 10:30:13 -07001458 be_mcc_notify(adapter);
Ajit Khapardeb2aebe62011-02-20 11:41:39 +00001459 adapter->stats_cmd_sent = true;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001460
Sathya Perla713d03942009-11-22 22:02:45 +00001461err:
Sathya Perlab31c50a2009-09-17 10:30:13 -07001462 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla713d03942009-11-22 22:02:45 +00001463 return status;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001464}
1465
Selvin Xavier005d5692011-05-16 07:36:35 +00001466/* Lancer Stats */
1467int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1468 struct be_dma_mem *nonemb_cmd)
1469{
1470
1471 struct be_mcc_wrb *wrb;
1472 struct lancer_cmd_req_pport_stats *req;
Selvin Xavier005d5692011-05-16 07:36:35 +00001473 int status = 0;
1474
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +00001475 if (!be_cmd_allowed(adapter, OPCODE_ETH_GET_PPORT_STATS,
1476 CMD_SUBSYSTEM_ETH))
1477 return -EPERM;
1478
Selvin Xavier005d5692011-05-16 07:36:35 +00001479 spin_lock_bh(&adapter->mcc_lock);
1480
1481 wrb = wrb_from_mccq(adapter);
1482 if (!wrb) {
1483 status = -EBUSY;
1484 goto err;
1485 }
1486 req = nonemb_cmd->va;
Selvin Xavier005d5692011-05-16 07:36:35 +00001487
Somnath Kotur106df1e2011-10-27 07:12:13 +00001488 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1489 OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb,
1490 nonemb_cmd);
Selvin Xavier005d5692011-05-16 07:36:35 +00001491
Padmanabh Ratnakard51ebd32012-04-25 01:46:52 +00001492 req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num);
Selvin Xavier005d5692011-05-16 07:36:35 +00001493 req->cmd_params.params.reset_stats = 0;
1494
Selvin Xavier005d5692011-05-16 07:36:35 +00001495 be_mcc_notify(adapter);
1496 adapter->stats_cmd_sent = true;
1497
1498err:
1499 spin_unlock_bh(&adapter->mcc_lock);
1500 return status;
1501}
1502
Sathya Perla323ff712012-09-28 04:39:43 +00001503static int be_mac_to_link_speed(int mac_speed)
1504{
1505 switch (mac_speed) {
1506 case PHY_LINK_SPEED_ZERO:
1507 return 0;
1508 case PHY_LINK_SPEED_10MBPS:
1509 return 10;
1510 case PHY_LINK_SPEED_100MBPS:
1511 return 100;
1512 case PHY_LINK_SPEED_1GBPS:
1513 return 1000;
1514 case PHY_LINK_SPEED_10GBPS:
1515 return 10000;
Vasundhara Volamb971f842013-08-06 09:27:15 +05301516 case PHY_LINK_SPEED_20GBPS:
1517 return 20000;
1518 case PHY_LINK_SPEED_25GBPS:
1519 return 25000;
1520 case PHY_LINK_SPEED_40GBPS:
1521 return 40000;
Sathya Perla323ff712012-09-28 04:39:43 +00001522 }
1523 return 0;
1524}
1525
1526/* Uses synchronous mcc
1527 * Returns link_speed in Mbps
1528 */
1529int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
1530 u8 *link_status, u32 dom)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001531{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001532 struct be_mcc_wrb *wrb;
1533 struct be_cmd_req_link_status *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001534 int status;
1535
Sathya Perlab31c50a2009-09-17 10:30:13 -07001536 spin_lock_bh(&adapter->mcc_lock);
1537
Ajit Khapardeb236916a2011-12-30 12:15:40 +00001538 if (link_status)
1539 *link_status = LINK_DOWN;
1540
Sathya Perlab31c50a2009-09-17 10:30:13 -07001541 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001542 if (!wrb) {
1543 status = -EBUSY;
1544 goto err;
1545 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001546 req = embedded_payload(wrb);
Sathya Perlaa8f447bd2009-06-18 00:10:27 +00001547
Padmanabh Ratnakar57cd80d2012-02-03 09:49:46 +00001548 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1549 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL);
1550
Sathya Perlaca34fe32012-11-06 17:48:56 +00001551 /* version 1 of the cmd is not supported only by BE2 */
1552 if (!BE2_chip(adapter))
Padmanabh Ratnakardaad6162011-11-16 02:03:45 +00001553 req->hdr.version = 1;
1554
Padmanabh Ratnakar57cd80d2012-02-03 09:49:46 +00001555 req->hdr.domain = dom;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001556
Sathya Perlab31c50a2009-09-17 10:30:13 -07001557 status = be_mcc_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001558 if (!status) {
1559 struct be_cmd_resp_link_status *resp = embedded_payload(wrb);
Sathya Perla323ff712012-09-28 04:39:43 +00001560 if (link_speed) {
1561 *link_speed = resp->link_speed ?
1562 le16_to_cpu(resp->link_speed) * 10 :
1563 be_mac_to_link_speed(resp->mac_speed);
1564
1565 if (!resp->logical_link_status)
1566 *link_speed = 0;
Sarveshwar Bandi0388f252009-10-28 04:15:20 -07001567 }
Ajit Khapardeb236916a2011-12-30 12:15:40 +00001568 if (link_status)
1569 *link_status = resp->logical_link_status;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001570 }
1571
Sathya Perla713d03942009-11-22 22:02:45 +00001572err:
Sathya Perlab31c50a2009-09-17 10:30:13 -07001573 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001574 return status;
1575}
1576
Ajit Khaparde609ff3b2011-02-20 11:42:07 +00001577/* Uses synchronous mcc */
1578int be_cmd_get_die_temperature(struct be_adapter *adapter)
1579{
1580 struct be_mcc_wrb *wrb;
1581 struct be_cmd_req_get_cntl_addnl_attribs *req;
Vasundhara Volam117affe2013-08-06 09:27:20 +05301582 int status = 0;
Ajit Khaparde609ff3b2011-02-20 11:42:07 +00001583
1584 spin_lock_bh(&adapter->mcc_lock);
1585
1586 wrb = wrb_from_mccq(adapter);
1587 if (!wrb) {
1588 status = -EBUSY;
1589 goto err;
1590 }
1591 req = embedded_payload(wrb);
1592
Somnath Kotur106df1e2011-10-27 07:12:13 +00001593 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1594 OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req),
1595 wrb, NULL);
Ajit Khaparde609ff3b2011-02-20 11:42:07 +00001596
Somnath Kotur3de09452011-09-30 07:25:05 +00001597 be_mcc_notify(adapter);
Ajit Khaparde609ff3b2011-02-20 11:42:07 +00001598
1599err:
1600 spin_unlock_bh(&adapter->mcc_lock);
1601 return status;
1602}
1603
Somnath Kotur311fddc2011-03-16 21:22:43 +00001604/* Uses synchronous mcc */
1605int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size)
1606{
1607 struct be_mcc_wrb *wrb;
1608 struct be_cmd_req_get_fat *req;
1609 int status;
1610
1611 spin_lock_bh(&adapter->mcc_lock);
1612
1613 wrb = wrb_from_mccq(adapter);
1614 if (!wrb) {
1615 status = -EBUSY;
1616 goto err;
1617 }
1618 req = embedded_payload(wrb);
1619
Somnath Kotur106df1e2011-10-27 07:12:13 +00001620 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1621 OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL);
Somnath Kotur311fddc2011-03-16 21:22:43 +00001622 req->fat_operation = cpu_to_le32(QUERY_FAT);
1623 status = be_mcc_notify_wait(adapter);
1624 if (!status) {
1625 struct be_cmd_resp_get_fat *resp = embedded_payload(wrb);
1626 if (log_size && resp->log_size)
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001627 *log_size = le32_to_cpu(resp->log_size) -
1628 sizeof(u32);
Somnath Kotur311fddc2011-03-16 21:22:43 +00001629 }
1630err:
1631 spin_unlock_bh(&adapter->mcc_lock);
1632 return status;
1633}
1634
1635void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1636{
1637 struct be_dma_mem get_fat_cmd;
1638 struct be_mcc_wrb *wrb;
1639 struct be_cmd_req_get_fat *req;
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001640 u32 offset = 0, total_size, buf_size,
1641 log_offset = sizeof(u32), payload_len;
Somnath Kotur311fddc2011-03-16 21:22:43 +00001642 int status;
1643
1644 if (buf_len == 0)
1645 return;
1646
1647 total_size = buf_len;
1648
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001649 get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024;
1650 get_fat_cmd.va = pci_alloc_consistent(adapter->pdev,
1651 get_fat_cmd.size,
1652 &get_fat_cmd.dma);
1653 if (!get_fat_cmd.va) {
1654 status = -ENOMEM;
1655 dev_err(&adapter->pdev->dev,
1656 "Memory allocation failure while retrieving FAT data\n");
1657 return;
1658 }
1659
Somnath Kotur311fddc2011-03-16 21:22:43 +00001660 spin_lock_bh(&adapter->mcc_lock);
1661
Somnath Kotur311fddc2011-03-16 21:22:43 +00001662 while (total_size) {
1663 buf_size = min(total_size, (u32)60*1024);
1664 total_size -= buf_size;
1665
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001666 wrb = wrb_from_mccq(adapter);
1667 if (!wrb) {
1668 status = -EBUSY;
Somnath Kotur311fddc2011-03-16 21:22:43 +00001669 goto err;
1670 }
1671 req = get_fat_cmd.va;
Somnath Kotur311fddc2011-03-16 21:22:43 +00001672
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001673 payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size;
Somnath Kotur106df1e2011-10-27 07:12:13 +00001674 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1675 OPCODE_COMMON_MANAGE_FAT, payload_len, wrb,
1676 &get_fat_cmd);
Somnath Kotur311fddc2011-03-16 21:22:43 +00001677
1678 req->fat_operation = cpu_to_le32(RETRIEVE_FAT);
1679 req->read_log_offset = cpu_to_le32(log_offset);
1680 req->read_log_length = cpu_to_le32(buf_size);
1681 req->data_buffer_size = cpu_to_le32(buf_size);
1682
1683 status = be_mcc_notify_wait(adapter);
1684 if (!status) {
1685 struct be_cmd_resp_get_fat *resp = get_fat_cmd.va;
1686 memcpy(buf + offset,
1687 resp->data_buffer,
Somnath Kotur92aa9212011-09-30 07:24:00 +00001688 le32_to_cpu(resp->read_log_length));
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001689 } else {
Somnath Kotur311fddc2011-03-16 21:22:43 +00001690 dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n");
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001691 goto err;
1692 }
Somnath Kotur311fddc2011-03-16 21:22:43 +00001693 offset += buf_size;
1694 log_offset += buf_size;
1695 }
1696err:
Somnath Koturfe2a70e2011-04-21 03:18:12 +00001697 pci_free_consistent(adapter->pdev, get_fat_cmd.size,
1698 get_fat_cmd.va,
1699 get_fat_cmd.dma);
Somnath Kotur311fddc2011-03-16 21:22:43 +00001700 spin_unlock_bh(&adapter->mcc_lock);
1701}
1702
Sathya Perla04b71172011-09-27 13:30:27 -04001703/* Uses synchronous mcc */
1704int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1705 char *fw_on_flash)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001706{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001707 struct be_mcc_wrb *wrb;
1708 struct be_cmd_req_get_fw_version *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001709 int status;
1710
Sathya Perla04b71172011-09-27 13:30:27 -04001711 spin_lock_bh(&adapter->mcc_lock);
Sathya Perlab31c50a2009-09-17 10:30:13 -07001712
Sathya Perla04b71172011-09-27 13:30:27 -04001713 wrb = wrb_from_mccq(adapter);
1714 if (!wrb) {
1715 status = -EBUSY;
1716 goto err;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001717 }
1718
Sathya Perla04b71172011-09-27 13:30:27 -04001719 req = embedded_payload(wrb);
Sathya Perla04b71172011-09-27 13:30:27 -04001720
Somnath Kotur106df1e2011-10-27 07:12:13 +00001721 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1722 OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL);
Sathya Perla04b71172011-09-27 13:30:27 -04001723 status = be_mcc_notify_wait(adapter);
1724 if (!status) {
1725 struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
1726 strcpy(fw_ver, resp->firmware_version_string);
1727 if (fw_on_flash)
1728 strcpy(fw_on_flash, resp->fw_on_flash_version_string);
1729 }
1730err:
1731 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001732 return status;
1733}
1734
Sathya Perlab31c50a2009-09-17 10:30:13 -07001735/* set the EQ delay interval of an EQ to specified value
1736 * Uses async mcc
1737 */
Sathya Perla2632baf2013-10-01 16:00:00 +05301738int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd,
1739 int num)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001740{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001741 struct be_mcc_wrb *wrb;
1742 struct be_cmd_req_modify_eq_delay *req;
Sathya Perla2632baf2013-10-01 16:00:00 +05301743 int status = 0, i;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001744
Sathya Perlab31c50a2009-09-17 10:30:13 -07001745 spin_lock_bh(&adapter->mcc_lock);
1746
1747 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001748 if (!wrb) {
1749 status = -EBUSY;
1750 goto err;
1751 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001752 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001753
Somnath Kotur106df1e2011-10-27 07:12:13 +00001754 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1755 OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001756
Sathya Perla2632baf2013-10-01 16:00:00 +05301757 req->num_eq = cpu_to_le32(num);
1758 for (i = 0; i < num; i++) {
1759 req->set_eqd[i].eq_id = cpu_to_le32(set_eqd[i].eq_id);
1760 req->set_eqd[i].phase = 0;
1761 req->set_eqd[i].delay_multiplier =
1762 cpu_to_le32(set_eqd[i].delay_multiplier);
1763 }
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001764
Sathya Perlab31c50a2009-09-17 10:30:13 -07001765 be_mcc_notify(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001766err:
Sathya Perlab31c50a2009-09-17 10:30:13 -07001767 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla713d03942009-11-22 22:02:45 +00001768 return status;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001769}
1770
Sathya Perlab31c50a2009-09-17 10:30:13 -07001771/* Uses sycnhronous mcc */
Sathya Perla8788fdc2009-07-27 22:52:03 +00001772int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
Ajit Khaparde012bd382013-11-18 10:44:24 -06001773 u32 num, bool promiscuous)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001774{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001775 struct be_mcc_wrb *wrb;
1776 struct be_cmd_req_vlan_config *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001777 int status;
1778
Sathya Perlab31c50a2009-09-17 10:30:13 -07001779 spin_lock_bh(&adapter->mcc_lock);
1780
1781 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001782 if (!wrb) {
1783 status = -EBUSY;
1784 goto err;
1785 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001786 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001787
Somnath Kotur106df1e2011-10-27 07:12:13 +00001788 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1789 OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001790
1791 req->interface_id = if_id;
1792 req->promiscuous = promiscuous;
Ajit Khaparde012bd382013-11-18 10:44:24 -06001793 req->untagged = BE_IF_FLAGS_UNTAGGED & be_if_cap_flags(adapter) ? 1 : 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001794 req->num_vlan = num;
1795 if (!promiscuous) {
1796 memcpy(req->normal_vlan, vtag_array,
1797 req->num_vlan * sizeof(vtag_array[0]));
1798 }
1799
Sathya Perlab31c50a2009-09-17 10:30:13 -07001800 status = be_mcc_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001801
Sathya Perla713d03942009-11-22 22:02:45 +00001802err:
Sathya Perlab31c50a2009-09-17 10:30:13 -07001803 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001804 return status;
1805}
1806
Sathya Perla5b8821b2011-08-02 19:57:44 +00001807int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001808{
Sathya Perla6ac7b682009-06-18 00:05:54 +00001809 struct be_mcc_wrb *wrb;
Sathya Perla5b8821b2011-08-02 19:57:44 +00001810 struct be_dma_mem *mem = &adapter->rx_filter;
1811 struct be_cmd_req_rx_filter *req = mem->va;
Sathya Perlae7b909a2009-11-22 22:01:10 +00001812 int status;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001813
Sathya Perla8788fdc2009-07-27 22:52:03 +00001814 spin_lock_bh(&adapter->mcc_lock);
Sathya Perla6ac7b682009-06-18 00:05:54 +00001815
Sathya Perlab31c50a2009-09-17 10:30:13 -07001816 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001817 if (!wrb) {
1818 status = -EBUSY;
1819 goto err;
1820 }
Sathya Perla5b8821b2011-08-02 19:57:44 +00001821 memset(req, 0, sizeof(*req));
Somnath Kotur106df1e2011-10-27 07:12:13 +00001822 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1823 OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req),
1824 wrb, mem);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001825
Sathya Perla5b8821b2011-08-02 19:57:44 +00001826 req->if_id = cpu_to_le32(adapter->if_handle);
1827 if (flags & IFF_PROMISC) {
1828 req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS |
Ajit Khapardec5dae582013-05-01 09:38:24 +00001829 BE_IF_FLAGS_VLAN_PROMISCUOUS |
1830 BE_IF_FLAGS_MCAST_PROMISCUOUS);
Sathya Perla5b8821b2011-08-02 19:57:44 +00001831 if (value == ON)
1832 req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS |
Ajit Khapardec5dae582013-05-01 09:38:24 +00001833 BE_IF_FLAGS_VLAN_PROMISCUOUS |
1834 BE_IF_FLAGS_MCAST_PROMISCUOUS);
Sathya Perla5b8821b2011-08-02 19:57:44 +00001835 } else if (flags & IFF_ALLMULTI) {
1836 req->if_flags_mask = req->if_flags =
Sathya Perla8e7d3f62011-09-27 13:29:38 -04001837 cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS);
Ajit Khaparded9d604f2013-09-27 15:17:58 -05001838 } else if (flags & BE_FLAGS_VLAN_PROMISC) {
1839 req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS);
1840
1841 if (value == ON)
1842 req->if_flags =
1843 cpu_to_le32(BE_IF_FLAGS_VLAN_PROMISCUOUS);
Sathya Perla24307ee2009-06-18 00:09:25 +00001844 } else {
Sathya Perla5b8821b2011-08-02 19:57:44 +00001845 struct netdev_hw_addr *ha;
1846 int i = 0;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001847
Sathya Perla8e7d3f62011-09-27 13:29:38 -04001848 req->if_flags_mask = req->if_flags =
1849 cpu_to_le32(BE_IF_FLAGS_MULTICAST);
Padmanabh Ratnakar1610c792011-11-03 01:49:27 +00001850
1851 /* Reset mcast promisc mode if already set by setting mask
1852 * and not setting flags field
1853 */
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00001854 req->if_flags_mask |=
1855 cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS &
Sathya Perla92bf14a2013-08-27 16:57:32 +05301856 be_if_cap_flags(adapter));
Padmanabh Ratnakar016f97b2011-11-03 01:49:13 +00001857 req->mcast_num = cpu_to_le32(netdev_mc_count(adapter->netdev));
Sathya Perla5b8821b2011-08-02 19:57:44 +00001858 netdev_for_each_mc_addr(ha, adapter->netdev)
1859 memcpy(req->mcast_mac[i++].byte, ha->addr, ETH_ALEN);
1860 }
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001861
Ajit Khaparde012bd382013-11-18 10:44:24 -06001862 if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) !=
1863 req->if_flags_mask) {
1864 dev_warn(&adapter->pdev->dev,
1865 "Cannot set rx filter flags 0x%x\n",
1866 req->if_flags_mask);
1867 dev_warn(&adapter->pdev->dev,
1868 "Interface is capable of 0x%x flags only\n",
1869 be_if_cap_flags(adapter));
1870 }
1871 req->if_flags_mask &= cpu_to_le32(be_if_cap_flags(adapter));
1872
Sathya Perla0d1d5872011-08-03 05:19:27 -07001873 status = be_mcc_notify_wait(adapter);
Ajit Khaparde012bd382013-11-18 10:44:24 -06001874
Sathya Perla713d03942009-11-22 22:02:45 +00001875err:
Sathya Perla8788fdc2009-07-27 22:52:03 +00001876 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perlae7b909a2009-11-22 22:01:10 +00001877 return status;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001878}
1879
Sathya Perlab31c50a2009-09-17 10:30:13 -07001880/* Uses synchrounous mcc */
Sathya Perla8788fdc2009-07-27 22:52:03 +00001881int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001882{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001883 struct be_mcc_wrb *wrb;
1884 struct be_cmd_req_set_flow_control *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001885 int status;
1886
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +00001887 if (!be_cmd_allowed(adapter, OPCODE_COMMON_SET_FLOW_CONTROL,
1888 CMD_SUBSYSTEM_COMMON))
1889 return -EPERM;
1890
Sathya Perlab31c50a2009-09-17 10:30:13 -07001891 spin_lock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001892
Sathya Perlab31c50a2009-09-17 10:30:13 -07001893 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001894 if (!wrb) {
1895 status = -EBUSY;
1896 goto err;
1897 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001898 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001899
Somnath Kotur106df1e2011-10-27 07:12:13 +00001900 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1901 OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001902
1903 req->tx_flow_control = cpu_to_le16((u16)tx_fc);
1904 req->rx_flow_control = cpu_to_le16((u16)rx_fc);
1905
Sathya Perlab31c50a2009-09-17 10:30:13 -07001906 status = be_mcc_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001907
Sathya Perla713d03942009-11-22 22:02:45 +00001908err:
Sathya Perlab31c50a2009-09-17 10:30:13 -07001909 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001910 return status;
1911}
1912
Sathya Perlab31c50a2009-09-17 10:30:13 -07001913/* Uses sycn mcc */
Sathya Perla8788fdc2009-07-27 22:52:03 +00001914int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001915{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001916 struct be_mcc_wrb *wrb;
1917 struct be_cmd_req_get_flow_control *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001918 int status;
1919
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +00001920 if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_FLOW_CONTROL,
1921 CMD_SUBSYSTEM_COMMON))
1922 return -EPERM;
1923
Sathya Perlab31c50a2009-09-17 10:30:13 -07001924 spin_lock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001925
Sathya Perlab31c50a2009-09-17 10:30:13 -07001926 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00001927 if (!wrb) {
1928 status = -EBUSY;
1929 goto err;
1930 }
Sathya Perlab31c50a2009-09-17 10:30:13 -07001931 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001932
Somnath Kotur106df1e2011-10-27 07:12:13 +00001933 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1934 OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001935
Sathya Perlab31c50a2009-09-17 10:30:13 -07001936 status = be_mcc_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001937 if (!status) {
1938 struct be_cmd_resp_get_flow_control *resp =
1939 embedded_payload(wrb);
1940 *tx_fc = le16_to_cpu(resp->tx_flow_control);
1941 *rx_fc = le16_to_cpu(resp->rx_flow_control);
1942 }
1943
Sathya Perla713d03942009-11-22 22:02:45 +00001944err:
Sathya Perlab31c50a2009-09-17 10:30:13 -07001945 spin_unlock_bh(&adapter->mcc_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001946 return status;
1947}
1948
Sathya Perlab31c50a2009-09-17 10:30:13 -07001949/* Uses mbox */
Sathya Perla3abcded2010-10-03 22:12:27 -07001950int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num,
Vasundhara Volam0ad31572013-04-21 23:28:16 +00001951 u32 *mode, u32 *caps, u16 *asic_rev)
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001952{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001953 struct be_mcc_wrb *wrb;
1954 struct be_cmd_req_query_fw_cfg *req;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001955 int status;
1956
Ivan Vecera29849612010-12-14 05:43:19 +00001957 if (mutex_lock_interruptible(&adapter->mbox_lock))
1958 return -1;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001959
Sathya Perlab31c50a2009-09-17 10:30:13 -07001960 wrb = wrb_from_mbox(adapter);
1961 req = embedded_payload(wrb);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001962
Somnath Kotur106df1e2011-10-27 07:12:13 +00001963 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1964 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001965
Sathya Perlab31c50a2009-09-17 10:30:13 -07001966 status = be_mbox_notify_wait(adapter);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001967 if (!status) {
1968 struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb);
1969 *port_num = le32_to_cpu(resp->phys_port);
Ajit Khaparde3486be22010-07-23 02:04:54 +00001970 *mode = le32_to_cpu(resp->function_mode);
Sathya Perla3abcded2010-10-03 22:12:27 -07001971 *caps = le32_to_cpu(resp->function_caps);
Vasundhara Volam0ad31572013-04-21 23:28:16 +00001972 *asic_rev = le32_to_cpu(resp->asic_revision) & 0xFF;
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001973 }
1974
Ivan Vecera29849612010-12-14 05:43:19 +00001975 mutex_unlock(&adapter->mbox_lock);
Sathya Perla6b7c5b92009-03-11 23:32:03 -07001976 return status;
1977}
sarveshwarb14074ea2009-08-05 13:05:24 -07001978
Sathya Perlab31c50a2009-09-17 10:30:13 -07001979/* Uses mbox */
sarveshwarb14074ea2009-08-05 13:05:24 -07001980int be_cmd_reset_function(struct be_adapter *adapter)
1981{
Sathya Perlab31c50a2009-09-17 10:30:13 -07001982 struct be_mcc_wrb *wrb;
1983 struct be_cmd_req_hdr *req;
sarveshwarb14074ea2009-08-05 13:05:24 -07001984 int status;
1985
Padmanabh Ratnakarbf99e502012-07-12 03:56:58 +00001986 if (lancer_chip(adapter)) {
1987 status = lancer_wait_ready(adapter);
1988 if (!status) {
1989 iowrite32(SLI_PORT_CONTROL_IP_MASK,
1990 adapter->db + SLIPORT_CONTROL_OFFSET);
1991 status = lancer_test_and_set_rdy_state(adapter);
1992 }
1993 if (status) {
1994 dev_err(&adapter->pdev->dev,
1995 "Adapter in non recoverable error\n");
1996 }
1997 return status;
1998 }
1999
Ivan Vecera29849612010-12-14 05:43:19 +00002000 if (mutex_lock_interruptible(&adapter->mbox_lock))
2001 return -1;
sarveshwarb14074ea2009-08-05 13:05:24 -07002002
Sathya Perlab31c50a2009-09-17 10:30:13 -07002003 wrb = wrb_from_mbox(adapter);
2004 req = embedded_payload(wrb);
sarveshwarb14074ea2009-08-05 13:05:24 -07002005
Somnath Kotur106df1e2011-10-27 07:12:13 +00002006 be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON,
2007 OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL);
sarveshwarb14074ea2009-08-05 13:05:24 -07002008
Sathya Perlab31c50a2009-09-17 10:30:13 -07002009 status = be_mbox_notify_wait(adapter);
sarveshwarb14074ea2009-08-05 13:05:24 -07002010
Ivan Vecera29849612010-12-14 05:43:19 +00002011 mutex_unlock(&adapter->mbox_lock);
sarveshwarb14074ea2009-08-05 13:05:24 -07002012 return status;
2013}
Ajit Khaparde84517482009-09-04 03:12:16 +00002014
Suresh Reddy594ad542013-04-25 23:03:20 +00002015int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2016 u32 rss_hash_opts, u16 table_size)
Sathya Perla3abcded2010-10-03 22:12:27 -07002017{
2018 struct be_mcc_wrb *wrb;
2019 struct be_cmd_req_rss_config *req;
Padmanabh Ratnakar65f85842011-11-25 05:48:38 +00002020 u32 myhash[10] = {0x15d43fa5, 0x2534685a, 0x5f87693a, 0x5668494e,
2021 0x33cf6a53, 0x383334c6, 0x76ac4257, 0x59b242b2,
2022 0x3ea83c02, 0x4a110304};
Sathya Perla3abcded2010-10-03 22:12:27 -07002023 int status;
2024
Vasundhara Volamda1388d2014-01-06 13:02:23 +05302025 if (!(be_if_cap_flags(adapter) & BE_IF_FLAGS_RSS))
2026 return 0;
2027
Ivan Vecera29849612010-12-14 05:43:19 +00002028 if (mutex_lock_interruptible(&adapter->mbox_lock))
2029 return -1;
Sathya Perla3abcded2010-10-03 22:12:27 -07002030
2031 wrb = wrb_from_mbox(adapter);
2032 req = embedded_payload(wrb);
2033
Somnath Kotur106df1e2011-10-27 07:12:13 +00002034 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2035 OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL);
Sathya Perla3abcded2010-10-03 22:12:27 -07002036
2037 req->if_id = cpu_to_le32(adapter->if_handle);
Suresh Reddy594ad542013-04-25 23:03:20 +00002038 req->enable_rss = cpu_to_le16(rss_hash_opts);
Sathya Perla3abcded2010-10-03 22:12:27 -07002039 req->cpu_table_size_log2 = cpu_to_le16(fls(table_size) - 1);
Suresh Reddy594ad542013-04-25 23:03:20 +00002040
2041 if (lancer_chip(adapter) || skyhawk_chip(adapter))
2042 req->hdr.version = 1;
2043
Sathya Perla3abcded2010-10-03 22:12:27 -07002044 memcpy(req->cpu_table, rsstable, table_size);
2045 memcpy(req->hash, myhash, sizeof(myhash));
2046 be_dws_cpu_to_le(req->hash, sizeof(req->hash));
2047
2048 status = be_mbox_notify_wait(adapter);
2049
Ivan Vecera29849612010-12-14 05:43:19 +00002050 mutex_unlock(&adapter->mbox_lock);
Sathya Perla3abcded2010-10-03 22:12:27 -07002051 return status;
2052}
2053
Sarveshwar Bandifad9ab22009-10-12 04:23:15 -07002054/* Uses sync mcc */
2055int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,
2056 u8 bcn, u8 sts, u8 state)
2057{
2058 struct be_mcc_wrb *wrb;
2059 struct be_cmd_req_enable_disable_beacon *req;
2060 int status;
2061
2062 spin_lock_bh(&adapter->mcc_lock);
2063
2064 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00002065 if (!wrb) {
2066 status = -EBUSY;
2067 goto err;
2068 }
Sarveshwar Bandifad9ab22009-10-12 04:23:15 -07002069 req = embedded_payload(wrb);
2070
Somnath Kotur106df1e2011-10-27 07:12:13 +00002071 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2072 OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL);
Sarveshwar Bandifad9ab22009-10-12 04:23:15 -07002073
2074 req->port_num = port_num;
2075 req->beacon_state = state;
2076 req->beacon_duration = bcn;
2077 req->status_duration = sts;
2078
2079 status = be_mcc_notify_wait(adapter);
2080
Sathya Perla713d03942009-11-22 22:02:45 +00002081err:
Sarveshwar Bandifad9ab22009-10-12 04:23:15 -07002082 spin_unlock_bh(&adapter->mcc_lock);
2083 return status;
2084}
2085
2086/* Uses sync mcc */
2087int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state)
2088{
2089 struct be_mcc_wrb *wrb;
2090 struct be_cmd_req_get_beacon_state *req;
2091 int status;
2092
2093 spin_lock_bh(&adapter->mcc_lock);
2094
2095 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00002096 if (!wrb) {
2097 status = -EBUSY;
2098 goto err;
2099 }
Sarveshwar Bandifad9ab22009-10-12 04:23:15 -07002100 req = embedded_payload(wrb);
2101
Somnath Kotur106df1e2011-10-27 07:12:13 +00002102 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2103 OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL);
Sarveshwar Bandifad9ab22009-10-12 04:23:15 -07002104
2105 req->port_num = port_num;
2106
2107 status = be_mcc_notify_wait(adapter);
2108 if (!status) {
2109 struct be_cmd_resp_get_beacon_state *resp =
2110 embedded_payload(wrb);
2111 *state = resp->beacon_state;
2112 }
2113
Sathya Perla713d03942009-11-22 22:02:45 +00002114err:
Sarveshwar Bandifad9ab22009-10-12 04:23:15 -07002115 spin_unlock_bh(&adapter->mcc_lock);
2116 return status;
2117}
2118
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002119int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +00002120 u32 data_size, u32 data_offset,
2121 const char *obj_name, u32 *data_written,
2122 u8 *change_status, u8 *addn_status)
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002123{
2124 struct be_mcc_wrb *wrb;
2125 struct lancer_cmd_req_write_object *req;
2126 struct lancer_cmd_resp_write_object *resp;
2127 void *ctxt = NULL;
2128 int status;
2129
2130 spin_lock_bh(&adapter->mcc_lock);
2131 adapter->flash_status = 0;
2132
2133 wrb = wrb_from_mccq(adapter);
2134 if (!wrb) {
2135 status = -EBUSY;
2136 goto err_unlock;
2137 }
2138
2139 req = embedded_payload(wrb);
2140
Somnath Kotur106df1e2011-10-27 07:12:13 +00002141 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002142 OPCODE_COMMON_WRITE_OBJECT,
Somnath Kotur106df1e2011-10-27 07:12:13 +00002143 sizeof(struct lancer_cmd_req_write_object), wrb,
2144 NULL);
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002145
2146 ctxt = &req->context;
2147 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2148 write_length, ctxt, data_size);
2149
2150 if (data_size == 0)
2151 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2152 eof, ctxt, 1);
2153 else
2154 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2155 eof, ctxt, 0);
2156
2157 be_dws_cpu_to_le(ctxt, sizeof(req->context));
2158 req->write_offset = cpu_to_le32(data_offset);
2159 strcpy(req->object_name, obj_name);
2160 req->descriptor_count = cpu_to_le32(1);
2161 req->buf_len = cpu_to_le32(data_size);
2162 req->addr_low = cpu_to_le32((cmd->dma +
2163 sizeof(struct lancer_cmd_req_write_object))
2164 & 0xFFFFFFFF);
2165 req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma +
2166 sizeof(struct lancer_cmd_req_write_object)));
2167
2168 be_mcc_notify(adapter);
2169 spin_unlock_bh(&adapter->mcc_lock);
2170
Suresh Reddy5eeff632014-01-06 13:02:24 +05302171 if (!wait_for_completion_timeout(&adapter->et_cmd_compl,
Somnath Kotur701962d2013-05-02 03:36:34 +00002172 msecs_to_jiffies(60000)))
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002173 status = -1;
2174 else
2175 status = adapter->flash_status;
2176
2177 resp = embedded_payload(wrb);
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +00002178 if (!status) {
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002179 *data_written = le32_to_cpu(resp->actual_write_len);
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +00002180 *change_status = resp->change_status;
2181 } else {
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002182 *addn_status = resp->additional_status;
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +00002183 }
Shripad Nunjundarao485bf562011-05-16 07:36:59 +00002184
2185 return status;
2186
2187err_unlock:
2188 spin_unlock_bh(&adapter->mcc_lock);
2189 return status;
2190}
2191
Padmanabh Ratnakarde49bd52011-11-16 02:02:43 +00002192int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2193 u32 data_size, u32 data_offset, const char *obj_name,
2194 u32 *data_read, u32 *eof, u8 *addn_status)
2195{
2196 struct be_mcc_wrb *wrb;
2197 struct lancer_cmd_req_read_object *req;
2198 struct lancer_cmd_resp_read_object *resp;
2199 int status;
2200
2201 spin_lock_bh(&adapter->mcc_lock);
2202
2203 wrb = wrb_from_mccq(adapter);
2204 if (!wrb) {
2205 status = -EBUSY;
2206 goto err_unlock;
2207 }
2208
2209 req = embedded_payload(wrb);
2210
2211 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2212 OPCODE_COMMON_READ_OBJECT,
2213 sizeof(struct lancer_cmd_req_read_object), wrb,
2214 NULL);
2215
2216 req->desired_read_len = cpu_to_le32(data_size);
2217 req->read_offset = cpu_to_le32(data_offset);
2218 strcpy(req->object_name, obj_name);
2219 req->descriptor_count = cpu_to_le32(1);
2220 req->buf_len = cpu_to_le32(data_size);
2221 req->addr_low = cpu_to_le32((cmd->dma & 0xFFFFFFFF));
2222 req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma));
2223
2224 status = be_mcc_notify_wait(adapter);
2225
2226 resp = embedded_payload(wrb);
2227 if (!status) {
2228 *data_read = le32_to_cpu(resp->actual_read_len);
2229 *eof = le32_to_cpu(resp->eof);
2230 } else {
2231 *addn_status = resp->additional_status;
2232 }
2233
2234err_unlock:
2235 spin_unlock_bh(&adapter->mcc_lock);
2236 return status;
2237}
2238
Ajit Khaparde84517482009-09-04 03:12:16 +00002239int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2240 u32 flash_type, u32 flash_opcode, u32 buf_size)
2241{
Sathya Perlab31c50a2009-09-17 10:30:13 -07002242 struct be_mcc_wrb *wrb;
Ajit Khaparde3f0d4562010-02-09 01:30:35 +00002243 struct be_cmd_write_flashrom *req;
Ajit Khaparde84517482009-09-04 03:12:16 +00002244 int status;
2245
Sathya Perlab31c50a2009-09-17 10:30:13 -07002246 spin_lock_bh(&adapter->mcc_lock);
Sarveshwar Bandidd131e72010-05-25 16:16:32 -07002247 adapter->flash_status = 0;
Sathya Perlab31c50a2009-09-17 10:30:13 -07002248
2249 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00002250 if (!wrb) {
2251 status = -EBUSY;
Dan Carpenter2892d9c2010-05-26 04:46:35 +00002252 goto err_unlock;
Sathya Perla713d03942009-11-22 22:02:45 +00002253 }
2254 req = cmd->va;
Sathya Perlab31c50a2009-09-17 10:30:13 -07002255
Somnath Kotur106df1e2011-10-27 07:12:13 +00002256 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2257 OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd);
Ajit Khaparde84517482009-09-04 03:12:16 +00002258
2259 req->params.op_type = cpu_to_le32(flash_type);
2260 req->params.op_code = cpu_to_le32(flash_opcode);
2261 req->params.data_buf_size = cpu_to_le32(buf_size);
2262
Sarveshwar Bandidd131e72010-05-25 16:16:32 -07002263 be_mcc_notify(adapter);
2264 spin_unlock_bh(&adapter->mcc_lock);
2265
Suresh Reddy5eeff632014-01-06 13:02:24 +05302266 if (!wait_for_completion_timeout(&adapter->et_cmd_compl,
2267 msecs_to_jiffies(40000)))
Sarveshwar Bandidd131e72010-05-25 16:16:32 -07002268 status = -1;
2269 else
2270 status = adapter->flash_status;
Ajit Khaparde84517482009-09-04 03:12:16 +00002271
Dan Carpenter2892d9c2010-05-26 04:46:35 +00002272 return status;
2273
2274err_unlock:
2275 spin_unlock_bh(&adapter->mcc_lock);
Ajit Khaparde84517482009-09-04 03:12:16 +00002276 return status;
2277}
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002278
Ajit Khaparde3f0d4562010-02-09 01:30:35 +00002279int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
2280 int offset)
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002281{
2282 struct be_mcc_wrb *wrb;
Padmanabh Ratnakarbe716442012-10-22 23:02:44 +00002283 struct be_cmd_read_flash_crc *req;
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002284 int status;
2285
2286 spin_lock_bh(&adapter->mcc_lock);
2287
2288 wrb = wrb_from_mccq(adapter);
Sathya Perla713d03942009-11-22 22:02:45 +00002289 if (!wrb) {
2290 status = -EBUSY;
2291 goto err;
2292 }
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002293 req = embedded_payload(wrb);
2294
Somnath Kotur106df1e2011-10-27 07:12:13 +00002295 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
Padmanabh Ratnakarbe716442012-10-22 23:02:44 +00002296 OPCODE_COMMON_READ_FLASHROM, sizeof(*req),
2297 wrb, NULL);
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002298
Padmanabh Ratnakarc165541e2012-04-25 01:47:15 +00002299 req->params.op_type = cpu_to_le32(OPTYPE_REDBOOT);
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002300 req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT);
Ajit Khaparde8b93b712010-03-31 01:57:10 +00002301 req->params.offset = cpu_to_le32(offset);
2302 req->params.data_buf_size = cpu_to_le32(0x4);
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002303
2304 status = be_mcc_notify_wait(adapter);
2305 if (!status)
Padmanabh Ratnakarbe716442012-10-22 23:02:44 +00002306 memcpy(flashed_crc, req->crc, 4);
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002307
Sathya Perla713d03942009-11-22 22:02:45 +00002308err:
Sarveshwar Bandifa9a6fe2009-11-20 14:23:47 -08002309 spin_unlock_bh(&adapter->mcc_lock);
2310 return status;
2311}
Ajit Khaparde71d8d1b2009-12-03 06:16:59 +00002312
Dan Carpenterc196b022010-05-26 04:47:39 +00002313int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
Ajit Khaparde71d8d1b2009-12-03 06:16:59 +00002314 struct be_dma_mem *nonemb_cmd)
2315{
2316 struct be_mcc_wrb *wrb;
2317 struct be_cmd_req_acpi_wol_magic_config *req;
Ajit Khaparde71d8d1b2009-12-03 06:16:59 +00002318 int status;
2319
2320 spin_lock_bh(&adapter->mcc_lock);
2321
2322 wrb = wrb_from_mccq(adapter);
2323 if (!wrb) {
2324 status = -EBUSY;
2325 goto err;
2326 }
2327 req = nonemb_cmd->va;
Ajit Khaparde71d8d1b2009-12-03 06:16:59 +00002328
Somnath Kotur106df1e2011-10-27 07:12:13 +00002329 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2330 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb,
2331 nonemb_cmd);
Ajit Khaparde71d8d1b2009-12-03 06:16:59 +00002332 memcpy(req->magic_mac, mac, ETH_ALEN);
2333
Ajit Khaparde71d8d1b2009-12-03 06:16:59 +00002334 status = be_mcc_notify_wait(adapter);
2335
2336err:
2337 spin_unlock_bh(&adapter->mcc_lock);
2338 return status;
2339}
Suresh Rff33a6e2009-12-03 16:15:52 -08002340
Sarveshwar Bandifced9992009-12-23 04:41:44 +00002341int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2342 u8 loopback_type, u8 enable)
2343{
2344 struct be_mcc_wrb *wrb;
2345 struct be_cmd_req_set_lmode *req;
2346 int status;
2347
2348 spin_lock_bh(&adapter->mcc_lock);
2349
2350 wrb = wrb_from_mccq(adapter);
2351 if (!wrb) {
2352 status = -EBUSY;
2353 goto err;
2354 }
2355
2356 req = embedded_payload(wrb);
2357
Somnath Kotur106df1e2011-10-27 07:12:13 +00002358 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2359 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb,
2360 NULL);
Sarveshwar Bandifced9992009-12-23 04:41:44 +00002361
2362 req->src_port = port_num;
2363 req->dest_port = port_num;
2364 req->loopback_type = loopback_type;
2365 req->loopback_state = enable;
2366
2367 status = be_mcc_notify_wait(adapter);
2368err:
2369 spin_unlock_bh(&adapter->mcc_lock);
2370 return status;
2371}
2372
Suresh Rff33a6e2009-12-03 16:15:52 -08002373int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2374 u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern)
2375{
2376 struct be_mcc_wrb *wrb;
2377 struct be_cmd_req_loopback_test *req;
Suresh Reddy5eeff632014-01-06 13:02:24 +05302378 struct be_cmd_resp_loopback_test *resp;
Suresh Rff33a6e2009-12-03 16:15:52 -08002379 int status;
2380
2381 spin_lock_bh(&adapter->mcc_lock);
2382
2383 wrb = wrb_from_mccq(adapter);
2384 if (!wrb) {
2385 status = -EBUSY;
2386 goto err;
2387 }
2388
2389 req = embedded_payload(wrb);
2390
Somnath Kotur106df1e2011-10-27 07:12:13 +00002391 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2392 OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL);
Suresh Rff33a6e2009-12-03 16:15:52 -08002393
Suresh Reddy5eeff632014-01-06 13:02:24 +05302394 req->hdr.timeout = cpu_to_le32(15);
Suresh Rff33a6e2009-12-03 16:15:52 -08002395 req->pattern = cpu_to_le64(pattern);
2396 req->src_port = cpu_to_le32(port_num);
2397 req->dest_port = cpu_to_le32(port_num);
2398 req->pkt_size = cpu_to_le32(pkt_size);
2399 req->num_pkts = cpu_to_le32(num_pkts);
2400 req->loopback_type = cpu_to_le32(loopback_type);
2401
Suresh Reddy5eeff632014-01-06 13:02:24 +05302402 be_mcc_notify(adapter);
Suresh Rff33a6e2009-12-03 16:15:52 -08002403
Suresh Reddy5eeff632014-01-06 13:02:24 +05302404 spin_unlock_bh(&adapter->mcc_lock);
2405
2406 wait_for_completion(&adapter->et_cmd_compl);
2407 resp = embedded_payload(wrb);
2408 status = le32_to_cpu(resp->status);
2409
2410 return status;
Suresh Rff33a6e2009-12-03 16:15:52 -08002411err:
2412 spin_unlock_bh(&adapter->mcc_lock);
2413 return status;
2414}
2415
2416int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
2417 u32 byte_cnt, struct be_dma_mem *cmd)
2418{
2419 struct be_mcc_wrb *wrb;
2420 struct be_cmd_req_ddrdma_test *req;
Suresh Rff33a6e2009-12-03 16:15:52 -08002421 int status;
2422 int i, j = 0;
2423
2424 spin_lock_bh(&adapter->mcc_lock);
2425
2426 wrb = wrb_from_mccq(adapter);
2427 if (!wrb) {
2428 status = -EBUSY;
2429 goto err;
2430 }
2431 req = cmd->va;
Somnath Kotur106df1e2011-10-27 07:12:13 +00002432 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2433 OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd);
Suresh Rff33a6e2009-12-03 16:15:52 -08002434
2435 req->pattern = cpu_to_le64(pattern);
2436 req->byte_count = cpu_to_le32(byte_cnt);
2437 for (i = 0; i < byte_cnt; i++) {
2438 req->snd_buff[i] = (u8)(pattern >> (j*8));
2439 j++;
2440 if (j > 7)
2441 j = 0;
2442 }
2443
2444 status = be_mcc_notify_wait(adapter);
2445
2446 if (!status) {
2447 struct be_cmd_resp_ddrdma_test *resp;
2448 resp = cmd->va;
2449 if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) ||
2450 resp->snd_err) {
2451 status = -1;
2452 }
2453 }
2454
2455err:
2456 spin_unlock_bh(&adapter->mcc_lock);
2457 return status;
2458}
Sarveshwar Bandi368c0ca2010-01-08 00:07:27 -08002459
Dan Carpenterc196b022010-05-26 04:47:39 +00002460int be_cmd_get_seeprom_data(struct be_adapter *adapter,
Sarveshwar Bandi368c0ca2010-01-08 00:07:27 -08002461 struct be_dma_mem *nonemb_cmd)
2462{
2463 struct be_mcc_wrb *wrb;
2464 struct be_cmd_req_seeprom_read *req;
Sarveshwar Bandi368c0ca2010-01-08 00:07:27 -08002465 int status;
2466
2467 spin_lock_bh(&adapter->mcc_lock);
2468
2469 wrb = wrb_from_mccq(adapter);
Ajit Khapardee45ff012011-02-04 17:18:28 +00002470 if (!wrb) {
2471 status = -EBUSY;
2472 goto err;
2473 }
Sarveshwar Bandi368c0ca2010-01-08 00:07:27 -08002474 req = nonemb_cmd->va;
Sarveshwar Bandi368c0ca2010-01-08 00:07:27 -08002475
Somnath Kotur106df1e2011-10-27 07:12:13 +00002476 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2477 OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb,
2478 nonemb_cmd);
Sarveshwar Bandi368c0ca2010-01-08 00:07:27 -08002479
2480 status = be_mcc_notify_wait(adapter);
2481
Ajit Khapardee45ff012011-02-04 17:18:28 +00002482err:
Sarveshwar Bandi368c0ca2010-01-08 00:07:27 -08002483 spin_unlock_bh(&adapter->mcc_lock);
2484 return status;
2485}
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002486
Ajit Khaparde42f11cf2012-04-21 18:53:22 +00002487int be_cmd_get_phy_info(struct be_adapter *adapter)
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002488{
2489 struct be_mcc_wrb *wrb;
2490 struct be_cmd_req_get_phy_info *req;
Sathya Perla306f1342011-08-02 19:57:45 +00002491 struct be_dma_mem cmd;
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002492 int status;
2493
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +00002494 if (!be_cmd_allowed(adapter, OPCODE_COMMON_GET_PHY_DETAILS,
2495 CMD_SUBSYSTEM_COMMON))
2496 return -EPERM;
2497
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002498 spin_lock_bh(&adapter->mcc_lock);
2499
2500 wrb = wrb_from_mccq(adapter);
2501 if (!wrb) {
2502 status = -EBUSY;
2503 goto err;
2504 }
Sathya Perla306f1342011-08-02 19:57:45 +00002505 cmd.size = sizeof(struct be_cmd_req_get_phy_info);
2506 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size,
2507 &cmd.dma);
2508 if (!cmd.va) {
2509 dev_err(&adapter->pdev->dev, "Memory alloc failure\n");
2510 status = -ENOMEM;
2511 goto err;
2512 }
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002513
Sathya Perla306f1342011-08-02 19:57:45 +00002514 req = cmd.va;
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002515
Somnath Kotur106df1e2011-10-27 07:12:13 +00002516 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2517 OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req),
2518 wrb, &cmd);
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002519
2520 status = be_mcc_notify_wait(adapter);
Sathya Perla306f1342011-08-02 19:57:45 +00002521 if (!status) {
2522 struct be_phy_info *resp_phy_info =
2523 cmd.va + sizeof(struct be_cmd_req_hdr);
Ajit Khaparde42f11cf2012-04-21 18:53:22 +00002524 adapter->phy.phy_type = le16_to_cpu(resp_phy_info->phy_type);
2525 adapter->phy.interface_type =
Sathya Perla306f1342011-08-02 19:57:45 +00002526 le16_to_cpu(resp_phy_info->interface_type);
Ajit Khaparde42f11cf2012-04-21 18:53:22 +00002527 adapter->phy.auto_speeds_supported =
2528 le16_to_cpu(resp_phy_info->auto_speeds_supported);
2529 adapter->phy.fixed_speeds_supported =
2530 le16_to_cpu(resp_phy_info->fixed_speeds_supported);
2531 adapter->phy.misc_params =
2532 le32_to_cpu(resp_phy_info->misc_params);
Vasundhara Volam68cb7e42013-08-06 09:27:18 +05302533
2534 if (BE2_chip(adapter)) {
2535 adapter->phy.fixed_speeds_supported =
2536 BE_SUPPORTED_SPEED_10GBPS |
2537 BE_SUPPORTED_SPEED_1GBPS;
2538 }
Sathya Perla306f1342011-08-02 19:57:45 +00002539 }
2540 pci_free_consistent(adapter->pdev, cmd.size,
2541 cmd.va, cmd.dma);
Ajit Khapardeee3cb622010-07-01 03:51:00 +00002542err:
2543 spin_unlock_bh(&adapter->mcc_lock);
2544 return status;
2545}
Ajit Khapardee1d18732010-07-23 01:52:13 +00002546
2547int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain)
2548{
2549 struct be_mcc_wrb *wrb;
2550 struct be_cmd_req_set_qos *req;
2551 int status;
2552
2553 spin_lock_bh(&adapter->mcc_lock);
2554
2555 wrb = wrb_from_mccq(adapter);
2556 if (!wrb) {
2557 status = -EBUSY;
2558 goto err;
2559 }
2560
2561 req = embedded_payload(wrb);
2562
Somnath Kotur106df1e2011-10-27 07:12:13 +00002563 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2564 OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL);
Ajit Khapardee1d18732010-07-23 01:52:13 +00002565
2566 req->hdr.domain = domain;
Ajit Khaparde6bff57a2011-02-11 13:33:02 +00002567 req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC);
2568 req->max_bps_nic = cpu_to_le32(bps);
Ajit Khapardee1d18732010-07-23 01:52:13 +00002569
2570 status = be_mcc_notify_wait(adapter);
2571
2572err:
2573 spin_unlock_bh(&adapter->mcc_lock);
2574 return status;
2575}
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002576
2577int be_cmd_get_cntl_attributes(struct be_adapter *adapter)
2578{
2579 struct be_mcc_wrb *wrb;
2580 struct be_cmd_req_cntl_attribs *req;
2581 struct be_cmd_resp_cntl_attribs *resp;
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002582 int status;
2583 int payload_len = max(sizeof(*req), sizeof(*resp));
2584 struct mgmt_controller_attrib *attribs;
2585 struct be_dma_mem attribs_cmd;
2586
Suresh Reddyd98ef502013-04-25 00:56:55 +00002587 if (mutex_lock_interruptible(&adapter->mbox_lock))
2588 return -1;
2589
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002590 memset(&attribs_cmd, 0, sizeof(struct be_dma_mem));
2591 attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs);
2592 attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size,
2593 &attribs_cmd.dma);
2594 if (!attribs_cmd.va) {
2595 dev_err(&adapter->pdev->dev,
2596 "Memory allocation failure\n");
Suresh Reddyd98ef502013-04-25 00:56:55 +00002597 status = -ENOMEM;
2598 goto err;
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002599 }
2600
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002601 wrb = wrb_from_mbox(adapter);
2602 if (!wrb) {
2603 status = -EBUSY;
2604 goto err;
2605 }
2606 req = attribs_cmd.va;
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002607
Somnath Kotur106df1e2011-10-27 07:12:13 +00002608 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2609 OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb,
2610 &attribs_cmd);
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002611
2612 status = be_mbox_notify_wait(adapter);
2613 if (!status) {
Joe Perches43d620c2011-06-16 19:08:06 +00002614 attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr);
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002615 adapter->hba_port_num = attribs->hba_attribs.phy_port;
2616 }
2617
2618err:
2619 mutex_unlock(&adapter->mbox_lock);
Suresh Reddyd98ef502013-04-25 00:56:55 +00002620 if (attribs_cmd.va)
2621 pci_free_consistent(adapter->pdev, attribs_cmd.size,
2622 attribs_cmd.va, attribs_cmd.dma);
Ajit Khaparde9e1453c2011-02-20 11:42:22 +00002623 return status;
2624}
Sathya Perla2e588f82011-03-11 02:49:26 +00002625
2626/* Uses mbox */
Sathya Perla2dc1deb2011-07-19 19:52:33 +00002627int be_cmd_req_native_mode(struct be_adapter *adapter)
Sathya Perla2e588f82011-03-11 02:49:26 +00002628{
2629 struct be_mcc_wrb *wrb;
2630 struct be_cmd_req_set_func_cap *req;
2631 int status;
2632
2633 if (mutex_lock_interruptible(&adapter->mbox_lock))
2634 return -1;
2635
2636 wrb = wrb_from_mbox(adapter);
2637 if (!wrb) {
2638 status = -EBUSY;
2639 goto err;
2640 }
2641
2642 req = embedded_payload(wrb);
2643
Somnath Kotur106df1e2011-10-27 07:12:13 +00002644 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2645 OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL);
Sathya Perla2e588f82011-03-11 02:49:26 +00002646
2647 req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS |
2648 CAPABILITY_BE3_NATIVE_ERX_API);
2649 req->cap_flags = cpu_to_le32(CAPABILITY_BE3_NATIVE_ERX_API);
2650
2651 status = be_mbox_notify_wait(adapter);
2652 if (!status) {
2653 struct be_cmd_resp_set_func_cap *resp = embedded_payload(wrb);
2654 adapter->be3_native = le32_to_cpu(resp->cap_flags) &
2655 CAPABILITY_BE3_NATIVE_ERX_API;
Sathya Perlad3791422012-09-28 04:39:44 +00002656 if (!adapter->be3_native)
2657 dev_warn(&adapter->pdev->dev,
2658 "adapter not in advanced mode\n");
Sathya Perla2e588f82011-03-11 02:49:26 +00002659 }
2660err:
2661 mutex_unlock(&adapter->mbox_lock);
2662 return status;
2663}
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002664
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +00002665/* Get privilege(s) for a function */
2666int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
2667 u32 domain)
2668{
2669 struct be_mcc_wrb *wrb;
2670 struct be_cmd_req_get_fn_privileges *req;
2671 int status;
2672
2673 spin_lock_bh(&adapter->mcc_lock);
2674
2675 wrb = wrb_from_mccq(adapter);
2676 if (!wrb) {
2677 status = -EBUSY;
2678 goto err;
2679 }
2680
2681 req = embedded_payload(wrb);
2682
2683 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2684 OPCODE_COMMON_GET_FN_PRIVILEGES, sizeof(*req),
2685 wrb, NULL);
2686
2687 req->hdr.domain = domain;
2688
2689 status = be_mcc_notify_wait(adapter);
2690 if (!status) {
2691 struct be_cmd_resp_get_fn_privileges *resp =
2692 embedded_payload(wrb);
2693 *privilege = le32_to_cpu(resp->privilege_mask);
Suresh Reddy02308d72014-01-15 13:23:36 +05302694
2695 /* In UMC mode FW does not return right privileges.
2696 * Override with correct privilege equivalent to PF.
2697 */
2698 if (BEx_chip(adapter) && be_is_mc(adapter) &&
2699 be_physfn(adapter))
2700 *privilege = MAX_PRIVILEGES;
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +00002701 }
2702
2703err:
2704 spin_unlock_bh(&adapter->mcc_lock);
2705 return status;
2706}
2707
Sathya Perla04a06022013-07-23 15:25:00 +05302708/* Set privilege(s) for a function */
2709int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
2710 u32 domain)
2711{
2712 struct be_mcc_wrb *wrb;
2713 struct be_cmd_req_set_fn_privileges *req;
2714 int status;
2715
2716 spin_lock_bh(&adapter->mcc_lock);
2717
2718 wrb = wrb_from_mccq(adapter);
2719 if (!wrb) {
2720 status = -EBUSY;
2721 goto err;
2722 }
2723
2724 req = embedded_payload(wrb);
2725 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2726 OPCODE_COMMON_SET_FN_PRIVILEGES, sizeof(*req),
2727 wrb, NULL);
2728 req->hdr.domain = domain;
2729 if (lancer_chip(adapter))
2730 req->privileges_lancer = cpu_to_le32(privileges);
2731 else
2732 req->privileges = cpu_to_le32(privileges);
2733
2734 status = be_mcc_notify_wait(adapter);
2735err:
2736 spin_unlock_bh(&adapter->mcc_lock);
2737 return status;
2738}
2739
Sathya Perla5a712c12013-07-23 15:24:59 +05302740/* pmac_id_valid: true => pmac_id is supplied and MAC address is requested.
2741 * pmac_id_valid: false => pmac_id or MAC address is requested.
2742 * If pmac_id is returned, pmac_id_valid is returned as true
2743 */
Padmanabh Ratnakar1578e772012-06-07 04:37:08 +00002744int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
Suresh Reddyb188f092014-01-15 13:23:39 +05302745 bool *pmac_id_valid, u32 *pmac_id, u32 if_handle,
2746 u8 domain)
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002747{
2748 struct be_mcc_wrb *wrb;
2749 struct be_cmd_req_get_mac_list *req;
2750 int status;
2751 int mac_count;
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002752 struct be_dma_mem get_mac_list_cmd;
2753 int i;
2754
2755 memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem));
2756 get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list);
2757 get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev,
2758 get_mac_list_cmd.size,
2759 &get_mac_list_cmd.dma);
2760
2761 if (!get_mac_list_cmd.va) {
2762 dev_err(&adapter->pdev->dev,
2763 "Memory allocation failure during GET_MAC_LIST\n");
2764 return -ENOMEM;
2765 }
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002766
2767 spin_lock_bh(&adapter->mcc_lock);
2768
2769 wrb = wrb_from_mccq(adapter);
2770 if (!wrb) {
2771 status = -EBUSY;
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002772 goto out;
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002773 }
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002774
2775 req = get_mac_list_cmd.va;
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002776
2777 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
Sathya Perlabf591f52013-05-08 02:05:48 +00002778 OPCODE_COMMON_GET_MAC_LIST,
2779 get_mac_list_cmd.size, wrb, &get_mac_list_cmd);
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002780 req->hdr.domain = domain;
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002781 req->mac_type = MAC_ADDRESS_TYPE_NETWORK;
Sathya Perla5a712c12013-07-23 15:24:59 +05302782 if (*pmac_id_valid) {
2783 req->mac_id = cpu_to_le32(*pmac_id);
Suresh Reddyb188f092014-01-15 13:23:39 +05302784 req->iface_id = cpu_to_le16(if_handle);
Sathya Perla5a712c12013-07-23 15:24:59 +05302785 req->perm_override = 0;
2786 } else {
2787 req->perm_override = 1;
2788 }
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002789
2790 status = be_mcc_notify_wait(adapter);
2791 if (!status) {
2792 struct be_cmd_resp_get_mac_list *resp =
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002793 get_mac_list_cmd.va;
Sathya Perla5a712c12013-07-23 15:24:59 +05302794
2795 if (*pmac_id_valid) {
2796 memcpy(mac, resp->macid_macaddr.mac_addr_id.macaddr,
2797 ETH_ALEN);
2798 goto out;
2799 }
2800
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002801 mac_count = resp->true_mac_count + resp->pseudo_mac_count;
2802 /* Mac list returned could contain one or more active mac_ids
Padmanabh Ratnakar1578e772012-06-07 04:37:08 +00002803 * or one or more true or pseudo permanant mac addresses.
2804 * If an active mac_id is present, return first active mac_id
2805 * found.
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002806 */
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002807 for (i = 0; i < mac_count; i++) {
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002808 struct get_list_macaddr *mac_entry;
2809 u16 mac_addr_size;
2810 u32 mac_id;
2811
2812 mac_entry = &resp->macaddr_list[i];
2813 mac_addr_size = le16_to_cpu(mac_entry->mac_addr_size);
2814 /* mac_id is a 32 bit value and mac_addr size
2815 * is 6 bytes
2816 */
2817 if (mac_addr_size == sizeof(u32)) {
Sathya Perla5a712c12013-07-23 15:24:59 +05302818 *pmac_id_valid = true;
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002819 mac_id = mac_entry->mac_addr_id.s_mac_id.mac_id;
2820 *pmac_id = le32_to_cpu(mac_id);
2821 goto out;
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002822 }
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002823 }
Padmanabh Ratnakar1578e772012-06-07 04:37:08 +00002824 /* If no active mac_id found, return first mac addr */
Sathya Perla5a712c12013-07-23 15:24:59 +05302825 *pmac_id_valid = false;
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002826 memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr,
2827 ETH_ALEN);
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002828 }
2829
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002830out:
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002831 spin_unlock_bh(&adapter->mcc_lock);
Padmanabh Ratnakare5e1ee82012-02-03 09:50:17 +00002832 pci_free_consistent(adapter->pdev, get_mac_list_cmd.size,
2833 get_mac_list_cmd.va, get_mac_list_cmd.dma);
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002834 return status;
2835}
2836
Suresh Reddyb188f092014-01-15 13:23:39 +05302837int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac,
2838 u32 if_handle, bool active, u32 domain)
Sathya Perla5a712c12013-07-23 15:24:59 +05302839{
Sathya Perla5a712c12013-07-23 15:24:59 +05302840
Suresh Reddyb188f092014-01-15 13:23:39 +05302841 if (!active)
2842 be_cmd_get_mac_from_list(adapter, mac, &active, &curr_pmac_id,
2843 if_handle, domain);
Sathya Perla3175d8c2013-07-23 15:25:03 +05302844 if (BEx_chip(adapter))
Sathya Perla5a712c12013-07-23 15:24:59 +05302845 return be_cmd_mac_addr_query(adapter, mac, false,
Suresh Reddyb188f092014-01-15 13:23:39 +05302846 if_handle, curr_pmac_id);
Sathya Perla3175d8c2013-07-23 15:25:03 +05302847 else
2848 /* Fetch the MAC address using pmac_id */
2849 return be_cmd_get_mac_from_list(adapter, mac, &active,
Suresh Reddyb188f092014-01-15 13:23:39 +05302850 &curr_pmac_id,
2851 if_handle, domain);
Sathya Perla5a712c12013-07-23 15:24:59 +05302852}
2853
Sathya Perla95046b92013-07-23 15:25:02 +05302854int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac)
2855{
2856 int status;
2857 bool pmac_valid = false;
2858
2859 memset(mac, 0, ETH_ALEN);
2860
Sathya Perla3175d8c2013-07-23 15:25:03 +05302861 if (BEx_chip(adapter)) {
2862 if (be_physfn(adapter))
2863 status = be_cmd_mac_addr_query(adapter, mac, true, 0,
2864 0);
2865 else
2866 status = be_cmd_mac_addr_query(adapter, mac, false,
2867 adapter->if_handle, 0);
2868 } else {
Sathya Perla95046b92013-07-23 15:25:02 +05302869 status = be_cmd_get_mac_from_list(adapter, mac, &pmac_valid,
Suresh Reddyb188f092014-01-15 13:23:39 +05302870 NULL, adapter->if_handle, 0);
Sathya Perla3175d8c2013-07-23 15:25:03 +05302871 }
2872
Sathya Perla95046b92013-07-23 15:25:02 +05302873 return status;
2874}
2875
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002876/* Uses synchronous MCCQ */
2877int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
2878 u8 mac_count, u32 domain)
2879{
2880 struct be_mcc_wrb *wrb;
2881 struct be_cmd_req_set_mac_list *req;
2882 int status;
2883 struct be_dma_mem cmd;
2884
2885 memset(&cmd, 0, sizeof(struct be_dma_mem));
2886 cmd.size = sizeof(struct be_cmd_req_set_mac_list);
2887 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size,
2888 &cmd.dma, GFP_KERNEL);
Joe Perchesd0320f72013-03-14 13:07:21 +00002889 if (!cmd.va)
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002890 return -ENOMEM;
Padmanabh Ratnakar590c3912011-11-25 05:47:26 +00002891
2892 spin_lock_bh(&adapter->mcc_lock);
2893
2894 wrb = wrb_from_mccq(adapter);
2895 if (!wrb) {
2896 status = -EBUSY;
2897 goto err;
2898 }
2899
2900 req = cmd.va;
2901 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2902 OPCODE_COMMON_SET_MAC_LIST, sizeof(*req),
2903 wrb, &cmd);
2904
2905 req->hdr.domain = domain;
2906 req->mac_count = mac_count;
2907 if (mac_count)
2908 memcpy(req->mac, mac_array, ETH_ALEN*mac_count);
2909
2910 status = be_mcc_notify_wait(adapter);
2911
2912err:
2913 dma_free_coherent(&adapter->pdev->dev, cmd.size,
2914 cmd.va, cmd.dma);
2915 spin_unlock_bh(&adapter->mcc_lock);
2916 return status;
2917}
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00002918
Sathya Perla3175d8c2013-07-23 15:25:03 +05302919/* Wrapper to delete any active MACs and provision the new mac.
2920 * Changes to MAC_LIST are allowed iff none of the MAC addresses in the
2921 * current list are active.
2922 */
2923int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom)
2924{
2925 bool active_mac = false;
2926 u8 old_mac[ETH_ALEN];
2927 u32 pmac_id;
2928 int status;
2929
2930 status = be_cmd_get_mac_from_list(adapter, old_mac, &active_mac,
Suresh Reddyb188f092014-01-15 13:23:39 +05302931 &pmac_id, if_id, dom);
2932
Sathya Perla3175d8c2013-07-23 15:25:03 +05302933 if (!status && active_mac)
2934 be_cmd_pmac_del(adapter, if_id, pmac_id, dom);
2935
2936 return be_cmd_set_mac_list(adapter, mac, mac ? 1 : 0, dom);
2937}
2938
Ajit Khapardef1f3ee12012-03-18 06:23:41 +00002939int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,
Ajit Khapardea77dcb82013-08-30 15:01:16 -05002940 u32 domain, u16 intf_id, u16 hsw_mode)
Ajit Khapardef1f3ee12012-03-18 06:23:41 +00002941{
2942 struct be_mcc_wrb *wrb;
2943 struct be_cmd_req_set_hsw_config *req;
2944 void *ctxt;
2945 int status;
2946
2947 spin_lock_bh(&adapter->mcc_lock);
2948
2949 wrb = wrb_from_mccq(adapter);
2950 if (!wrb) {
2951 status = -EBUSY;
2952 goto err;
2953 }
2954
2955 req = embedded_payload(wrb);
2956 ctxt = &req->context;
2957
2958 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2959 OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL);
2960
2961 req->hdr.domain = domain;
2962 AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id);
2963 if (pvid) {
2964 AMAP_SET_BITS(struct amap_set_hsw_context, pvid_valid, ctxt, 1);
2965 AMAP_SET_BITS(struct amap_set_hsw_context, pvid, ctxt, pvid);
2966 }
Ajit Khapardea77dcb82013-08-30 15:01:16 -05002967 if (!BEx_chip(adapter) && hsw_mode) {
2968 AMAP_SET_BITS(struct amap_set_hsw_context, interface_id,
2969 ctxt, adapter->hba_port_num);
2970 AMAP_SET_BITS(struct amap_set_hsw_context, pport, ctxt, 1);
2971 AMAP_SET_BITS(struct amap_set_hsw_context, port_fwd_type,
2972 ctxt, hsw_mode);
2973 }
Ajit Khapardef1f3ee12012-03-18 06:23:41 +00002974
2975 be_dws_cpu_to_le(req->context, sizeof(req->context));
2976 status = be_mcc_notify_wait(adapter);
2977
2978err:
2979 spin_unlock_bh(&adapter->mcc_lock);
2980 return status;
2981}
2982
2983/* Get Hyper switch config */
2984int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
Ajit Khapardea77dcb82013-08-30 15:01:16 -05002985 u32 domain, u16 intf_id, u8 *mode)
Ajit Khapardef1f3ee12012-03-18 06:23:41 +00002986{
2987 struct be_mcc_wrb *wrb;
2988 struct be_cmd_req_get_hsw_config *req;
2989 void *ctxt;
2990 int status;
2991 u16 vid;
2992
2993 spin_lock_bh(&adapter->mcc_lock);
2994
2995 wrb = wrb_from_mccq(adapter);
2996 if (!wrb) {
2997 status = -EBUSY;
2998 goto err;
2999 }
3000
3001 req = embedded_payload(wrb);
3002 ctxt = &req->context;
3003
3004 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3005 OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL);
3006
3007 req->hdr.domain = domain;
Ajit Khapardea77dcb82013-08-30 15:01:16 -05003008 AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id,
3009 ctxt, intf_id);
Ajit Khapardef1f3ee12012-03-18 06:23:41 +00003010 AMAP_SET_BITS(struct amap_get_hsw_req_context, pvid_valid, ctxt, 1);
Ajit Khapardea77dcb82013-08-30 15:01:16 -05003011
Vasundhara Volam2c07c1d2014-01-15 13:23:32 +05303012 if (!BEx_chip(adapter) && mode) {
Ajit Khapardea77dcb82013-08-30 15:01:16 -05003013 AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id,
3014 ctxt, adapter->hba_port_num);
3015 AMAP_SET_BITS(struct amap_get_hsw_req_context, pport, ctxt, 1);
3016 }
Ajit Khapardef1f3ee12012-03-18 06:23:41 +00003017 be_dws_cpu_to_le(req->context, sizeof(req->context));
3018
3019 status = be_mcc_notify_wait(adapter);
3020 if (!status) {
3021 struct be_cmd_resp_get_hsw_config *resp =
3022 embedded_payload(wrb);
3023 be_dws_le_to_cpu(&resp->context,
3024 sizeof(resp->context));
3025 vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context,
3026 pvid, &resp->context);
Ajit Khapardea77dcb82013-08-30 15:01:16 -05003027 if (pvid)
3028 *pvid = le16_to_cpu(vid);
3029 if (mode)
3030 *mode = AMAP_GET_BITS(struct amap_get_hsw_resp_context,
3031 port_fwd_type, &resp->context);
Ajit Khapardef1f3ee12012-03-18 06:23:41 +00003032 }
3033
3034err:
3035 spin_unlock_bh(&adapter->mcc_lock);
3036 return status;
3037}
3038
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003039int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter)
3040{
3041 struct be_mcc_wrb *wrb;
3042 struct be_cmd_req_acpi_wol_magic_config_v1 *req;
Suresh Reddy76a9e082014-01-15 13:23:40 +05303043 int status = 0;
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003044 struct be_dma_mem cmd;
3045
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +00003046 if (!be_cmd_allowed(adapter, OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG,
3047 CMD_SUBSYSTEM_ETH))
3048 return -EPERM;
3049
Suresh Reddy76a9e082014-01-15 13:23:40 +05303050 if (be_is_wol_excluded(adapter))
3051 return status;
3052
Suresh Reddyd98ef502013-04-25 00:56:55 +00003053 if (mutex_lock_interruptible(&adapter->mbox_lock))
3054 return -1;
3055
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003056 memset(&cmd, 0, sizeof(struct be_dma_mem));
3057 cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1);
3058 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size,
3059 &cmd.dma);
3060 if (!cmd.va) {
3061 dev_err(&adapter->pdev->dev,
3062 "Memory allocation failure\n");
Suresh Reddyd98ef502013-04-25 00:56:55 +00003063 status = -ENOMEM;
3064 goto err;
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003065 }
3066
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003067 wrb = wrb_from_mbox(adapter);
3068 if (!wrb) {
3069 status = -EBUSY;
3070 goto err;
3071 }
3072
3073 req = cmd.va;
3074
3075 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
3076 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG,
Suresh Reddy76a9e082014-01-15 13:23:40 +05303077 sizeof(*req), wrb, &cmd);
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003078
3079 req->hdr.version = 1;
3080 req->query_options = BE_GET_WOL_CAP;
3081
3082 status = be_mbox_notify_wait(adapter);
3083 if (!status) {
3084 struct be_cmd_resp_acpi_wol_magic_config_v1 *resp;
3085 resp = (struct be_cmd_resp_acpi_wol_magic_config_v1 *) cmd.va;
3086
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003087 adapter->wol_cap = resp->wol_settings;
Suresh Reddy76a9e082014-01-15 13:23:40 +05303088 if (adapter->wol_cap & BE_WOL_CAP)
3089 adapter->wol_en = true;
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003090 }
3091err:
3092 mutex_unlock(&adapter->mbox_lock);
Suresh Reddyd98ef502013-04-25 00:56:55 +00003093 if (cmd.va)
3094 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003095 return status;
Somnath Kotur941a77d2012-05-17 22:59:03 +00003096
3097}
Vasundhara Volambaaa08d2014-01-15 13:23:34 +05303098
3099int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level)
3100{
3101 struct be_dma_mem extfat_cmd;
3102 struct be_fat_conf_params *cfgs;
3103 int status;
3104 int i, j;
3105
3106 memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
3107 extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
3108 extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
3109 &extfat_cmd.dma);
3110 if (!extfat_cmd.va)
3111 return -ENOMEM;
3112
3113 status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
3114 if (status)
3115 goto err;
3116
3117 cfgs = (struct be_fat_conf_params *)
3118 (extfat_cmd.va + sizeof(struct be_cmd_resp_hdr));
3119 for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) {
3120 u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes);
3121 for (j = 0; j < num_modes; j++) {
3122 if (cfgs->module[i].trace_lvl[j].mode == MODE_UART)
3123 cfgs->module[i].trace_lvl[j].dbg_lvl =
3124 cpu_to_le32(level);
3125 }
3126 }
3127
3128 status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs);
3129err:
3130 pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
3131 extfat_cmd.dma);
3132 return status;
3133}
3134
3135int be_cmd_get_fw_log_level(struct be_adapter *adapter)
3136{
3137 struct be_dma_mem extfat_cmd;
3138 struct be_fat_conf_params *cfgs;
3139 int status, j;
3140 int level = 0;
3141
3142 memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
3143 extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
3144 extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
3145 &extfat_cmd.dma);
3146
3147 if (!extfat_cmd.va) {
3148 dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n",
3149 __func__);
3150 goto err;
3151 }
3152
3153 status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
3154 if (!status) {
3155 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +
3156 sizeof(struct be_cmd_resp_hdr));
3157 for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) {
3158 if (cfgs->module[0].trace_lvl[j].mode == MODE_UART)
3159 level = cfgs->module[0].trace_lvl[j].dbg_lvl;
3160 }
3161 }
3162 pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
3163 extfat_cmd.dma);
3164err:
3165 return level;
3166}
3167
Somnath Kotur941a77d2012-05-17 22:59:03 +00003168int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
3169 struct be_dma_mem *cmd)
3170{
3171 struct be_mcc_wrb *wrb;
3172 struct be_cmd_req_get_ext_fat_caps *req;
3173 int status;
3174
3175 if (mutex_lock_interruptible(&adapter->mbox_lock))
3176 return -1;
3177
3178 wrb = wrb_from_mbox(adapter);
3179 if (!wrb) {
3180 status = -EBUSY;
3181 goto err;
3182 }
3183
3184 req = cmd->va;
3185 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3186 OPCODE_COMMON_GET_EXT_FAT_CAPABILITES,
3187 cmd->size, wrb, cmd);
3188 req->parameter_type = cpu_to_le32(1);
3189
3190 status = be_mbox_notify_wait(adapter);
3191err:
3192 mutex_unlock(&adapter->mbox_lock);
3193 return status;
3194}
3195
3196int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
3197 struct be_dma_mem *cmd,
3198 struct be_fat_conf_params *configs)
3199{
3200 struct be_mcc_wrb *wrb;
3201 struct be_cmd_req_set_ext_fat_caps *req;
3202 int status;
3203
3204 spin_lock_bh(&adapter->mcc_lock);
3205
3206 wrb = wrb_from_mccq(adapter);
3207 if (!wrb) {
3208 status = -EBUSY;
3209 goto err;
3210 }
3211
3212 req = cmd->va;
3213 memcpy(&req->set_params, configs, sizeof(struct be_fat_conf_params));
3214 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3215 OPCODE_COMMON_SET_EXT_FAT_CAPABILITES,
3216 cmd->size, wrb, cmd);
3217
3218 status = be_mcc_notify_wait(adapter);
3219err:
3220 spin_unlock_bh(&adapter->mcc_lock);
3221 return status;
Ajit Khaparde4762f6c2012-03-18 06:23:11 +00003222}
Parav Pandit6a4ab662012-03-26 14:27:12 +00003223
Padmanabh Ratnakarb4e32a72012-07-12 03:57:35 +00003224int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name)
3225{
3226 struct be_mcc_wrb *wrb;
3227 struct be_cmd_req_get_port_name *req;
3228 int status;
3229
3230 if (!lancer_chip(adapter)) {
3231 *port_name = adapter->hba_port_num + '0';
3232 return 0;
3233 }
3234
3235 spin_lock_bh(&adapter->mcc_lock);
3236
3237 wrb = wrb_from_mccq(adapter);
3238 if (!wrb) {
3239 status = -EBUSY;
3240 goto err;
3241 }
3242
3243 req = embedded_payload(wrb);
3244
3245 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3246 OPCODE_COMMON_GET_PORT_NAME, sizeof(*req), wrb,
3247 NULL);
3248 req->hdr.version = 1;
3249
3250 status = be_mcc_notify_wait(adapter);
3251 if (!status) {
3252 struct be_cmd_resp_get_port_name *resp = embedded_payload(wrb);
3253 *port_name = resp->port_name[adapter->hba_port_num];
3254 } else {
3255 *port_name = adapter->hba_port_num + '0';
3256 }
3257err:
3258 spin_unlock_bh(&adapter->mcc_lock);
3259 return status;
3260}
3261
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303262static struct be_nic_res_desc *be_get_nic_desc(u8 *buf, u32 desc_count)
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003263{
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303264 struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003265 int i;
3266
3267 for (i = 0; i < desc_count; i++) {
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303268 if (hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V0 ||
3269 hdr->desc_type == NIC_RESOURCE_DESC_TYPE_V1)
3270 return (struct be_nic_res_desc *)hdr;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003271
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303272 hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0;
3273 hdr = (void *)hdr + hdr->desc_len;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003274 }
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303275 return NULL;
3276}
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003277
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303278static struct be_pcie_res_desc *be_get_pcie_desc(u8 devfn, u8 *buf,
3279 u32 desc_count)
3280{
3281 struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf;
3282 struct be_pcie_res_desc *pcie;
3283 int i;
3284
3285 for (i = 0; i < desc_count; i++) {
3286 if ((hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V0 ||
3287 hdr->desc_type == PCIE_RESOURCE_DESC_TYPE_V1)) {
3288 pcie = (struct be_pcie_res_desc *)hdr;
3289 if (pcie->pf_num == devfn)
3290 return pcie;
3291 }
3292
3293 hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0;
3294 hdr = (void *)hdr + hdr->desc_len;
3295 }
Wei Yang950e2952013-05-22 15:58:22 +00003296 return NULL;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003297}
3298
Vasundhara Volamf93f1602014-02-12 16:09:25 +05303299static struct be_port_res_desc *be_get_port_desc(u8 *buf, u32 desc_count)
3300{
3301 struct be_res_desc_hdr *hdr = (struct be_res_desc_hdr *)buf;
3302 int i;
3303
3304 for (i = 0; i < desc_count; i++) {
3305 if (hdr->desc_type == PORT_RESOURCE_DESC_TYPE_V1)
3306 return (struct be_port_res_desc *)hdr;
3307
3308 hdr->desc_len = hdr->desc_len ? : RESOURCE_DESC_SIZE_V0;
3309 hdr = (void *)hdr + hdr->desc_len;
3310 }
3311 return NULL;
3312}
3313
Sathya Perla92bf14a2013-08-27 16:57:32 +05303314static void be_copy_nic_desc(struct be_resources *res,
3315 struct be_nic_res_desc *desc)
3316{
3317 res->max_uc_mac = le16_to_cpu(desc->unicast_mac_count);
3318 res->max_vlans = le16_to_cpu(desc->vlan_count);
3319 res->max_mcast_mac = le16_to_cpu(desc->mcast_mac_count);
3320 res->max_tx_qs = le16_to_cpu(desc->txq_count);
3321 res->max_rss_qs = le16_to_cpu(desc->rssq_count);
3322 res->max_rx_qs = le16_to_cpu(desc->rq_count);
3323 res->max_evt_qs = le16_to_cpu(desc->eq_count);
3324 /* Clear flags that driver is not interested in */
3325 res->if_cap_flags = le32_to_cpu(desc->cap_flags) &
3326 BE_IF_CAP_FLAGS_WANT;
3327 /* Need 1 RXQ as the default RXQ */
3328 if (res->max_rss_qs && res->max_rss_qs == res->max_rx_qs)
3329 res->max_rss_qs -= 1;
3330}
3331
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003332/* Uses Mbox */
Sathya Perla92bf14a2013-08-27 16:57:32 +05303333int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res)
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003334{
3335 struct be_mcc_wrb *wrb;
3336 struct be_cmd_req_get_func_config *req;
3337 int status;
3338 struct be_dma_mem cmd;
3339
Suresh Reddyd98ef502013-04-25 00:56:55 +00003340 if (mutex_lock_interruptible(&adapter->mbox_lock))
3341 return -1;
3342
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003343 memset(&cmd, 0, sizeof(struct be_dma_mem));
3344 cmd.size = sizeof(struct be_cmd_resp_get_func_config);
3345 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size,
3346 &cmd.dma);
3347 if (!cmd.va) {
3348 dev_err(&adapter->pdev->dev, "Memory alloc failure\n");
Suresh Reddyd98ef502013-04-25 00:56:55 +00003349 status = -ENOMEM;
3350 goto err;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003351 }
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003352
3353 wrb = wrb_from_mbox(adapter);
3354 if (!wrb) {
3355 status = -EBUSY;
3356 goto err;
3357 }
3358
3359 req = cmd.va;
3360
3361 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3362 OPCODE_COMMON_GET_FUNC_CONFIG,
3363 cmd.size, wrb, &cmd);
3364
Kalesh AP28710c52013-04-28 22:21:13 +00003365 if (skyhawk_chip(adapter))
3366 req->hdr.version = 1;
3367
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003368 status = be_mbox_notify_wait(adapter);
3369 if (!status) {
3370 struct be_cmd_resp_get_func_config *resp = cmd.va;
3371 u32 desc_count = le32_to_cpu(resp->desc_count);
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303372 struct be_nic_res_desc *desc;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003373
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303374 desc = be_get_nic_desc(resp->func_param, desc_count);
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003375 if (!desc) {
3376 status = -EINVAL;
3377 goto err;
3378 }
3379
Padmanabh Ratnakard5c18472012-10-20 06:01:53 +00003380 adapter->pf_number = desc->pf_num;
Sathya Perla92bf14a2013-08-27 16:57:32 +05303381 be_copy_nic_desc(res, desc);
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003382 }
3383err:
3384 mutex_unlock(&adapter->mbox_lock);
Suresh Reddyd98ef502013-04-25 00:56:55 +00003385 if (cmd.va)
3386 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003387 return status;
3388}
3389
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003390/* Uses mbox */
Jingoo Han4188e7d2013-08-05 18:02:02 +09003391static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter,
3392 u8 domain, struct be_dma_mem *cmd)
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003393{
3394 struct be_mcc_wrb *wrb;
3395 struct be_cmd_req_get_profile_config *req;
3396 int status;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003397
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003398 if (mutex_lock_interruptible(&adapter->mbox_lock))
3399 return -1;
3400 wrb = wrb_from_mbox(adapter);
3401
3402 req = cmd->va;
3403 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3404 OPCODE_COMMON_GET_PROFILE_CONFIG,
3405 cmd->size, wrb, cmd);
3406
3407 req->type = ACTIVE_PROFILE_TYPE;
3408 req->hdr.domain = domain;
3409 if (!lancer_chip(adapter))
3410 req->hdr.version = 1;
3411
3412 status = be_mbox_notify_wait(adapter);
3413
3414 mutex_unlock(&adapter->mbox_lock);
3415 return status;
3416}
3417
3418/* Uses sync mcc */
Jingoo Han4188e7d2013-08-05 18:02:02 +09003419static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter,
3420 u8 domain, struct be_dma_mem *cmd)
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003421{
3422 struct be_mcc_wrb *wrb;
3423 struct be_cmd_req_get_profile_config *req;
3424 int status;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003425
3426 spin_lock_bh(&adapter->mcc_lock);
3427
3428 wrb = wrb_from_mccq(adapter);
3429 if (!wrb) {
3430 status = -EBUSY;
3431 goto err;
3432 }
3433
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003434 req = cmd->va;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003435 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3436 OPCODE_COMMON_GET_PROFILE_CONFIG,
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003437 cmd->size, wrb, cmd);
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003438
3439 req->type = ACTIVE_PROFILE_TYPE;
3440 req->hdr.domain = domain;
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003441 if (!lancer_chip(adapter))
3442 req->hdr.version = 1;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003443
3444 status = be_mcc_notify_wait(adapter);
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003445
3446err:
3447 spin_unlock_bh(&adapter->mcc_lock);
3448 return status;
3449}
3450
3451/* Uses sync mcc, if MCCQ is already created otherwise mbox */
Sathya Perla92bf14a2013-08-27 16:57:32 +05303452int be_cmd_get_profile_config(struct be_adapter *adapter,
3453 struct be_resources *res, u8 domain)
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003454{
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303455 struct be_cmd_resp_get_profile_config *resp;
3456 struct be_pcie_res_desc *pcie;
Vasundhara Volamf93f1602014-02-12 16:09:25 +05303457 struct be_port_res_desc *port;
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303458 struct be_nic_res_desc *nic;
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003459 struct be_queue_info *mccq = &adapter->mcc_obj.q;
3460 struct be_dma_mem cmd;
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303461 u32 desc_count;
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003462 int status;
3463
3464 memset(&cmd, 0, sizeof(struct be_dma_mem));
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303465 cmd.size = sizeof(struct be_cmd_resp_get_profile_config);
3466 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
3467 if (!cmd.va)
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003468 return -ENOMEM;
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003469
3470 if (!mccq->created)
3471 status = be_cmd_get_profile_config_mbox(adapter, domain, &cmd);
3472 else
3473 status = be_cmd_get_profile_config_mccq(adapter, domain, &cmd);
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303474 if (status)
3475 goto err;
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003476
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303477 resp = cmd.va;
3478 desc_count = le32_to_cpu(resp->desc_count);
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003479
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303480 pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param,
3481 desc_count);
3482 if (pcie)
Sathya Perla92bf14a2013-08-27 16:57:32 +05303483 res->max_vfs = le16_to_cpu(pcie->num_vfs);
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303484
Vasundhara Volamf93f1602014-02-12 16:09:25 +05303485 port = be_get_port_desc(resp->func_param, desc_count);
3486 if (port)
3487 adapter->mc_type = port->mc_type;
3488
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303489 nic = be_get_nic_desc(resp->func_param, desc_count);
Sathya Perla92bf14a2013-08-27 16:57:32 +05303490 if (nic)
3491 be_copy_nic_desc(res, nic);
3492
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003493err:
Vasundhara Volama05f99d2013-04-21 23:28:17 +00003494 if (cmd.va)
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303495 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
Padmanabh Ratnakarabb93952012-10-20 06:01:41 +00003496 return status;
3497}
3498
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303499/* Currently only Lancer uses this command and it supports version 0 only
3500 * Uses sync mcc
3501 */
Padmanabh Ratnakard5c18472012-10-20 06:01:53 +00003502int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps,
3503 u8 domain)
3504{
3505 struct be_mcc_wrb *wrb;
3506 struct be_cmd_req_set_profile_config *req;
3507 int status;
3508
3509 spin_lock_bh(&adapter->mcc_lock);
3510
3511 wrb = wrb_from_mccq(adapter);
3512 if (!wrb) {
3513 status = -EBUSY;
3514 goto err;
3515 }
3516
3517 req = embedded_payload(wrb);
3518
3519 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3520 OPCODE_COMMON_SET_PROFILE_CONFIG, sizeof(*req),
3521 wrb, NULL);
Padmanabh Ratnakard5c18472012-10-20 06:01:53 +00003522 req->hdr.domain = domain;
3523 req->desc_count = cpu_to_le32(1);
Vasundhara Volam150d58c2013-08-27 16:57:31 +05303524 req->nic_desc.hdr.desc_type = NIC_RESOURCE_DESC_TYPE_V0;
3525 req->nic_desc.hdr.desc_len = RESOURCE_DESC_SIZE_V0;
Padmanabh Ratnakard5c18472012-10-20 06:01:53 +00003526 req->nic_desc.flags = (1 << QUN) | (1 << IMM) | (1 << NOSV);
3527 req->nic_desc.pf_num = adapter->pf_number;
3528 req->nic_desc.vf_num = domain;
3529
3530 /* Mark fields invalid */
3531 req->nic_desc.unicast_mac_count = 0xFFFF;
3532 req->nic_desc.mcc_count = 0xFFFF;
3533 req->nic_desc.vlan_count = 0xFFFF;
3534 req->nic_desc.mcast_mac_count = 0xFFFF;
3535 req->nic_desc.txq_count = 0xFFFF;
3536 req->nic_desc.rq_count = 0xFFFF;
3537 req->nic_desc.rssq_count = 0xFFFF;
3538 req->nic_desc.lro_count = 0xFFFF;
3539 req->nic_desc.cq_count = 0xFFFF;
3540 req->nic_desc.toe_conn_count = 0xFFFF;
3541 req->nic_desc.eq_count = 0xFFFF;
3542 req->nic_desc.link_param = 0xFF;
3543 req->nic_desc.bw_min = 0xFFFFFFFF;
3544 req->nic_desc.acpi_params = 0xFF;
3545 req->nic_desc.wol_param = 0x0F;
3546
3547 /* Change BW */
3548 req->nic_desc.bw_min = cpu_to_le32(bps);
3549 req->nic_desc.bw_max = cpu_to_le32(bps);
3550 status = be_mcc_notify_wait(adapter);
3551err:
3552 spin_unlock_bh(&adapter->mcc_lock);
3553 return status;
3554}
3555
Sathya Perla4c876612013-02-03 20:30:11 +00003556int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
3557 int vf_num)
3558{
3559 struct be_mcc_wrb *wrb;
3560 struct be_cmd_req_get_iface_list *req;
3561 struct be_cmd_resp_get_iface_list *resp;
3562 int status;
3563
3564 spin_lock_bh(&adapter->mcc_lock);
3565
3566 wrb = wrb_from_mccq(adapter);
3567 if (!wrb) {
3568 status = -EBUSY;
3569 goto err;
3570 }
3571 req = embedded_payload(wrb);
3572
3573 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3574 OPCODE_COMMON_GET_IFACE_LIST, sizeof(*resp),
3575 wrb, NULL);
3576 req->hdr.domain = vf_num + 1;
3577
3578 status = be_mcc_notify_wait(adapter);
3579 if (!status) {
3580 resp = (struct be_cmd_resp_get_iface_list *)req;
3581 vf_cfg->if_handle = le32_to_cpu(resp->if_desc.if_id);
3582 }
3583
3584err:
3585 spin_unlock_bh(&adapter->mcc_lock);
3586 return status;
3587}
3588
Somnath Kotur5c510812013-05-30 02:52:23 +00003589static int lancer_wait_idle(struct be_adapter *adapter)
3590{
3591#define SLIPORT_IDLE_TIMEOUT 30
3592 u32 reg_val;
3593 int status = 0, i;
3594
3595 for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) {
3596 reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET);
3597 if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0)
3598 break;
3599
3600 ssleep(1);
3601 }
3602
3603 if (i == SLIPORT_IDLE_TIMEOUT)
3604 status = -1;
3605
3606 return status;
3607}
3608
3609int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask)
3610{
3611 int status = 0;
3612
3613 status = lancer_wait_idle(adapter);
3614 if (status)
3615 return status;
3616
3617 iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET);
3618
3619 return status;
3620}
3621
3622/* Routine to check whether dump image is present or not */
3623bool dump_present(struct be_adapter *adapter)
3624{
3625 u32 sliport_status = 0;
3626
3627 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3628 return !!(sliport_status & SLIPORT_STATUS_DIP_MASK);
3629}
3630
3631int lancer_initiate_dump(struct be_adapter *adapter)
3632{
3633 int status;
3634
3635 /* give firmware reset and diagnostic dump */
3636 status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK |
3637 PHYSDEV_CONTROL_DD_MASK);
3638 if (status < 0) {
3639 dev_err(&adapter->pdev->dev, "Firmware reset failed\n");
3640 return status;
3641 }
3642
3643 status = lancer_wait_idle(adapter);
3644 if (status)
3645 return status;
3646
3647 if (!dump_present(adapter)) {
3648 dev_err(&adapter->pdev->dev, "Dump image not present\n");
3649 return -1;
3650 }
3651
3652 return 0;
3653}
3654
Padmanabh Ratnakardcf7ebb2012-10-20 06:03:49 +00003655/* Uses sync mcc */
3656int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain)
3657{
3658 struct be_mcc_wrb *wrb;
3659 struct be_cmd_enable_disable_vf *req;
3660 int status;
3661
Vasundhara Volam05998632013-10-01 15:59:59 +05303662 if (BEx_chip(adapter))
Padmanabh Ratnakardcf7ebb2012-10-20 06:03:49 +00003663 return 0;
3664
3665 spin_lock_bh(&adapter->mcc_lock);
3666
3667 wrb = wrb_from_mccq(adapter);
3668 if (!wrb) {
3669 status = -EBUSY;
3670 goto err;
3671 }
3672
3673 req = embedded_payload(wrb);
3674
3675 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3676 OPCODE_COMMON_ENABLE_DISABLE_VF, sizeof(*req),
3677 wrb, NULL);
3678
3679 req->hdr.domain = domain;
3680 req->enable = 1;
3681 status = be_mcc_notify_wait(adapter);
3682err:
3683 spin_unlock_bh(&adapter->mcc_lock);
3684 return status;
3685}
3686
Somnath Kotur68c45a22013-03-14 02:42:07 +00003687int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable)
3688{
3689 struct be_mcc_wrb *wrb;
3690 struct be_cmd_req_intr_set *req;
3691 int status;
3692
3693 if (mutex_lock_interruptible(&adapter->mbox_lock))
3694 return -1;
3695
3696 wrb = wrb_from_mbox(adapter);
3697
3698 req = embedded_payload(wrb);
3699
3700 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3701 OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req),
3702 wrb, NULL);
3703
3704 req->intr_enabled = intr_enable;
3705
3706 status = be_mbox_notify_wait(adapter);
3707
3708 mutex_unlock(&adapter->mbox_lock);
3709 return status;
3710}
3711
Vasundhara Volam542963b2014-01-15 13:23:33 +05303712/* Uses MBOX */
3713int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile_id)
3714{
3715 struct be_cmd_req_get_active_profile *req;
3716 struct be_mcc_wrb *wrb;
3717 int status;
3718
3719 if (mutex_lock_interruptible(&adapter->mbox_lock))
3720 return -1;
3721
3722 wrb = wrb_from_mbox(adapter);
3723 if (!wrb) {
3724 status = -EBUSY;
3725 goto err;
3726 }
3727
3728 req = embedded_payload(wrb);
3729
3730 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3731 OPCODE_COMMON_GET_ACTIVE_PROFILE, sizeof(*req),
3732 wrb, NULL);
3733
3734 status = be_mbox_notify_wait(adapter);
3735 if (!status) {
3736 struct be_cmd_resp_get_active_profile *resp =
3737 embedded_payload(wrb);
3738 *profile_id = le16_to_cpu(resp->active_profile_id);
3739 }
3740
3741err:
3742 mutex_unlock(&adapter->mbox_lock);
3743 return status;
3744}
3745
Parav Pandit6a4ab662012-03-26 14:27:12 +00003746int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,
3747 int wrb_payload_size, u16 *cmd_status, u16 *ext_status)
3748{
3749 struct be_adapter *adapter = netdev_priv(netdev_handle);
3750 struct be_mcc_wrb *wrb;
3751 struct be_cmd_req_hdr *hdr = (struct be_cmd_req_hdr *) wrb_payload;
3752 struct be_cmd_req_hdr *req;
3753 struct be_cmd_resp_hdr *resp;
3754 int status;
3755
3756 spin_lock_bh(&adapter->mcc_lock);
3757
3758 wrb = wrb_from_mccq(adapter);
3759 if (!wrb) {
3760 status = -EBUSY;
3761 goto err;
3762 }
3763 req = embedded_payload(wrb);
3764 resp = embedded_payload(wrb);
3765
3766 be_wrb_cmd_hdr_prepare(req, hdr->subsystem,
3767 hdr->opcode, wrb_payload_size, wrb, NULL);
3768 memcpy(req, wrb_payload, wrb_payload_size);
3769 be_dws_cpu_to_le(req, wrb_payload_size);
3770
3771 status = be_mcc_notify_wait(adapter);
3772 if (cmd_status)
3773 *cmd_status = (status & 0xffff);
3774 if (ext_status)
3775 *ext_status = 0;
3776 memcpy(wrb_payload, resp, sizeof(*resp) + resp->response_length);
3777 be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp->response_length);
3778err:
3779 spin_unlock_bh(&adapter->mcc_lock);
3780 return status;
3781}
3782EXPORT_SYMBOL(be_roce_mcc_cmd);