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Mark Browne1a3c742011-05-06 09:45:13 +09001/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
Mark Brown66211f92011-12-29 18:05:29 +090022#include <linux/leds.h>
Mark Browne1a3c742011-05-06 09:45:13 +090023#include <linux/delay.h>
Mark Brownfb7f60f2011-12-30 13:44:31 +090024#include <linux/mmc/host.h>
Mark Browne1a3c742011-05-06 09:45:13 +090025#include <linux/regulator/machine.h>
Mark Brownae24c262011-06-22 13:08:13 +090026#include <linux/regulator/fixed.h>
Mark Browne1a3c742011-05-06 09:45:13 +090027#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
33#include <linux/i2c/pca953x.h>
Lukasz Majewski126625e2012-05-09 13:16:53 +020034#include <linux/platform_data/s3c-hsotg.h>
Mark Browne1a3c742011-05-06 09:45:13 +090035
36#include <video/platform_lcd.h>
37
38#include <linux/mfd/wm831x/core.h>
39#include <linux/mfd/wm831x/pdata.h>
Mark Brownae24c262011-06-22 13:08:13 +090040#include <linux/mfd/wm831x/irq.h>
Mark Browne1a3c742011-05-06 09:45:13 +090041#include <linux/mfd/wm831x/gpio.h>
42
Mark Brown8504a3c2011-12-02 14:29:07 +090043#include <sound/wm1250-ev1.h>
44
Mark Browne1a3c742011-05-06 09:45:13 +090045#include <asm/mach/arch.h>
46#include <asm/mach-types.h>
47
Leela Krishna Amudala5a213a52012-08-08 09:44:49 +090048#include <video/samsung_fimd.h>
Mark Browne1a3c742011-05-06 09:45:13 +090049#include <mach/hardware.h>
50#include <mach/map.h>
51
Mark Browne1a3c742011-05-06 09:45:13 +090052#include <mach/regs-gpio.h>
Mark Browne1a3c742011-05-06 09:45:13 +090053
54#include <plat/regs-serial.h>
Mark Browne1a3c742011-05-06 09:45:13 +090055#include <plat/fb.h>
56#include <plat/sdhci.h>
57#include <plat/gpio-cfg.h>
Arnd Bergmann436d42c2012-08-24 15:22:12 +020058#include <linux/platform_data/spi-s3c64xx.h>
Mark Browne1a3c742011-05-06 09:45:13 +090059
60#include <plat/keypad.h>
61#include <plat/clock.h>
62#include <plat/devs.h>
63#include <plat/cpu.h>
64#include <plat/adc.h>
Arnd Bergmann436d42c2012-08-24 15:22:12 +020065#include <linux/platform_data/i2c-s3c2410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090066#include <plat/pm.h>
67
Kukjin Kimb024043b2011-12-22 23:27:42 +010068#include "common.h"
Kukjin Kime6235922013-01-02 11:18:31 -080069#include "crag6410.h"
Kukjin Kim8bb86ea2013-01-02 13:20:38 -080070#include "regs-gpio-memport.h"
Kukjin Kima81c1972013-01-02 13:24:12 -080071#include "regs-modem.h"
Kukjin Kimf2bfd172013-01-02 13:31:15 -080072#include "regs-sys.h"
Kukjin Kimb024043b2011-12-22 23:27:42 +010073
Mark Browne1a3c742011-05-06 09:45:13 +090074/* serial port setup */
75
76#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
77#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
78#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
79
80static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
81 [0] = {
Mark Brownae24c262011-06-22 13:08:13 +090082 .hwport = 0,
83 .flags = 0,
84 .ucon = UCON,
85 .ulcon = ULCON,
86 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090087 },
88 [1] = {
Mark Brownae24c262011-06-22 13:08:13 +090089 .hwport = 1,
90 .flags = 0,
91 .ucon = UCON,
92 .ulcon = ULCON,
93 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090094 },
95 [2] = {
Mark Brownae24c262011-06-22 13:08:13 +090096 .hwport = 2,
97 .flags = 0,
98 .ucon = UCON,
99 .ulcon = ULCON,
100 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900101 },
102 [3] = {
Mark Brownae24c262011-06-22 13:08:13 +0900103 .hwport = 3,
104 .flags = 0,
105 .ucon = UCON,
106 .ulcon = ULCON,
107 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900108 },
109};
110
111static struct platform_pwm_backlight_data crag6410_backlight_data = {
112 .pwm_id = 0,
113 .max_brightness = 1000,
114 .dft_brightness = 600,
115 .pwm_period_ns = 100000, /* about 1kHz */
116};
117
118static struct platform_device crag6410_backlight_device = {
119 .name = "pwm-backlight",
120 .id = -1,
121 .dev = {
122 .parent = &s3c_device_timer[0].dev,
123 .platform_data = &crag6410_backlight_data,
124 },
125};
126
127static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
128{
129 pr_debug("%s: setting power %d\n", __func__, power);
130
131 if (power) {
132 gpio_set_value(S3C64XX_GPB(0), 1);
133 msleep(1);
134 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
135 } else {
136 gpio_direction_output(S3C64XX_GPF(14), 0);
137 gpio_set_value(S3C64XX_GPB(0), 0);
138 }
139}
140
141static struct platform_device crag6410_lcd_powerdev = {
142 .name = "platform-lcd",
143 .id = -1,
144 .dev.parent = &s3c_device_fb.dev,
145 .dev.platform_data = &(struct plat_lcd_data) {
146 .set_power = crag6410_lcd_power_set,
147 },
148};
149
150/* 640x480 URT */
151static struct s3c_fb_pd_win crag6410_fb_win0 = {
Mark Browne1a3c742011-05-06 09:45:13 +0900152 .max_bpp = 32,
153 .default_bpp = 16,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530154 .xres = 640,
155 .yres = 480,
Mark Browne1a3c742011-05-06 09:45:13 +0900156 .virtual_y = 480 * 2,
157 .virtual_x = 640,
158};
159
Thomas Abraham79d3c412012-03-24 21:58:48 +0530160static struct fb_videomode crag6410_lcd_timing = {
161 .left_margin = 150,
162 .right_margin = 80,
163 .upper_margin = 40,
164 .lower_margin = 5,
165 .hsync_len = 40,
166 .vsync_len = 5,
167 .xres = 640,
168 .yres = 480,
169};
170
Mark Browne1a3c742011-05-06 09:45:13 +0900171/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800172static struct s3c_fb_platdata crag6410_lcd_pdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900173 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530174 .vtiming = &crag6410_lcd_timing,
Mark Browne1a3c742011-05-06 09:45:13 +0900175 .win[0] = &crag6410_fb_win0,
176 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
177 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
178};
179
180/* 2x6 keypad */
181
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800182static uint32_t crag6410_keymap[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900183 /* KEY(row, col, keycode) */
184 KEY(0, 0, KEY_VOLUMEUP),
185 KEY(0, 1, KEY_HOME),
186 KEY(0, 2, KEY_VOLUMEDOWN),
187 KEY(0, 3, KEY_HELP),
188 KEY(0, 4, KEY_MENU),
189 KEY(0, 5, KEY_MEDIA),
190 KEY(1, 0, 232),
191 KEY(1, 1, KEY_DOWN),
192 KEY(1, 2, KEY_LEFT),
193 KEY(1, 3, KEY_UP),
194 KEY(1, 4, KEY_RIGHT),
195 KEY(1, 5, KEY_CAMERA),
196};
197
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800198static struct matrix_keymap_data crag6410_keymap_data = {
Mark Browne1a3c742011-05-06 09:45:13 +0900199 .keymap = crag6410_keymap,
200 .keymap_size = ARRAY_SIZE(crag6410_keymap),
201};
202
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800203static struct samsung_keypad_platdata crag6410_keypad_data = {
Mark Browne1a3c742011-05-06 09:45:13 +0900204 .keymap_data = &crag6410_keymap_data,
205 .rows = 2,
206 .cols = 6,
207};
208
209static struct gpio_keys_button crag6410_gpio_keys[] = {
210 [0] = {
211 .code = KEY_SUSPEND,
212 .gpio = S3C64XX_GPL(10), /* EINT 18 */
Mark Brownae24c262011-06-22 13:08:13 +0900213 .type = EV_KEY,
Mark Browne1a3c742011-05-06 09:45:13 +0900214 .wakeup = 1,
215 .active_low = 1,
216 },
Mark Brownae24c262011-06-22 13:08:13 +0900217 [1] = {
218 .code = SW_FRONT_PROXIMITY,
219 .gpio = S3C64XX_GPN(11), /* EINT 11 */
220 .type = EV_SW,
221 },
Mark Browne1a3c742011-05-06 09:45:13 +0900222};
223
224static struct gpio_keys_platform_data crag6410_gpio_keydata = {
225 .buttons = crag6410_gpio_keys,
226 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
227};
228
229static struct platform_device crag6410_gpio_keydev = {
230 .name = "gpio-keys",
231 .id = 0,
232 .dev.platform_data = &crag6410_gpio_keydata,
233};
234
235static struct resource crag6410_dm9k_resource[] = {
Tushar Behera8ebf1482012-05-12 16:12:26 +0900236 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
237 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
238 [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
239 | IORESOURCE_IRQ_HIGHLEVEL),
Mark Browne1a3c742011-05-06 09:45:13 +0900240};
241
242static struct dm9000_plat_data mini6410_dm9k_pdata = {
243 .flags = DM9000_PLATF_16BITONLY,
244};
245
246static struct platform_device crag6410_dm9k_device = {
247 .name = "dm9000",
248 .id = -1,
249 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
250 .resource = crag6410_dm9k_resource,
251 .dev.platform_data = &mini6410_dm9k_pdata,
252};
253
254static struct resource crag6410_mmgpio_resource[] = {
Tushar Behera8ebf1482012-05-12 16:12:26 +0900255 [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
Mark Browne1a3c742011-05-06 09:45:13 +0900256};
257
258static struct platform_device crag6410_mmgpio = {
259 .name = "basic-mmio-gpio",
260 .id = -1,
261 .resource = crag6410_mmgpio_resource,
262 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
263 .dev.platform_data = &(struct bgpio_pdata) {
Mark Brown91b60b12011-12-29 18:02:39 +0900264 .base = MMGPIO_GPIO_BASE,
Mark Browne1a3c742011-05-06 09:45:13 +0900265 },
266};
267
Mark Brownae24c262011-06-22 13:08:13 +0900268static struct platform_device speyside_device = {
269 .name = "speyside",
270 .id = -1,
271};
272
Mark Brown8c051ab2011-09-05 14:50:02 +0900273static struct platform_device lowland_device = {
274 .name = "lowland",
275 .id = -1,
276};
277
Mark Brown64142612011-11-30 13:30:27 +0000278static struct platform_device tobermory_device = {
279 .name = "tobermory",
Mark Brownae24c262011-06-22 13:08:13 +0900280 .id = -1,
281};
282
Mark Brownc5c32c92011-12-02 14:32:32 +0900283static struct platform_device littlemill_device = {
284 .name = "littlemill",
285 .id = -1,
286};
287
Mark Brown33229142012-11-28 07:30:18 +0900288static struct platform_device bells_wm2200_device = {
Mark Brown25752b72012-08-10 13:03:18 +0900289 .name = "bells",
290 .id = 0,
291};
292
Mark Brown33229142012-11-28 07:30:18 +0900293static struct platform_device bells_wm5102_device = {
Mark Brown25752b72012-08-10 13:03:18 +0900294 .name = "bells",
295 .id = 1,
296};
297
Mark Brown33229142012-11-28 07:30:18 +0900298static struct platform_device bells_wm5110_device = {
299 .name = "bells",
300 .id = 2,
301};
302
Mark Brownae24c262011-06-22 13:08:13 +0900303static struct regulator_consumer_supply wallvdd_consumers[] = {
Mark Brown554f01f2012-01-27 14:58:46 +0900304 REGULATOR_SUPPLY("SPKVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900305 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
306 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900307 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
308 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
Mark Brown402f624b2012-04-04 09:21:15 -0700309
Mark Brown479535e2012-10-17 17:41:07 +0900310 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
311 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
312 REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
313 REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
314 REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
315 REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
316
Mark Brown402f624b2012-04-04 09:21:15 -0700317 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
318 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
319 REGULATOR_SUPPLY("DC3VDD", "0-0034"),
320 REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
321 REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
322 REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
323 REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
324 REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
325 REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
326 REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
327 REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
328 REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
329 REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
330
331 REGULATOR_SUPPLY("DC1VDD", "1-0034"),
332 REGULATOR_SUPPLY("DC2VDD", "1-0034"),
333 REGULATOR_SUPPLY("DC3VDD", "1-0034"),
Mark Brownf4fe3882012-11-28 07:32:10 +0900334 REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
335 REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
336 REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
337 REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
338 REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
339 REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
340 REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
341 REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
342 REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
343 REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
Mark Brownae24c262011-06-22 13:08:13 +0900344};
345
346static struct regulator_init_data wallvdd_data = {
347 .constraints = {
348 .always_on = 1,
349 },
350 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
351 .consumer_supplies = wallvdd_consumers,
352};
353
354static struct fixed_voltage_config wallvdd_pdata = {
355 .supply_name = "WALLVDD",
356 .microvolts = 5000000,
357 .init_data = &wallvdd_data,
358 .gpio = -EINVAL,
359};
360
361static struct platform_device wallvdd_device = {
362 .name = "reg-fixed-voltage",
363 .id = -1,
364 .dev = {
365 .platform_data = &wallvdd_pdata,
366 },
367};
368
Mark Browne1a3c742011-05-06 09:45:13 +0900369static struct platform_device *crag6410_devices[] __initdata = {
370 &s3c_device_hsmmc0,
Mark Browne1a3c742011-05-06 09:45:13 +0900371 &s3c_device_hsmmc2,
372 &s3c_device_i2c0,
373 &s3c_device_i2c1,
374 &s3c_device_fb,
375 &s3c_device_ohci,
376 &s3c_device_usb_hsotg,
Mark Browne1a3c742011-05-06 09:45:13 +0900377 &s3c_device_timer[0],
378 &s3c64xx_device_iis0,
379 &s3c64xx_device_iis1,
Mark Browne1a3c742011-05-06 09:45:13 +0900380 &samsung_device_keypad,
381 &crag6410_gpio_keydev,
382 &crag6410_dm9k_device,
383 &s3c64xx_device_spi0,
384 &crag6410_mmgpio,
385 &crag6410_lcd_powerdev,
386 &crag6410_backlight_device,
Mark Brownae24c262011-06-22 13:08:13 +0900387 &speyside_device,
Mark Brown64142612011-11-30 13:30:27 +0000388 &tobermory_device,
Mark Brownc5c32c92011-12-02 14:32:32 +0900389 &littlemill_device,
Mark Brown8c051ab2011-09-05 14:50:02 +0900390 &lowland_device,
Mark Brown33229142012-11-28 07:30:18 +0900391 &bells_wm2200_device,
Mark Brown25752b72012-08-10 13:03:18 +0900392 &bells_wm5102_device,
393 &bells_wm5110_device,
Mark Brownae24c262011-06-22 13:08:13 +0900394 &wallvdd_device,
Mark Browne1a3c742011-05-06 09:45:13 +0900395};
396
397static struct pca953x_platform_data crag6410_pca_data = {
398 .gpio_base = PCA935X_GPIO_BASE,
Mark Brown6e11e0b2011-12-30 09:46:40 +0900399 .irq_base = -1,
Mark Browne1a3c742011-05-06 09:45:13 +0900400};
401
Mark Brown986afc92011-08-12 18:08:17 +0900402/* VDDARM is controlled by DVS1 connected to GPK(0) */
403static struct wm831x_buckv_pdata vddarm_pdata = {
404 .dvs_control_src = 1,
405 .dvs_gpio = S3C64XX_GPK(0),
406};
407
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800408static struct regulator_consumer_supply vddarm_consumers[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900409 REGULATOR_SUPPLY("vddarm", NULL),
410};
411
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800412static struct regulator_init_data vddarm = {
Mark Browne1a3c742011-05-06 09:45:13 +0900413 .constraints = {
414 .name = "VDDARM",
415 .min_uV = 1000000,
416 .max_uV = 1300000,
417 .always_on = 1,
418 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
419 },
420 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
421 .consumer_supplies = vddarm_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900422 .supply_regulator = "WALLVDD",
Mark Brown986afc92011-08-12 18:08:17 +0900423 .driver_data = &vddarm_pdata,
Mark Browne1a3c742011-05-06 09:45:13 +0900424};
425
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800426static struct regulator_consumer_supply vddint_consumers[] = {
Mark Brown39cb2632011-12-08 10:52:19 +0900427 REGULATOR_SUPPLY("vddint", NULL),
428};
429
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800430static struct regulator_init_data vddint = {
Mark Browne1a3c742011-05-06 09:45:13 +0900431 .constraints = {
432 .name = "VDDINT",
433 .min_uV = 1000000,
434 .max_uV = 1200000,
435 .always_on = 1,
436 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
437 },
Mark Brown39cb2632011-12-08 10:52:19 +0900438 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
439 .consumer_supplies = vddint_consumers,
440 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900441};
442
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800443static struct regulator_init_data vddmem = {
Mark Browne1a3c742011-05-06 09:45:13 +0900444 .constraints = {
445 .name = "VDDMEM",
446 .always_on = 1,
447 },
448};
449
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800450static struct regulator_init_data vddsys = {
Mark Browne1a3c742011-05-06 09:45:13 +0900451 .constraints = {
452 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
453 .always_on = 1,
454 },
455};
456
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800457static struct regulator_consumer_supply vddmmc_consumers[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900458 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
459 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
460 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
461};
462
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800463static struct regulator_init_data vddmmc = {
Mark Browne1a3c742011-05-06 09:45:13 +0900464 .constraints = {
465 .name = "VDDMMC,UH",
466 .always_on = 1,
467 },
468 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
469 .consumer_supplies = vddmmc_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900470 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900471};
472
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800473static struct regulator_init_data vddotgi = {
Mark Browne1a3c742011-05-06 09:45:13 +0900474 .constraints = {
475 .name = "VDDOTGi",
476 .always_on = 1,
477 },
Mark Brown35127292011-06-22 13:08:17 +0900478 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900479};
480
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800481static struct regulator_init_data vddotg = {
Mark Browne1a3c742011-05-06 09:45:13 +0900482 .constraints = {
483 .name = "VDDOTG",
484 .always_on = 1,
485 },
Mark Brown35127292011-06-22 13:08:17 +0900486 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900487};
488
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800489static struct regulator_init_data vddhi = {
Mark Browne1a3c742011-05-06 09:45:13 +0900490 .constraints = {
491 .name = "VDDHI",
492 .always_on = 1,
493 },
Mark Brown35127292011-06-22 13:08:17 +0900494 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900495};
496
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800497static struct regulator_init_data vddadc = {
Mark Browne1a3c742011-05-06 09:45:13 +0900498 .constraints = {
499 .name = "VDDADC,VDDDAC",
500 .always_on = 1,
501 },
Mark Brown35127292011-06-22 13:08:17 +0900502 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900503};
504
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800505static struct regulator_init_data vddmem0 = {
Mark Browne1a3c742011-05-06 09:45:13 +0900506 .constraints = {
507 .name = "VDDMEM0",
508 .always_on = 1,
509 },
Mark Brown35127292011-06-22 13:08:17 +0900510 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900511};
512
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800513static struct regulator_init_data vddpll = {
Mark Browne1a3c742011-05-06 09:45:13 +0900514 .constraints = {
515 .name = "VDDPLL",
516 .always_on = 1,
517 },
Mark Brown35127292011-06-22 13:08:17 +0900518 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900519};
520
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800521static struct regulator_init_data vddlcd = {
Mark Browne1a3c742011-05-06 09:45:13 +0900522 .constraints = {
523 .name = "VDDLCD",
524 .always_on = 1,
525 },
Mark Brown35127292011-06-22 13:08:17 +0900526 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900527};
528
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800529static struct regulator_init_data vddalive = {
Mark Browne1a3c742011-05-06 09:45:13 +0900530 .constraints = {
531 .name = "VDDALIVE",
532 .always_on = 1,
533 },
Mark Brown35127292011-06-22 13:08:17 +0900534 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900535};
536
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800537static struct wm831x_backup_pdata banff_backup_pdata = {
Mark Brown89e1c3d2011-07-21 01:26:24 +0900538 .charger_enable = 1,
539 .vlim = 2500, /* mV */
540 .ilim = 200, /* uA */
541};
542
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800543static struct wm831x_status_pdata banff_red_led = {
Mark Browne1a3c742011-05-06 09:45:13 +0900544 .name = "banff:red:",
545 .default_src = WM831X_STATUS_MANUAL,
546};
547
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800548static struct wm831x_status_pdata banff_green_led = {
Mark Browne1a3c742011-05-06 09:45:13 +0900549 .name = "banff:green:",
550 .default_src = WM831X_STATUS_MANUAL,
551};
552
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800553static struct wm831x_touch_pdata touch_pdata = {
Mark Browne1a3c742011-05-06 09:45:13 +0900554 .data_irq = S3C_EINT(26),
Mark Brownae24c262011-06-22 13:08:13 +0900555 .pd_irq = S3C_EINT(27),
Mark Browne1a3c742011-05-06 09:45:13 +0900556};
557
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800558static struct wm831x_pdata crag_pmic_pdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900559 .wm831x_num = 1,
Mark Brownaaed44e2011-11-03 16:28:15 +0900560 .gpio_base = BANFF_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900561 .soft_shutdown = true,
Mark Browne1a3c742011-05-06 09:45:13 +0900562
Mark Brown89e1c3d2011-07-21 01:26:24 +0900563 .backup = &banff_backup_pdata,
564
Mark Brownae24c262011-06-22 13:08:13 +0900565 .gpio_defaults = {
Mark Brown986afc92011-08-12 18:08:17 +0900566 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
567 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
Mark Brownae24c262011-06-22 13:08:13 +0900568 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
569 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
570 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
571 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
572 },
573
Mark Browne1a3c742011-05-06 09:45:13 +0900574 .dcdc = {
575 &vddarm, /* DCDC1 */
576 &vddint, /* DCDC2 */
577 &vddmem, /* DCDC3 */
578 },
579
580 .ldo = {
581 &vddsys, /* LDO1 */
582 &vddmmc, /* LDO2 */
583 NULL, /* LDO3 */
584 &vddotgi, /* LDO4 */
585 &vddotg, /* LDO5 */
586 &vddhi, /* LDO6 */
587 &vddadc, /* LDO7 */
588 &vddmem0, /* LDO8 */
589 &vddpll, /* LDO9 */
590 &vddlcd, /* LDO10 */
591 &vddalive, /* LDO11 */
592 },
593
594 .status = {
595 &banff_green_led,
596 &banff_red_led,
597 },
598
599 .touch = &touch_pdata,
600};
601
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800602static struct i2c_board_info i2c_devs0[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900603 { I2C_BOARD_INFO("24c08", 0x50), },
604 { I2C_BOARD_INFO("tca6408", 0x20),
605 .platform_data = &crag6410_pca_data,
606 },
607 { I2C_BOARD_INFO("wm8312", 0x34),
608 .platform_data = &crag_pmic_pdata,
609 .irq = S3C_EINT(23),
610 },
611};
612
613static struct s3c2410_platform_i2c i2c0_pdata = {
614 .frequency = 400000,
615};
616
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800617static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
Mark Browncda23492012-01-12 11:04:56 +0900618 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
619 REGULATOR_SUPPLY("AVDD", "spi0.0"),
Mark Brown479535e2012-10-17 17:41:07 +0900620 REGULATOR_SUPPLY("AVDD", "spi0.1"),
Mark Browncda23492012-01-12 11:04:56 +0900621};
622
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800623static struct regulator_init_data pvdd_1v2 = {
Mark Brownae24c262011-06-22 13:08:13 +0900624 .constraints = {
625 .name = "PVDD_1V2",
Mark Browncda23492012-01-12 11:04:56 +0900626 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
Mark Brownae24c262011-06-22 13:08:13 +0900627 },
Mark Browncda23492012-01-12 11:04:56 +0900628
629 .consumer_supplies = pvdd_1v2_consumers,
630 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
Mark Brownae24c262011-06-22 13:08:13 +0900631};
632
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800633static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
Mark Brownd5160ec2011-09-26 13:18:28 +0900634 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900635 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
636 REGULATOR_SUPPLY("DBVDD", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900637 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
638 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
639 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900640 REGULATOR_SUPPLY("CPVDD", "1-001a"),
641 REGULATOR_SUPPLY("AVDD2", "1-001a"),
642 REGULATOR_SUPPLY("DCVDD", "1-001a"),
643 REGULATOR_SUPPLY("AVDD", "1-001a"),
Mark Browncda23492012-01-12 11:04:56 +0900644 REGULATOR_SUPPLY("DBVDD", "spi0.0"),
Mark Browne6a194b2012-10-17 17:41:09 +0900645
646 REGULATOR_SUPPLY("DBVDD", "1-003a"),
647 REGULATOR_SUPPLY("LDOVDD", "1-003a"),
648 REGULATOR_SUPPLY("CPVDD", "1-003a"),
649 REGULATOR_SUPPLY("AVDD", "1-003a"),
Mark Brown479535e2012-10-17 17:41:07 +0900650 REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
651 REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
652 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
653 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
654 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
655
656 REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
657 REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
658 REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
659
660 REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
661 REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
662 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
Mark Brownae24c262011-06-22 13:08:13 +0900663};
664
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800665static struct regulator_init_data pvdd_1v8 = {
Mark Brownae24c262011-06-22 13:08:13 +0900666 .constraints = {
667 .name = "PVDD_1V8",
668 .always_on = 1,
669 },
670
671 .consumer_supplies = pvdd_1v8_consumers,
672 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
673};
674
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800675static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
Mark Brownae24c262011-06-22 13:08:13 +0900676 REGULATOR_SUPPLY("MICVDD", "1-001a"),
677 REGULATOR_SUPPLY("AVDD1", "1-001a"),
678};
679
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800680static struct regulator_init_data pvdd_3v3 = {
Mark Brownae24c262011-06-22 13:08:13 +0900681 .constraints = {
682 .name = "PVDD_3V3",
683 .always_on = 1,
684 },
685
686 .consumer_supplies = pvdd_3v3_consumers,
687 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
688};
689
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800690static struct wm831x_pdata glenfarclas_pmic_pdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900691 .wm831x_num = 2,
692 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
693 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900694 .soft_shutdown = true,
Mark Brownae24c262011-06-22 13:08:13 +0900695
696 .gpio_defaults = {
697 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
698 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
699 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
700 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
701 },
702
703 .dcdc = {
704 &pvdd_1v2, /* DCDC1 */
705 &pvdd_1v8, /* DCDC2 */
706 &pvdd_3v3, /* DCDC3 */
707 },
708
709 .disable_touch = true,
710};
711
Mark Brown8504a3c2011-12-02 14:29:07 +0900712static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
713 .gpios = {
714 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
715 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
716 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
717 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
718 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
719 },
720};
721
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800722static struct i2c_board_info i2c_devs1[] = {
Mark Browne1a3c742011-05-06 09:45:13 +0900723 { I2C_BOARD_INFO("wm8311", 0x34),
Mark Brownae24c262011-06-22 13:08:13 +0900724 .irq = S3C_EINT(0),
725 .platform_data = &glenfarclas_pmic_pdata },
726
Mark Brown091cff02012-10-17 17:41:10 +0900727 { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
Mark Brownea070cd2012-05-16 07:01:10 +0900728 { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
Mark Brownd0f0b432011-08-19 22:40:07 +0900729 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
730 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
731 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
732
Mark Brown8504a3c2011-12-02 14:29:07 +0900733 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
734 .platform_data = &wm1250_ev1_pdata },
Mark Browne1a3c742011-05-06 09:45:13 +0900735};
736
Mark Brown8351c7a2011-12-02 14:29:07 +0900737static struct s3c2410_platform_i2c i2c1_pdata = {
738 .frequency = 400000,
739 .bus_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900740};
741
742static void __init crag6410_map_io(void)
743{
744 s3c64xx_init_io(NULL, 0);
745 s3c24xx_init_clocks(12000000);
746 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
747
748 /* LCD type and Bypass set by bootloader */
749}
750
751static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
752 .max_width = 4,
753 .cd_type = S3C_SDHCI_CD_PERMANENT,
Mark Browna9294cd2011-12-30 13:44:36 +0900754 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900755};
756
Mark Browne1a3c742011-05-06 09:45:13 +0900757static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
758{
759 /* Set all the necessary GPG pins to special-function 2 */
760 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
761
762 /* force card-detected for prototype 0 */
763 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
764}
765
766static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
767 .max_width = 4,
768 .cd_type = S3C_SDHCI_CD_INTERNAL,
769 .cfg_gpio = crag6410_cfg_sdhci0,
Mark Brownfb7f60f2011-12-30 13:44:31 +0900770 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900771};
772
Mark Brown66211f92011-12-29 18:05:29 +0900773static const struct gpio_led gpio_leds[] = {
774 {
775 .name = "d13:green:",
776 .gpio = MMGPIO_GPIO_BASE + 0,
777 .default_state = LEDS_GPIO_DEFSTATE_ON,
778 },
779 {
780 .name = "d14:green:",
781 .gpio = MMGPIO_GPIO_BASE + 1,
782 .default_state = LEDS_GPIO_DEFSTATE_ON,
783 },
784 {
785 .name = "d15:green:",
786 .gpio = MMGPIO_GPIO_BASE + 2,
787 .default_state = LEDS_GPIO_DEFSTATE_ON,
788 },
789 {
790 .name = "d16:green:",
791 .gpio = MMGPIO_GPIO_BASE + 3,
792 .default_state = LEDS_GPIO_DEFSTATE_ON,
793 },
794 {
795 .name = "d17:green:",
796 .gpio = MMGPIO_GPIO_BASE + 4,
797 .default_state = LEDS_GPIO_DEFSTATE_ON,
798 },
799 {
800 .name = "d18:green:",
801 .gpio = MMGPIO_GPIO_BASE + 5,
802 .default_state = LEDS_GPIO_DEFSTATE_ON,
803 },
804 {
805 .name = "d19:green:",
806 .gpio = MMGPIO_GPIO_BASE + 6,
807 .default_state = LEDS_GPIO_DEFSTATE_ON,
808 },
809 {
810 .name = "d20:green:",
811 .gpio = MMGPIO_GPIO_BASE + 7,
812 .default_state = LEDS_GPIO_DEFSTATE_ON,
813 },
814};
815
816static const struct gpio_led_platform_data gpio_leds_pdata = {
817 .leds = gpio_leds,
818 .num_leds = ARRAY_SIZE(gpio_leds),
Mark Browne1a3c742011-05-06 09:45:13 +0900819};
820
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800821static struct s3c_hsotg_plat crag6410_hsotg_pdata;
822
Mark Browne1a3c742011-05-06 09:45:13 +0900823static void __init crag6410_machine_init(void)
824{
825 /* Open drain IRQs need pullups */
826 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
827 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
828
829 gpio_request(S3C64XX_GPB(0), "LCD power");
830 gpio_direction_output(S3C64XX_GPB(0), 0);
831
832 gpio_request(S3C64XX_GPF(14), "LCD PWM");
833 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
834
835 gpio_request(S3C64XX_GPB(1), "SD power");
836 gpio_direction_output(S3C64XX_GPB(1), 0);
837
838 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
839 gpio_direction_output(S3C64XX_GPF(10), 1);
840
841 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900842 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
843
844 s3c_i2c0_set_platdata(&i2c0_pdata);
Mark Brown8351c7a2011-12-02 14:29:07 +0900845 s3c_i2c1_set_platdata(&i2c1_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900846 s3c_fb_set_platdata(&crag6410_lcd_pdata);
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800847 s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900848
849 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
850 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
851
852 samsung_keypad_set_platdata(&crag6410_keypad_data);
Mark Brown479535e2012-10-17 17:41:07 +0900853 s3c64xx_spi0_set_platdata(NULL, 0, 2);
Mark Browne1a3c742011-05-06 09:45:13 +0900854
855 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
856
Mark Brown66211f92011-12-29 18:05:29 +0900857 gpio_led_register_device(-1, &gpio_leds_pdata);
858
Mark Brownae24c262011-06-22 13:08:13 +0900859 regulator_has_full_constraints();
860
Mark Brownc656c302011-12-08 23:27:48 +0100861 s3c64xx_pm_init();
Mark Browne1a3c742011-05-06 09:45:13 +0900862}
863
864MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
865 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
Nicolas Pitre170a5902011-07-05 22:38:17 -0400866 .atag_offset = 0x100,
Mark Browne1a3c742011-05-06 09:45:13 +0900867 .init_irq = s3c6410_init_irq,
Mark Browne1a3c742011-05-06 09:45:13 +0900868 .map_io = crag6410_map_io,
869 .init_machine = crag6410_machine_init,
Shawn Guocc8f2522012-04-26 21:08:52 +0800870 .init_late = s3c64xx_init_late,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700871 .init_time = s3c24xx_timer_init,
Kukjin Kimff84ded2012-01-03 14:03:30 +0100872 .restart = s3c64xx_restart,
Mark Browne1a3c742011-05-06 09:45:13 +0900873MACHINE_END