blob: 7df26d4b7ad8b5775c97df7e5ab3fdab315195e5 [file] [log] [blame]
Dave Airlief453ba02008-11-07 14:05:41 -08001/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
Adam Jackson61e57a82010-03-29 21:43:18 +00005 * Copyright 2010 Red Hat, Inc.
Dave Airlief453ba02008-11-07 14:05:41 -08006 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Thierry Reding10a85122012-11-21 15:31:35 +010032#include <linux/hdmi.h>
Dave Airlief453ba02008-11-07 14:05:41 -080033#include <linux/i2c.h>
Adam Jackson47819ba2012-05-30 16:42:39 -040034#include <linux/module.h>
Lukas Wunner5cb8eaa2016-01-11 20:09:20 +010035#include <linux/vga_switcheroo.h>
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/drmP.h>
37#include <drm/drm_edid.h>
Dave Airlie40d9b042014-10-20 16:29:33 +100038#include <drm/drm_displayid.h>
Dave Airlief453ba02008-11-07 14:05:41 -080039
Adam Jackson13931572010-08-03 14:38:19 -040040#define version_greater(edid, maj, min) \
41 (((edid)->version > (maj)) || \
42 ((edid)->version == (maj) && (edid)->revision > (min)))
Dave Airlief453ba02008-11-07 14:05:41 -080043
Adam Jacksond1ff6402010-03-29 21:43:26 +000044#define EDID_EST_TIMINGS 16
45#define EDID_STD_TIMINGS 8
46#define EDID_DETAILED_TIMINGS 4
Dave Airlief453ba02008-11-07 14:05:41 -080047
48/*
49 * EDID blocks out in the wild have a variety of bugs, try to collect
50 * them here (note that userspace may work around broken monitors first,
51 * but fixes should make their way here so that the kernel "just works"
52 * on as many displays as possible).
53 */
54
55/* First detailed mode wrong, use largest 60Hz mode */
56#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
57/* Reported 135MHz pixel clock is too high, needs adjustment */
58#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
59/* Prefer the largest mode at 75 Hz */
60#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
61/* Detail timing is in cm not mm */
62#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
63/* Detailed timing descriptors have bogus size values, so just take the
64 * maximum size and use that.
65 */
66#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
67/* Monitor forgot to set the first detailed is preferred bit. */
68#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
69/* use +hsync +vsync for detailed mode */
70#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
Adam Jacksonbc42aab2012-05-23 16:26:54 -040071/* Force reduced-blanking timings for detailed modes */
72#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
Rafał Miłecki49d45a312013-12-07 13:22:42 +010073/* Force 8bpc */
74#define EDID_QUIRK_FORCE_8BPC (1 << 8)
Mario Kleinerbc5b9642014-05-23 21:40:55 +020075/* Force 12bpc */
76#define EDID_QUIRK_FORCE_12BPC (1 << 9)
Alex Deucher3c537882010-02-05 04:21:19 -050077
Adam Jackson13931572010-08-03 14:38:19 -040078struct detailed_mode_closure {
79 struct drm_connector *connector;
80 struct edid *edid;
81 bool preferred;
82 u32 quirks;
83 int modes;
84};
Dave Airlief453ba02008-11-07 14:05:41 -080085
Zhao Yakui5c612592009-06-22 13:17:10 +080086#define LEVEL_DMT 0
87#define LEVEL_GTF 1
Adam Jackson7a374352010-03-29 21:43:30 +000088#define LEVEL_GTF2 2
89#define LEVEL_CVT 3
Zhao Yakui5c612592009-06-22 13:17:10 +080090
Dave Airlief453ba02008-11-07 14:05:41 -080091static struct edid_quirk {
Ian Pilcherc51a3fd62012-04-22 11:40:26 -050092 char vendor[4];
Dave Airlief453ba02008-11-07 14:05:41 -080093 int product_id;
94 u32 quirks;
95} edid_quirk_list[] = {
96 /* Acer AL1706 */
97 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
98 /* Acer F51 */
99 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
100 /* Unknown Acer */
101 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102
103 /* Belinea 10 15 55 */
104 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
105 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
106
107 /* Envision Peripherals, Inc. EN-7100e */
108 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
Adam Jacksonba1163d2010-04-06 16:11:00 +0000109 /* Envision EN2028 */
110 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
Dave Airlief453ba02008-11-07 14:05:41 -0800111
112 /* Funai Electronics PM36B */
113 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
114 EDID_QUIRK_DETAILED_IN_CM },
115
116 /* LG Philips LCD LP154W01-A5 */
117 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
118 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
119
120 /* Philips 107p5 CRT */
121 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
122
123 /* Proview AY765C */
124 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
125
126 /* Samsung SyncMaster 205BW. Note: irony */
127 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
128 /* Samsung SyncMaster 22[5-6]BW */
129 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
130 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
Adam Jacksonbc42aab2012-05-23 16:26:54 -0400131
Mario Kleinerbc5b9642014-05-23 21:40:55 +0200132 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
133 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
134
Adam Jacksonbc42aab2012-05-23 16:26:54 -0400135 /* ViewSonic VA2026w */
136 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
Alex Deucher118bdbd2013-08-12 11:04:29 -0400137
138 /* Medion MD 30217 PG */
139 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
Rafał Miłecki49d45a312013-12-07 13:22:42 +0100140
141 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
142 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
Dave Airlief453ba02008-11-07 14:05:41 -0800143};
144
Thierry Redinga6b21832012-11-23 15:01:42 +0100145/*
146 * Autogenerated from the DMT spec.
147 * This table is copied from xfree86/modes/xf86EdidModes.c.
148 */
149static const struct drm_display_mode drm_dmt_modes[] = {
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300150 /* 0x01 - 640x350@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100151 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
152 736, 832, 0, 350, 382, 385, 445, 0,
153 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300154 /* 0x02 - 640x400@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100155 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
156 736, 832, 0, 400, 401, 404, 445, 0,
157 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300158 /* 0x03 - 720x400@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100159 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
160 828, 936, 0, 400, 401, 404, 446, 0,
161 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300162 /* 0x04 - 640x480@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100163 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300164 752, 800, 0, 480, 490, 492, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100165 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300166 /* 0x05 - 640x480@72Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100167 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
168 704, 832, 0, 480, 489, 492, 520, 0,
169 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300170 /* 0x06 - 640x480@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100171 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
172 720, 840, 0, 480, 481, 484, 500, 0,
173 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300174 /* 0x07 - 640x480@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100175 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
176 752, 832, 0, 480, 481, 484, 509, 0,
177 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300178 /* 0x08 - 800x600@56Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100179 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
180 896, 1024, 0, 600, 601, 603, 625, 0,
181 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300182 /* 0x09 - 800x600@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100183 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
184 968, 1056, 0, 600, 601, 605, 628, 0,
185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300186 /* 0x0a - 800x600@72Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100187 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
188 976, 1040, 0, 600, 637, 643, 666, 0,
189 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300190 /* 0x0b - 800x600@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100191 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
192 896, 1056, 0, 600, 601, 604, 625, 0,
193 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300194 /* 0x0c - 800x600@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100195 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
196 896, 1048, 0, 600, 601, 604, 631, 0,
197 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300198 /* 0x0d - 800x600@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100199 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
200 880, 960, 0, 600, 603, 607, 636, 0,
201 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300202 /* 0x0e - 848x480@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100203 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
204 976, 1088, 0, 480, 486, 494, 517, 0,
205 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300206 /* 0x0f - 1024x768@43Hz, interlace */
Thierry Redinga6b21832012-11-23 15:01:42 +0100207 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
Paul Parsons735b1002016-04-04 20:36:34 +0100208 1208, 1264, 0, 768, 768, 776, 817, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100209 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300210 DRM_MODE_FLAG_INTERLACE) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300211 /* 0x10 - 1024x768@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100212 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
213 1184, 1344, 0, 768, 771, 777, 806, 0,
214 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300215 /* 0x11 - 1024x768@70Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100216 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
217 1184, 1328, 0, 768, 771, 777, 806, 0,
218 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300219 /* 0x12 - 1024x768@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100220 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
221 1136, 1312, 0, 768, 769, 772, 800, 0,
222 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300223 /* 0x13 - 1024x768@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100224 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
225 1168, 1376, 0, 768, 769, 772, 808, 0,
226 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300227 /* 0x14 - 1024x768@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100228 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
229 1104, 1184, 0, 768, 771, 775, 813, 0,
230 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300231 /* 0x15 - 1152x864@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100232 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
233 1344, 1600, 0, 864, 865, 868, 900, 0,
234 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300235 /* 0x55 - 1280x720@60Hz */
236 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
237 1430, 1650, 0, 720, 725, 730, 750, 0,
238 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300239 /* 0x16 - 1280x768@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100240 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
241 1360, 1440, 0, 768, 771, 778, 790, 0,
242 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300243 /* 0x17 - 1280x768@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100244 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
245 1472, 1664, 0, 768, 771, 778, 798, 0,
246 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300247 /* 0x18 - 1280x768@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100248 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
249 1488, 1696, 0, 768, 771, 778, 805, 0,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300250 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300251 /* 0x19 - 1280x768@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100252 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
253 1496, 1712, 0, 768, 771, 778, 809, 0,
254 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300255 /* 0x1a - 1280x768@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100256 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
257 1360, 1440, 0, 768, 771, 778, 813, 0,
258 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300259 /* 0x1b - 1280x800@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100260 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
261 1360, 1440, 0, 800, 803, 809, 823, 0,
262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300263 /* 0x1c - 1280x800@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100264 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
265 1480, 1680, 0, 800, 803, 809, 831, 0,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300266 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300267 /* 0x1d - 1280x800@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100268 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
269 1488, 1696, 0, 800, 803, 809, 838, 0,
270 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300271 /* 0x1e - 1280x800@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100272 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
273 1496, 1712, 0, 800, 803, 809, 843, 0,
274 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300275 /* 0x1f - 1280x800@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100276 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
277 1360, 1440, 0, 800, 803, 809, 847, 0,
278 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300279 /* 0x20 - 1280x960@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100280 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
281 1488, 1800, 0, 960, 961, 964, 1000, 0,
282 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300283 /* 0x21 - 1280x960@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100284 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
285 1504, 1728, 0, 960, 961, 964, 1011, 0,
286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300287 /* 0x22 - 1280x960@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100288 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
289 1360, 1440, 0, 960, 963, 967, 1017, 0,
290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300291 /* 0x23 - 1280x1024@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100292 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
293 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
294 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300295 /* 0x24 - 1280x1024@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100296 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
297 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300299 /* 0x25 - 1280x1024@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100300 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
301 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
302 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300303 /* 0x26 - 1280x1024@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100304 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
305 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
306 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300307 /* 0x27 - 1360x768@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100308 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
309 1536, 1792, 0, 768, 771, 777, 795, 0,
310 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300311 /* 0x28 - 1360x768@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100312 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
313 1440, 1520, 0, 768, 771, 776, 813, 0,
314 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300315 /* 0x51 - 1366x768@60Hz */
316 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
317 1579, 1792, 0, 768, 771, 774, 798, 0,
318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
319 /* 0x56 - 1366x768@60Hz */
320 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
321 1436, 1500, 0, 768, 769, 772, 800, 0,
322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300323 /* 0x29 - 1400x1050@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100324 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
325 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
326 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300327 /* 0x2a - 1400x1050@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100328 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
329 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300331 /* 0x2b - 1400x1050@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100332 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
333 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300335 /* 0x2c - 1400x1050@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100336 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
337 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
338 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300339 /* 0x2d - 1400x1050@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100340 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
341 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300343 /* 0x2e - 1440x900@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100344 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
345 1520, 1600, 0, 900, 903, 909, 926, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300347 /* 0x2f - 1440x900@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100348 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
349 1672, 1904, 0, 900, 903, 909, 934, 0,
350 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300351 /* 0x30 - 1440x900@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100352 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
353 1688, 1936, 0, 900, 903, 909, 942, 0,
354 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300355 /* 0x31 - 1440x900@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100356 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
357 1696, 1952, 0, 900, 903, 909, 948, 0,
358 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300359 /* 0x32 - 1440x900@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100360 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
361 1520, 1600, 0, 900, 903, 909, 953, 0,
362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300363 /* 0x53 - 1600x900@60Hz */
364 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
365 1704, 1800, 0, 900, 901, 904, 1000, 0,
366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300367 /* 0x33 - 1600x1200@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100368 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
369 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
370 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300371 /* 0x34 - 1600x1200@65Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100372 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
373 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
374 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300375 /* 0x35 - 1600x1200@70Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100376 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
377 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
378 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300379 /* 0x36 - 1600x1200@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100380 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
381 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
382 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300383 /* 0x37 - 1600x1200@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100384 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
385 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
386 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300387 /* 0x38 - 1600x1200@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100388 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
389 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
390 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300391 /* 0x39 - 1680x1050@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100392 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
393 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
394 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300395 /* 0x3a - 1680x1050@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100396 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
397 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300399 /* 0x3b - 1680x1050@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100400 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
401 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300403 /* 0x3c - 1680x1050@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100404 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
405 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
406 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300407 /* 0x3d - 1680x1050@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100408 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
409 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300411 /* 0x3e - 1792x1344@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100412 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
413 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
414 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300415 /* 0x3f - 1792x1344@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100416 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
417 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
418 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300419 /* 0x40 - 1792x1344@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100420 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
421 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300423 /* 0x41 - 1856x1392@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100424 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
425 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
426 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300427 /* 0x42 - 1856x1392@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100428 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
Ville Syrjäläfcf22d02015-04-02 17:02:09 +0300429 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300431 /* 0x43 - 1856x1392@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100432 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
433 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300435 /* 0x52 - 1920x1080@60Hz */
436 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
437 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
438 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300439 /* 0x44 - 1920x1200@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100440 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
441 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300443 /* 0x45 - 1920x1200@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100444 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
445 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300447 /* 0x46 - 1920x1200@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100448 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
449 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300451 /* 0x47 - 1920x1200@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100452 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
453 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300455 /* 0x48 - 1920x1200@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100456 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
457 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300459 /* 0x49 - 1920x1440@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100460 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
461 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
462 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300463 /* 0x4a - 1920x1440@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100464 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
465 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300467 /* 0x4b - 1920x1440@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100468 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
469 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300471 /* 0x54 - 2048x1152@60Hz */
472 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
473 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300475 /* 0x4c - 2560x1600@60Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100476 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
477 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300479 /* 0x4d - 2560x1600@60Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100480 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
481 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300483 /* 0x4e - 2560x1600@75Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100484 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
485 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
486 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300487 /* 0x4f - 2560x1600@85Hz */
Thierry Redinga6b21832012-11-23 15:01:42 +0100488 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
489 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
Ville Syrjälä24b856b2015-04-02 17:02:10 +0300491 /* 0x50 - 2560x1600@120Hz RB */
Thierry Redinga6b21832012-11-23 15:01:42 +0100492 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
493 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Ville Syrjäläbfcd74d2015-04-02 17:02:11 +0300495 /* 0x57 - 4096x2160@60Hz RB */
496 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
497 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
499 /* 0x58 - 4096x2160@59.94Hz RB */
500 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
501 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
Thierry Redinga6b21832012-11-23 15:01:42 +0100503};
504
Ville Syrjäläe7bfa5c2013-10-14 16:44:27 +0300505/*
506 * These more or less come from the DMT spec. The 720x400 modes are
507 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
508 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
509 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
510 * mode.
511 *
512 * The DMT modes have been fact-checked; the rest are mild guesses.
513 */
Thierry Redinga6b21832012-11-23 15:01:42 +0100514static const struct drm_display_mode edid_est_modes[] = {
515 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
516 968, 1056, 0, 600, 601, 605, 628, 0,
517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
518 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
519 896, 1024, 0, 600, 601, 603, 625, 0,
520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
521 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
522 720, 840, 0, 480, 481, 484, 500, 0,
523 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
524 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
Paul Parsons87707cf2016-04-02 11:08:06 +0100525 704, 832, 0, 480, 489, 492, 520, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100526 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
527 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
528 768, 864, 0, 480, 483, 486, 525, 0,
529 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
Paul Parsons87707cf2016-04-02 11:08:06 +0100530 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
Thierry Redinga6b21832012-11-23 15:01:42 +0100531 752, 800, 0, 480, 490, 492, 525, 0,
532 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
533 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
534 846, 900, 0, 400, 421, 423, 449, 0,
535 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
536 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
537 846, 900, 0, 400, 412, 414, 449, 0,
538 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
539 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
540 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
541 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
Paul Parsons87707cf2016-04-02 11:08:06 +0100542 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
Thierry Redinga6b21832012-11-23 15:01:42 +0100543 1136, 1312, 0, 768, 769, 772, 800, 0,
544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
545 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
546 1184, 1328, 0, 768, 771, 777, 806, 0,
547 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
548 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
549 1184, 1344, 0, 768, 771, 777, 806, 0,
550 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
551 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
552 1208, 1264, 0, 768, 768, 776, 817, 0,
553 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
554 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
555 928, 1152, 0, 624, 625, 628, 667, 0,
556 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
557 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
558 896, 1056, 0, 600, 601, 604, 625, 0,
559 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
560 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
561 976, 1040, 0, 600, 637, 643, 666, 0,
562 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
563 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
564 1344, 1600, 0, 864, 865, 868, 900, 0,
565 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
566};
567
568struct minimode {
569 short w;
570 short h;
571 short r;
572 short rb;
573};
574
575static const struct minimode est3_modes[] = {
576 /* byte 6 */
577 { 640, 350, 85, 0 },
578 { 640, 400, 85, 0 },
579 { 720, 400, 85, 0 },
580 { 640, 480, 85, 0 },
581 { 848, 480, 60, 0 },
582 { 800, 600, 85, 0 },
583 { 1024, 768, 85, 0 },
584 { 1152, 864, 75, 0 },
585 /* byte 7 */
586 { 1280, 768, 60, 1 },
587 { 1280, 768, 60, 0 },
588 { 1280, 768, 75, 0 },
589 { 1280, 768, 85, 0 },
590 { 1280, 960, 60, 0 },
591 { 1280, 960, 85, 0 },
592 { 1280, 1024, 60, 0 },
593 { 1280, 1024, 85, 0 },
594 /* byte 8 */
595 { 1360, 768, 60, 0 },
596 { 1440, 900, 60, 1 },
597 { 1440, 900, 60, 0 },
598 { 1440, 900, 75, 0 },
599 { 1440, 900, 85, 0 },
600 { 1400, 1050, 60, 1 },
601 { 1400, 1050, 60, 0 },
602 { 1400, 1050, 75, 0 },
603 /* byte 9 */
604 { 1400, 1050, 85, 0 },
605 { 1680, 1050, 60, 1 },
606 { 1680, 1050, 60, 0 },
607 { 1680, 1050, 75, 0 },
608 { 1680, 1050, 85, 0 },
609 { 1600, 1200, 60, 0 },
610 { 1600, 1200, 65, 0 },
611 { 1600, 1200, 70, 0 },
612 /* byte 10 */
613 { 1600, 1200, 75, 0 },
614 { 1600, 1200, 85, 0 },
615 { 1792, 1344, 60, 0 },
Ville Syrjäläc068b322013-10-14 16:44:25 +0300616 { 1792, 1344, 75, 0 },
Thierry Redinga6b21832012-11-23 15:01:42 +0100617 { 1856, 1392, 60, 0 },
618 { 1856, 1392, 75, 0 },
619 { 1920, 1200, 60, 1 },
620 { 1920, 1200, 60, 0 },
621 /* byte 11 */
622 { 1920, 1200, 75, 0 },
623 { 1920, 1200, 85, 0 },
624 { 1920, 1440, 60, 0 },
625 { 1920, 1440, 75, 0 },
626};
627
628static const struct minimode extra_modes[] = {
629 { 1024, 576, 60, 0 },
630 { 1366, 768, 60, 0 },
631 { 1600, 900, 60, 0 },
632 { 1680, 945, 60, 0 },
633 { 1920, 1080, 60, 0 },
634 { 2048, 1152, 60, 0 },
635 { 2048, 1536, 60, 0 },
636};
637
638/*
639 * Probably taken from CEA-861 spec.
640 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
Jani Nikulad9278b42016-01-08 13:21:51 +0200641 *
642 * Index using the VIC.
Thierry Redinga6b21832012-11-23 15:01:42 +0100643 */
644static const struct drm_display_mode edid_cea_modes[] = {
Jani Nikulad9278b42016-01-08 13:21:51 +0200645 /* 0 - dummy, VICs start at 1 */
646 { },
Thierry Redinga6b21832012-11-23 15:01:42 +0100647 /* 1 - 640x480@60Hz */
648 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
649 752, 800, 0, 480, 490, 492, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300650 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530651 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100652 /* 2 - 720x480@60Hz */
653 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
654 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530656 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100657 /* 3 - 720x480@60Hz */
658 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
659 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530661 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100662 /* 4 - 1280x720@60Hz */
663 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
664 1430, 1650, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300665 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530666 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100667 /* 5 - 1920x1080i@60Hz */
668 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
669 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
670 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300671 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530672 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700673 /* 6 - 720(1440)x480i@60Hz */
674 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
675 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100676 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300677 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530678 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700679 /* 7 - 720(1440)x480i@60Hz */
680 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
681 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100682 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300683 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530684 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700685 /* 8 - 720(1440)x240@60Hz */
686 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
687 801, 858, 0, 240, 244, 247, 262, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300689 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530690 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700691 /* 9 - 720(1440)x240@60Hz */
692 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
693 801, 858, 0, 240, 244, 247, 262, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100694 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300695 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530696 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100697 /* 10 - 2880x480i@60Hz */
698 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
699 3204, 3432, 0, 480, 488, 494, 525, 0,
700 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300701 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530702 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100703 /* 11 - 2880x480i@60Hz */
704 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
705 3204, 3432, 0, 480, 488, 494, 525, 0,
706 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300707 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530708 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100709 /* 12 - 2880x240@60Hz */
710 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
711 3204, 3432, 0, 240, 244, 247, 262, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300712 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530713 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100714 /* 13 - 2880x240@60Hz */
715 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
716 3204, 3432, 0, 240, 244, 247, 262, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300717 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530718 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100719 /* 14 - 1440x480@60Hz */
720 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
721 1596, 1716, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530723 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100724 /* 15 - 1440x480@60Hz */
725 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
726 1596, 1716, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300727 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530728 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100729 /* 16 - 1920x1080@60Hz */
730 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
731 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300732 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530733 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100734 /* 17 - 720x576@50Hz */
735 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
736 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300737 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530738 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100739 /* 18 - 720x576@50Hz */
740 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
741 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530743 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100744 /* 19 - 1280x720@50Hz */
745 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
746 1760, 1980, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300747 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530748 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100749 /* 20 - 1920x1080i@50Hz */
750 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
751 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
752 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300753 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530754 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700755 /* 21 - 720(1440)x576i@50Hz */
756 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
757 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100758 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300759 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530760 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700761 /* 22 - 720(1440)x576i@50Hz */
762 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
763 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100764 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300765 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530766 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700767 /* 23 - 720(1440)x288@50Hz */
768 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
769 795, 864, 0, 288, 290, 293, 312, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300771 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530772 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700773 /* 24 - 720(1440)x288@50Hz */
774 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
775 795, 864, 0, 288, 290, 293, 312, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100776 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300777 DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530778 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100779 /* 25 - 2880x576i@50Hz */
780 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
781 3180, 3456, 0, 576, 580, 586, 625, 0,
782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300783 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530784 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100785 /* 26 - 2880x576i@50Hz */
786 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
787 3180, 3456, 0, 576, 580, 586, 625, 0,
788 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300789 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530790 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100791 /* 27 - 2880x288@50Hz */
792 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
793 3180, 3456, 0, 288, 290, 293, 312, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300794 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530795 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100796 /* 28 - 2880x288@50Hz */
797 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
798 3180, 3456, 0, 288, 290, 293, 312, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300799 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530800 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100801 /* 29 - 1440x576@50Hz */
802 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
803 1592, 1728, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300804 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530805 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100806 /* 30 - 1440x576@50Hz */
807 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
808 1592, 1728, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300809 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530810 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100811 /* 31 - 1920x1080@50Hz */
812 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
813 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300814 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530815 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100816 /* 32 - 1920x1080@24Hz */
817 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
818 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300819 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530820 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100821 /* 33 - 1920x1080@25Hz */
822 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
823 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300824 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530825 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100826 /* 34 - 1920x1080@30Hz */
827 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
828 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300829 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530830 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100831 /* 35 - 2880x480@60Hz */
832 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
833 3192, 3432, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300834 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530835 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100836 /* 36 - 2880x480@60Hz */
837 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
838 3192, 3432, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300839 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530840 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100841 /* 37 - 2880x576@50Hz */
842 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
843 3184, 3456, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530845 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100846 /* 38 - 2880x576@50Hz */
847 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
848 3184, 3456, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300849 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530850 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100851 /* 39 - 1920x1080i@50Hz */
852 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
853 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
854 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300855 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530856 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100857 /* 40 - 1920x1080i@100Hz */
858 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
859 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
860 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300861 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530862 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100863 /* 41 - 1280x720@100Hz */
864 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
865 1760, 1980, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300866 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530867 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100868 /* 42 - 720x576@100Hz */
869 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
870 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300871 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530872 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100873 /* 43 - 720x576@100Hz */
874 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
875 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300876 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530877 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700878 /* 44 - 720(1440)x576i@100Hz */
879 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
880 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100881 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Clint Taylor5a11f7f2014-09-26 09:55:24 -0700882 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530883 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700884 /* 45 - 720(1440)x576i@100Hz */
885 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
886 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100887 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Clint Taylor5a11f7f2014-09-26 09:55:24 -0700888 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530889 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100890 /* 46 - 1920x1080i@120Hz */
891 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
892 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
893 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300894 DRM_MODE_FLAG_INTERLACE),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530895 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100896 /* 47 - 1280x720@120Hz */
897 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
898 1430, 1650, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300899 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530900 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100901 /* 48 - 720x480@120Hz */
902 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
903 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530905 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100906 /* 49 - 720x480@120Hz */
907 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
908 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300909 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530910 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700911 /* 50 - 720(1440)x480i@120Hz */
912 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
913 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100914 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300915 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530916 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700917 /* 51 - 720(1440)x480i@120Hz */
918 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
919 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100920 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300921 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530922 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100923 /* 52 - 720x576@200Hz */
924 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
925 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300926 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530927 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100928 /* 53 - 720x576@200Hz */
929 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
930 796, 864, 0, 576, 581, 586, 625, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300931 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530932 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700933 /* 54 - 720(1440)x576i@200Hz */
934 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
935 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100936 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300937 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530938 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700939 /* 55 - 720(1440)x576i@200Hz */
940 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
941 795, 864, 0, 576, 580, 586, 625, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100942 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300943 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530944 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100945 /* 56 - 720x480@240Hz */
946 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
947 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300948 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530949 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100950 /* 57 - 720x480@240Hz */
951 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
952 798, 858, 0, 480, 489, 495, 525, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300953 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530954 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700955 /* 58 - 720(1440)x480i@240 */
956 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
957 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100958 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300959 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530960 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
Clint Taylorfb01d282014-09-02 17:03:35 -0700961 /* 59 - 720(1440)x480i@240 */
962 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
963 801, 858, 0, 480, 488, 494, 525, 0,
Thierry Redinga6b21832012-11-23 15:01:42 +0100964 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300965 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530966 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100967 /* 60 - 1280x720@24Hz */
968 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
969 3080, 3300, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300970 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530971 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100972 /* 61 - 1280x720@25Hz */
973 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
974 3740, 3960, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300975 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530976 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100977 /* 62 - 1280x720@30Hz */
978 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
979 3080, 3300, 0, 720, 725, 730, 750, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300980 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530981 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100982 /* 63 - 1920x1080@120Hz */
983 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
984 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300985 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530986 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100987 /* 64 - 1920x1080@100Hz */
988 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
989 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
Ville Syrjäläee7925b2013-04-24 19:07:17 +0300990 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
Vandana Kannan985e5dc2013-12-19 15:34:07 +0530991 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
Thierry Redinga6b21832012-11-23 15:01:42 +0100992};
993
Lespiau, Damien7ebe1962013-08-19 16:58:54 +0100994/*
Jani Nikulad9278b42016-01-08 13:21:51 +0200995 * HDMI 1.4 4k modes. Index using the VIC.
Lespiau, Damien7ebe1962013-08-19 16:58:54 +0100996 */
997static const struct drm_display_mode edid_4k_modes[] = {
Jani Nikulad9278b42016-01-08 13:21:51 +0200998 /* 0 - dummy, VICs start at 1 */
999 { },
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01001000 /* 1 - 3840x2160@30Hz */
1001 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1002 3840, 4016, 4104, 4400, 0,
1003 2160, 2168, 2178, 2250, 0,
1004 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1005 .vrefresh = 30, },
1006 /* 2 - 3840x2160@25Hz */
1007 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1008 3840, 4896, 4984, 5280, 0,
1009 2160, 2168, 2178, 2250, 0,
1010 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1011 .vrefresh = 25, },
1012 /* 3 - 3840x2160@24Hz */
1013 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1014 3840, 5116, 5204, 5500, 0,
1015 2160, 2168, 2178, 2250, 0,
1016 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1017 .vrefresh = 24, },
1018 /* 4 - 4096x2160@24Hz (SMPTE) */
1019 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1020 4096, 5116, 5204, 5500, 0,
1021 2160, 2168, 2178, 2250, 0,
1022 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1023 .vrefresh = 24, },
1024};
1025
Adam Jackson61e57a82010-03-29 21:43:18 +00001026/*** DDC fetch and block validation ***/
Dave Airlief453ba02008-11-07 14:05:41 -08001027
Adam Jackson083ae052009-09-23 17:30:45 -04001028static const u8 edid_header[] = {
1029 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1030};
Dave Airlief453ba02008-11-07 14:05:41 -08001031
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001032/**
1033 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1034 * @raw_edid: pointer to raw base EDID block
1035 *
1036 * Sanity check the header of the base EDID block.
1037 *
1038 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
Thomas Reim051963d2011-07-29 14:28:57 +00001039 */
1040int drm_edid_header_is_valid(const u8 *raw_edid)
1041{
1042 int i, score = 0;
1043
1044 for (i = 0; i < sizeof(edid_header); i++)
1045 if (raw_edid[i] == edid_header[i])
1046 score++;
1047
1048 return score;
1049}
1050EXPORT_SYMBOL(drm_edid_header_is_valid);
1051
Adam Jackson47819ba2012-05-30 16:42:39 -04001052static int edid_fixup __read_mostly = 6;
1053module_param_named(edid_fixup, edid_fixup, int, 0400);
1054MODULE_PARM_DESC(edid_fixup,
1055 "Minimum number of valid EDID header bytes (0-8, default 6)");
Thomas Reim051963d2011-07-29 14:28:57 +00001056
Dave Airlie40d9b042014-10-20 16:29:33 +10001057static void drm_get_displayid(struct drm_connector *connector,
1058 struct edid *edid);
Dave Airlieda9df2f2014-12-11 10:12:57 +10001059
Stefan Brünsc465bbc2014-11-30 19:57:43 +01001060static int drm_edid_block_checksum(const u8 *raw_edid)
1061{
1062 int i;
1063 u8 csum = 0;
1064 for (i = 0; i < EDID_LENGTH; i++)
1065 csum += raw_edid[i];
1066
1067 return csum;
1068}
1069
Stefan Brünsd6885d62014-11-30 19:57:41 +01001070static bool drm_edid_is_zero(const u8 *in_edid, int length)
1071{
1072 if (memchr_inv(in_edid, 0, length))
1073 return false;
1074
1075 return true;
1076}
1077
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001078/**
1079 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1080 * @raw_edid: pointer to raw EDID block
1081 * @block: type of block to validate (0 for base, extension otherwise)
1082 * @print_bad_edid: if true, dump bad EDID blocks to the console
Todd Previte6ba2bd32015-04-21 11:09:41 -07001083 * @edid_corrupt: if true, the header or checksum is invalid
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001084 *
1085 * Validate a base or extension EDID block and optionally dump bad blocks to
1086 * the console.
1087 *
1088 * Return: True if the block is valid, false otherwise.
Dave Airlief453ba02008-11-07 14:05:41 -08001089 */
Todd Previte6ba2bd32015-04-21 11:09:41 -07001090bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1091 bool *edid_corrupt)
Dave Airlief453ba02008-11-07 14:05:41 -08001092{
Stefan Brünsc465bbc2014-11-30 19:57:43 +01001093 u8 csum;
Adam Jackson61e57a82010-03-29 21:43:18 +00001094 struct edid *edid = (struct edid *)raw_edid;
Dave Airlief453ba02008-11-07 14:05:41 -08001095
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001096 if (WARN_ON(!raw_edid))
1097 return false;
1098
Adam Jackson47819ba2012-05-30 16:42:39 -04001099 if (edid_fixup > 8 || edid_fixup < 0)
1100 edid_fixup = 6;
1101
Adam Jacksonf89ec8a2012-04-16 10:40:08 -04001102 if (block == 0) {
Thomas Reim051963d2011-07-29 14:28:57 +00001103 int score = drm_edid_header_is_valid(raw_edid);
Todd Previte6ba2bd32015-04-21 11:09:41 -07001104 if (score == 8) {
1105 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001106 *edid_corrupt = false;
Todd Previte6ba2bd32015-04-21 11:09:41 -07001107 } else if (score >= edid_fixup) {
1108 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1109 * The corrupt flag needs to be set here otherwise, the
1110 * fix-up code here will correct the problem, the
1111 * checksum is correct and the test fails
1112 */
1113 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001114 *edid_corrupt = true;
Adam Jackson61e57a82010-03-29 21:43:18 +00001115 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1116 memcpy(raw_edid, edid_header, sizeof(edid_header));
1117 } else {
Todd Previte6ba2bd32015-04-21 11:09:41 -07001118 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001119 *edid_corrupt = true;
Adam Jackson61e57a82010-03-29 21:43:18 +00001120 goto bad;
1121 }
1122 }
Dave Airlief453ba02008-11-07 14:05:41 -08001123
Stefan Brünsc465bbc2014-11-30 19:57:43 +01001124 csum = drm_edid_block_checksum(raw_edid);
Dave Airlief453ba02008-11-07 14:05:41 -08001125 if (csum) {
Jerome Glisse0b2443e2012-08-09 11:25:51 -04001126 if (print_bad_edid) {
1127 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1128 }
Adam Jackson4a638b42010-05-25 16:33:09 -04001129
Todd Previte6ba2bd32015-04-21 11:09:41 -07001130 if (edid_corrupt)
Daniel Vetterac6f2e22015-05-08 16:15:41 +02001131 *edid_corrupt = true;
Todd Previte6ba2bd32015-04-21 11:09:41 -07001132
Adam Jackson4a638b42010-05-25 16:33:09 -04001133 /* allow CEA to slide through, switches mangle this */
1134 if (raw_edid[0] != 0x02)
1135 goto bad;
Dave Airlief453ba02008-11-07 14:05:41 -08001136 }
1137
Adam Jackson61e57a82010-03-29 21:43:18 +00001138 /* per-block-type checks */
1139 switch (raw_edid[0]) {
1140 case 0: /* base */
1141 if (edid->version != 1) {
1142 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1143 goto bad;
1144 }
Adam Jackson862b89c2009-11-23 14:23:06 -05001145
Adam Jackson61e57a82010-03-29 21:43:18 +00001146 if (edid->revision > 4)
1147 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1148 break;
1149
1150 default:
1151 break;
1152 }
Adam Jackson47ee4ccf2009-11-23 14:23:05 -05001153
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001154 return true;
Dave Airlief453ba02008-11-07 14:05:41 -08001155
1156bad:
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001157 if (print_bad_edid) {
Stefan Brünsda4c07b2014-11-30 19:57:42 +01001158 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1159 printk(KERN_ERR "EDID block is all zeroes\n");
1160 } else {
1161 printk(KERN_ERR "Raw EDID:\n");
1162 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
Tormod Volden0aff47f2011-07-05 20:12:53 +00001163 raw_edid, EDID_LENGTH, false);
Stefan Brünsda4c07b2014-11-30 19:57:42 +01001164 }
Dave Airlief453ba02008-11-07 14:05:41 -08001165 }
Seung-Woo Kimfe2ef782013-07-02 17:57:04 +09001166 return false;
Dave Airlief453ba02008-11-07 14:05:41 -08001167}
Carsten Emdeda0df922012-03-18 22:37:33 +01001168EXPORT_SYMBOL(drm_edid_block_valid);
Adam Jackson61e57a82010-03-29 21:43:18 +00001169
1170/**
1171 * drm_edid_is_valid - sanity check EDID data
1172 * @edid: EDID data
1173 *
1174 * Sanity-check an entire EDID record (including extensions)
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001175 *
1176 * Return: True if the EDID data is valid, false otherwise.
Adam Jackson61e57a82010-03-29 21:43:18 +00001177 */
1178bool drm_edid_is_valid(struct edid *edid)
1179{
1180 int i;
1181 u8 *raw = (u8 *)edid;
1182
1183 if (!edid)
1184 return false;
1185
1186 for (i = 0; i <= edid->extensions; i++)
Todd Previte6ba2bd32015-04-21 11:09:41 -07001187 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
Adam Jackson61e57a82010-03-29 21:43:18 +00001188 return false;
1189
1190 return true;
1191}
Alex Deucher3c537882010-02-05 04:21:19 -05001192EXPORT_SYMBOL(drm_edid_is_valid);
Dave Airlief453ba02008-11-07 14:05:41 -08001193
Adam Jackson61e57a82010-03-29 21:43:18 +00001194#define DDC_SEGMENT_ADDR 0x30
1195/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001196 * drm_do_probe_ddc_edid() - get EDID information via I2C
Thierry Reding7c58e872014-12-03 16:52:18 +01001197 * @data: I2C device adapter
Daniel Vetterfc668112014-01-21 12:02:26 +01001198 * @buf: EDID data buffer to be filled
1199 * @block: 128 byte EDID block to start fetching from
1200 * @len: EDID data buffer length to fetch
1201 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001202 * Try to fetch EDID information by calling I2C driver functions.
Daniel Vetterfc668112014-01-21 12:02:26 +01001203 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001204 * Return: 0 on success or -1 on failure.
Adam Jackson61e57a82010-03-29 21:43:18 +00001205 */
1206static int
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001207drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
Adam Jackson61e57a82010-03-29 21:43:18 +00001208{
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001209 struct i2c_adapter *adapter = data;
Adam Jackson61e57a82010-03-29 21:43:18 +00001210 unsigned char start = block * EDID_LENGTH;
Shirish Scd004b32012-08-30 07:04:06 +00001211 unsigned char segment = block >> 1;
1212 unsigned char xfers = segment ? 3 : 2;
Chris Wilson4819d2e2011-03-15 11:04:41 +00001213 int ret, retries = 5;
Adam Jackson61e57a82010-03-29 21:43:18 +00001214
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001215 /*
1216 * The core I2C driver will automatically retry the transfer if the
Chris Wilson4819d2e2011-03-15 11:04:41 +00001217 * adapter reports EAGAIN. However, we find that bit-banging transfers
1218 * are susceptible to errors under a heavily loaded machine and
1219 * generate spurious NAKs and timeouts. Retrying the transfer
1220 * of the individual block a few times seems to overcome this.
1221 */
1222 do {
1223 struct i2c_msg msgs[] = {
1224 {
Shirish Scd004b32012-08-30 07:04:06 +00001225 .addr = DDC_SEGMENT_ADDR,
1226 .flags = 0,
1227 .len = 1,
1228 .buf = &segment,
1229 }, {
Chris Wilson4819d2e2011-03-15 11:04:41 +00001230 .addr = DDC_ADDR,
1231 .flags = 0,
1232 .len = 1,
1233 .buf = &start,
1234 }, {
1235 .addr = DDC_ADDR,
1236 .flags = I2C_M_RD,
1237 .len = len,
1238 .buf = buf,
1239 }
1240 };
Shirish Scd004b32012-08-30 07:04:06 +00001241
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001242 /*
1243 * Avoid sending the segment addr to not upset non-compliant
1244 * DDC monitors.
1245 */
Shirish Scd004b32012-08-30 07:04:06 +00001246 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1247
Eugeni Dodonov9292f372012-01-05 09:34:28 -02001248 if (ret == -ENXIO) {
1249 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1250 adapter->name);
1251 break;
1252 }
Shirish Scd004b32012-08-30 07:04:06 +00001253 } while (ret != xfers && --retries);
Adam Jackson61e57a82010-03-29 21:43:18 +00001254
Shirish Scd004b32012-08-30 07:04:06 +00001255 return ret == xfers ? 0 : -1;
Adam Jackson61e57a82010-03-29 21:43:18 +00001256}
1257
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001258/**
1259 * drm_do_get_edid - get EDID data using a custom EDID block read function
1260 * @connector: connector we're probing
1261 * @get_edid_block: EDID block read function
1262 * @data: private data passed to the block read function
1263 *
1264 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1265 * exposes a different interface to read EDID blocks this function can be used
1266 * to get EDID data using a custom block read function.
1267 *
1268 * As in the general case the DDC bus is accessible by the kernel at the I2C
1269 * level, drivers must make all reasonable efforts to expose it as an I2C
1270 * adapter and use drm_get_edid() instead of abusing this function.
1271 *
1272 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1273 */
1274struct edid *drm_do_get_edid(struct drm_connector *connector,
1275 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1276 size_t len),
1277 void *data)
Adam Jackson61e57a82010-03-29 21:43:18 +00001278{
Sam Tygier0ea75e22010-09-23 10:11:01 +01001279 int i, j = 0, valid_extensions = 0;
Adam Jackson61e57a82010-03-29 21:43:18 +00001280 u8 *block, *new;
Jerome Glisse0b2443e2012-08-09 11:25:51 -04001281 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
Adam Jackson61e57a82010-03-29 21:43:18 +00001282
1283 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1284 return NULL;
1285
1286 /* base block fetch */
1287 for (i = 0; i < 4; i++) {
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001288 if (get_edid_block(data, block, 0, EDID_LENGTH))
Adam Jackson61e57a82010-03-29 21:43:18 +00001289 goto out;
Todd Previte6ba2bd32015-04-21 11:09:41 -07001290 if (drm_edid_block_valid(block, 0, print_bad_edid,
1291 &connector->edid_corrupt))
Adam Jackson61e57a82010-03-29 21:43:18 +00001292 break;
Dave Airlie4a9a8b72011-06-14 06:13:55 +00001293 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1294 connector->null_edid_counter++;
1295 goto carp;
1296 }
Adam Jackson61e57a82010-03-29 21:43:18 +00001297 }
1298 if (i == 4)
1299 goto carp;
1300
1301 /* if there's no extensions, we're done */
1302 if (block[0x7e] == 0)
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001303 return (struct edid *)block;
Adam Jackson61e57a82010-03-29 21:43:18 +00001304
1305 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1306 if (!new)
1307 goto out;
1308 block = new;
1309
1310 for (j = 1; j <= block[0x7e]; j++) {
1311 for (i = 0; i < 4; i++) {
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001312 if (get_edid_block(data,
Sam Tygier0ea75e22010-09-23 10:11:01 +01001313 block + (valid_extensions + 1) * EDID_LENGTH,
1314 j, EDID_LENGTH))
Adam Jackson61e57a82010-03-29 21:43:18 +00001315 goto out;
Todd Previte6ba2bd32015-04-21 11:09:41 -07001316 if (drm_edid_block_valid(block + (valid_extensions + 1)
1317 * EDID_LENGTH, j,
1318 print_bad_edid,
1319 NULL)) {
Sam Tygier0ea75e22010-09-23 10:11:01 +01001320 valid_extensions++;
Adam Jackson61e57a82010-03-29 21:43:18 +00001321 break;
Sam Tygier0ea75e22010-09-23 10:11:01 +01001322 }
Adam Jackson61e57a82010-03-29 21:43:18 +00001323 }
Maarten Lankhorstf934ec8c2013-01-29 14:27:39 +01001324
1325 if (i == 4 && print_bad_edid) {
Sam Tygier0ea75e22010-09-23 10:11:01 +01001326 dev_warn(connector->dev->dev,
1327 "%s: Ignoring invalid EDID block %d.\n",
Jani Nikula25933822014-06-03 14:56:20 +03001328 connector->name, j);
Maarten Lankhorstf934ec8c2013-01-29 14:27:39 +01001329
1330 connector->bad_edid_counter++;
1331 }
Sam Tygier0ea75e22010-09-23 10:11:01 +01001332 }
1333
1334 if (valid_extensions != block[0x7e]) {
1335 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1336 block[0x7e] = valid_extensions;
1337 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1338 if (!new)
1339 goto out;
1340 block = new;
Adam Jackson61e57a82010-03-29 21:43:18 +00001341 }
1342
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001343 return (struct edid *)block;
Adam Jackson61e57a82010-03-29 21:43:18 +00001344
1345carp:
Jerome Glisse0b2443e2012-08-09 11:25:51 -04001346 if (print_bad_edid) {
1347 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
Jani Nikula25933822014-06-03 14:56:20 +03001348 connector->name, j);
Jerome Glisse0b2443e2012-08-09 11:25:51 -04001349 }
1350 connector->bad_edid_counter++;
Adam Jackson61e57a82010-03-29 21:43:18 +00001351
1352out:
1353 kfree(block);
1354 return NULL;
1355}
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001356EXPORT_SYMBOL_GPL(drm_do_get_edid);
Adam Jackson61e57a82010-03-29 21:43:18 +00001357
1358/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001359 * drm_probe_ddc() - probe DDC presence
1360 * @adapter: I2C adapter to probe
Adam Jackson61e57a82010-03-29 21:43:18 +00001361 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001362 * Return: True on success, false on failure.
Adam Jackson61e57a82010-03-29 21:43:18 +00001363 */
Adam Jacksonfbff4692012-09-18 10:58:47 -04001364bool
Adam Jackson61e57a82010-03-29 21:43:18 +00001365drm_probe_ddc(struct i2c_adapter *adapter)
1366{
1367 unsigned char out;
1368
1369 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1370}
Adam Jacksonfbff4692012-09-18 10:58:47 -04001371EXPORT_SYMBOL(drm_probe_ddc);
Adam Jackson61e57a82010-03-29 21:43:18 +00001372
1373/**
1374 * drm_get_edid - get EDID data, if available
1375 * @connector: connector we're probing
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001376 * @adapter: I2C adapter to use for DDC
Adam Jackson61e57a82010-03-29 21:43:18 +00001377 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001378 * Poke the given I2C channel to grab EDID data if possible. If found,
Adam Jackson61e57a82010-03-29 21:43:18 +00001379 * attach it to the connector.
1380 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001381 * Return: Pointer to valid EDID or NULL if we couldn't find any.
Adam Jackson61e57a82010-03-29 21:43:18 +00001382 */
1383struct edid *drm_get_edid(struct drm_connector *connector,
1384 struct i2c_adapter *adapter)
1385{
Dave Airlie40d9b042014-10-20 16:29:33 +10001386 struct edid *edid;
1387
Lars-Peter Clausen18df89f2012-04-27 11:11:58 +02001388 if (!drm_probe_ddc(adapter))
1389 return NULL;
Adam Jackson61e57a82010-03-29 21:43:18 +00001390
Dave Airlie40d9b042014-10-20 16:29:33 +10001391 edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1392 if (edid)
1393 drm_get_displayid(connector, edid);
1394 return edid;
Adam Jackson61e57a82010-03-29 21:43:18 +00001395}
1396EXPORT_SYMBOL(drm_get_edid);
1397
Jani Nikula51f8da52013-09-27 15:08:27 +03001398/**
Lukas Wunner5cb8eaa2016-01-11 20:09:20 +01001399 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1400 * @connector: connector we're probing
1401 * @adapter: I2C adapter to use for DDC
1402 *
1403 * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1404 * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1405 * switch DDC to the GPU which is retrieving EDID.
1406 *
1407 * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1408 */
1409struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
1410 struct i2c_adapter *adapter)
1411{
1412 struct pci_dev *pdev = connector->dev->pdev;
1413 struct edid *edid;
1414
1415 vga_switcheroo_lock_ddc(pdev);
1416 edid = drm_get_edid(connector, adapter);
1417 vga_switcheroo_unlock_ddc(pdev);
1418
1419 return edid;
1420}
1421EXPORT_SYMBOL(drm_get_edid_switcheroo);
1422
1423/**
Jani Nikula51f8da52013-09-27 15:08:27 +03001424 * drm_edid_duplicate - duplicate an EDID and the extensions
1425 * @edid: EDID to duplicate
1426 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001427 * Return: Pointer to duplicated EDID or NULL on allocation failure.
Jani Nikula51f8da52013-09-27 15:08:27 +03001428 */
1429struct edid *drm_edid_duplicate(const struct edid *edid)
1430{
1431 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1432}
1433EXPORT_SYMBOL(drm_edid_duplicate);
1434
Adam Jackson61e57a82010-03-29 21:43:18 +00001435/*** EDID parsing ***/
1436
Dave Airlief453ba02008-11-07 14:05:41 -08001437/**
1438 * edid_vendor - match a string against EDID's obfuscated vendor field
1439 * @edid: EDID to match
1440 * @vendor: vendor string
1441 *
1442 * Returns true if @vendor is in @edid, false otherwise
1443 */
1444static bool edid_vendor(struct edid *edid, char *vendor)
1445{
1446 char edid_vendor[3];
1447
1448 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1449 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1450 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
Dave Airlie16456c82009-04-03 09:10:33 +10001451 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
Dave Airlief453ba02008-11-07 14:05:41 -08001452
1453 return !strncmp(edid_vendor, vendor, 3);
1454}
1455
1456/**
1457 * edid_get_quirks - return quirk flags for a given EDID
1458 * @edid: EDID to process
1459 *
1460 * This tells subsequent routines what fixes they need to apply.
1461 */
1462static u32 edid_get_quirks(struct edid *edid)
1463{
1464 struct edid_quirk *quirk;
1465 int i;
1466
1467 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1468 quirk = &edid_quirk_list[i];
1469
1470 if (edid_vendor(edid, quirk->vendor) &&
1471 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1472 return quirk->quirks;
1473 }
1474
1475 return 0;
1476}
1477
1478#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
Alex Deucher339d2022013-08-15 11:42:14 -04001479#define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
Dave Airlief453ba02008-11-07 14:05:41 -08001480
Dave Airlief453ba02008-11-07 14:05:41 -08001481/**
1482 * edid_fixup_preferred - set preferred modes based on quirk list
1483 * @connector: has mode list to fix up
1484 * @quirks: quirks list
1485 *
1486 * Walk the mode list for @connector, clearing the preferred status
1487 * on existing modes and setting it anew for the right mode ala @quirks.
1488 */
1489static void edid_fixup_preferred(struct drm_connector *connector,
1490 u32 quirks)
1491{
1492 struct drm_display_mode *t, *cur_mode, *preferred_mode;
Dave Airlief8906072008-12-18 16:59:02 +10001493 int target_refresh = 0;
Alex Deucher339d2022013-08-15 11:42:14 -04001494 int cur_vrefresh, preferred_vrefresh;
Dave Airlief453ba02008-11-07 14:05:41 -08001495
1496 if (list_empty(&connector->probed_modes))
1497 return;
1498
1499 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1500 target_refresh = 60;
1501 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1502 target_refresh = 75;
1503
1504 preferred_mode = list_first_entry(&connector->probed_modes,
1505 struct drm_display_mode, head);
1506
1507 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1508 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1509
1510 if (cur_mode == preferred_mode)
1511 continue;
1512
1513 /* Largest mode is preferred */
1514 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1515 preferred_mode = cur_mode;
1516
Alex Deucher339d2022013-08-15 11:42:14 -04001517 cur_vrefresh = cur_mode->vrefresh ?
1518 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1519 preferred_vrefresh = preferred_mode->vrefresh ?
1520 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
Dave Airlief453ba02008-11-07 14:05:41 -08001521 /* At a given size, try to get closest to target refresh */
1522 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
Alex Deucher339d2022013-08-15 11:42:14 -04001523 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1524 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
Dave Airlief453ba02008-11-07 14:05:41 -08001525 preferred_mode = cur_mode;
1526 }
1527 }
1528
1529 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1530}
1531
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001532static bool
1533mode_is_rb(const struct drm_display_mode *mode)
1534{
1535 return (mode->htotal - mode->hdisplay == 160) &&
1536 (mode->hsync_end - mode->hdisplay == 80) &&
1537 (mode->hsync_end - mode->hsync_start == 32) &&
1538 (mode->vsync_start - mode->vdisplay == 3);
1539}
1540
Adam Jackson33c75312012-04-13 16:33:29 -04001541/*
1542 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1543 * @dev: Device to duplicate against
1544 * @hsize: Mode width
1545 * @vsize: Mode height
1546 * @fresh: Mode refresh rate
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001547 * @rb: Mode reduced-blanking-ness
Adam Jackson33c75312012-04-13 16:33:29 -04001548 *
1549 * Walk the DMT mode list looking for a match for the given parameters.
Thierry Redingdb6cf8332014-04-29 11:44:34 +02001550 *
1551 * Return: A newly allocated copy of the mode, or NULL if not found.
Adam Jackson33c75312012-04-13 16:33:29 -04001552 */
Dave Airlie1d42bbc2010-05-07 05:02:30 +00001553struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001554 int hsize, int vsize, int fresh,
1555 bool rb)
Zhao Yakui559ee212009-09-03 09:33:47 +08001556{
Adam Jackson07a5e632009-12-03 17:44:38 -05001557 int i;
Zhao Yakui559ee212009-09-03 09:33:47 +08001558
Thierry Redinga6b21832012-11-23 15:01:42 +01001559 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001560 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
Adam Jacksonf8b46a02012-04-13 16:33:30 -04001561 if (hsize != ptr->hdisplay)
1562 continue;
1563 if (vsize != ptr->vdisplay)
1564 continue;
1565 if (fresh != drm_mode_vrefresh(ptr))
1566 continue;
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001567 if (rb != mode_is_rb(ptr))
1568 continue;
Adam Jacksonf8b46a02012-04-13 16:33:30 -04001569
1570 return drm_mode_duplicate(dev, ptr);
Zhao Yakui559ee212009-09-03 09:33:47 +08001571 }
Adam Jacksonf8b46a02012-04-13 16:33:30 -04001572
1573 return NULL;
Zhao Yakui559ee212009-09-03 09:33:47 +08001574}
Dave Airlie1d42bbc2010-05-07 05:02:30 +00001575EXPORT_SYMBOL(drm_mode_find_dmt);
Adam Jackson23425ca2009-09-23 17:30:58 -04001576
Adam Jacksond1ff6402010-03-29 21:43:26 +00001577typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1578
1579static void
Adam Jackson4d76a222010-08-03 14:38:17 -04001580cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1581{
1582 int i, n = 0;
Christian Schmidt4966b2a2011-12-19 20:03:43 +01001583 u8 d = ext[0x02];
Adam Jackson4d76a222010-08-03 14:38:17 -04001584 u8 *det_base = ext + d;
1585
Christian Schmidt4966b2a2011-12-19 20:03:43 +01001586 n = (127 - d) / 18;
Adam Jackson4d76a222010-08-03 14:38:17 -04001587 for (i = 0; i < n; i++)
1588 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1589}
1590
1591static void
Adam Jacksoncbba98f2010-08-03 14:38:18 -04001592vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1593{
1594 unsigned int i, n = min((int)ext[0x02], 6);
1595 u8 *det_base = ext + 5;
1596
1597 if (ext[0x01] != 1)
1598 return; /* unknown version */
1599
1600 for (i = 0; i < n; i++)
1601 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1602}
1603
1604static void
Adam Jacksond1ff6402010-03-29 21:43:26 +00001605drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1606{
1607 int i;
1608 struct edid *edid = (struct edid *)raw_edid;
1609
1610 if (edid == NULL)
1611 return;
1612
1613 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1614 cb(&(edid->detailed_timings[i]), closure);
1615
Adam Jackson4d76a222010-08-03 14:38:17 -04001616 for (i = 1; i <= raw_edid[0x7e]; i++) {
1617 u8 *ext = raw_edid + (i * EDID_LENGTH);
1618 switch (*ext) {
1619 case CEA_EXT:
1620 cea_for_each_detailed_block(ext, cb, closure);
1621 break;
Adam Jacksoncbba98f2010-08-03 14:38:18 -04001622 case VTB_EXT:
1623 vtb_for_each_detailed_block(ext, cb, closure);
1624 break;
Adam Jackson4d76a222010-08-03 14:38:17 -04001625 default:
1626 break;
1627 }
1628 }
Adam Jacksond1ff6402010-03-29 21:43:26 +00001629}
1630
1631static void
1632is_rb(struct detailed_timing *t, void *data)
1633{
1634 u8 *r = (u8 *)t;
1635 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1636 if (r[15] & 0x10)
1637 *(bool *)data = true;
1638}
1639
1640/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1641static bool
1642drm_monitor_supports_rb(struct edid *edid)
1643{
1644 if (edid->revision >= 4) {
Daniel Vetterb196a492012-06-19 11:33:06 +02001645 bool ret = false;
Adam Jacksond1ff6402010-03-29 21:43:26 +00001646 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1647 return ret;
1648 }
1649
1650 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1651}
1652
Adam Jackson7a374352010-03-29 21:43:30 +00001653static void
1654find_gtf2(struct detailed_timing *t, void *data)
1655{
1656 u8 *r = (u8 *)t;
1657 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1658 *(u8 **)data = r;
1659}
1660
1661/* Secondary GTF curve kicks in above some break frequency */
1662static int
1663drm_gtf2_hbreak(struct edid *edid)
1664{
1665 u8 *r = NULL;
1666 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1667 return r ? (r[12] * 2) : 0;
1668}
1669
1670static int
1671drm_gtf2_2c(struct edid *edid)
1672{
1673 u8 *r = NULL;
1674 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1675 return r ? r[13] : 0;
1676}
1677
1678static int
1679drm_gtf2_m(struct edid *edid)
1680{
1681 u8 *r = NULL;
1682 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1683 return r ? (r[15] << 8) + r[14] : 0;
1684}
1685
1686static int
1687drm_gtf2_k(struct edid *edid)
1688{
1689 u8 *r = NULL;
1690 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1691 return r ? r[16] : 0;
1692}
1693
1694static int
1695drm_gtf2_2j(struct edid *edid)
1696{
1697 u8 *r = NULL;
1698 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1699 return r ? r[17] : 0;
1700}
1701
1702/**
1703 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1704 * @edid: EDID block to scan
1705 */
1706static int standard_timing_level(struct edid *edid)
1707{
1708 if (edid->revision >= 2) {
1709 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1710 return LEVEL_CVT;
1711 if (drm_gtf2_hbreak(edid))
1712 return LEVEL_GTF2;
1713 return LEVEL_GTF;
1714 }
1715 return LEVEL_DMT;
1716}
1717
Adam Jackson23425ca2009-09-23 17:30:58 -04001718/*
1719 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1720 * monitors fill with ascii space (0x20) instead.
1721 */
1722static int
1723bad_std_timing(u8 a, u8 b)
1724{
1725 return (a == 0x00 && b == 0x00) ||
1726 (a == 0x01 && b == 0x01) ||
1727 (a == 0x20 && b == 0x20);
1728}
1729
Dave Airlief453ba02008-11-07 14:05:41 -08001730/**
1731 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
Daniel Vetterfc668112014-01-21 12:02:26 +01001732 * @connector: connector of for the EDID block
1733 * @edid: EDID block to scan
Dave Airlief453ba02008-11-07 14:05:41 -08001734 * @t: standard timing params
1735 *
1736 * Take the standard timing params (in this case width, aspect, and refresh)
Zhao Yakui5c612592009-06-22 13:17:10 +08001737 * and convert them into a real mode using CVT/GTF/DMT.
Dave Airlief453ba02008-11-07 14:05:41 -08001738 */
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001739static struct drm_display_mode *
Adam Jackson7a374352010-03-29 21:43:30 +00001740drm_mode_std(struct drm_connector *connector, struct edid *edid,
Thierry Reding464fdec2014-04-29 11:44:33 +02001741 struct std_timing *t)
Dave Airlief453ba02008-11-07 14:05:41 -08001742{
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001743 struct drm_device *dev = connector->dev;
1744 struct drm_display_mode *m, *mode = NULL;
Zhao Yakui5c612592009-06-22 13:17:10 +08001745 int hsize, vsize;
1746 int vrefresh_rate;
Michel Dänzer0454bea2009-06-15 16:56:07 +02001747 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1748 >> EDID_TIMING_ASPECT_SHIFT;
Zhao Yakui5c612592009-06-22 13:17:10 +08001749 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1750 >> EDID_TIMING_VFREQ_SHIFT;
Adam Jackson7a374352010-03-29 21:43:30 +00001751 int timing_level = standard_timing_level(edid);
Dave Airlief453ba02008-11-07 14:05:41 -08001752
Adam Jackson23425ca2009-09-23 17:30:58 -04001753 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1754 return NULL;
1755
Zhao Yakui5c612592009-06-22 13:17:10 +08001756 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1757 hsize = t->hsize * 8 + 248;
1758 /* vrefresh_rate = vfreq + 60 */
1759 vrefresh_rate = vfreq + 60;
1760 /* the vdisplay is calculated based on the aspect ratio */
Adam Jacksonf066a172009-09-23 17:31:21 -04001761 if (aspect_ratio == 0) {
Thierry Reding464fdec2014-04-29 11:44:33 +02001762 if (edid->revision < 3)
Adam Jacksonf066a172009-09-23 17:31:21 -04001763 vsize = hsize;
1764 else
1765 vsize = (hsize * 10) / 16;
1766 } else if (aspect_ratio == 1)
Dave Airlief453ba02008-11-07 14:05:41 -08001767 vsize = (hsize * 3) / 4;
Michel Dänzer0454bea2009-06-15 16:56:07 +02001768 else if (aspect_ratio == 2)
Dave Airlief453ba02008-11-07 14:05:41 -08001769 vsize = (hsize * 4) / 5;
1770 else
1771 vsize = (hsize * 9) / 16;
Adam Jacksona0910c82010-03-29 21:43:28 +00001772
1773 /* HDTV hack, part 1 */
1774 if (vrefresh_rate == 60 &&
1775 ((hsize == 1360 && vsize == 765) ||
1776 (hsize == 1368 && vsize == 769))) {
1777 hsize = 1366;
1778 vsize = 768;
1779 }
1780
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001781 /*
1782 * If this connector already has a mode for this size and refresh
1783 * rate (because it came from detailed or CVT info), use that
1784 * instead. This way we don't have to guess at interlace or
1785 * reduced blanking.
1786 */
Adam Jackson522032d2010-04-09 16:52:49 +00001787 list_for_each_entry(m, &connector->probed_modes, head)
Adam Jackson7ca6adb2010-03-29 21:43:29 +00001788 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1789 drm_mode_vrefresh(m) == vrefresh_rate)
1790 return NULL;
1791
Adam Jacksona0910c82010-03-29 21:43:28 +00001792 /* HDTV hack, part 2 */
1793 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1794 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
Dave Airlied50ba252009-09-23 14:44:08 +10001795 false);
Zhao Yakui559ee212009-09-03 09:33:47 +08001796 mode->hdisplay = 1366;
Adam Jacksona4967de62010-07-28 07:40:32 +10001797 mode->hsync_start = mode->hsync_start - 1;
1798 mode->hsync_end = mode->hsync_end - 1;
Zhao Yakui559ee212009-09-03 09:33:47 +08001799 return mode;
1800 }
Adam Jacksona0910c82010-03-29 21:43:28 +00001801
Zhao Yakui559ee212009-09-03 09:33:47 +08001802 /* check whether it can be found in default mode table */
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001803 if (drm_monitor_supports_rb(edid)) {
1804 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1805 true);
1806 if (mode)
1807 return mode;
1808 }
1809 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
Zhao Yakui559ee212009-09-03 09:33:47 +08001810 if (mode)
1811 return mode;
1812
Adam Jacksonf6e252b2012-04-13 16:33:31 -04001813 /* okay, generate it */
Zhao Yakui5c612592009-06-22 13:17:10 +08001814 switch (timing_level) {
1815 case LEVEL_DMT:
Zhao Yakui5c612592009-06-22 13:17:10 +08001816 break;
1817 case LEVEL_GTF:
1818 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1819 break;
Adam Jackson7a374352010-03-29 21:43:30 +00001820 case LEVEL_GTF2:
1821 /*
1822 * This is potentially wrong if there's ever a monitor with
1823 * more than one ranges section, each claiming a different
1824 * secondary GTF curve. Please don't do that.
1825 */
1826 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
Takashi Iwaifc48f162012-04-20 12:59:33 +01001827 if (!mode)
1828 return NULL;
Adam Jackson7a374352010-03-29 21:43:30 +00001829 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
Sascha Haueraefd3302012-02-01 11:38:21 +01001830 drm_mode_destroy(dev, mode);
Adam Jackson7a374352010-03-29 21:43:30 +00001831 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1832 vrefresh_rate, 0, 0,
1833 drm_gtf2_m(edid),
1834 drm_gtf2_2c(edid),
1835 drm_gtf2_k(edid),
1836 drm_gtf2_2j(edid));
1837 }
1838 break;
Zhao Yakui5c612592009-06-22 13:17:10 +08001839 case LEVEL_CVT:
Dave Airlied50ba252009-09-23 14:44:08 +10001840 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1841 false);
Zhao Yakui5c612592009-06-22 13:17:10 +08001842 break;
1843 }
Dave Airlief453ba02008-11-07 14:05:41 -08001844 return mode;
1845}
1846
Adam Jacksonb58db2c2010-02-15 22:15:39 +00001847/*
1848 * EDID is delightfully ambiguous about how interlaced modes are to be
1849 * encoded. Our internal representation is of frame height, but some
1850 * HDTV detailed timings are encoded as field height.
1851 *
1852 * The format list here is from CEA, in frame size. Technically we
1853 * should be checking refresh rate too. Whatever.
1854 */
1855static void
1856drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1857 struct detailed_pixel_timing *pt)
1858{
1859 int i;
1860 static const struct {
1861 int w, h;
1862 } cea_interlaced[] = {
1863 { 1920, 1080 },
1864 { 720, 480 },
1865 { 1440, 480 },
1866 { 2880, 480 },
1867 { 720, 576 },
1868 { 1440, 576 },
1869 { 2880, 576 },
1870 };
Adam Jacksonb58db2c2010-02-15 22:15:39 +00001871
1872 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1873 return;
1874
Kulikov Vasiliy3c581412010-06-28 15:54:52 +04001875 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
Adam Jacksonb58db2c2010-02-15 22:15:39 +00001876 if ((mode->hdisplay == cea_interlaced[i].w) &&
1877 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1878 mode->vdisplay *= 2;
1879 mode->vsync_start *= 2;
1880 mode->vsync_end *= 2;
1881 mode->vtotal *= 2;
1882 mode->vtotal |= 1;
1883 }
1884 }
1885
1886 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1887}
1888
Dave Airlief453ba02008-11-07 14:05:41 -08001889/**
1890 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1891 * @dev: DRM device (needed to create new mode)
1892 * @edid: EDID block
1893 * @timing: EDID detailed timing info
1894 * @quirks: quirks to apply
1895 *
1896 * An EDID detailed timing block contains enough info for us to create and
1897 * return a new struct drm_display_mode.
1898 */
1899static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1900 struct edid *edid,
1901 struct detailed_timing *timing,
1902 u32 quirks)
1903{
1904 struct drm_display_mode *mode;
1905 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
Michel Dänzer0454bea2009-06-15 16:56:07 +02001906 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1907 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1908 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1909 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
Michel Dänzere14cbee2009-06-23 12:36:32 +02001910 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1911 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
Torsten Duwe16dad1d2013-03-23 15:38:22 +01001912 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
Michel Dänzere14cbee2009-06-23 12:36:32 +02001913 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
Dave Airlief453ba02008-11-07 14:05:41 -08001914
Adam Jacksonfc438962009-06-04 10:20:34 +10001915 /* ignore tiny modes */
Michel Dänzer0454bea2009-06-15 16:56:07 +02001916 if (hactive < 64 || vactive < 64)
Adam Jacksonfc438962009-06-04 10:20:34 +10001917 return NULL;
1918
Michel Dänzer0454bea2009-06-15 16:56:07 +02001919 if (pt->misc & DRM_EDID_PT_STEREO) {
Egbert Eichc7d015f32013-06-13 21:01:19 +02001920 DRM_DEBUG_KMS("stereo mode not supported\n");
Dave Airlief453ba02008-11-07 14:05:41 -08001921 return NULL;
1922 }
Michel Dänzer0454bea2009-06-15 16:56:07 +02001923 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
Egbert Eichc7d015f32013-06-13 21:01:19 +02001924 DRM_DEBUG_KMS("composite sync not supported\n");
Dave Airlief453ba02008-11-07 14:05:41 -08001925 }
1926
Zhao Yakuifcb45612009-10-14 09:11:25 +08001927 /* it is incorrect if hsync/vsync width is zero */
1928 if (!hsync_pulse_width || !vsync_pulse_width) {
1929 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1930 "Wrong Hsync/Vsync pulse width\n");
1931 return NULL;
1932 }
Adam Jacksonbc42aab2012-05-23 16:26:54 -04001933
1934 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1935 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1936 if (!mode)
1937 return NULL;
1938
1939 goto set_size;
1940 }
1941
Dave Airlief453ba02008-11-07 14:05:41 -08001942 mode = drm_mode_create(dev);
1943 if (!mode)
1944 return NULL;
1945
Dave Airlief453ba02008-11-07 14:05:41 -08001946 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
Michel Dänzer0454bea2009-06-15 16:56:07 +02001947 timing->pixel_clock = cpu_to_le16(1088);
Dave Airlief453ba02008-11-07 14:05:41 -08001948
Michel Dänzer0454bea2009-06-15 16:56:07 +02001949 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
Dave Airlief453ba02008-11-07 14:05:41 -08001950
Michel Dänzer0454bea2009-06-15 16:56:07 +02001951 mode->hdisplay = hactive;
1952 mode->hsync_start = mode->hdisplay + hsync_offset;
1953 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1954 mode->htotal = mode->hdisplay + hblank;
Dave Airlief453ba02008-11-07 14:05:41 -08001955
Michel Dänzer0454bea2009-06-15 16:56:07 +02001956 mode->vdisplay = vactive;
1957 mode->vsync_start = mode->vdisplay + vsync_offset;
1958 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1959 mode->vtotal = mode->vdisplay + vblank;
Dave Airlief453ba02008-11-07 14:05:41 -08001960
Jesse Barnes7064fef2009-11-05 10:12:54 -08001961 /* Some EDIDs have bogus h/vtotal values */
1962 if (mode->hsync_end > mode->htotal)
1963 mode->htotal = mode->hsync_end + 1;
1964 if (mode->vsync_end > mode->vtotal)
1965 mode->vtotal = mode->vsync_end + 1;
1966
Adam Jacksonb58db2c2010-02-15 22:15:39 +00001967 drm_mode_do_interlace_quirk(mode, pt);
Dave Airlief453ba02008-11-07 14:05:41 -08001968
1969 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
Michel Dänzer0454bea2009-06-15 16:56:07 +02001970 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
Dave Airlief453ba02008-11-07 14:05:41 -08001971 }
1972
Michel Dänzer0454bea2009-06-15 16:56:07 +02001973 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1974 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1975 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1976 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
Dave Airlief453ba02008-11-07 14:05:41 -08001977
Adam Jacksonbc42aab2012-05-23 16:26:54 -04001978set_size:
Michel Dänzere14cbee2009-06-23 12:36:32 +02001979 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1980 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
Dave Airlief453ba02008-11-07 14:05:41 -08001981
1982 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1983 mode->width_mm *= 10;
1984 mode->height_mm *= 10;
1985 }
1986
1987 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1988 mode->width_mm = edid->width_cm * 10;
1989 mode->height_mm = edid->height_cm * 10;
1990 }
1991
Adam Jacksonbc42aab2012-05-23 16:26:54 -04001992 mode->type = DRM_MODE_TYPE_DRIVER;
Torsten Duwec19b3b0f2013-03-23 15:39:34 +01001993 mode->vrefresh = drm_mode_vrefresh(mode);
Adam Jacksonbc42aab2012-05-23 16:26:54 -04001994 drm_mode_set_name(mode);
1995
Dave Airlief453ba02008-11-07 14:05:41 -08001996 return mode;
1997}
1998
Adam Jackson07a5e632009-12-03 17:44:38 -05001999static bool
Chris Wilsonb1f559e2011-01-26 09:49:47 +00002000mode_in_hsync_range(const struct drm_display_mode *mode,
2001 struct edid *edid, u8 *t)
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002002{
2003 int hsync, hmin, hmax;
Adam Jackson07a5e632009-12-03 17:44:38 -05002004
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002005 hmin = t[7];
2006 if (edid->revision >= 4)
2007 hmin += ((t[4] & 0x04) ? 255 : 0);
2008 hmax = t[8];
2009 if (edid->revision >= 4)
2010 hmax += ((t[4] & 0x08) ? 255 : 0);
Adam Jackson07a5e632009-12-03 17:44:38 -05002011 hsync = drm_mode_hsync(mode);
Adam Jackson07a5e632009-12-03 17:44:38 -05002012
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002013 return (hsync <= hmax && hsync >= hmin);
2014}
2015
2016static bool
Chris Wilsonb1f559e2011-01-26 09:49:47 +00002017mode_in_vsync_range(const struct drm_display_mode *mode,
2018 struct edid *edid, u8 *t)
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002019{
2020 int vsync, vmin, vmax;
2021
2022 vmin = t[5];
2023 if (edid->revision >= 4)
2024 vmin += ((t[4] & 0x01) ? 255 : 0);
2025 vmax = t[6];
2026 if (edid->revision >= 4)
2027 vmax += ((t[4] & 0x02) ? 255 : 0);
2028 vsync = drm_mode_vrefresh(mode);
2029
2030 return (vsync <= vmax && vsync >= vmin);
2031}
2032
2033static u32
2034range_pixel_clock(struct edid *edid, u8 *t)
2035{
2036 /* unspecified */
2037 if (t[9] == 0 || t[9] == 255)
2038 return 0;
2039
2040 /* 1.4 with CVT support gives us real precision, yay */
2041 if (edid->revision >= 4 && t[10] == 0x04)
2042 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2043
2044 /* 1.3 is pathetic, so fuzz up a bit */
2045 return t[9] * 10000 + 5001;
2046}
2047
Adam Jackson07a5e632009-12-03 17:44:38 -05002048static bool
Chris Wilsonb1f559e2011-01-26 09:49:47 +00002049mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002050 struct detailed_timing *timing)
Adam Jackson07a5e632009-12-03 17:44:38 -05002051{
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002052 u32 max_clock;
2053 u8 *t = (u8 *)timing;
Adam Jackson07a5e632009-12-03 17:44:38 -05002054
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002055 if (!mode_in_hsync_range(mode, edid, t))
Adam Jackson07a5e632009-12-03 17:44:38 -05002056 return false;
2057
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002058 if (!mode_in_vsync_range(mode, edid, t))
Adam Jackson07a5e632009-12-03 17:44:38 -05002059 return false;
2060
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002061 if ((max_clock = range_pixel_clock(edid, t)))
Adam Jackson07a5e632009-12-03 17:44:38 -05002062 if (mode->clock > max_clock)
2063 return false;
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002064
2065 /* 1.4 max horizontal check */
2066 if (edid->revision >= 4 && t[10] == 0x04)
2067 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2068 return false;
2069
2070 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2071 return false;
Adam Jackson07a5e632009-12-03 17:44:38 -05002072
2073 return true;
2074}
2075
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002076static bool valid_inferred_mode(const struct drm_connector *connector,
2077 const struct drm_display_mode *mode)
2078{
Ville Syrjälä85f8fcd2015-09-07 18:22:56 +03002079 const struct drm_display_mode *m;
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002080 bool ok = false;
2081
2082 list_for_each_entry(m, &connector->probed_modes, head) {
2083 if (mode->hdisplay == m->hdisplay &&
2084 mode->vdisplay == m->vdisplay &&
2085 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2086 return false; /* duplicated */
2087 if (mode->hdisplay <= m->hdisplay &&
2088 mode->vdisplay <= m->vdisplay)
2089 ok = true;
2090 }
2091 return ok;
2092}
2093
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002094static int
Adam Jacksoncd4cd3d2012-04-13 16:33:33 -04002095drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
Adam Jacksonb17e52e2010-03-29 21:43:27 +00002096 struct detailed_timing *timing)
Adam Jackson07a5e632009-12-03 17:44:38 -05002097{
2098 int i, modes = 0;
2099 struct drm_display_mode *newmode;
2100 struct drm_device *dev = connector->dev;
2101
Thierry Redinga6b21832012-11-23 15:01:42 +01002102 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002103 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2104 valid_inferred_mode(connector, drm_dmt_modes + i)) {
Adam Jackson07a5e632009-12-03 17:44:38 -05002105 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2106 if (newmode) {
2107 drm_mode_probed_add(connector, newmode);
2108 modes++;
2109 }
2110 }
2111 }
2112
2113 return modes;
2114}
2115
Takashi Iwaic09dedb2012-04-23 17:40:33 +01002116/* fix up 1366x768 mode from 1368x768;
2117 * GFT/CVT can't express 1366 width which isn't dividable by 8
2118 */
2119static void fixup_mode_1366x768(struct drm_display_mode *mode)
2120{
2121 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2122 mode->hdisplay = 1366;
2123 mode->hsync_start--;
2124 mode->hsync_end--;
2125 drm_mode_set_name(mode);
2126 }
2127}
2128
Adam Jacksonb309bd32012-04-13 16:33:40 -04002129static int
2130drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2131 struct detailed_timing *timing)
2132{
2133 int i, modes = 0;
2134 struct drm_display_mode *newmode;
2135 struct drm_device *dev = connector->dev;
2136
Thierry Redinga6b21832012-11-23 15:01:42 +01002137 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002138 const struct minimode *m = &extra_modes[i];
2139 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
Takashi Iwaifc48f162012-04-20 12:59:33 +01002140 if (!newmode)
2141 return modes;
Adam Jacksonb309bd32012-04-13 16:33:40 -04002142
Takashi Iwaic09dedb2012-04-23 17:40:33 +01002143 fixup_mode_1366x768(newmode);
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002144 if (!mode_in_range(newmode, edid, timing) ||
2145 !valid_inferred_mode(connector, newmode)) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002146 drm_mode_destroy(dev, newmode);
2147 continue;
2148 }
2149
2150 drm_mode_probed_add(connector, newmode);
2151 modes++;
2152 }
2153
2154 return modes;
2155}
2156
2157static int
2158drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2159 struct detailed_timing *timing)
2160{
2161 int i, modes = 0;
2162 struct drm_display_mode *newmode;
2163 struct drm_device *dev = connector->dev;
2164 bool rb = drm_monitor_supports_rb(edid);
2165
Thierry Redinga6b21832012-11-23 15:01:42 +01002166 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002167 const struct minimode *m = &extra_modes[i];
2168 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
Takashi Iwaifc48f162012-04-20 12:59:33 +01002169 if (!newmode)
2170 return modes;
Adam Jacksonb309bd32012-04-13 16:33:40 -04002171
Takashi Iwaic09dedb2012-04-23 17:40:33 +01002172 fixup_mode_1366x768(newmode);
Takashi Iwai7b668eb2012-07-03 11:22:11 +02002173 if (!mode_in_range(newmode, edid, timing) ||
2174 !valid_inferred_mode(connector, newmode)) {
Adam Jacksonb309bd32012-04-13 16:33:40 -04002175 drm_mode_destroy(dev, newmode);
2176 continue;
2177 }
2178
2179 drm_mode_probed_add(connector, newmode);
2180 modes++;
2181 }
2182
2183 return modes;
2184}
2185
Adam Jackson13931572010-08-03 14:38:19 -04002186static void
2187do_inferred_modes(struct detailed_timing *timing, void *c)
Adam Jackson9340d8c2009-12-03 17:44:40 -05002188{
Adam Jackson13931572010-08-03 14:38:19 -04002189 struct detailed_mode_closure *closure = c;
2190 struct detailed_non_pixel *data = &timing->data.other_data;
Adam Jacksonb309bd32012-04-13 16:33:40 -04002191 struct detailed_data_monitor_range *range = &data->data.range;
Adam Jackson9340d8c2009-12-03 17:44:40 -05002192
Adam Jacksoncb21aaf2012-04-13 16:33:36 -04002193 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2194 return;
2195
2196 closure->modes += drm_dmt_modes_for_range(closure->connector,
2197 closure->edid,
2198 timing);
Adam Jacksonb309bd32012-04-13 16:33:40 -04002199
2200 if (!version_greater(closure->edid, 1, 1))
2201 return; /* GTF not defined yet */
2202
2203 switch (range->flags) {
2204 case 0x02: /* secondary gtf, XXX could do more */
2205 case 0x00: /* default gtf */
2206 closure->modes += drm_gtf_modes_for_range(closure->connector,
2207 closure->edid,
2208 timing);
2209 break;
2210 case 0x04: /* cvt, only in 1.4+ */
2211 if (!version_greater(closure->edid, 1, 3))
2212 break;
2213
2214 closure->modes += drm_cvt_modes_for_range(closure->connector,
2215 closure->edid,
2216 timing);
2217 break;
2218 case 0x01: /* just the ranges, no formula */
2219 default:
2220 break;
2221 }
Adam Jackson9340d8c2009-12-03 17:44:40 -05002222}
2223
Adam Jackson13931572010-08-03 14:38:19 -04002224static int
2225add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2226{
2227 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002228 .connector = connector,
2229 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002230 };
2231
2232 if (version_greater(edid, 1, 0))
2233 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2234 &closure);
2235
2236 return closure.modes;
2237}
2238
Adam Jackson2255be12010-03-29 21:43:22 +00002239static int
2240drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2241{
2242 int i, j, m, modes = 0;
2243 struct drm_display_mode *mode;
Paul Parsonsf3a32d72016-03-26 13:18:38 +00002244 u8 *est = ((u8 *)timing) + 6;
Adam Jackson2255be12010-03-29 21:43:22 +00002245
2246 for (i = 0; i < 6; i++) {
Ville Syrjälä891a7462013-10-14 16:44:26 +03002247 for (j = 7; j >= 0; j--) {
Adam Jackson2255be12010-03-29 21:43:22 +00002248 m = (i * 8) + (7 - j);
Linus Torvaldsaa9f56b2010-08-12 09:21:39 -07002249 if (m >= ARRAY_SIZE(est3_modes))
Adam Jackson2255be12010-03-29 21:43:22 +00002250 break;
2251 if (est[i] & (1 << j)) {
Dave Airlie1d42bbc2010-05-07 05:02:30 +00002252 mode = drm_mode_find_dmt(connector->dev,
2253 est3_modes[m].w,
2254 est3_modes[m].h,
Adam Jacksonf6e252b2012-04-13 16:33:31 -04002255 est3_modes[m].r,
2256 est3_modes[m].rb);
Adam Jackson2255be12010-03-29 21:43:22 +00002257 if (mode) {
2258 drm_mode_probed_add(connector, mode);
2259 modes++;
2260 }
2261 }
2262 }
2263 }
2264
2265 return modes;
2266}
2267
Adam Jackson13931572010-08-03 14:38:19 -04002268static void
2269do_established_modes(struct detailed_timing *timing, void *c)
Adam Jackson9cf00972009-12-03 17:44:36 -05002270{
Adam Jackson13931572010-08-03 14:38:19 -04002271 struct detailed_mode_closure *closure = c;
Adam Jackson9cf00972009-12-03 17:44:36 -05002272 struct detailed_non_pixel *data = &timing->data.other_data;
Adam Jackson13931572010-08-03 14:38:19 -04002273
2274 if (data->type == EDID_DETAIL_EST_TIMINGS)
2275 closure->modes += drm_est3_modes(closure->connector, timing);
2276}
2277
2278/**
2279 * add_established_modes - get est. modes from EDID and add them
Thierry Redingdb6cf8332014-04-29 11:44:34 +02002280 * @connector: connector to add mode(s) to
Adam Jackson13931572010-08-03 14:38:19 -04002281 * @edid: EDID block to scan
2282 *
2283 * Each EDID block contains a bitmap of the supported "established modes" list
2284 * (defined above). Tease them out and add them to the global modes list.
2285 */
2286static int
2287add_established_modes(struct drm_connector *connector, struct edid *edid)
2288{
Adam Jackson9cf00972009-12-03 17:44:36 -05002289 struct drm_device *dev = connector->dev;
Adam Jackson13931572010-08-03 14:38:19 -04002290 unsigned long est_bits = edid->established_timings.t1 |
2291 (edid->established_timings.t2 << 8) |
2292 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2293 int i, modes = 0;
2294 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002295 .connector = connector,
2296 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002297 };
Adam Jackson9cf00972009-12-03 17:44:36 -05002298
Adam Jackson13931572010-08-03 14:38:19 -04002299 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2300 if (est_bits & (1<<i)) {
2301 struct drm_display_mode *newmode;
2302 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2303 if (newmode) {
2304 drm_mode_probed_add(connector, newmode);
2305 modes++;
2306 }
2307 }
Adam Jackson9cf00972009-12-03 17:44:36 -05002308 }
2309
Adam Jackson13931572010-08-03 14:38:19 -04002310 if (version_greater(edid, 1, 0))
2311 drm_for_each_detailed_block((u8 *)edid,
2312 do_established_modes, &closure);
2313
2314 return modes + closure.modes;
2315}
2316
2317static void
2318do_standard_modes(struct detailed_timing *timing, void *c)
2319{
2320 struct detailed_mode_closure *closure = c;
2321 struct detailed_non_pixel *data = &timing->data.other_data;
2322 struct drm_connector *connector = closure->connector;
2323 struct edid *edid = closure->edid;
2324
2325 if (data->type == EDID_DETAIL_STD_MODES) {
2326 int i;
Adam Jackson9cf00972009-12-03 17:44:36 -05002327 for (i = 0; i < 6; i++) {
2328 struct std_timing *std;
2329 struct drm_display_mode *newmode;
2330
2331 std = &data->data.timings[i];
Thierry Reding464fdec2014-04-29 11:44:33 +02002332 newmode = drm_mode_std(connector, edid, std);
Adam Jackson9cf00972009-12-03 17:44:36 -05002333 if (newmode) {
2334 drm_mode_probed_add(connector, newmode);
Adam Jackson13931572010-08-03 14:38:19 -04002335 closure->modes++;
Adam Jackson9cf00972009-12-03 17:44:36 -05002336 }
2337 }
Adam Jackson13931572010-08-03 14:38:19 -04002338 }
2339}
2340
2341/**
2342 * add_standard_modes - get std. modes from EDID and add them
Thierry Redingdb6cf8332014-04-29 11:44:34 +02002343 * @connector: connector to add mode(s) to
Adam Jackson13931572010-08-03 14:38:19 -04002344 * @edid: EDID block to scan
2345 *
2346 * Standard modes can be calculated using the appropriate standard (DMT,
2347 * GTF or CVT. Grab them from @edid and add them to the list.
2348 */
2349static int
2350add_standard_modes(struct drm_connector *connector, struct edid *edid)
2351{
2352 int i, modes = 0;
2353 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002354 .connector = connector,
2355 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002356 };
2357
2358 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2359 struct drm_display_mode *newmode;
2360
2361 newmode = drm_mode_std(connector, edid,
Thierry Reding464fdec2014-04-29 11:44:33 +02002362 &edid->standard_timings[i]);
Adam Jackson13931572010-08-03 14:38:19 -04002363 if (newmode) {
2364 drm_mode_probed_add(connector, newmode);
2365 modes++;
2366 }
2367 }
2368
2369 if (version_greater(edid, 1, 0))
2370 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2371 &closure);
2372
2373 /* XXX should also look for standard codes in VTB blocks */
2374
2375 return modes + closure.modes;
2376}
2377
Dave Airlief453ba02008-11-07 14:05:41 -08002378static int drm_cvt_modes(struct drm_connector *connector,
2379 struct detailed_timing *timing)
2380{
2381 int i, j, modes = 0;
2382 struct drm_display_mode *newmode;
2383 struct drm_device *dev = connector->dev;
Zhao Yakui5c612592009-06-22 13:17:10 +08002384 struct cvt_timing *cvt;
2385 const int rates[] = { 60, 85, 75, 60, 50 };
2386 const u8 empty[3] = { 0, 0, 0 };
Dave Airlief453ba02008-11-07 14:05:41 -08002387
2388 for (i = 0; i < 4; i++) {
2389 int uninitialized_var(width), height;
2390 cvt = &(timing->data.other_data.data.cvt[i]);
2391
2392 if (!memcmp(cvt->code, empty, 3))
Michel Dänzer0454bea2009-06-15 16:56:07 +02002393 continue;
Dave Airlief453ba02008-11-07 14:05:41 -08002394
2395 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
Zhao Yakui5c612592009-06-22 13:17:10 +08002396 switch (cvt->code[1] & 0x0c) {
Adam Jacksonf066a172009-09-23 17:31:21 -04002397 case 0x00:
Dave Airlief453ba02008-11-07 14:05:41 -08002398 width = height * 4 / 3;
2399 break;
2400 case 0x04:
2401 width = height * 16 / 9;
2402 break;
2403 case 0x08:
2404 width = height * 16 / 10;
2405 break;
2406 case 0x0c:
Dave Airlief453ba02008-11-07 14:05:41 -08002407 width = height * 15 / 9;
2408 break;
2409 }
2410
2411 for (j = 1; j < 5; j++) {
2412 if (cvt->code[2] & (1 << j)) {
2413 newmode = drm_cvt_mode(dev, width, height,
2414 rates[j], j == 0,
2415 false, false);
2416 if (newmode) {
2417 drm_mode_probed_add(connector, newmode);
2418 modes++;
2419 }
2420 }
2421 }
2422 }
2423
2424 return modes;
2425}
2426
Adam Jackson13931572010-08-03 14:38:19 -04002427static void
2428do_cvt_mode(struct detailed_timing *timing, void *c)
2429{
2430 struct detailed_mode_closure *closure = c;
2431 struct detailed_non_pixel *data = &timing->data.other_data;
2432
2433 if (data->type == EDID_DETAIL_CVT_3BYTE)
2434 closure->modes += drm_cvt_modes(closure->connector, timing);
2435}
Adam Jackson9cf00972009-12-03 17:44:36 -05002436
2437static int
Adam Jackson13931572010-08-03 14:38:19 -04002438add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2439{
2440 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002441 .connector = connector,
2442 .edid = edid,
Adam Jackson13931572010-08-03 14:38:19 -04002443 };
Adam Jackson9cf00972009-12-03 17:44:36 -05002444
Adam Jackson13931572010-08-03 14:38:19 -04002445 if (version_greater(edid, 1, 2))
2446 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
Dave Airlief453ba02008-11-07 14:05:41 -08002447
Adam Jackson13931572010-08-03 14:38:19 -04002448 /* XXX should also look for CVT codes in VTB blocks */
2449
2450 return closure.modes;
Dave Airlief453ba02008-11-07 14:05:41 -08002451}
2452
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03002453static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2454
Adam Jackson13931572010-08-03 14:38:19 -04002455static void
2456do_detailed_mode(struct detailed_timing *timing, void *c)
Dave Airlief453ba02008-11-07 14:05:41 -08002457{
Adam Jackson13931572010-08-03 14:38:19 -04002458 struct detailed_mode_closure *closure = c;
Dave Airlief453ba02008-11-07 14:05:41 -08002459 struct drm_display_mode *newmode;
Adam Jackson9cf00972009-12-03 17:44:36 -05002460
2461 if (timing->pixel_clock) {
Adam Jackson13931572010-08-03 14:38:19 -04002462 newmode = drm_mode_detailed(closure->connector->dev,
2463 closure->edid, timing,
2464 closure->quirks);
Dave Airlief453ba02008-11-07 14:05:41 -08002465 if (!newmode)
Adam Jackson13931572010-08-03 14:38:19 -04002466 return;
Adam Jackson9cf00972009-12-03 17:44:36 -05002467
Adam Jackson13931572010-08-03 14:38:19 -04002468 if (closure->preferred)
Dave Airlief453ba02008-11-07 14:05:41 -08002469 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2470
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03002471 /*
2472 * Detailed modes are limited to 10kHz pixel clock resolution,
2473 * so fix up anything that looks like CEA/HDMI mode, but the clock
2474 * is just slightly off.
2475 */
2476 fixup_detailed_cea_mode_clock(newmode);
2477
Adam Jackson13931572010-08-03 14:38:19 -04002478 drm_mode_probed_add(closure->connector, newmode);
2479 closure->modes++;
2480 closure->preferred = 0;
Zhao Yakui882f0212009-08-26 18:20:49 +08002481 }
Ma Ling167f3a02009-03-20 14:09:48 +08002482}
2483
Adam Jackson13931572010-08-03 14:38:19 -04002484/*
2485 * add_detailed_modes - Add modes from detailed timings
Dave Airlief453ba02008-11-07 14:05:41 -08002486 * @connector: attached connector
2487 * @edid: EDID block to scan
2488 * @quirks: quirks to apply
Dave Airlief453ba02008-11-07 14:05:41 -08002489 */
Adam Jackson13931572010-08-03 14:38:19 -04002490static int
2491add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2492 u32 quirks)
Dave Airlief453ba02008-11-07 14:05:41 -08002493{
Adam Jackson13931572010-08-03 14:38:19 -04002494 struct detailed_mode_closure closure = {
Julia Lawalld456ea22014-08-23 18:09:56 +02002495 .connector = connector,
2496 .edid = edid,
2497 .preferred = 1,
2498 .quirks = quirks,
Adam Jackson13931572010-08-03 14:38:19 -04002499 };
Dave Airlief453ba02008-11-07 14:05:41 -08002500
Adam Jackson13931572010-08-03 14:38:19 -04002501 if (closure.preferred && !version_greater(edid, 1, 3))
2502 closure.preferred =
2503 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
Adam Jacksona327f6b2010-03-29 21:43:25 +00002504
Adam Jackson13931572010-08-03 14:38:19 -04002505 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
Dave Airlief453ba02008-11-07 14:05:41 -08002506
Adam Jackson13931572010-08-03 14:38:19 -04002507 return closure.modes;
Zhao Yakui882f0212009-08-26 18:20:49 +08002508}
Dave Airlief453ba02008-11-07 14:05:41 -08002509
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002510#define AUDIO_BLOCK 0x01
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002511#define VIDEO_BLOCK 0x02
Ma Lingf23c20c2009-03-26 19:26:23 +08002512#define VENDOR_BLOCK 0x03
Wu Fengguang76adaa342011-09-05 14:23:20 +08002513#define SPEAKER_BLOCK 0x04
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02002514#define VIDEO_CAPABILITY_BLOCK 0x07
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002515#define EDID_BASIC_AUDIO (1 << 6)
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02002516#define EDID_CEA_YCRCB444 (1 << 5)
2517#define EDID_CEA_YCRCB422 (1 << 4)
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02002518#define EDID_CEA_VCDB_QS (1 << 6)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002519
Lespiau, Damiend4e4a312013-08-19 16:58:52 +01002520/*
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002521 * Search EDID for CEA extension block.
2522 */
Dave Airlie40d9b042014-10-20 16:29:33 +10002523static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002524{
2525 u8 *edid_ext = NULL;
2526 int i;
2527
2528 /* No EDID or EDID extensions */
2529 if (edid == NULL || edid->extensions == 0)
2530 return NULL;
2531
2532 /* Find CEA extension */
2533 for (i = 0; i < edid->extensions; i++) {
2534 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
Dave Airlie40d9b042014-10-20 16:29:33 +10002535 if (edid_ext[0] == ext_id)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08002536 break;
2537 }
2538
2539 if (i == edid->extensions)
2540 return NULL;
2541
2542 return edid_ext;
2543}
2544
Dave Airlie40d9b042014-10-20 16:29:33 +10002545static u8 *drm_find_cea_extension(struct edid *edid)
2546{
2547 return drm_find_edid_extension(edid, CEA_EXT);
2548}
2549
2550static u8 *drm_find_displayid_extension(struct edid *edid)
2551{
2552 return drm_find_edid_extension(edid, DISPLAYID_EXT);
2553}
2554
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002555/*
2556 * Calculate the alternate clock for the CEA mode
2557 * (60Hz vs. 59.94Hz etc.)
2558 */
2559static unsigned int
2560cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2561{
2562 unsigned int clock = cea_mode->clock;
2563
2564 if (cea_mode->vrefresh % 6 != 0)
2565 return clock;
2566
2567 /*
2568 * edid_cea_modes contains the 59.94Hz
2569 * variant for 240 and 480 line modes,
2570 * and the 60Hz variant otherwise.
2571 */
2572 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
Ville Syrjälä9afd8082015-10-08 11:43:33 +03002573 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002574 else
Ville Syrjälä9afd8082015-10-08 11:43:33 +03002575 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002576
2577 return clock;
2578}
2579
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002580static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2581 unsigned int clock_tolerance)
2582{
Jani Nikulad9278b42016-01-08 13:21:51 +02002583 u8 vic;
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002584
2585 if (!to_match->clock)
2586 return 0;
2587
Jani Nikulad9278b42016-01-08 13:21:51 +02002588 for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2589 const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002590 unsigned int clock1, clock2;
2591
2592 /* Check both 60Hz and 59.94Hz */
2593 clock1 = cea_mode->clock;
2594 clock2 = cea_mode_alternate_clock(cea_mode);
2595
2596 if (abs(to_match->clock - clock1) > clock_tolerance &&
2597 abs(to_match->clock - clock2) > clock_tolerance)
2598 continue;
2599
2600 if (drm_mode_equal_no_clocks(to_match, cea_mode))
Jani Nikulad9278b42016-01-08 13:21:51 +02002601 return vic;
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002602 }
2603
2604 return 0;
2605}
2606
Thierry Reding18316c82012-12-20 15:41:44 +01002607/**
2608 * drm_match_cea_mode - look for a CEA mode matching given mode
2609 * @to_match: display mode
2610 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02002611 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
Thierry Reding18316c82012-12-20 15:41:44 +01002612 * mode.
Stephane Marchesina4799032012-11-09 16:21:05 +00002613 */
Thierry Reding18316c82012-12-20 15:41:44 +01002614u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
Stephane Marchesina4799032012-11-09 16:21:05 +00002615{
Jani Nikulad9278b42016-01-08 13:21:51 +02002616 u8 vic;
Stephane Marchesina4799032012-11-09 16:21:05 +00002617
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002618 if (!to_match->clock)
2619 return 0;
Stephane Marchesina4799032012-11-09 16:21:05 +00002620
Jani Nikulad9278b42016-01-08 13:21:51 +02002621 for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2622 const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002623 unsigned int clock1, clock2;
2624
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002625 /* Check both 60Hz and 59.94Hz */
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002626 clock1 = cea_mode->clock;
2627 clock2 = cea_mode_alternate_clock(cea_mode);
Ville Syrjäläa90b5902013-04-24 19:07:18 +03002628
2629 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2630 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
Damien Lespiauf2ecf2e32013-09-25 16:45:27 +01002631 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
Jani Nikulad9278b42016-01-08 13:21:51 +02002632 return vic;
Stephane Marchesina4799032012-11-09 16:21:05 +00002633 }
2634 return 0;
2635}
2636EXPORT_SYMBOL(drm_match_cea_mode);
2637
Jani Nikulad9278b42016-01-08 13:21:51 +02002638static bool drm_valid_cea_vic(u8 vic)
2639{
2640 return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
2641}
2642
Vandana Kannan0967e6a2014-04-01 16:26:59 +05302643/**
2644 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2645 * the input VIC from the CEA mode list
2646 * @video_code: ID given to each of the CEA modes
2647 *
2648 * Returns picture aspect ratio
2649 */
2650enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2651{
Jani Nikulad9278b42016-01-08 13:21:51 +02002652 return edid_cea_modes[video_code].picture_aspect_ratio;
Vandana Kannan0967e6a2014-04-01 16:26:59 +05302653}
2654EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2655
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002656/*
2657 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2658 * specific block).
2659 *
2660 * It's almost like cea_mode_alternate_clock(), we just need to add an
2661 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2662 * one.
2663 */
2664static unsigned int
2665hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2666{
2667 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2668 return hdmi_mode->clock;
2669
2670 return cea_mode_alternate_clock(hdmi_mode);
2671}
2672
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002673static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
2674 unsigned int clock_tolerance)
2675{
Jani Nikulad9278b42016-01-08 13:21:51 +02002676 u8 vic;
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002677
2678 if (!to_match->clock)
2679 return 0;
2680
Jani Nikulad9278b42016-01-08 13:21:51 +02002681 for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2682 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002683 unsigned int clock1, clock2;
2684
2685 /* Make sure to also match alternate clocks */
2686 clock1 = hdmi_mode->clock;
2687 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2688
2689 if (abs(to_match->clock - clock1) > clock_tolerance &&
2690 abs(to_match->clock - clock2) > clock_tolerance)
2691 continue;
2692
2693 if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
Jani Nikulad9278b42016-01-08 13:21:51 +02002694 return vic;
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02002695 }
2696
2697 return 0;
2698}
2699
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002700/*
2701 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2702 * @to_match: display mode
2703 *
2704 * An HDMI mode is one defined in the HDMI vendor specific block.
2705 *
2706 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2707 */
2708static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2709{
Jani Nikulad9278b42016-01-08 13:21:51 +02002710 u8 vic;
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002711
2712 if (!to_match->clock)
2713 return 0;
2714
Jani Nikulad9278b42016-01-08 13:21:51 +02002715 for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2716 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002717 unsigned int clock1, clock2;
2718
2719 /* Make sure to also match alternate clocks */
2720 clock1 = hdmi_mode->clock;
2721 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2722
2723 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2724 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
Damien Lespiauf2ecf2e32013-09-25 16:45:27 +01002725 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
Jani Nikulad9278b42016-01-08 13:21:51 +02002726 return vic;
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002727 }
2728 return 0;
2729}
2730
Jani Nikulad9278b42016-01-08 13:21:51 +02002731static bool drm_valid_hdmi_vic(u8 vic)
2732{
2733 return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
2734}
2735
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002736static int
2737add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2738{
2739 struct drm_device *dev = connector->dev;
2740 struct drm_display_mode *mode, *tmp;
2741 LIST_HEAD(list);
2742 int modes = 0;
2743
2744 /* Don't add CEA modes if the CEA extension block is missing */
2745 if (!drm_find_cea_extension(edid))
2746 return 0;
2747
2748 /*
2749 * Go through all probed modes and create a new mode
2750 * with the alternate clock for certain CEA modes.
2751 */
2752 list_for_each_entry(mode, &connector->probed_modes, head) {
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002753 const struct drm_display_mode *cea_mode = NULL;
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002754 struct drm_display_mode *newmode;
Jani Nikulad9278b42016-01-08 13:21:51 +02002755 u8 vic = drm_match_cea_mode(mode);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002756 unsigned int clock1, clock2;
2757
Jani Nikulad9278b42016-01-08 13:21:51 +02002758 if (drm_valid_cea_vic(vic)) {
2759 cea_mode = &edid_cea_modes[vic];
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002760 clock2 = cea_mode_alternate_clock(cea_mode);
2761 } else {
Jani Nikulad9278b42016-01-08 13:21:51 +02002762 vic = drm_match_hdmi_mode(mode);
2763 if (drm_valid_hdmi_vic(vic)) {
2764 cea_mode = &edid_4k_modes[vic];
Lespiau, Damien3f2f6532013-08-19 16:58:55 +01002765 clock2 = hdmi_mode_alternate_clock(cea_mode);
2766 }
2767 }
2768
2769 if (!cea_mode)
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002770 continue;
2771
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002772 clock1 = cea_mode->clock;
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002773
2774 if (clock1 == clock2)
2775 continue;
2776
2777 if (mode->clock != clock1 && mode->clock != clock2)
2778 continue;
2779
2780 newmode = drm_mode_duplicate(dev, cea_mode);
2781 if (!newmode)
2782 continue;
2783
Damien Lespiau27130212013-09-25 16:45:28 +01002784 /* Carry over the stereo flags */
2785 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2786
Ville Syrjäläe6e79202013-05-31 15:23:41 +03002787 /*
2788 * The current mode could be either variant. Make
2789 * sure to pick the "other" clock for the new mode.
2790 */
2791 if (mode->clock != clock1)
2792 newmode->clock = clock1;
2793 else
2794 newmode->clock = clock2;
2795
2796 list_add_tail(&newmode->head, &list);
2797 }
2798
2799 list_for_each_entry_safe(mode, tmp, &list, head) {
2800 list_del(&mode->head);
2801 drm_mode_probed_add(connector, mode);
2802 modes++;
2803 }
2804
2805 return modes;
2806}
Stephane Marchesina4799032012-11-09 16:21:05 +00002807
Thomas Woodaff04ac2013-11-29 15:33:27 +00002808static struct drm_display_mode *
2809drm_display_mode_from_vic_index(struct drm_connector *connector,
2810 const u8 *video_db, u8 video_len,
2811 u8 video_index)
2812{
2813 struct drm_device *dev = connector->dev;
2814 struct drm_display_mode *newmode;
Jani Nikulad9278b42016-01-08 13:21:51 +02002815 u8 vic;
Thomas Woodaff04ac2013-11-29 15:33:27 +00002816
2817 if (video_db == NULL || video_index >= video_len)
2818 return NULL;
2819
2820 /* CEA modes are numbered 1..127 */
Jani Nikulad9278b42016-01-08 13:21:51 +02002821 vic = (video_db[video_index] & 127);
2822 if (!drm_valid_cea_vic(vic))
Thomas Woodaff04ac2013-11-29 15:33:27 +00002823 return NULL;
2824
Jani Nikulad9278b42016-01-08 13:21:51 +02002825 newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
Damien Lespiau409bbf12014-03-03 23:59:07 +00002826 if (!newmode)
2827 return NULL;
2828
Thomas Woodaff04ac2013-11-29 15:33:27 +00002829 newmode->vrefresh = 0;
2830
2831 return newmode;
2832}
2833
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002834static int
Lespiau, Damien13ac3f52013-08-19 16:58:53 +01002835do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002836{
Thomas Woodaff04ac2013-11-29 15:33:27 +00002837 int i, modes = 0;
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002838
Thomas Woodaff04ac2013-11-29 15:33:27 +00002839 for (i = 0; i < len; i++) {
2840 struct drm_display_mode *mode;
2841 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2842 if (mode) {
2843 drm_mode_probed_add(connector, mode);
2844 modes++;
Christian Schmidt54ac76f2011-12-19 14:53:16 +00002845 }
2846 }
2847
2848 return modes;
2849}
2850
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002851struct stereo_mandatory_mode {
2852 int width, height, vrefresh;
2853 unsigned int flags;
2854};
2855
2856static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002857 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2858 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002859 { 1920, 1080, 50,
2860 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2861 { 1920, 1080, 60,
2862 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002863 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2864 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2865 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2866 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002867};
2868
2869static bool
2870stereo_match_mandatory(const struct drm_display_mode *mode,
2871 const struct stereo_mandatory_mode *stereo_mode)
2872{
2873 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2874
2875 return mode->hdisplay == stereo_mode->width &&
2876 mode->vdisplay == stereo_mode->height &&
2877 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2878 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2879}
2880
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002881static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2882{
2883 struct drm_device *dev = connector->dev;
2884 const struct drm_display_mode *mode;
2885 struct list_head stereo_modes;
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002886 int modes = 0, i;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002887
2888 INIT_LIST_HEAD(&stereo_modes);
2889
2890 list_for_each_entry(mode, &connector->probed_modes, head) {
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002891 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2892 const struct stereo_mandatory_mode *mandatory;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002893 struct drm_display_mode *new_mode;
2894
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002895 if (!stereo_match_mandatory(mode,
2896 &stereo_mandatory_modes[i]))
2897 continue;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002898
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002899 mandatory = &stereo_mandatory_modes[i];
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002900 new_mode = drm_mode_duplicate(dev, mode);
2901 if (!new_mode)
2902 continue;
2903
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002904 new_mode->flags |= mandatory->flags;
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002905 list_add_tail(&new_mode->head, &stereo_modes);
2906 modes++;
Damien Lespiauf7e121b2013-09-27 12:11:48 +01002907 }
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002908 }
2909
2910 list_splice_tail(&stereo_modes, &connector->probed_modes);
2911
2912 return modes;
2913}
2914
Damien Lespiau1deee8d2013-09-25 16:45:24 +01002915static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2916{
2917 struct drm_device *dev = connector->dev;
2918 struct drm_display_mode *newmode;
2919
Jani Nikulad9278b42016-01-08 13:21:51 +02002920 if (!drm_valid_hdmi_vic(vic)) {
Damien Lespiau1deee8d2013-09-25 16:45:24 +01002921 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2922 return 0;
2923 }
2924
2925 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2926 if (!newmode)
2927 return 0;
2928
2929 drm_mode_probed_add(connector, newmode);
2930
2931 return 1;
2932}
2933
Thomas Woodfbf46022013-10-16 15:58:50 +01002934static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2935 const u8 *video_db, u8 video_len, u8 video_index)
2936{
Thomas Woodfbf46022013-10-16 15:58:50 +01002937 struct drm_display_mode *newmode;
2938 int modes = 0;
Thomas Woodfbf46022013-10-16 15:58:50 +01002939
2940 if (structure & (1 << 0)) {
Thomas Woodaff04ac2013-11-29 15:33:27 +00002941 newmode = drm_display_mode_from_vic_index(connector, video_db,
2942 video_len,
2943 video_index);
Thomas Woodfbf46022013-10-16 15:58:50 +01002944 if (newmode) {
2945 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2946 drm_mode_probed_add(connector, newmode);
2947 modes++;
2948 }
2949 }
2950 if (structure & (1 << 6)) {
Thomas Woodaff04ac2013-11-29 15:33:27 +00002951 newmode = drm_display_mode_from_vic_index(connector, video_db,
2952 video_len,
2953 video_index);
Thomas Woodfbf46022013-10-16 15:58:50 +01002954 if (newmode) {
2955 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2956 drm_mode_probed_add(connector, newmode);
2957 modes++;
2958 }
2959 }
2960 if (structure & (1 << 8)) {
Thomas Woodaff04ac2013-11-29 15:33:27 +00002961 newmode = drm_display_mode_from_vic_index(connector, video_db,
2962 video_len,
2963 video_index);
Thomas Woodfbf46022013-10-16 15:58:50 +01002964 if (newmode) {
Thomas Wood89570ee2013-11-28 15:35:04 +00002965 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
Thomas Woodfbf46022013-10-16 15:58:50 +01002966 drm_mode_probed_add(connector, newmode);
2967 modes++;
2968 }
2969 }
2970
2971 return modes;
2972}
2973
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01002974/*
2975 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2976 * @connector: connector corresponding to the HDMI sink
2977 * @db: start of the CEA vendor specific block
2978 * @len: length of the CEA block payload, ie. one can access up to db[len]
2979 *
Damien Lespiauc858cfc2013-09-25 16:45:23 +01002980 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2981 * also adds the stereo 3d modes when applicable.
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01002982 */
2983static int
Thomas Woodfbf46022013-10-16 15:58:50 +01002984do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
2985 const u8 *video_db, u8 video_len)
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01002986{
Thomas Wood0e5083aa2013-11-29 18:18:58 +00002987 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
Thomas Woodfbf46022013-10-16 15:58:50 +01002988 u8 vic_len, hdmi_3d_len = 0;
2989 u16 mask;
2990 u16 structure_all;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01002991
2992 if (len < 8)
2993 goto out;
2994
2995 /* no HDMI_Video_Present */
2996 if (!(db[8] & (1 << 5)))
2997 goto out;
2998
2999 /* Latency_Fields_Present */
3000 if (db[8] & (1 << 7))
3001 offset += 2;
3002
3003 /* I_Latency_Fields_Present */
3004 if (db[8] & (1 << 6))
3005 offset += 2;
3006
3007 /* the declared length is not long enough for the 2 first bytes
3008 * of additional video format capabilities */
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003009 if (len < (8 + offset + 2))
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003010 goto out;
3011
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003012 /* 3D_Present */
3013 offset++;
Thomas Woodfbf46022013-10-16 15:58:50 +01003014 if (db[8 + offset] & (1 << 7)) {
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003015 modes += add_hdmi_mandatory_stereo_modes(connector);
3016
Thomas Woodfbf46022013-10-16 15:58:50 +01003017 /* 3D_Multi_present */
3018 multi_present = (db[8 + offset] & 0x60) >> 5;
3019 }
3020
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003021 offset++;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003022 vic_len = db[8 + offset] >> 5;
Thomas Woodfbf46022013-10-16 15:58:50 +01003023 hdmi_3d_len = db[8 + offset] & 0x1f;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003024
3025 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003026 u8 vic;
3027
3028 vic = db[9 + offset + i];
Damien Lespiau1deee8d2013-09-25 16:45:24 +01003029 modes += add_hdmi_mode(connector, vic);
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003030 }
Thomas Woodfbf46022013-10-16 15:58:50 +01003031 offset += 1 + vic_len;
3032
Thomas Wood0e5083aa2013-11-29 18:18:58 +00003033 if (multi_present == 1)
3034 multi_len = 2;
3035 else if (multi_present == 2)
3036 multi_len = 4;
Thomas Woodfbf46022013-10-16 15:58:50 +01003037 else
Thomas Wood0e5083aa2013-11-29 18:18:58 +00003038 multi_len = 0;
Thomas Woodfbf46022013-10-16 15:58:50 +01003039
Thomas Wood0e5083aa2013-11-29 18:18:58 +00003040 if (len < (8 + offset + hdmi_3d_len - 1))
3041 goto out;
3042
3043 if (hdmi_3d_len < multi_len)
3044 goto out;
3045
3046 if (multi_present == 1 || multi_present == 2) {
3047 /* 3D_Structure_ALL */
3048 structure_all = (db[8 + offset] << 8) | db[9 + offset];
3049
3050 /* check if 3D_MASK is present */
3051 if (multi_present == 2)
3052 mask = (db[10 + offset] << 8) | db[11 + offset];
3053 else
3054 mask = 0xffff;
3055
3056 for (i = 0; i < 16; i++) {
3057 if (mask & (1 << i))
3058 modes += add_3d_struct_modes(connector,
3059 structure_all,
3060 video_db,
3061 video_len, i);
3062 }
3063 }
3064
3065 offset += multi_len;
3066
3067 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
3068 int vic_index;
3069 struct drm_display_mode *newmode = NULL;
3070 unsigned int newflag = 0;
3071 bool detail_present;
3072
3073 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
3074
3075 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
3076 break;
3077
3078 /* 2D_VIC_order_X */
3079 vic_index = db[8 + offset + i] >> 4;
3080
3081 /* 3D_Structure_X */
3082 switch (db[8 + offset + i] & 0x0f) {
3083 case 0:
3084 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
3085 break;
3086 case 6:
3087 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3088 break;
3089 case 8:
3090 /* 3D_Detail_X */
3091 if ((db[9 + offset + i] >> 4) == 1)
3092 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3093 break;
3094 }
3095
3096 if (newflag != 0) {
3097 newmode = drm_display_mode_from_vic_index(connector,
3098 video_db,
3099 video_len,
3100 vic_index);
3101
3102 if (newmode) {
3103 newmode->flags |= newflag;
3104 drm_mode_probed_add(connector, newmode);
3105 modes++;
3106 }
3107 }
3108
3109 if (detail_present)
3110 i++;
Thomas Woodfbf46022013-10-16 15:58:50 +01003111 }
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003112
3113out:
3114 return modes;
3115}
3116
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003117static int
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003118cea_db_payload_len(const u8 *db)
3119{
3120 return db[0] & 0x1f;
3121}
3122
3123static int
3124cea_db_tag(const u8 *db)
3125{
3126 return db[0] >> 5;
3127}
3128
3129static int
3130cea_revision(const u8 *cea)
3131{
3132 return cea[1];
3133}
3134
3135static int
3136cea_db_offsets(const u8 *cea, int *start, int *end)
3137{
3138 /* Data block offset in CEA extension block */
3139 *start = 4;
3140 *end = cea[2];
3141 if (*end == 0)
3142 *end = 127;
3143 if (*end < 4 || *end > 127)
3144 return -ERANGE;
3145 return 0;
3146}
3147
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003148static bool cea_db_is_hdmi_vsdb(const u8 *db)
3149{
3150 int hdmi_id;
3151
3152 if (cea_db_tag(db) != VENDOR_BLOCK)
3153 return false;
3154
3155 if (cea_db_payload_len(db) < 5)
3156 return false;
3157
3158 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3159
Lespiau, Damien6cb3b7f2013-08-19 16:59:05 +01003160 return hdmi_id == HDMI_IEEE_OUI;
Lespiau, Damien7ebe1962013-08-19 16:58:54 +01003161}
3162
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003163#define for_each_cea_db(cea, i, start, end) \
3164 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3165
3166static int
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003167add_cea_modes(struct drm_connector *connector, struct edid *edid)
3168{
Lespiau, Damien13ac3f52013-08-19 16:58:53 +01003169 const u8 *cea = drm_find_cea_extension(edid);
Thomas Woodfbf46022013-10-16 15:58:50 +01003170 const u8 *db, *hdmi = NULL, *video = NULL;
3171 u8 dbl, hdmi_len, video_len = 0;
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003172 int modes = 0;
3173
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003174 if (cea && cea_revision(cea) >= 3) {
3175 int i, start, end;
3176
3177 if (cea_db_offsets(cea, &start, &end))
3178 return 0;
3179
3180 for_each_cea_db(cea, i, start, end) {
3181 db = &cea[i];
3182 dbl = cea_db_payload_len(db);
3183
Thomas Woodfbf46022013-10-16 15:58:50 +01003184 if (cea_db_tag(db) == VIDEO_BLOCK) {
3185 video = db + 1;
3186 video_len = dbl;
3187 modes += do_cea_modes(connector, video, dbl);
3188 }
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003189 else if (cea_db_is_hdmi_vsdb(db)) {
3190 hdmi = db;
3191 hdmi_len = dbl;
3192 }
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003193 }
3194 }
3195
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003196 /*
3197 * We parse the HDMI VSDB after having added the cea modes as we will
3198 * be patching their flags when the sink supports stereo 3D.
3199 */
3200 if (hdmi)
Thomas Woodfbf46022013-10-16 15:58:50 +01003201 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3202 video_len);
Damien Lespiauc858cfc2013-09-25 16:45:23 +01003203
Christian Schmidt54ac76f2011-12-19 14:53:16 +00003204 return modes;
3205}
3206
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003207static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3208{
3209 const struct drm_display_mode *cea_mode;
3210 int clock1, clock2, clock;
Jani Nikulad9278b42016-01-08 13:21:51 +02003211 u8 vic;
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003212 const char *type;
3213
Ville Syrjälä4c6bcf42015-11-16 21:05:12 +02003214 /*
3215 * allow 5kHz clock difference either way to account for
3216 * the 10kHz clock resolution limit of detailed timings.
3217 */
Jani Nikulad9278b42016-01-08 13:21:51 +02003218 vic = drm_match_cea_mode_clock_tolerance(mode, 5);
3219 if (drm_valid_cea_vic(vic)) {
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003220 type = "CEA";
Jani Nikulad9278b42016-01-08 13:21:51 +02003221 cea_mode = &edid_cea_modes[vic];
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003222 clock1 = cea_mode->clock;
3223 clock2 = cea_mode_alternate_clock(cea_mode);
3224 } else {
Jani Nikulad9278b42016-01-08 13:21:51 +02003225 vic = drm_match_hdmi_mode_clock_tolerance(mode, 5);
3226 if (drm_valid_hdmi_vic(vic)) {
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003227 type = "HDMI";
Jani Nikulad9278b42016-01-08 13:21:51 +02003228 cea_mode = &edid_4k_modes[vic];
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003229 clock1 = cea_mode->clock;
3230 clock2 = hdmi_mode_alternate_clock(cea_mode);
3231 } else {
3232 return;
3233 }
3234 }
3235
3236 /* pick whichever is closest */
3237 if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3238 clock = clock1;
3239 else
3240 clock = clock2;
3241
3242 if (mode->clock == clock)
3243 return;
3244
3245 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
Jani Nikulad9278b42016-01-08 13:21:51 +02003246 type, vic, mode->clock, clock);
Ville Syrjäläfa3a7342015-10-08 11:43:32 +03003247 mode->clock = clock;
3248}
3249
Wu Fengguang76adaa342011-09-05 14:23:20 +08003250static void
Ville Syrjälä85040722012-08-16 14:55:05 +00003251parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
Wu Fengguang76adaa342011-09-05 14:23:20 +08003252{
Ville Syrjälä85040722012-08-16 14:55:05 +00003253 u8 len = cea_db_payload_len(db);
Wu Fengguang76adaa342011-09-05 14:23:20 +08003254
Ville Syrjälä85040722012-08-16 14:55:05 +00003255 if (len >= 6) {
3256 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
3257 connector->dvi_dual = db[6] & 1;
3258 }
3259 if (len >= 7)
3260 connector->max_tmds_clock = db[7] * 5;
3261 if (len >= 8) {
3262 connector->latency_present[0] = db[8] >> 7;
3263 connector->latency_present[1] = (db[8] >> 6) & 1;
3264 }
3265 if (len >= 9)
3266 connector->video_latency[0] = db[9];
3267 if (len >= 10)
3268 connector->audio_latency[0] = db[10];
3269 if (len >= 11)
3270 connector->video_latency[1] = db[11];
3271 if (len >= 12)
3272 connector->audio_latency[1] = db[12];
Wu Fengguang76adaa342011-09-05 14:23:20 +08003273
Daniel Vetter670c1ef2012-11-22 09:53:55 +01003274 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
Wu Fengguang76adaa342011-09-05 14:23:20 +08003275 "max TMDS clock %d, "
3276 "latency present %d %d, "
3277 "video latency %d %d, "
3278 "audio latency %d %d\n",
3279 connector->dvi_dual,
3280 connector->max_tmds_clock,
3281 (int) connector->latency_present[0],
3282 (int) connector->latency_present[1],
3283 connector->video_latency[0],
3284 connector->video_latency[1],
3285 connector->audio_latency[0],
3286 connector->audio_latency[1]);
3287}
3288
3289static void
3290monitor_name(struct detailed_timing *t, void *data)
3291{
3292 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3293 *(u8 **)data = t->data.other_data.data.str.str;
3294}
3295
Jim Bride59f7c0f2016-04-14 10:18:35 -07003296static int get_monitor_name(struct edid *edid, char name[13])
3297{
3298 char *edid_name = NULL;
3299 int mnl;
3300
3301 if (!edid || !name)
3302 return 0;
3303
3304 drm_for_each_detailed_block((u8 *)edid, monitor_name, &edid_name);
3305 for (mnl = 0; edid_name && mnl < 13; mnl++) {
3306 if (edid_name[mnl] == 0x0a)
3307 break;
3308
3309 name[mnl] = edid_name[mnl];
3310 }
3311
3312 return mnl;
3313}
3314
3315/**
3316 * drm_edid_get_monitor_name - fetch the monitor name from the edid
3317 * @edid: monitor EDID information
3318 * @name: pointer to a character array to hold the name of the monitor
3319 * @bufsize: The size of the name buffer (should be at least 14 chars.)
3320 *
3321 */
3322void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
3323{
3324 int name_length;
3325 char buf[13];
3326
3327 if (bufsize <= 0)
3328 return;
3329
3330 name_length = min(get_monitor_name(edid, buf), bufsize - 1);
3331 memcpy(name, buf, name_length);
3332 name[name_length] = '\0';
3333}
3334EXPORT_SYMBOL(drm_edid_get_monitor_name);
3335
Wu Fengguang76adaa342011-09-05 14:23:20 +08003336/**
3337 * drm_edid_to_eld - build ELD from EDID
3338 * @connector: connector corresponding to the HDMI/DP sink
3339 * @edid: EDID to parse
3340 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003341 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3342 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3343 * fill in.
Wu Fengguang76adaa342011-09-05 14:23:20 +08003344 */
3345void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3346{
3347 uint8_t *eld = connector->eld;
3348 u8 *cea;
Wu Fengguang76adaa342011-09-05 14:23:20 +08003349 u8 *db;
Ville Syrjälä7c018782016-03-09 22:07:46 +02003350 int total_sad_count = 0;
Wu Fengguang76adaa342011-09-05 14:23:20 +08003351 int mnl;
3352 int dbl;
3353
3354 memset(eld, 0, sizeof(connector->eld));
3355
3356 cea = drm_find_cea_extension(edid);
3357 if (!cea) {
3358 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3359 return;
3360 }
3361
Jim Bride59f7c0f2016-04-14 10:18:35 -07003362 mnl = get_monitor_name(edid, eld + 20);
3363
Wu Fengguang76adaa342011-09-05 14:23:20 +08003364 eld[4] = (cea[1] << 5) | mnl;
3365 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3366
3367 eld[0] = 2 << 3; /* ELD version: 2 */
3368
3369 eld[16] = edid->mfg_id[0];
3370 eld[17] = edid->mfg_id[1];
3371 eld[18] = edid->prod_code[0];
3372 eld[19] = edid->prod_code[1];
3373
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003374 if (cea_revision(cea) >= 3) {
3375 int i, start, end;
3376
3377 if (cea_db_offsets(cea, &start, &end)) {
3378 start = 0;
3379 end = 0;
3380 }
3381
3382 for_each_cea_db(cea, i, start, end) {
3383 db = &cea[i];
3384 dbl = cea_db_payload_len(db);
3385
3386 switch (cea_db_tag(db)) {
Ville Syrjälä7c018782016-03-09 22:07:46 +02003387 int sad_count;
3388
Christian Schmidta0ab7342011-12-19 20:03:38 +01003389 case AUDIO_BLOCK:
3390 /* Audio Data Block, contains SADs */
Ville Syrjälä7c018782016-03-09 22:07:46 +02003391 sad_count = min(dbl / 3, 15 - total_sad_count);
3392 if (sad_count >= 1)
3393 memcpy(eld + 20 + mnl + total_sad_count * 3,
3394 &db[1], sad_count * 3);
3395 total_sad_count += sad_count;
Christian Schmidta0ab7342011-12-19 20:03:38 +01003396 break;
3397 case SPEAKER_BLOCK:
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003398 /* Speaker Allocation Data Block */
3399 if (dbl >= 1)
3400 eld[7] = db[1];
Christian Schmidta0ab7342011-12-19 20:03:38 +01003401 break;
3402 case VENDOR_BLOCK:
3403 /* HDMI Vendor-Specific Data Block */
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003404 if (cea_db_is_hdmi_vsdb(db))
Christian Schmidta0ab7342011-12-19 20:03:38 +01003405 parse_hdmi_vsdb(connector, db);
3406 break;
3407 default:
3408 break;
3409 }
Wu Fengguang76adaa342011-09-05 14:23:20 +08003410 }
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003411 }
Ville Syrjälä7c018782016-03-09 22:07:46 +02003412 eld[5] |= total_sad_count << 4;
Wu Fengguang76adaa342011-09-05 14:23:20 +08003413
Jani Nikula938fd8a2014-10-28 16:20:48 +02003414 eld[DRM_ELD_BASELINE_ELD_LEN] =
3415 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3416
3417 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
Ville Syrjälä7c018782016-03-09 22:07:46 +02003418 drm_eld_size(eld), total_sad_count);
Wu Fengguang76adaa342011-09-05 14:23:20 +08003419}
3420EXPORT_SYMBOL(drm_edid_to_eld);
3421
3422/**
Rafał Miłeckife214162013-04-19 19:01:25 +02003423 * drm_edid_to_sad - extracts SADs from EDID
3424 * @edid: EDID to parse
3425 * @sads: pointer that will be set to the extracted SADs
3426 *
3427 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
Rafał Miłeckife214162013-04-19 19:01:25 +02003428 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003429 * Note: The returned pointer needs to be freed using kfree().
3430 *
3431 * Return: The number of found SADs or negative number on error.
Rafał Miłeckife214162013-04-19 19:01:25 +02003432 */
3433int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3434{
3435 int count = 0;
3436 int i, start, end, dbl;
3437 u8 *cea;
3438
3439 cea = drm_find_cea_extension(edid);
3440 if (!cea) {
3441 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3442 return -ENOENT;
3443 }
3444
3445 if (cea_revision(cea) < 3) {
3446 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3447 return -ENOTSUPP;
3448 }
3449
3450 if (cea_db_offsets(cea, &start, &end)) {
3451 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3452 return -EPROTO;
3453 }
3454
3455 for_each_cea_db(cea, i, start, end) {
3456 u8 *db = &cea[i];
3457
3458 if (cea_db_tag(db) == AUDIO_BLOCK) {
3459 int j;
3460 dbl = cea_db_payload_len(db);
3461
3462 count = dbl / 3; /* SAD is 3B */
3463 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3464 if (!*sads)
3465 return -ENOMEM;
3466 for (j = 0; j < count; j++) {
3467 u8 *sad = &db[1 + j * 3];
3468
3469 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3470 (*sads)[j].channels = sad[0] & 0x7;
3471 (*sads)[j].freq = sad[1] & 0x7F;
3472 (*sads)[j].byte2 = sad[2];
3473 }
3474 break;
3475 }
3476 }
3477
3478 return count;
3479}
3480EXPORT_SYMBOL(drm_edid_to_sad);
3481
3482/**
Alex Deucherd105f472013-07-25 15:55:32 -04003483 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3484 * @edid: EDID to parse
3485 * @sadb: pointer to the speaker block
3486 *
3487 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
Alex Deucherd105f472013-07-25 15:55:32 -04003488 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003489 * Note: The returned pointer needs to be freed using kfree().
3490 *
3491 * Return: The number of found Speaker Allocation Blocks or negative number on
3492 * error.
Alex Deucherd105f472013-07-25 15:55:32 -04003493 */
3494int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3495{
3496 int count = 0;
3497 int i, start, end, dbl;
3498 const u8 *cea;
3499
3500 cea = drm_find_cea_extension(edid);
3501 if (!cea) {
3502 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3503 return -ENOENT;
3504 }
3505
3506 if (cea_revision(cea) < 3) {
3507 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3508 return -ENOTSUPP;
3509 }
3510
3511 if (cea_db_offsets(cea, &start, &end)) {
3512 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3513 return -EPROTO;
3514 }
3515
3516 for_each_cea_db(cea, i, start, end) {
3517 const u8 *db = &cea[i];
3518
3519 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3520 dbl = cea_db_payload_len(db);
3521
3522 /* Speaker Allocation Data Block */
3523 if (dbl == 3) {
Benoit Taine89086bc2014-05-26 17:21:22 +02003524 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
Alex Deucher618e3772013-09-27 18:46:09 -04003525 if (!*sadb)
3526 return -ENOMEM;
Alex Deucherd105f472013-07-25 15:55:32 -04003527 count = dbl;
3528 break;
3529 }
3530 }
3531 }
3532
3533 return count;
3534}
3535EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3536
3537/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003538 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
Wu Fengguang76adaa342011-09-05 14:23:20 +08003539 * @connector: connector associated with the HDMI/DP sink
3540 * @mode: the display mode
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003541 *
3542 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3543 * the sink doesn't support audio or video.
Wu Fengguang76adaa342011-09-05 14:23:20 +08003544 */
3545int drm_av_sync_delay(struct drm_connector *connector,
Ville Syrjälä3a818d32015-09-07 18:22:58 +03003546 const struct drm_display_mode *mode)
Wu Fengguang76adaa342011-09-05 14:23:20 +08003547{
3548 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3549 int a, v;
3550
3551 if (!connector->latency_present[0])
3552 return 0;
3553 if (!connector->latency_present[1])
3554 i = 0;
3555
3556 a = connector->audio_latency[i];
3557 v = connector->video_latency[i];
3558
3559 /*
3560 * HDMI/DP sink doesn't support audio or video?
3561 */
3562 if (a == 255 || v == 255)
3563 return 0;
3564
3565 /*
3566 * Convert raw EDID values to millisecond.
3567 * Treat unknown latency as 0ms.
3568 */
3569 if (a)
3570 a = min(2 * (a - 1), 500);
3571 if (v)
3572 v = min(2 * (v - 1), 500);
3573
3574 return max(v - a, 0);
3575}
3576EXPORT_SYMBOL(drm_av_sync_delay);
3577
3578/**
3579 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3580 * @encoder: the encoder just changed display mode
Wu Fengguang76adaa342011-09-05 14:23:20 +08003581 *
3582 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3583 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003584 *
3585 * Return: The connector associated with the first HDMI/DP sink that has ELD
3586 * attached to it.
Wu Fengguang76adaa342011-09-05 14:23:20 +08003587 */
Ville Syrjälä9e5a3b52015-09-07 18:22:57 +03003588struct drm_connector *drm_select_eld(struct drm_encoder *encoder)
Wu Fengguang76adaa342011-09-05 14:23:20 +08003589{
3590 struct drm_connector *connector;
3591 struct drm_device *dev = encoder->dev;
3592
Daniel Vetter6e9f7982014-05-29 23:54:47 +02003593 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
Sean Paul008f4042014-07-17 11:25:18 -04003594 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
Daniel Vetter6e9f7982014-05-29 23:54:47 +02003595
Daniel Vetter9a9f5ce2015-07-09 23:44:34 +02003596 drm_for_each_connector(connector, dev)
Wu Fengguang76adaa342011-09-05 14:23:20 +08003597 if (connector->encoder == encoder && connector->eld[0])
3598 return connector;
3599
3600 return NULL;
3601}
3602EXPORT_SYMBOL(drm_select_eld);
3603
Ma Lingf23c20c2009-03-26 19:26:23 +08003604/**
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003605 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
Ma Lingf23c20c2009-03-26 19:26:23 +08003606 * @edid: monitor EDID information
3607 *
3608 * Parse the CEA extension according to CEA-861-B.
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003609 *
3610 * Return: True if the monitor is HDMI, false if not or unknown.
Ma Lingf23c20c2009-03-26 19:26:23 +08003611 */
3612bool drm_detect_hdmi_monitor(struct edid *edid)
3613{
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003614 u8 *edid_ext;
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003615 int i;
Ma Lingf23c20c2009-03-26 19:26:23 +08003616 int start_offset, end_offset;
Ma Lingf23c20c2009-03-26 19:26:23 +08003617
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003618 edid_ext = drm_find_cea_extension(edid);
3619 if (!edid_ext)
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003620 return false;
Ma Lingf23c20c2009-03-26 19:26:23 +08003621
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003622 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003623 return false;
Ma Lingf23c20c2009-03-26 19:26:23 +08003624
3625 /*
3626 * Because HDMI identifier is in Vendor Specific Block,
3627 * search it from all data blocks of CEA extension.
3628 */
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003629 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003630 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3631 return true;
Ma Lingf23c20c2009-03-26 19:26:23 +08003632 }
3633
Ville Syrjälä14f77fd2012-08-16 14:55:06 +00003634 return false;
Ma Lingf23c20c2009-03-26 19:26:23 +08003635}
3636EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3637
Dave Airlief453ba02008-11-07 14:05:41 -08003638/**
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003639 * drm_detect_monitor_audio - check monitor audio capability
Daniel Vetterfc668112014-01-21 12:02:26 +01003640 * @edid: EDID block to scan
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003641 *
3642 * Monitor should have CEA extension block.
3643 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3644 * audio' only. If there is any audio extension block and supported
3645 * audio format, assume at least 'basic audio' support, even if 'basic
3646 * audio' is not defined in EDID.
3647 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003648 * Return: True if the monitor supports audio, false otherwise.
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003649 */
3650bool drm_detect_monitor_audio(struct edid *edid)
3651{
3652 u8 *edid_ext;
3653 int i, j;
3654 bool has_audio = false;
3655 int start_offset, end_offset;
3656
3657 edid_ext = drm_find_cea_extension(edid);
3658 if (!edid_ext)
3659 goto end;
3660
3661 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3662
3663 if (has_audio) {
3664 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3665 goto end;
3666 }
3667
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003668 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3669 goto end;
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003670
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003671 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3672 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003673 has_audio = true;
Ville Syrjälä9e50b9d2012-08-16 14:55:04 +00003674 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
Zhenyu Wang8fe97902010-09-19 14:27:28 +08003675 DRM_DEBUG_KMS("CEA audio format %d\n",
3676 (edid_ext[i + j] >> 3) & 0xf);
3677 goto end;
3678 }
3679 }
3680end:
3681 return has_audio;
3682}
3683EXPORT_SYMBOL(drm_detect_monitor_audio);
3684
3685/**
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02003686 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
Daniel Vetterfc668112014-01-21 12:02:26 +01003687 * @edid: EDID block to scan
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02003688 *
3689 * Check whether the monitor reports the RGB quantization range selection
3690 * as supported. The AVI infoframe can then be used to inform the monitor
3691 * which quantization range (full or limited) is used.
Thierry Redingdb6cf8332014-04-29 11:44:34 +02003692 *
3693 * Return: True if the RGB quantization range is selectable, false otherwise.
Ville Syrjäläb1edd6a2013-01-17 16:31:30 +02003694 */
3695bool drm_rgb_quant_range_selectable(struct edid *edid)
3696{
3697 u8 *edid_ext;
3698 int i, start, end;
3699
3700 edid_ext = drm_find_cea_extension(edid);
3701 if (!edid_ext)
3702 return false;
3703
3704 if (cea_db_offsets(edid_ext, &start, &end))
3705 return false;
3706
3707 for_each_cea_db(edid_ext, i, start, end) {
3708 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3709 cea_db_payload_len(&edid_ext[i]) == 2) {
3710 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3711 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3712 }
3713 }
3714
3715 return false;
3716}
3717EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3718
3719/**
Mario Kleinerd0c94692014-03-27 19:59:39 +01003720 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3721 * hdmi deep color modes and update drm_display_info if so.
Mario Kleinerd0c94692014-03-27 19:59:39 +01003722 * @edid: monitor EDID information
3723 * @info: Updated with maximum supported deep color bpc and color format
3724 * if deep color supported.
Daniel Vetter295ee852014-07-30 14:23:44 +02003725 * @connector: DRM connector, used only for debug output
Mario Kleinerd0c94692014-03-27 19:59:39 +01003726 *
3727 * Parse the CEA extension according to CEA-861-B.
3728 * Return true if HDMI deep color supported, false if not or unknown.
3729 */
3730static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
3731 struct drm_display_info *info,
3732 struct drm_connector *connector)
3733{
3734 u8 *edid_ext, *hdmi;
3735 int i;
3736 int start_offset, end_offset;
3737 unsigned int dc_bpc = 0;
3738
3739 edid_ext = drm_find_cea_extension(edid);
3740 if (!edid_ext)
3741 return false;
3742
3743 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3744 return false;
3745
3746 /*
3747 * Because HDMI identifier is in Vendor Specific Block,
3748 * search it from all data blocks of CEA extension.
3749 */
3750 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3751 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
3752 /* HDMI supports at least 8 bpc */
3753 info->bpc = 8;
3754
3755 hdmi = &edid_ext[i];
3756 if (cea_db_payload_len(hdmi) < 6)
3757 return false;
3758
3759 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3760 dc_bpc = 10;
Mario Kleiner5d02626d2014-06-05 09:52:10 -04003761 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
Mario Kleinerd0c94692014-03-27 19:59:39 +01003762 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003763 connector->name);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003764 }
3765
3766 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3767 dc_bpc = 12;
Mario Kleiner5d02626d2014-06-05 09:52:10 -04003768 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
Mario Kleinerd0c94692014-03-27 19:59:39 +01003769 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003770 connector->name);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003771 }
3772
3773 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3774 dc_bpc = 16;
Mario Kleiner5d02626d2014-06-05 09:52:10 -04003775 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
Mario Kleinerd0c94692014-03-27 19:59:39 +01003776 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003777 connector->name);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003778 }
3779
3780 if (dc_bpc > 0) {
3781 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003782 connector->name, dc_bpc);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003783 info->bpc = dc_bpc;
3784
3785 /*
3786 * Deep color support mandates RGB444 support for all video
3787 * modes and forbids YCRCB422 support for all video modes per
3788 * HDMI 1.3 spec.
3789 */
3790 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3791
3792 /* YCRCB444 is optional according to spec. */
3793 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3794 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3795 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003796 connector->name);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003797 }
3798
3799 /*
3800 * Spec says that if any deep color mode is supported at all,
3801 * then deep color 36 bit must be supported.
3802 */
3803 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3804 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
Jani Nikula25933822014-06-03 14:56:20 +03003805 connector->name);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003806 }
3807
3808 return true;
3809 }
3810 else {
3811 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003812 connector->name);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003813 }
3814 }
3815 }
3816
3817 return false;
3818}
3819
3820/**
Jesse Barnes3b112282011-04-15 12:49:23 -07003821 * drm_add_display_info - pull display info out if present
3822 * @edid: EDID data
3823 * @info: display info (attached to connector)
Mario Kleinerd0c94692014-03-27 19:59:39 +01003824 * @connector: connector whose edid is used to build display info
Jesse Barnes3b112282011-04-15 12:49:23 -07003825 *
3826 * Grab any available display info and stuff it into the drm_display_info
3827 * structure that's part of the connector. Useful for tracking bpp and
3828 * color spaces.
3829 */
3830static void drm_add_display_info(struct edid *edid,
Mario Kleinerd0c94692014-03-27 19:59:39 +01003831 struct drm_display_info *info,
3832 struct drm_connector *connector)
Jesse Barnes3b112282011-04-15 12:49:23 -07003833{
Jesse Barnesebec9a7b2011-08-03 09:22:54 -07003834 u8 *edid_ext;
3835
Jesse Barnes3b112282011-04-15 12:49:23 -07003836 info->width_mm = edid->width_cm * 10;
3837 info->height_mm = edid->height_cm * 10;
3838
3839 /* driver figures it out in this case */
3840 info->bpc = 0;
Jesse Barnesda05a5a72011-04-15 13:48:57 -07003841 info->color_formats = 0;
Jesse Barnes3b112282011-04-15 12:49:23 -07003842
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02003843 if (edid->revision < 3)
Jesse Barnes3b112282011-04-15 12:49:23 -07003844 return;
3845
3846 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3847 return;
3848
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02003849 /* Get data from CEA blocks if present */
3850 edid_ext = drm_find_cea_extension(edid);
3851 if (edid_ext) {
3852 info->cea_rev = edid_ext[1];
3853
3854 /* The existence of a CEA block should imply RGB support */
3855 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3856 if (edid_ext[3] & EDID_CEA_YCRCB444)
3857 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3858 if (edid_ext[3] & EDID_CEA_YCRCB422)
3859 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3860 }
3861
Mario Kleinerd0c94692014-03-27 19:59:39 +01003862 /* HDMI deep color modes supported? Assign to info, if so */
3863 drm_assign_hdmi_deep_color_info(edid, info, connector);
3864
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02003865 /* Only defined for 1.4 with digital displays */
3866 if (edid->revision < 4)
3867 return;
3868
Jesse Barnes3b112282011-04-15 12:49:23 -07003869 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3870 case DRM_EDID_DIGITAL_DEPTH_6:
3871 info->bpc = 6;
3872 break;
3873 case DRM_EDID_DIGITAL_DEPTH_8:
3874 info->bpc = 8;
3875 break;
3876 case DRM_EDID_DIGITAL_DEPTH_10:
3877 info->bpc = 10;
3878 break;
3879 case DRM_EDID_DIGITAL_DEPTH_12:
3880 info->bpc = 12;
3881 break;
3882 case DRM_EDID_DIGITAL_DEPTH_14:
3883 info->bpc = 14;
3884 break;
3885 case DRM_EDID_DIGITAL_DEPTH_16:
3886 info->bpc = 16;
3887 break;
3888 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3889 default:
3890 info->bpc = 0;
3891 break;
3892 }
Jesse Barnesda05a5a72011-04-15 13:48:57 -07003893
Mario Kleinerd0c94692014-03-27 19:59:39 +01003894 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
Jani Nikula25933822014-06-03 14:56:20 +03003895 connector->name, info->bpc);
Mario Kleinerd0c94692014-03-27 19:59:39 +01003896
Lars-Peter Clausena988bc72012-04-16 15:16:19 +02003897 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
Lars-Peter Clausenee588082012-04-16 15:16:18 +02003898 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3899 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3900 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3901 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
Jesse Barnes3b112282011-04-15 12:49:23 -07003902}
3903
Dave Airliec9729172016-05-03 15:38:37 +10003904static int validate_displayid(u8 *displayid, int length, int idx)
3905{
3906 int i;
3907 u8 csum = 0;
3908 struct displayid_hdr *base;
3909
3910 base = (struct displayid_hdr *)&displayid[idx];
3911
3912 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
3913 base->rev, base->bytes, base->prod_id, base->ext_count);
3914
3915 if (base->bytes + 5 > length - idx)
3916 return -EINVAL;
3917 for (i = idx; i <= base->bytes + 5; i++) {
3918 csum += displayid[i];
3919 }
3920 if (csum) {
3921 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
3922 return -EINVAL;
3923 }
3924 return 0;
3925}
3926
Dave Airliea39ed682016-05-02 08:35:05 +10003927static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
3928 struct displayid_detailed_timings_1 *timings)
3929{
3930 struct drm_display_mode *mode;
3931 unsigned pixel_clock = (timings->pixel_clock[0] |
3932 (timings->pixel_clock[1] << 8) |
3933 (timings->pixel_clock[2] << 16));
3934 unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
3935 unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
3936 unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1;
3937 unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
3938 unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1;
3939 unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
3940 unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1;
3941 unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
3942 bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
3943 bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
3944 mode = drm_mode_create(dev);
3945 if (!mode)
3946 return NULL;
3947
3948 mode->clock = pixel_clock * 10;
3949 mode->hdisplay = hactive;
3950 mode->hsync_start = mode->hdisplay + hsync;
3951 mode->hsync_end = mode->hsync_start + hsync_width;
3952 mode->htotal = mode->hdisplay + hblank;
3953
3954 mode->vdisplay = vactive;
3955 mode->vsync_start = mode->vdisplay + vsync;
3956 mode->vsync_end = mode->vsync_start + vsync_width;
3957 mode->vtotal = mode->vdisplay + vblank;
3958
3959 mode->flags = 0;
3960 mode->flags |= hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
3961 mode->flags |= vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
3962 mode->type = DRM_MODE_TYPE_DRIVER;
3963
3964 if (timings->flags & 0x80)
3965 mode->type |= DRM_MODE_TYPE_PREFERRED;
3966 mode->vrefresh = drm_mode_vrefresh(mode);
3967 drm_mode_set_name(mode);
3968
3969 return mode;
3970}
3971
3972static int add_displayid_detailed_1_modes(struct drm_connector *connector,
3973 struct displayid_block *block)
3974{
3975 struct displayid_detailed_timing_block *det = (struct displayid_detailed_timing_block *)block;
3976 int i;
3977 int num_timings;
3978 struct drm_display_mode *newmode;
3979 int num_modes = 0;
3980 /* blocks must be multiple of 20 bytes length */
3981 if (block->num_bytes % 20)
3982 return 0;
3983
3984 num_timings = block->num_bytes / 20;
3985 for (i = 0; i < num_timings; i++) {
3986 struct displayid_detailed_timings_1 *timings = &det->timings[i];
3987
3988 newmode = drm_mode_displayid_detailed(connector->dev, timings);
3989 if (!newmode)
3990 continue;
3991
3992 drm_mode_probed_add(connector, newmode);
3993 num_modes++;
3994 }
3995 return num_modes;
3996}
3997
3998static int add_displayid_detailed_modes(struct drm_connector *connector,
3999 struct edid *edid)
4000{
4001 u8 *displayid;
4002 int ret;
4003 int idx = 1;
4004 int length = EDID_LENGTH;
4005 struct displayid_block *block;
4006 int num_modes = 0;
4007
4008 displayid = drm_find_displayid_extension(edid);
4009 if (!displayid)
4010 return 0;
4011
4012 ret = validate_displayid(displayid, length, idx);
4013 if (ret)
4014 return 0;
4015
4016 idx += sizeof(struct displayid_hdr);
4017 while (block = (struct displayid_block *)&displayid[idx],
4018 idx + sizeof(struct displayid_block) <= length &&
4019 idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4020 block->num_bytes > 0) {
4021 idx += block->num_bytes + sizeof(struct displayid_block);
4022 switch (block->tag) {
4023 case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4024 num_modes += add_displayid_detailed_1_modes(connector, block);
4025 break;
4026 }
4027 }
4028 return num_modes;
4029}
4030
Jesse Barnes3b112282011-04-15 12:49:23 -07004031/**
Dave Airlief453ba02008-11-07 14:05:41 -08004032 * drm_add_edid_modes - add modes from EDID data, if available
4033 * @connector: connector we're probing
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004034 * @edid: EDID data
Dave Airlief453ba02008-11-07 14:05:41 -08004035 *
4036 * Add the specified modes to the connector's mode list.
4037 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004038 * Return: The number of modes added or 0 if we couldn't find any.
Dave Airlief453ba02008-11-07 14:05:41 -08004039 */
4040int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
4041{
4042 int num_modes = 0;
4043 u32 quirks;
4044
4045 if (edid == NULL) {
4046 return 0;
4047 }
Alex Deucher3c537882010-02-05 04:21:19 -05004048 if (!drm_edid_is_valid(edid)) {
Jordan Crousedcdb1672010-05-27 13:40:25 -06004049 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
Jani Nikula25933822014-06-03 14:56:20 +03004050 connector->name);
Dave Airlief453ba02008-11-07 14:05:41 -08004051 return 0;
4052 }
4053
4054 quirks = edid_get_quirks(edid);
4055
Adam Jacksonc867df72010-03-29 21:43:21 +00004056 /*
4057 * EDID spec says modes should be preferred in this order:
4058 * - preferred detailed mode
4059 * - other detailed modes from base block
4060 * - detailed modes from extension blocks
4061 * - CVT 3-byte code modes
4062 * - standard timing codes
4063 * - established timing codes
4064 * - modes inferred from GTF or CVT range information
4065 *
Adam Jackson13931572010-08-03 14:38:19 -04004066 * We get this pretty much right.
Adam Jacksonc867df72010-03-29 21:43:21 +00004067 *
4068 * XXX order for additional mode types in extension blocks?
4069 */
Adam Jackson13931572010-08-03 14:38:19 -04004070 num_modes += add_detailed_modes(connector, edid, quirks);
4071 num_modes += add_cvt_modes(connector, edid);
Adam Jacksonc867df72010-03-29 21:43:21 +00004072 num_modes += add_standard_modes(connector, edid);
4073 num_modes += add_established_modes(connector, edid);
Christian Schmidt54ac76f2011-12-19 14:53:16 +00004074 num_modes += add_cea_modes(connector, edid);
Ville Syrjäläe6e79202013-05-31 15:23:41 +03004075 num_modes += add_alternate_cea_modes(connector, edid);
Dave Airliea39ed682016-05-02 08:35:05 +10004076 num_modes += add_displayid_detailed_modes(connector, edid);
Ville Syrjälä4d53dc02015-05-08 17:45:07 +03004077 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
4078 num_modes += add_inferred_modes(connector, edid);
Dave Airlief453ba02008-11-07 14:05:41 -08004079
4080 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
4081 edid_fixup_preferred(connector, quirks);
4082
Mario Kleinerd0c94692014-03-27 19:59:39 +01004083 drm_add_display_info(edid, &connector->display_info, connector);
Dave Airlief453ba02008-11-07 14:05:41 -08004084
Rafał Miłecki49d45a312013-12-07 13:22:42 +01004085 if (quirks & EDID_QUIRK_FORCE_8BPC)
4086 connector->display_info.bpc = 8;
4087
Mario Kleinerbc5b9642014-05-23 21:40:55 +02004088 if (quirks & EDID_QUIRK_FORCE_12BPC)
4089 connector->display_info.bpc = 12;
4090
Dave Airlief453ba02008-11-07 14:05:41 -08004091 return num_modes;
4092}
4093EXPORT_SYMBOL(drm_add_edid_modes);
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004094
4095/**
4096 * drm_add_modes_noedid - add modes for the connectors without EDID
4097 * @connector: connector we're probing
4098 * @hdisplay: the horizontal display limit
4099 * @vdisplay: the vertical display limit
4100 *
4101 * Add the specified modes to the connector's mode list. Only when the
4102 * hdisplay/vdisplay is not beyond the given limit, it will be added.
4103 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004104 * Return: The number of modes added or 0 if we couldn't find any.
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004105 */
4106int drm_add_modes_noedid(struct drm_connector *connector,
4107 int hdisplay, int vdisplay)
4108{
4109 int i, count, num_modes = 0;
Chris Wilsonb1f559e2011-01-26 09:49:47 +00004110 struct drm_display_mode *mode;
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004111 struct drm_device *dev = connector->dev;
4112
Daniel Vetterfbb40b22015-08-10 11:55:37 +02004113 count = ARRAY_SIZE(drm_dmt_modes);
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004114 if (hdisplay < 0)
4115 hdisplay = 0;
4116 if (vdisplay < 0)
4117 vdisplay = 0;
4118
4119 for (i = 0; i < count; i++) {
Chris Wilsonb1f559e2011-01-26 09:49:47 +00004120 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004121 if (hdisplay && vdisplay) {
4122 /*
4123 * Only when two are valid, they will be used to check
4124 * whether the mode should be added to the mode list of
4125 * the connector.
4126 */
4127 if (ptr->hdisplay > hdisplay ||
4128 ptr->vdisplay > vdisplay)
4129 continue;
4130 }
Adam Jacksonf985ded2009-11-23 14:23:04 -05004131 if (drm_mode_vrefresh(ptr) > 61)
4132 continue;
Zhao Yakuif0fda0a2009-09-03 09:33:48 +08004133 mode = drm_mode_duplicate(dev, ptr);
4134 if (mode) {
4135 drm_mode_probed_add(connector, mode);
4136 num_modes++;
4137 }
4138 }
4139 return num_modes;
4140}
4141EXPORT_SYMBOL(drm_add_modes_noedid);
Thierry Reding10a85122012-11-21 15:31:35 +01004142
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004143/**
4144 * drm_set_preferred_mode - Sets the preferred mode of a connector
4145 * @connector: connector whose mode list should be processed
4146 * @hpref: horizontal resolution of preferred mode
4147 * @vpref: vertical resolution of preferred mode
4148 *
4149 * Marks a mode as preferred if it matches the resolution specified by @hpref
4150 * and @vpref.
4151 */
Gerd Hoffmann3cf70da2013-10-11 10:01:08 +02004152void drm_set_preferred_mode(struct drm_connector *connector,
4153 int hpref, int vpref)
4154{
4155 struct drm_display_mode *mode;
4156
4157 list_for_each_entry(mode, &connector->probed_modes, head) {
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004158 if (mode->hdisplay == hpref &&
Daniel Vetter9d3de132014-01-23 16:27:56 +01004159 mode->vdisplay == vpref)
Gerd Hoffmann3cf70da2013-10-11 10:01:08 +02004160 mode->type |= DRM_MODE_TYPE_PREFERRED;
4161 }
4162}
4163EXPORT_SYMBOL(drm_set_preferred_mode);
4164
Thierry Reding10a85122012-11-21 15:31:35 +01004165/**
4166 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
4167 * data from a DRM display mode
4168 * @frame: HDMI AVI infoframe
4169 * @mode: DRM display mode
4170 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004171 * Return: 0 on success or a negative error code on failure.
Thierry Reding10a85122012-11-21 15:31:35 +01004172 */
4173int
4174drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
4175 const struct drm_display_mode *mode)
4176{
4177 int err;
4178
4179 if (!frame || !mode)
4180 return -EINVAL;
4181
4182 err = hdmi_avi_infoframe_init(frame);
4183 if (err < 0)
4184 return err;
4185
Damien Lespiaubf02db92013-08-06 20:32:22 +01004186 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
4187 frame->pixel_repeat = 1;
4188
Thierry Reding10a85122012-11-21 15:31:35 +01004189 frame->video_code = drm_match_cea_mode(mode);
Thierry Reding10a85122012-11-21 15:31:35 +01004190
4191 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
Vandana Kannan0967e6a2014-04-01 16:26:59 +05304192
Vandana Kannan69ab6d32014-06-05 14:45:29 +05304193 /*
4194 * Populate picture aspect ratio from either
4195 * user input (if specified) or from the CEA mode list.
4196 */
4197 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
4198 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
4199 frame->picture_aspect = mode->picture_aspect_ratio;
4200 else if (frame->video_code > 0)
Vandana Kannan0967e6a2014-04-01 16:26:59 +05304201 frame->picture_aspect = drm_get_cea_aspect_ratio(
4202 frame->video_code);
4203
Thierry Reding10a85122012-11-21 15:31:35 +01004204 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
Daniel Drake24d01802014-02-27 09:19:30 -06004205 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
Thierry Reding10a85122012-11-21 15:31:35 +01004206
4207 return 0;
4208}
4209EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004210
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004211static enum hdmi_3d_structure
4212s3d_structure_from_display_mode(const struct drm_display_mode *mode)
4213{
4214 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
4215
4216 switch (layout) {
4217 case DRM_MODE_FLAG_3D_FRAME_PACKING:
4218 return HDMI_3D_STRUCTURE_FRAME_PACKING;
4219 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
4220 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
4221 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
4222 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
4223 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
4224 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
4225 case DRM_MODE_FLAG_3D_L_DEPTH:
4226 return HDMI_3D_STRUCTURE_L_DEPTH;
4227 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
4228 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
4229 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
4230 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
4231 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
4232 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
4233 default:
4234 return HDMI_3D_STRUCTURE_INVALID;
4235 }
4236}
4237
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004238/**
4239 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
4240 * data from a DRM display mode
4241 * @frame: HDMI vendor infoframe
4242 * @mode: DRM display mode
4243 *
4244 * Note that there's is a need to send HDMI vendor infoframes only when using a
4245 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
4246 * function will return -EINVAL, error that can be safely ignored.
4247 *
Thierry Redingdb6cf8332014-04-29 11:44:34 +02004248 * Return: 0 on success or a negative error code on failure.
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004249 */
4250int
4251drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
4252 const struct drm_display_mode *mode)
4253{
4254 int err;
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004255 u32 s3d_flags;
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004256 u8 vic;
4257
4258 if (!frame || !mode)
4259 return -EINVAL;
4260
4261 vic = drm_match_hdmi_mode(mode);
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004262 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4263
4264 if (!vic && !s3d_flags)
4265 return -EINVAL;
4266
4267 if (vic && s3d_flags)
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004268 return -EINVAL;
4269
4270 err = hdmi_vendor_infoframe_init(frame);
4271 if (err < 0)
4272 return err;
4273
Damien Lespiau4eed4a02013-09-25 16:45:26 +01004274 if (vic)
4275 frame->vic = vic;
4276 else
4277 frame->s3d_struct = s3d_structure_from_display_mode(mode);
Lespiau, Damien83dd0002013-08-19 16:59:03 +01004278
4279 return 0;
4280}
4281EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
Dave Airlie40d9b042014-10-20 16:29:33 +10004282
Dave Airlie5e546cd2016-05-03 15:31:12 +10004283static int drm_parse_tiled_block(struct drm_connector *connector,
4284 struct displayid_block *block)
4285{
4286 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4287 u16 w, h;
4288 u8 tile_v_loc, tile_h_loc;
4289 u8 num_v_tile, num_h_tile;
4290 struct drm_tile_group *tg;
4291
4292 w = tile->tile_size[0] | tile->tile_size[1] << 8;
4293 h = tile->tile_size[2] | tile->tile_size[3] << 8;
4294
4295 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4296 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4297 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4298 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4299
4300 connector->has_tile = true;
4301 if (tile->tile_cap & 0x80)
4302 connector->tile_is_single_monitor = true;
4303
4304 connector->num_h_tile = num_h_tile + 1;
4305 connector->num_v_tile = num_v_tile + 1;
4306 connector->tile_h_loc = tile_h_loc;
4307 connector->tile_v_loc = tile_v_loc;
4308 connector->tile_h_size = w + 1;
4309 connector->tile_v_size = h + 1;
4310
4311 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4312 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4313 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4314 num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4315 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4316
4317 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4318 if (!tg) {
4319 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4320 }
4321 if (!tg)
4322 return -ENOMEM;
4323
4324 if (connector->tile_group != tg) {
4325 /* if we haven't got a pointer,
4326 take the reference, drop ref to old tile group */
4327 if (connector->tile_group) {
4328 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4329 }
4330 connector->tile_group = tg;
4331 } else
4332 /* if same tile group, then release the ref we just took. */
4333 drm_mode_put_tile_group(connector->dev, tg);
4334 return 0;
4335}
4336
Dave Airlie40d9b042014-10-20 16:29:33 +10004337static int drm_parse_display_id(struct drm_connector *connector,
4338 u8 *displayid, int length,
4339 bool is_edid_extension)
4340{
4341 /* if this is an EDID extension the first byte will be 0x70 */
4342 int idx = 0;
Dave Airlie40d9b042014-10-20 16:29:33 +10004343 struct displayid_block *block;
Dave Airlie5e546cd2016-05-03 15:31:12 +10004344 int ret;
Dave Airlie40d9b042014-10-20 16:29:33 +10004345
4346 if (is_edid_extension)
4347 idx = 1;
4348
Dave Airliec9729172016-05-03 15:38:37 +10004349 ret = validate_displayid(displayid, length, idx);
4350 if (ret)
4351 return ret;
Dave Airlie40d9b042014-10-20 16:29:33 +10004352
Tomas Bzatek3a4a2ea2016-05-01 15:02:45 +02004353 idx += sizeof(struct displayid_hdr);
4354 while (block = (struct displayid_block *)&displayid[idx],
4355 idx + sizeof(struct displayid_block) <= length &&
4356 idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4357 block->num_bytes > 0) {
4358 idx += block->num_bytes + sizeof(struct displayid_block);
4359 DRM_DEBUG_KMS("block id 0x%x, rev %d, len %d\n",
4360 block->tag, block->rev, block->num_bytes);
Dave Airlie40d9b042014-10-20 16:29:33 +10004361
Tomas Bzatek3a4a2ea2016-05-01 15:02:45 +02004362 switch (block->tag) {
4363 case DATA_BLOCK_TILED_DISPLAY:
4364 ret = drm_parse_tiled_block(connector, block);
4365 if (ret)
4366 return ret;
4367 break;
Dave Airliea39ed682016-05-02 08:35:05 +10004368 case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4369 /* handled in mode gathering code. */
4370 break;
Tomas Bzatek3a4a2ea2016-05-01 15:02:45 +02004371 default:
4372 DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block->tag);
4373 break;
4374 }
Dave Airlie40d9b042014-10-20 16:29:33 +10004375 }
4376 return 0;
4377}
4378
4379static void drm_get_displayid(struct drm_connector *connector,
4380 struct edid *edid)
4381{
4382 void *displayid = NULL;
4383 int ret;
4384 connector->has_tile = false;
4385 displayid = drm_find_displayid_extension(edid);
4386 if (!displayid) {
4387 /* drop reference to any tile group we had */
4388 goto out_drop_ref;
4389 }
4390
4391 ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4392 if (ret < 0)
4393 goto out_drop_ref;
4394 if (!connector->has_tile)
4395 goto out_drop_ref;
4396 return;
4397out_drop_ref:
4398 if (connector->tile_group) {
4399 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4400 connector->tile_group = NULL;
4401 }
4402 return;
4403}