Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 1 | /* |
| 2 | * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support |
| 3 | * |
| 4 | * Copyright (c) 2014 Guenter Roeck |
| 5 | * |
| 6 | * Derived from mv88e6123_61_65.c |
| 7 | * Copyright (c) 2008-2009 Marvell Semiconductor |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/jiffies.h> |
| 17 | #include <linux/list.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/netdevice.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/phy.h> |
| 22 | #include <net/dsa.h> |
| 23 | #include "mv88e6xxx.h" |
| 24 | |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 25 | static const struct mv88e6xxx_info mv88e6352_table[] = { |
| 26 | { |
| 27 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6320, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame] | 28 | .family = MV88E6XXX_FAMILY_6320, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 29 | .name = "Marvell 88E6320", |
Vivien Didelot | 009a2b9 | 2016-04-17 13:24:01 -0400 | [diff] [blame^] | 30 | .num_ports = 7, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 31 | }, { |
| 32 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6321, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame] | 33 | .family = MV88E6XXX_FAMILY_6320, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 34 | .name = "Marvell 88E6321", |
Vivien Didelot | 009a2b9 | 2016-04-17 13:24:01 -0400 | [diff] [blame^] | 35 | .num_ports = 7, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 36 | }, { |
| 37 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6172, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame] | 38 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 39 | .name = "Marvell 88E6172", |
Vivien Didelot | 009a2b9 | 2016-04-17 13:24:01 -0400 | [diff] [blame^] | 40 | .num_ports = 7, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 41 | }, { |
| 42 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6176, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame] | 43 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 44 | .name = "Marvell 88E6176", |
Vivien Didelot | 009a2b9 | 2016-04-17 13:24:01 -0400 | [diff] [blame^] | 45 | .num_ports = 7, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 46 | }, { |
| 47 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6240, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame] | 48 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 49 | .name = "Marvell 88E6240", |
Vivien Didelot | 009a2b9 | 2016-04-17 13:24:01 -0400 | [diff] [blame^] | 50 | .num_ports = 7, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 51 | }, { |
| 52 | .prod_num = PORT_SWITCH_ID_PROD_NUM_6352, |
Vivien Didelot | 2235647 | 2016-04-17 13:24:00 -0400 | [diff] [blame] | 53 | .family = MV88E6XXX_FAMILY_6352, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 54 | .name = "Marvell 88E6352", |
Vivien Didelot | 009a2b9 | 2016-04-17 13:24:01 -0400 | [diff] [blame^] | 55 | .num_ports = 7, |
Vivien Didelot | f6271e6 | 2016-04-17 13:23:59 -0400 | [diff] [blame] | 56 | } |
Vivien Didelot | b9b3771 | 2015-10-30 19:39:48 -0400 | [diff] [blame] | 57 | }; |
| 58 | |
Vivien Didelot | 0209d14 | 2016-04-17 13:23:55 -0400 | [diff] [blame] | 59 | static const char *mv88e6352_drv_probe(struct device *dsa_dev, |
| 60 | struct device *host_dev, int sw_addr, |
| 61 | void **priv) |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 62 | { |
Andrew Lunn | a77d43f | 2016-04-13 02:40:42 +0200 | [diff] [blame] | 63 | return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv, |
| 64 | mv88e6352_table, |
| 65 | ARRAY_SIZE(mv88e6352_table)); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 66 | } |
| 67 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 68 | static int mv88e6352_setup_global(struct dsa_switch *ds) |
| 69 | { |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 70 | u32 upstream_port = dsa_upstream_port(ds); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 71 | int ret; |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 72 | u32 reg; |
Andrew Lunn | 54d792f | 2015-05-06 01:09:47 +0200 | [diff] [blame] | 73 | |
| 74 | ret = mv88e6xxx_setup_global(ds); |
| 75 | if (ret) |
| 76 | return ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 77 | |
| 78 | /* Discard packets with excessive collisions, |
| 79 | * mask all interrupt sources, enable PPU (bit 14, undocumented). |
| 80 | */ |
Andrew Lunn | 48ace4e | 2016-04-14 23:47:12 +0200 | [diff] [blame] | 81 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, |
| 82 | GLOBAL_CONTROL_PPU_ENABLE | |
| 83 | GLOBAL_CONTROL_DISCARD_EXCESS); |
| 84 | if (ret) |
| 85 | return ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 86 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 87 | /* Configure the upstream port, and configure the upstream |
| 88 | * port as the port to which ingress and egress monitor frames |
| 89 | * are to be sent. |
| 90 | */ |
Andrew Lunn | 15966a2 | 2015-05-06 01:09:49 +0200 | [diff] [blame] | 91 | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | |
| 92 | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | |
| 93 | upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT; |
Andrew Lunn | 48ace4e | 2016-04-14 23:47:12 +0200 | [diff] [blame] | 94 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); |
| 95 | if (ret) |
| 96 | return ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 97 | |
| 98 | /* Disable remote management for now, and set the switch's |
| 99 | * DSA device number. |
| 100 | */ |
Andrew Lunn | 48ace4e | 2016-04-14 23:47:12 +0200 | [diff] [blame] | 101 | return mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1c, ds->index & 0x1f); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 102 | } |
| 103 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 104 | static int mv88e6352_setup(struct dsa_switch *ds) |
| 105 | { |
| 106 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
| 107 | int ret; |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 108 | |
Guenter Roeck | acdaffc | 2015-03-26 18:36:28 -0700 | [diff] [blame] | 109 | ret = mv88e6xxx_setup_common(ds); |
| 110 | if (ret < 0) |
| 111 | return ret; |
| 112 | |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 113 | mutex_init(&ps->eeprom_mutex); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 114 | |
Andrew Lunn | 143a830 | 2015-04-02 04:06:34 +0200 | [diff] [blame] | 115 | ret = mv88e6xxx_switch_reset(ds, true); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 116 | if (ret < 0) |
| 117 | return ret; |
| 118 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 119 | ret = mv88e6352_setup_global(ds); |
| 120 | if (ret < 0) |
| 121 | return ret; |
| 122 | |
Andrew Lunn | dbde9e6 | 2015-05-06 01:09:48 +0200 | [diff] [blame] | 123 | return mv88e6xxx_setup_ports(ds); |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 124 | } |
| 125 | |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 126 | static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr) |
| 127 | { |
| 128 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
| 129 | int ret; |
| 130 | |
| 131 | mutex_lock(&ps->eeprom_mutex); |
| 132 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 133 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, |
| 134 | GLOBAL2_EEPROM_OP_READ | |
| 135 | (addr & GLOBAL2_EEPROM_OP_ADDR_MASK)); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 136 | if (ret < 0) |
| 137 | goto error; |
| 138 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 139 | ret = mv88e6xxx_eeprom_busy_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 140 | if (ret < 0) |
| 141 | goto error; |
| 142 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 143 | ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 144 | error: |
| 145 | mutex_unlock(&ps->eeprom_mutex); |
| 146 | return ret; |
| 147 | } |
| 148 | |
| 149 | static int mv88e6352_get_eeprom(struct dsa_switch *ds, |
| 150 | struct ethtool_eeprom *eeprom, u8 *data) |
| 151 | { |
| 152 | int offset; |
| 153 | int len; |
| 154 | int ret; |
| 155 | |
| 156 | offset = eeprom->offset; |
| 157 | len = eeprom->len; |
| 158 | eeprom->len = 0; |
| 159 | |
| 160 | eeprom->magic = 0xc3ec4951; |
| 161 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 162 | ret = mv88e6xxx_eeprom_load_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 163 | if (ret < 0) |
| 164 | return ret; |
| 165 | |
| 166 | if (offset & 1) { |
| 167 | int word; |
| 168 | |
| 169 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 170 | if (word < 0) |
| 171 | return word; |
| 172 | |
| 173 | *data++ = (word >> 8) & 0xff; |
| 174 | |
| 175 | offset++; |
| 176 | len--; |
| 177 | eeprom->len++; |
| 178 | } |
| 179 | |
| 180 | while (len >= 2) { |
| 181 | int word; |
| 182 | |
| 183 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 184 | if (word < 0) |
| 185 | return word; |
| 186 | |
| 187 | *data++ = word & 0xff; |
| 188 | *data++ = (word >> 8) & 0xff; |
| 189 | |
| 190 | offset += 2; |
| 191 | len -= 2; |
| 192 | eeprom->len += 2; |
| 193 | } |
| 194 | |
| 195 | if (len) { |
| 196 | int word; |
| 197 | |
| 198 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 199 | if (word < 0) |
| 200 | return word; |
| 201 | |
| 202 | *data++ = word & 0xff; |
| 203 | |
| 204 | offset++; |
| 205 | len--; |
| 206 | eeprom->len++; |
| 207 | } |
| 208 | |
| 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds) |
| 213 | { |
| 214 | int ret; |
| 215 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 216 | ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 217 | if (ret < 0) |
| 218 | return ret; |
| 219 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 220 | if (!(ret & GLOBAL2_EEPROM_OP_WRITE_EN)) |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 221 | return -EROFS; |
| 222 | |
| 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr, |
| 227 | u16 data) |
| 228 | { |
| 229 | struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); |
| 230 | int ret; |
| 231 | |
| 232 | mutex_lock(&ps->eeprom_mutex); |
| 233 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 234 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 235 | if (ret < 0) |
| 236 | goto error; |
| 237 | |
Andrew Lunn | 966bce3 | 2015-08-08 17:04:50 +0200 | [diff] [blame] | 238 | ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, |
| 239 | GLOBAL2_EEPROM_OP_WRITE | |
| 240 | (addr & GLOBAL2_EEPROM_OP_ADDR_MASK)); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 241 | if (ret < 0) |
| 242 | goto error; |
| 243 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 244 | ret = mv88e6xxx_eeprom_busy_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 245 | error: |
| 246 | mutex_unlock(&ps->eeprom_mutex); |
| 247 | return ret; |
| 248 | } |
| 249 | |
| 250 | static int mv88e6352_set_eeprom(struct dsa_switch *ds, |
| 251 | struct ethtool_eeprom *eeprom, u8 *data) |
| 252 | { |
| 253 | int offset; |
| 254 | int ret; |
| 255 | int len; |
| 256 | |
| 257 | if (eeprom->magic != 0xc3ec4951) |
| 258 | return -EINVAL; |
| 259 | |
| 260 | ret = mv88e6352_eeprom_is_readonly(ds); |
| 261 | if (ret) |
| 262 | return ret; |
| 263 | |
| 264 | offset = eeprom->offset; |
| 265 | len = eeprom->len; |
| 266 | eeprom->len = 0; |
| 267 | |
Andrew Lunn | f304468 | 2015-02-14 19:17:50 +0100 | [diff] [blame] | 268 | ret = mv88e6xxx_eeprom_load_wait(ds); |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 269 | if (ret < 0) |
| 270 | return ret; |
| 271 | |
| 272 | if (offset & 1) { |
| 273 | int word; |
| 274 | |
| 275 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 276 | if (word < 0) |
| 277 | return word; |
| 278 | |
| 279 | word = (*data++ << 8) | (word & 0xff); |
| 280 | |
| 281 | ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word); |
| 282 | if (ret < 0) |
| 283 | return ret; |
| 284 | |
| 285 | offset++; |
| 286 | len--; |
| 287 | eeprom->len++; |
| 288 | } |
| 289 | |
| 290 | while (len >= 2) { |
| 291 | int word; |
| 292 | |
| 293 | word = *data++; |
| 294 | word |= *data++ << 8; |
| 295 | |
| 296 | ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word); |
| 297 | if (ret < 0) |
| 298 | return ret; |
| 299 | |
| 300 | offset += 2; |
| 301 | len -= 2; |
| 302 | eeprom->len += 2; |
| 303 | } |
| 304 | |
| 305 | if (len) { |
| 306 | int word; |
| 307 | |
| 308 | word = mv88e6352_read_eeprom_word(ds, offset >> 1); |
| 309 | if (word < 0) |
| 310 | return word; |
| 311 | |
| 312 | word = (word & 0xff00) | *data++; |
| 313 | |
| 314 | ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word); |
| 315 | if (ret < 0) |
| 316 | return ret; |
| 317 | |
| 318 | offset++; |
| 319 | len--; |
| 320 | eeprom->len++; |
| 321 | } |
| 322 | |
| 323 | return 0; |
| 324 | } |
| 325 | |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 326 | struct dsa_switch_driver mv88e6352_switch_driver = { |
| 327 | .tag_protocol = DSA_TAG_PROTO_EDSA, |
Andrew Lunn | e49bad3 | 2016-04-13 02:40:43 +0200 | [diff] [blame] | 328 | .probe = mv88e6352_drv_probe, |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 329 | .setup = mv88e6352_setup, |
| 330 | .set_addr = mv88e6xxx_set_addr_indirect, |
Andrew Lunn | fd3a0ee | 2015-04-02 04:06:36 +0200 | [diff] [blame] | 331 | .phy_read = mv88e6xxx_phy_read_indirect, |
| 332 | .phy_write = mv88e6xxx_phy_write_indirect, |
Andrew Lunn | e413e7e | 2015-04-02 04:06:38 +0200 | [diff] [blame] | 333 | .get_strings = mv88e6xxx_get_strings, |
| 334 | .get_ethtool_stats = mv88e6xxx_get_ethtool_stats, |
| 335 | .get_sset_count = mv88e6xxx_get_sset_count, |
Andrew Lunn | dea8702 | 2015-08-31 15:56:47 +0200 | [diff] [blame] | 336 | .adjust_link = mv88e6xxx_adjust_link, |
Guenter Roeck | 04b0a80 | 2015-03-06 22:23:52 -0800 | [diff] [blame] | 337 | .set_eee = mv88e6xxx_set_eee, |
| 338 | .get_eee = mv88e6xxx_get_eee, |
Guenter Roeck | 276db3b | 2014-10-29 10:44:59 -0700 | [diff] [blame] | 339 | #ifdef CONFIG_NET_DSA_HWMON |
Guenter Roeck | c22995c | 2015-07-25 09:42:28 -0700 | [diff] [blame] | 340 | .get_temp = mv88e6xxx_get_temp, |
| 341 | .get_temp_limit = mv88e6xxx_get_temp_limit, |
| 342 | .set_temp_limit = mv88e6xxx_set_temp_limit, |
| 343 | .get_temp_alarm = mv88e6xxx_get_temp_alarm, |
Guenter Roeck | 276db3b | 2014-10-29 10:44:59 -0700 | [diff] [blame] | 344 | #endif |
Guenter Roeck | 33b43df | 2014-10-29 10:45:03 -0700 | [diff] [blame] | 345 | .get_eeprom = mv88e6352_get_eeprom, |
| 346 | .set_eeprom = mv88e6352_set_eeprom, |
Guenter Roeck | 95d08b5 | 2014-10-29 10:45:06 -0700 | [diff] [blame] | 347 | .get_regs_len = mv88e6xxx_get_regs_len, |
| 348 | .get_regs = mv88e6xxx_get_regs, |
Vivien Didelot | 71327a4 | 2016-03-13 16:21:32 -0400 | [diff] [blame] | 349 | .port_bridge_join = mv88e6xxx_port_bridge_join, |
| 350 | .port_bridge_leave = mv88e6xxx_port_bridge_leave, |
Vivien Didelot | 43c44a9 | 2016-04-06 11:55:03 -0400 | [diff] [blame] | 351 | .port_stp_state_set = mv88e6xxx_port_stp_state_set, |
Vivien Didelot | 214cdb9 | 2016-02-26 13:16:08 -0500 | [diff] [blame] | 352 | .port_vlan_filtering = mv88e6xxx_port_vlan_filtering, |
Vivien Didelot | 76e398a | 2015-11-01 12:33:55 -0500 | [diff] [blame] | 353 | .port_vlan_prepare = mv88e6xxx_port_vlan_prepare, |
Vivien Didelot | 0d3b33e | 2015-08-13 12:52:22 -0400 | [diff] [blame] | 354 | .port_vlan_add = mv88e6xxx_port_vlan_add, |
Vivien Didelot | 7dad08d | 2015-08-13 12:52:21 -0400 | [diff] [blame] | 355 | .port_vlan_del = mv88e6xxx_port_vlan_del, |
Vivien Didelot | ceff5ef | 2016-02-23 12:13:55 -0500 | [diff] [blame] | 356 | .port_vlan_dump = mv88e6xxx_port_vlan_dump, |
Vivien Didelot | 146a320 | 2015-10-08 11:35:12 -0400 | [diff] [blame] | 357 | .port_fdb_prepare = mv88e6xxx_port_fdb_prepare, |
Vivien Didelot | 2a778e1 | 2015-08-10 09:09:49 -0400 | [diff] [blame] | 358 | .port_fdb_add = mv88e6xxx_port_fdb_add, |
| 359 | .port_fdb_del = mv88e6xxx_port_fdb_del, |
Vivien Didelot | f33475b | 2015-10-22 09:34:41 -0400 | [diff] [blame] | 360 | .port_fdb_dump = mv88e6xxx_port_fdb_dump, |
Guenter Roeck | 3ad50cc | 2014-10-29 10:44:56 -0700 | [diff] [blame] | 361 | }; |
| 362 | |
Andrew Lunn | 1636d88 | 2015-05-06 01:09:50 +0200 | [diff] [blame] | 363 | MODULE_ALIAS("platform:mv88e6172"); |
Aleksey S. Kazantsev | 7c3d0d6 | 2015-07-07 20:38:15 -0700 | [diff] [blame] | 364 | MODULE_ALIAS("platform:mv88e6176"); |
| 365 | MODULE_ALIAS("platform:mv88e6320"); |
| 366 | MODULE_ALIAS("platform:mv88e6321"); |
| 367 | MODULE_ALIAS("platform:mv88e6352"); |