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Guenter Roeck3ad50cc2014-10-29 10:44:56 -07001/*
2 * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
3 *
4 * Copyright (c) 2014 Guenter Roeck
5 *
6 * Derived from mv88e6123_61_65.c
7 * Copyright (c) 2008-2009 Marvell Semiconductor
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/jiffies.h>
17#include <linux/list.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/platform_device.h>
21#include <linux/phy.h>
22#include <net/dsa.h>
23#include "mv88e6xxx.h"
24
Vivien Didelotf6271e62016-04-17 13:23:59 -040025static const struct mv88e6xxx_info mv88e6352_table[] = {
26 {
27 .prod_num = PORT_SWITCH_ID_PROD_NUM_6320,
Vivien Didelot22356472016-04-17 13:24:00 -040028 .family = MV88E6XXX_FAMILY_6320,
Vivien Didelotf6271e62016-04-17 13:23:59 -040029 .name = "Marvell 88E6320",
Vivien Didelot009a2b92016-04-17 13:24:01 -040030 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040031 }, {
32 .prod_num = PORT_SWITCH_ID_PROD_NUM_6321,
Vivien Didelot22356472016-04-17 13:24:00 -040033 .family = MV88E6XXX_FAMILY_6320,
Vivien Didelotf6271e62016-04-17 13:23:59 -040034 .name = "Marvell 88E6321",
Vivien Didelot009a2b92016-04-17 13:24:01 -040035 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040036 }, {
37 .prod_num = PORT_SWITCH_ID_PROD_NUM_6172,
Vivien Didelot22356472016-04-17 13:24:00 -040038 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040039 .name = "Marvell 88E6172",
Vivien Didelot009a2b92016-04-17 13:24:01 -040040 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040041 }, {
42 .prod_num = PORT_SWITCH_ID_PROD_NUM_6176,
Vivien Didelot22356472016-04-17 13:24:00 -040043 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040044 .name = "Marvell 88E6176",
Vivien Didelot009a2b92016-04-17 13:24:01 -040045 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040046 }, {
47 .prod_num = PORT_SWITCH_ID_PROD_NUM_6240,
Vivien Didelot22356472016-04-17 13:24:00 -040048 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040049 .name = "Marvell 88E6240",
Vivien Didelot009a2b92016-04-17 13:24:01 -040050 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040051 }, {
52 .prod_num = PORT_SWITCH_ID_PROD_NUM_6352,
Vivien Didelot22356472016-04-17 13:24:00 -040053 .family = MV88E6XXX_FAMILY_6352,
Vivien Didelotf6271e62016-04-17 13:23:59 -040054 .name = "Marvell 88E6352",
Vivien Didelot009a2b92016-04-17 13:24:01 -040055 .num_ports = 7,
Vivien Didelotf6271e62016-04-17 13:23:59 -040056 }
Vivien Didelotb9b37712015-10-30 19:39:48 -040057};
58
Vivien Didelot0209d142016-04-17 13:23:55 -040059static const char *mv88e6352_drv_probe(struct device *dsa_dev,
60 struct device *host_dev, int sw_addr,
61 void **priv)
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070062{
Andrew Lunna77d43f2016-04-13 02:40:42 +020063 return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
64 mv88e6352_table,
65 ARRAY_SIZE(mv88e6352_table));
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070066}
67
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070068static int mv88e6352_setup_global(struct dsa_switch *ds)
69{
Andrew Lunn15966a22015-05-06 01:09:49 +020070 u32 upstream_port = dsa_upstream_port(ds);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070071 int ret;
Andrew Lunn15966a22015-05-06 01:09:49 +020072 u32 reg;
Andrew Lunn54d792f2015-05-06 01:09:47 +020073
74 ret = mv88e6xxx_setup_global(ds);
75 if (ret)
76 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070077
78 /* Discard packets with excessive collisions,
79 * mask all interrupt sources, enable PPU (bit 14, undocumented).
80 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +020081 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL,
82 GLOBAL_CONTROL_PPU_ENABLE |
83 GLOBAL_CONTROL_DISCARD_EXCESS);
84 if (ret)
85 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070086
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070087 /* Configure the upstream port, and configure the upstream
88 * port as the port to which ingress and egress monitor frames
89 * are to be sent.
90 */
Andrew Lunn15966a22015-05-06 01:09:49 +020091 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
92 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
93 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
Andrew Lunn48ace4e2016-04-14 23:47:12 +020094 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
95 if (ret)
96 return ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070097
98 /* Disable remote management for now, and set the switch's
99 * DSA device number.
100 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +0200101 return mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1c, ds->index & 0x1f);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700102}
103
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700104static int mv88e6352_setup(struct dsa_switch *ds)
105{
106 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
107 int ret;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700108
Guenter Roeckacdaffc2015-03-26 18:36:28 -0700109 ret = mv88e6xxx_setup_common(ds);
110 if (ret < 0)
111 return ret;
112
Guenter Roeck33b43df2014-10-29 10:45:03 -0700113 mutex_init(&ps->eeprom_mutex);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700114
Andrew Lunn143a8302015-04-02 04:06:34 +0200115 ret = mv88e6xxx_switch_reset(ds, true);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700116 if (ret < 0)
117 return ret;
118
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700119 ret = mv88e6352_setup_global(ds);
120 if (ret < 0)
121 return ret;
122
Andrew Lunndbde9e62015-05-06 01:09:48 +0200123 return mv88e6xxx_setup_ports(ds);
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700124}
125
Guenter Roeck33b43df2014-10-29 10:45:03 -0700126static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
127{
128 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
129 int ret;
130
131 mutex_lock(&ps->eeprom_mutex);
132
Andrew Lunn966bce32015-08-08 17:04:50 +0200133 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
134 GLOBAL2_EEPROM_OP_READ |
135 (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
Guenter Roeck33b43df2014-10-29 10:45:03 -0700136 if (ret < 0)
137 goto error;
138
Andrew Lunnf3044682015-02-14 19:17:50 +0100139 ret = mv88e6xxx_eeprom_busy_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700140 if (ret < 0)
141 goto error;
142
Andrew Lunn966bce32015-08-08 17:04:50 +0200143 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700144error:
145 mutex_unlock(&ps->eeprom_mutex);
146 return ret;
147}
148
149static int mv88e6352_get_eeprom(struct dsa_switch *ds,
150 struct ethtool_eeprom *eeprom, u8 *data)
151{
152 int offset;
153 int len;
154 int ret;
155
156 offset = eeprom->offset;
157 len = eeprom->len;
158 eeprom->len = 0;
159
160 eeprom->magic = 0xc3ec4951;
161
Andrew Lunnf3044682015-02-14 19:17:50 +0100162 ret = mv88e6xxx_eeprom_load_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700163 if (ret < 0)
164 return ret;
165
166 if (offset & 1) {
167 int word;
168
169 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
170 if (word < 0)
171 return word;
172
173 *data++ = (word >> 8) & 0xff;
174
175 offset++;
176 len--;
177 eeprom->len++;
178 }
179
180 while (len >= 2) {
181 int word;
182
183 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
184 if (word < 0)
185 return word;
186
187 *data++ = word & 0xff;
188 *data++ = (word >> 8) & 0xff;
189
190 offset += 2;
191 len -= 2;
192 eeprom->len += 2;
193 }
194
195 if (len) {
196 int word;
197
198 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
199 if (word < 0)
200 return word;
201
202 *data++ = word & 0xff;
203
204 offset++;
205 len--;
206 eeprom->len++;
207 }
208
209 return 0;
210}
211
212static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
213{
214 int ret;
215
Andrew Lunn966bce32015-08-08 17:04:50 +0200216 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700217 if (ret < 0)
218 return ret;
219
Andrew Lunn966bce32015-08-08 17:04:50 +0200220 if (!(ret & GLOBAL2_EEPROM_OP_WRITE_EN))
Guenter Roeck33b43df2014-10-29 10:45:03 -0700221 return -EROFS;
222
223 return 0;
224}
225
226static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
227 u16 data)
228{
229 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
230 int ret;
231
232 mutex_lock(&ps->eeprom_mutex);
233
Andrew Lunn966bce32015-08-08 17:04:50 +0200234 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700235 if (ret < 0)
236 goto error;
237
Andrew Lunn966bce32015-08-08 17:04:50 +0200238 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
239 GLOBAL2_EEPROM_OP_WRITE |
240 (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
Guenter Roeck33b43df2014-10-29 10:45:03 -0700241 if (ret < 0)
242 goto error;
243
Andrew Lunnf3044682015-02-14 19:17:50 +0100244 ret = mv88e6xxx_eeprom_busy_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700245error:
246 mutex_unlock(&ps->eeprom_mutex);
247 return ret;
248}
249
250static int mv88e6352_set_eeprom(struct dsa_switch *ds,
251 struct ethtool_eeprom *eeprom, u8 *data)
252{
253 int offset;
254 int ret;
255 int len;
256
257 if (eeprom->magic != 0xc3ec4951)
258 return -EINVAL;
259
260 ret = mv88e6352_eeprom_is_readonly(ds);
261 if (ret)
262 return ret;
263
264 offset = eeprom->offset;
265 len = eeprom->len;
266 eeprom->len = 0;
267
Andrew Lunnf3044682015-02-14 19:17:50 +0100268 ret = mv88e6xxx_eeprom_load_wait(ds);
Guenter Roeck33b43df2014-10-29 10:45:03 -0700269 if (ret < 0)
270 return ret;
271
272 if (offset & 1) {
273 int word;
274
275 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
276 if (word < 0)
277 return word;
278
279 word = (*data++ << 8) | (word & 0xff);
280
281 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
282 if (ret < 0)
283 return ret;
284
285 offset++;
286 len--;
287 eeprom->len++;
288 }
289
290 while (len >= 2) {
291 int word;
292
293 word = *data++;
294 word |= *data++ << 8;
295
296 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
297 if (ret < 0)
298 return ret;
299
300 offset += 2;
301 len -= 2;
302 eeprom->len += 2;
303 }
304
305 if (len) {
306 int word;
307
308 word = mv88e6352_read_eeprom_word(ds, offset >> 1);
309 if (word < 0)
310 return word;
311
312 word = (word & 0xff00) | *data++;
313
314 ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
315 if (ret < 0)
316 return ret;
317
318 offset++;
319 len--;
320 eeprom->len++;
321 }
322
323 return 0;
324}
325
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700326struct dsa_switch_driver mv88e6352_switch_driver = {
327 .tag_protocol = DSA_TAG_PROTO_EDSA,
Andrew Lunne49bad32016-04-13 02:40:43 +0200328 .probe = mv88e6352_drv_probe,
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700329 .setup = mv88e6352_setup,
330 .set_addr = mv88e6xxx_set_addr_indirect,
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200331 .phy_read = mv88e6xxx_phy_read_indirect,
332 .phy_write = mv88e6xxx_phy_write_indirect,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200333 .get_strings = mv88e6xxx_get_strings,
334 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
335 .get_sset_count = mv88e6xxx_get_sset_count,
Andrew Lunndea87022015-08-31 15:56:47 +0200336 .adjust_link = mv88e6xxx_adjust_link,
Guenter Roeck04b0a802015-03-06 22:23:52 -0800337 .set_eee = mv88e6xxx_set_eee,
338 .get_eee = mv88e6xxx_get_eee,
Guenter Roeck276db3b2014-10-29 10:44:59 -0700339#ifdef CONFIG_NET_DSA_HWMON
Guenter Roeckc22995c2015-07-25 09:42:28 -0700340 .get_temp = mv88e6xxx_get_temp,
341 .get_temp_limit = mv88e6xxx_get_temp_limit,
342 .set_temp_limit = mv88e6xxx_set_temp_limit,
343 .get_temp_alarm = mv88e6xxx_get_temp_alarm,
Guenter Roeck276db3b2014-10-29 10:44:59 -0700344#endif
Guenter Roeck33b43df2014-10-29 10:45:03 -0700345 .get_eeprom = mv88e6352_get_eeprom,
346 .set_eeprom = mv88e6352_set_eeprom,
Guenter Roeck95d08b52014-10-29 10:45:06 -0700347 .get_regs_len = mv88e6xxx_get_regs_len,
348 .get_regs = mv88e6xxx_get_regs,
Vivien Didelot71327a42016-03-13 16:21:32 -0400349 .port_bridge_join = mv88e6xxx_port_bridge_join,
350 .port_bridge_leave = mv88e6xxx_port_bridge_leave,
Vivien Didelot43c44a92016-04-06 11:55:03 -0400351 .port_stp_state_set = mv88e6xxx_port_stp_state_set,
Vivien Didelot214cdb92016-02-26 13:16:08 -0500352 .port_vlan_filtering = mv88e6xxx_port_vlan_filtering,
Vivien Didelot76e398a2015-11-01 12:33:55 -0500353 .port_vlan_prepare = mv88e6xxx_port_vlan_prepare,
Vivien Didelot0d3b33e2015-08-13 12:52:22 -0400354 .port_vlan_add = mv88e6xxx_port_vlan_add,
Vivien Didelot7dad08d2015-08-13 12:52:21 -0400355 .port_vlan_del = mv88e6xxx_port_vlan_del,
Vivien Didelotceff5ef2016-02-23 12:13:55 -0500356 .port_vlan_dump = mv88e6xxx_port_vlan_dump,
Vivien Didelot146a3202015-10-08 11:35:12 -0400357 .port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
Vivien Didelot2a778e12015-08-10 09:09:49 -0400358 .port_fdb_add = mv88e6xxx_port_fdb_add,
359 .port_fdb_del = mv88e6xxx_port_fdb_del,
Vivien Didelotf33475b2015-10-22 09:34:41 -0400360 .port_fdb_dump = mv88e6xxx_port_fdb_dump,
Guenter Roeck3ad50cc2014-10-29 10:44:56 -0700361};
362
Andrew Lunn1636d882015-05-06 01:09:50 +0200363MODULE_ALIAS("platform:mv88e6172");
Aleksey S. Kazantsev7c3d0d62015-07-07 20:38:15 -0700364MODULE_ALIAS("platform:mv88e6176");
365MODULE_ALIAS("platform:mv88e6320");
366MODULE_ALIAS("platform:mv88e6321");
367MODULE_ALIAS("platform:mv88e6352");