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Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +02008 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +01009 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020025 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010026 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +020033 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +010034 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
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44 * the documentation and/or other materials provided with the
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48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +020073#include "fw-api-bt-coex.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010074
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020075/* maximal number of Tx queues in any platform */
76#define IWL_MVM_MAX_QUEUES 20
77
78/* Tx queue numbers */
Johannes Berg8ca151b2013-01-24 14:25:36 +010079enum {
80 IWL_MVM_OFFCHANNEL_QUEUE = 8,
81 IWL_MVM_CMD_QUEUE = 9,
Johannes Berg8ca151b2013-01-24 14:25:36 +010082};
83
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020084#define IWL_MVM_CMD_FIFO 7
85
Johannes Berg8ca151b2013-01-24 14:25:36 +010086#define IWL_MVM_STATION_COUNT 16
87
88/* commands */
89enum {
90 MVM_ALIVE = 0x1,
91 REPLY_ERROR = 0x2,
92
93 INIT_COMPLETE_NOTIF = 0x4,
94
95 /* PHY context commands */
96 PHY_CONTEXT_CMD = 0x8,
97 DBG_CFG = 0x9,
98
99 /* station table */
Max Stepanov5a258aa2013-04-07 09:11:21 +0300100 ADD_STA_KEY = 0x17,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100101 ADD_STA = 0x18,
102 REMOVE_STA = 0x19,
103
104 /* TX */
105 TX_CMD = 0x1c,
106 TXPATH_FLUSH = 0x1e,
107 MGMT_MCAST_KEY = 0x1f,
108
109 /* global key */
110 WEP_KEY = 0x20,
111
112 /* MAC and Binding commands */
113 MAC_CONTEXT_CMD = 0x28,
114 TIME_EVENT_CMD = 0x29, /* both CMD and response */
115 TIME_EVENT_NOTIFICATION = 0x2a,
116 BINDING_CONTEXT_CMD = 0x2b,
117 TIME_QUOTA_CMD = 0x2c,
Johannes Berg4ac6cb52013-08-08 09:30:13 +0200118 NON_QOS_TX_COUNTER_CMD = 0x2d,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100119
120 LQ_CMD = 0x4e,
121
122 /* Calibration */
123 TEMPERATURE_NOTIFICATION = 0x62,
124 CALIBRATION_CFG_CMD = 0x65,
125 CALIBRATION_RES_NOTIFICATION = 0x66,
126 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
127 RADIO_VERSION_NOTIFICATION = 0x68,
128
129 /* Scan offload */
130 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
131 SCAN_OFFLOAD_ABORT_CMD = 0x52,
132 SCAN_OFFLOAD_COMPLETE = 0x6D,
133 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
134 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
David Spinadel35a000b2013-08-28 09:29:43 +0300135 MATCH_FOUND_NOTIFICATION = 0xd9,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100136
137 /* Phy */
138 PHY_CONFIGURATION_CMD = 0x6a,
139 CALIB_RES_NOTIF_PHY_DB = 0x6b,
140 /* PHY_DB_CMD = 0x6c, */
141
Alexander Bondare811ada2013-03-10 15:29:44 +0200142 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100143 POWER_TABLE_CMD = 0x77,
Alexander Bondar175a70b2013-04-14 20:59:37 +0300144 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100145
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300146 /* Thermal Throttling*/
147 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
148
Johannes Berg8ca151b2013-01-24 14:25:36 +0100149 /* Scanning */
150 SCAN_REQUEST_CMD = 0x80,
151 SCAN_ABORT_CMD = 0x81,
152 SCAN_START_NOTIFICATION = 0x82,
153 SCAN_RESULTS_NOTIFICATION = 0x83,
154 SCAN_COMPLETE_NOTIFICATION = 0x84,
155
156 /* NVM */
157 NVM_ACCESS_CMD = 0x88,
158
159 SET_CALIB_DEFAULT_CMD = 0x8e,
160
Ilan Peer571765c2013-03-05 15:26:03 +0200161 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100162 BEACON_TEMPLATE_CMD = 0x91,
163 TX_ANT_CONFIGURATION_CMD = 0x98,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200164 BT_CONFIG = 0x9b,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100165 STATISTICS_NOTIFICATION = 0x9d,
Johannes Berg3e56ead2013-02-15 22:23:18 +0100166 EOSP_NOTIFICATION = 0x9e,
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300167 REDUCE_TX_POWER_CMD = 0x9f,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100168
169 /* RF-KILL commands and notifications */
170 CARD_STATE_CMD = 0xa0,
171 CARD_STATE_NOTIFICATION = 0xa1,
172
Hila Gonend64048e2013-03-13 18:00:03 +0200173 MISSED_BEACONS_NOTIFICATION = 0xa2,
174
Alexander Bondare811ada2013-03-10 15:29:44 +0200175 /* Power - new power table command */
176 MAC_PM_POWER_TABLE = 0xa9,
177
Johannes Berg8ca151b2013-01-24 14:25:36 +0100178 REPLY_RX_PHY_CMD = 0xc0,
179 REPLY_RX_MPDU_CMD = 0xc1,
180 BA_NOTIF = 0xc5,
181
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200182 /* BT Coex */
183 BT_COEX_PRIO_TABLE = 0xcc,
184 BT_COEX_PROT_ENV = 0xcd,
185 BT_PROFILE_NOTIFICATION = 0xce,
Emmanuel Grumbachdac94da2013-06-18 07:35:27 +0300186 BT_COEX_CI = 0x5d,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200187
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +0200188 REPLY_SF_CFG_CMD = 0xd1,
Hila Gonen7df15b12012-12-12 11:16:19 +0200189 REPLY_BEACON_FILTERING_CMD = 0xd2,
190
Johannes Berg8ca151b2013-01-24 14:25:36 +0100191 REPLY_DEBUG_CMD = 0xf0,
192 DEBUG_LOG_MSG = 0xf7,
193
Eliad Pellerc87163b2014-01-08 10:11:11 +0200194 BCAST_FILTER_CMD = 0xcf,
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300195 MCAST_FILTER_CMD = 0xd0,
196
Johannes Berg8ca151b2013-01-24 14:25:36 +0100197 /* D3 commands/notifications */
198 D3_CONFIG_CMD = 0xd3,
199 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
200 OFFLOADS_QUERY_CMD = 0xd5,
201 REMOTE_WAKE_CONFIG_CMD = 0xd6,
Arik Nemtsov98ee7782013-10-02 16:58:09 +0300202 D0I3_END_CMD = 0xed,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100203
204 /* for WoWLAN in particular */
205 WOWLAN_PATTERNS = 0xe0,
206 WOWLAN_CONFIGURATION = 0xe1,
207 WOWLAN_TSC_RSC_PARAM = 0xe2,
208 WOWLAN_TKIP_PARAM = 0xe3,
209 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
210 WOWLAN_GET_STATUSES = 0xe5,
211 WOWLAN_TX_POWER_PER_DB = 0xe6,
212
213 /* and for NetDetect */
214 NET_DETECT_CONFIG_CMD = 0x54,
215 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
216 NET_DETECT_PROFILES_CMD = 0x57,
217 NET_DETECT_HOTSPOTS_CMD = 0x58,
218 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
219
220 REPLY_MAX = 0xff,
221};
222
223/**
224 * struct iwl_cmd_response - generic response struct for most commands
225 * @status: status of the command asked, changes for each one
226 */
227struct iwl_cmd_response {
228 __le32 status;
229};
230
231/*
232 * struct iwl_tx_ant_cfg_cmd
233 * @valid: valid antenna configuration
234 */
235struct iwl_tx_ant_cfg_cmd {
236 __le32 valid;
237} __packed;
238
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300239/**
240 * struct iwl_reduce_tx_power_cmd - TX power reduction command
241 * REDUCE_TX_POWER_CMD = 0x9f
242 * @flags: (reserved for future implementation)
243 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
244 * @pwr_restriction: TX power restriction in dBms.
245 */
246struct iwl_reduce_tx_power_cmd {
247 u8 flags;
248 u8 mac_context_id;
249 __le16 pwr_restriction;
250} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
251
Johannes Berg8ca151b2013-01-24 14:25:36 +0100252/*
253 * Calibration control struct.
254 * Sent as part of the phy configuration command.
255 * @flow_trigger: bitmap for which calibrations to perform according to
256 * flow triggers.
257 * @event_trigger: bitmap for which calibrations to perform according to
258 * event triggers.
259 */
260struct iwl_calib_ctrl {
261 __le32 flow_trigger;
262 __le32 event_trigger;
263} __packed;
264
265/* This enum defines the bitmap of various calibrations to enable in both
266 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
267 */
268enum iwl_calib_cfg {
269 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
270 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
271 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
272 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
273 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
274 IWL_CALIB_CFG_DC_IDX = BIT(5),
275 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
276 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
277 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
278 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
279 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
280 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
281 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
282 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
283 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
284 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
285 IWL_CALIB_CFG_DAC_IDX = BIT(16),
286 IWL_CALIB_CFG_ABS_IDX = BIT(17),
287 IWL_CALIB_CFG_AGC_IDX = BIT(18),
288};
289
290/*
291 * Phy configuration command.
292 */
293struct iwl_phy_cfg_cmd {
294 __le32 phy_cfg;
295 struct iwl_calib_ctrl calib_control;
296} __packed;
297
298#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
299#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
300#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
301#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
302#define PHY_CFG_TX_CHAIN_A BIT(8)
303#define PHY_CFG_TX_CHAIN_B BIT(9)
304#define PHY_CFG_TX_CHAIN_C BIT(10)
305#define PHY_CFG_RX_CHAIN_A BIT(12)
306#define PHY_CFG_RX_CHAIN_B BIT(13)
307#define PHY_CFG_RX_CHAIN_C BIT(14)
308
Eran Hararyae2b21b2014-01-09 08:08:24 +0200309#define NVM_MAX_NUM_SECTIONS 11
Johannes Berg8ca151b2013-01-24 14:25:36 +0100310
311/* Target of the NVM_ACCESS_CMD */
312enum {
313 NVM_ACCESS_TARGET_CACHE = 0,
314 NVM_ACCESS_TARGET_OTP = 1,
315 NVM_ACCESS_TARGET_EEPROM = 2,
316};
317
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200318/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100319enum {
Eran Hararyae2b21b2014-01-09 08:08:24 +0200320 NVM_SECTION_TYPE_SW = 1,
321 NVM_SECTION_TYPE_CALIBRATION = 4,
322 NVM_SECTION_TYPE_PRODUCTION = 5,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100323};
324
325/**
326 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
327 * @op_code: 0 - read, 1 - write
328 * @target: NVM_ACCESS_TARGET_*
329 * @type: NVM_SECTION_TYPE_*
330 * @offset: offset in bytes into the section
331 * @length: in bytes, to read/write
332 * @data: if write operation, the data to write. On read its empty
333 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200334struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100335 u8 op_code;
336 u8 target;
337 __le16 type;
338 __le16 offset;
339 __le16 length;
340 u8 data[];
341} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
342
343/**
344 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
345 * @offset: offset in bytes into the section
346 * @length: in bytes, either how much was written or read
347 * @type: NVM_SECTION_TYPE_*
348 * @status: 0 for success, fail otherwise
349 * @data: if read operation, the data returned. Empty on write.
350 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200351struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100352 __le16 offset;
353 __le16 length;
354 __le16 type;
355 __le16 status;
356 u8 data[];
357} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
358
359/* MVM_ALIVE 0x1 */
360
361/* alive response is_valid values */
362#define ALIVE_RESP_UCODE_OK BIT(0)
363#define ALIVE_RESP_RFKILL BIT(1)
364
365/* alive response ver_type values */
366enum {
367 FW_TYPE_HW = 0,
368 FW_TYPE_PROT = 1,
369 FW_TYPE_AP = 2,
370 FW_TYPE_WOWLAN = 3,
371 FW_TYPE_TIMING = 4,
372 FW_TYPE_WIPAN = 5
373};
374
375/* alive response ver_subtype values */
376enum {
377 FW_SUBTYPE_FULL_FEATURE = 0,
378 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
379 FW_SUBTYPE_REDUCED = 2,
380 FW_SUBTYPE_ALIVE_ONLY = 3,
381 FW_SUBTYPE_WOWLAN = 4,
382 FW_SUBTYPE_AP_SUBTYPE = 5,
383 FW_SUBTYPE_WIPAN = 6,
384 FW_SUBTYPE_INITIALIZE = 9
385};
386
387#define IWL_ALIVE_STATUS_ERR 0xDEAD
388#define IWL_ALIVE_STATUS_OK 0xCAFE
389
390#define IWL_ALIVE_FLG_RFKILL BIT(0)
391
392struct mvm_alive_resp {
393 __le16 status;
394 __le16 flags;
395 u8 ucode_minor;
396 u8 ucode_major;
397 __le16 id;
398 u8 api_minor;
399 u8 api_major;
400 u8 ver_subtype;
401 u8 ver_type;
402 u8 mac;
403 u8 opt;
404 __le16 reserved2;
405 __le32 timestamp;
406 __le32 error_event_table_ptr; /* SRAM address for error log */
407 __le32 log_event_table_ptr; /* SRAM address for event log */
408 __le32 cpu_register_ptr;
409 __le32 dbgm_config_ptr;
410 __le32 alive_counter_ptr;
411 __le32 scd_base_ptr; /* SRAM address for SCD */
412} __packed; /* ALIVE_RES_API_S_VER_1 */
413
Eran Harary01a9ca52014-02-03 09:29:57 +0200414struct mvm_alive_resp_ver2 {
415 __le16 status;
416 __le16 flags;
417 u8 ucode_minor;
418 u8 ucode_major;
419 __le16 id;
420 u8 api_minor;
421 u8 api_major;
422 u8 ver_subtype;
423 u8 ver_type;
424 u8 mac;
425 u8 opt;
426 __le16 reserved2;
427 __le32 timestamp;
428 __le32 error_event_table_ptr; /* SRAM address for error log */
429 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
430 __le32 cpu_register_ptr;
431 __le32 dbgm_config_ptr;
432 __le32 alive_counter_ptr;
433 __le32 scd_base_ptr; /* SRAM address for SCD */
434 __le32 st_fwrd_addr; /* pointer to Store and forward */
435 __le32 st_fwrd_size;
436 u8 umac_minor; /* UMAC version: minor */
437 u8 umac_major; /* UMAC version: major */
438 __le16 umac_id; /* UMAC version: id */
439 __le32 error_info_addr; /* SRAM address for UMAC error log */
440 __le32 dbg_print_buff_addr;
441} __packed; /* ALIVE_RES_API_S_VER_2 */
442
Johannes Berg8ca151b2013-01-24 14:25:36 +0100443/* Error response/notification */
444enum {
445 FW_ERR_UNKNOWN_CMD = 0x0,
446 FW_ERR_INVALID_CMD_PARAM = 0x1,
447 FW_ERR_SERVICE = 0x2,
448 FW_ERR_ARC_MEMORY = 0x3,
449 FW_ERR_ARC_CODE = 0x4,
450 FW_ERR_WATCH_DOG = 0x5,
451 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
452 FW_ERR_WEP_KEY_SIZE = 0x11,
453 FW_ERR_OBSOLETE_FUNC = 0x12,
454 FW_ERR_UNEXPECTED = 0xFE,
455 FW_ERR_FATAL = 0xFF
456};
457
458/**
459 * struct iwl_error_resp - FW error indication
460 * ( REPLY_ERROR = 0x2 )
461 * @error_type: one of FW_ERR_*
462 * @cmd_id: the command ID for which the error occured
463 * @bad_cmd_seq_num: sequence number of the erroneous command
464 * @error_service: which service created the error, applicable only if
465 * error_type = 2, otherwise 0
466 * @timestamp: TSF in usecs.
467 */
468struct iwl_error_resp {
469 __le32 error_type;
470 u8 cmd_id;
471 u8 reserved1;
472 __le16 bad_cmd_seq_num;
473 __le32 error_service;
474 __le64 timestamp;
475} __packed;
476
477
478/* Common PHY, MAC and Bindings definitions */
479
480#define MAX_MACS_IN_BINDING (3)
481#define MAX_BINDINGS (4)
482#define AUX_BINDING_INDEX (3)
483#define MAX_PHYS (4)
484
485/* Used to extract ID and color from the context dword */
486#define FW_CTXT_ID_POS (0)
487#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
488#define FW_CTXT_COLOR_POS (8)
489#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
490#define FW_CTXT_INVALID (0xffffffff)
491
492#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
493 (_color << FW_CTXT_COLOR_POS))
494
495/* Possible actions on PHYs, MACs and Bindings */
496enum {
497 FW_CTXT_ACTION_STUB = 0,
498 FW_CTXT_ACTION_ADD,
499 FW_CTXT_ACTION_MODIFY,
500 FW_CTXT_ACTION_REMOVE,
501 FW_CTXT_ACTION_NUM
502}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
503
504/* Time Events */
505
506/* Time Event types, according to MAC type */
507enum iwl_time_event_type {
508 /* BSS Station Events */
509 TE_BSS_STA_AGGRESSIVE_ASSOC,
510 TE_BSS_STA_ASSOC,
511 TE_BSS_EAP_DHCP_PROT,
512 TE_BSS_QUIET_PERIOD,
513
514 /* P2P Device Events */
515 TE_P2P_DEVICE_DISCOVERABLE,
516 TE_P2P_DEVICE_LISTEN,
517 TE_P2P_DEVICE_ACTION_SCAN,
518 TE_P2P_DEVICE_FULL_SCAN,
519
520 /* P2P Client Events */
521 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
522 TE_P2P_CLIENT_ASSOC,
523 TE_P2P_CLIENT_QUIET_PERIOD,
524
525 /* P2P GO Events */
526 TE_P2P_GO_ASSOC_PROT,
527 TE_P2P_GO_REPETITIVE_NOA,
528 TE_P2P_GO_CT_WINDOW,
529
530 /* WiDi Sync Events */
531 TE_WIDI_TX_SYNC,
532
533 TE_MAX
534}; /* MAC_EVENT_TYPE_API_E_VER_1 */
535
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300536
537
538/* Time event - defines for command API v1 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100539
540/*
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300541 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
542 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
543 * the first fragment is scheduled.
544 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
545 * the first 2 fragments are scheduled.
546 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
547 * number of fragments are valid.
Johannes Berg8ca151b2013-01-24 14:25:36 +0100548 *
549 * Other than the constant defined above, specifying a fragmentation value 'x'
550 * means that the event can be fragmented but only the first 'x' will be
551 * scheduled.
552 */
553enum {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300554 TE_V1_FRAG_NONE = 0,
555 TE_V1_FRAG_SINGLE = 1,
556 TE_V1_FRAG_DUAL = 2,
557 TE_V1_FRAG_ENDLESS = 0xffffffff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100558};
559
Johannes Berg8ca151b2013-01-24 14:25:36 +0100560/* If a Time Event can be fragmented, this is the max number of fragments */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300561#define TE_V1_FRAG_MAX_MSK 0x0fffffff
562/* Repeat the time event endlessly (until removed) */
563#define TE_V1_REPEAT_ENDLESS 0xffffffff
564/* If a Time Event has bounded repetitions, this is the maximal value */
565#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
566
567/* Time Event dependencies: none, on another TE, or in a specific time */
568enum {
569 TE_V1_INDEPENDENT = 0,
570 TE_V1_DEP_OTHER = BIT(0),
571 TE_V1_DEP_TSF = BIT(1),
572 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
573}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
574
575/*
576 * @TE_V1_NOTIF_NONE: no notifications
577 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
578 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
579 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
580 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
581 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
582 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
583 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
584 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
585 *
586 * Supported Time event notifications configuration.
587 * A notification (both event and fragment) includes a status indicating weather
588 * the FW was able to schedule the event or not. For fragment start/end
589 * notification the status is always success. There is no start/end fragment
590 * notification for monolithic events.
591 */
592enum {
593 TE_V1_NOTIF_NONE = 0,
594 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
595 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
596 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
597 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
598 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
599 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
600 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
601 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
602}; /* MAC_EVENT_ACTION_API_E_VER_2 */
603
Johannes Berg8ca151b2013-01-24 14:25:36 +0100604
605/**
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300606 * struct iwl_time_event_cmd_api_v1 - configuring Time Events
607 * with struct MAC_TIME_EVENT_DATA_API_S_VER_1 (see also
608 * with version 2. determined by IWL_UCODE_TLV_FLAGS)
Johannes Berg8ca151b2013-01-24 14:25:36 +0100609 * ( TIME_EVENT_CMD = 0x29 )
610 * @id_and_color: ID and color of the relevant MAC
611 * @action: action to perform, one of FW_CTXT_ACTION_*
612 * @id: this field has two meanings, depending on the action:
613 * If the action is ADD, then it means the type of event to add.
614 * For all other actions it is the unique event ID assigned when the
615 * event was added by the FW.
616 * @apply_time: When to start the Time Event (in GP2)
617 * @max_delay: maximum delay to event's start (apply time), in TU
618 * @depends_on: the unique ID of the event we depend on (if any)
619 * @interval: interval between repetitions, in TU
620 * @interval_reciprocal: 2^32 / interval
621 * @duration: duration of event in TU
622 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300623 * @dep_policy: one of TE_V1_INDEPENDENT, TE_V1_DEP_OTHER, TE_V1_DEP_TSF
624 * and TE_V1_EVENT_SOCIOPATHIC
Johannes Berg8ca151b2013-01-24 14:25:36 +0100625 * @is_present: 0 or 1, are we present or absent during the Time Event
626 * @max_frags: maximal number of fragments the Time Event can be divided to
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300627 * @notify: notifications using TE_V1_NOTIF_* (whom to notify when)
Johannes Berg8ca151b2013-01-24 14:25:36 +0100628 */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300629struct iwl_time_event_cmd_v1 {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100630 /* COMMON_INDEX_HDR_API_S_VER_1 */
631 __le32 id_and_color;
632 __le32 action;
633 __le32 id;
634 /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
635 __le32 apply_time;
636 __le32 max_delay;
637 __le32 dep_policy;
638 __le32 depends_on;
639 __le32 is_present;
640 __le32 max_frags;
641 __le32 interval;
642 __le32 interval_reciprocal;
643 __le32 duration;
644 __le32 repeat;
645 __le32 notify;
646} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
647
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300648
649/* Time event - defines for command API v2 */
650
651/*
652 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
653 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
654 * the first fragment is scheduled.
655 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
656 * the first 2 fragments are scheduled.
657 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
658 * number of fragments are valid.
659 *
660 * Other than the constant defined above, specifying a fragmentation value 'x'
661 * means that the event can be fragmented but only the first 'x' will be
662 * scheduled.
663 */
664enum {
665 TE_V2_FRAG_NONE = 0,
666 TE_V2_FRAG_SINGLE = 1,
667 TE_V2_FRAG_DUAL = 2,
668 TE_V2_FRAG_MAX = 0xfe,
669 TE_V2_FRAG_ENDLESS = 0xff
670};
671
672/* Repeat the time event endlessly (until removed) */
673#define TE_V2_REPEAT_ENDLESS 0xff
674/* If a Time Event has bounded repetitions, this is the maximal value */
675#define TE_V2_REPEAT_MAX 0xfe
676
677#define TE_V2_PLACEMENT_POS 12
678#define TE_V2_ABSENCE_POS 15
679
680/* Time event policy values (for time event cmd api v2)
681 * A notification (both event and fragment) includes a status indicating weather
682 * the FW was able to schedule the event or not. For fragment start/end
683 * notification the status is always success. There is no start/end fragment
684 * notification for monolithic events.
685 *
686 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
687 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
688 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
689 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
690 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
691 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
692 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
693 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
694 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
695 * @TE_V2_DEP_OTHER: depends on another time event
696 * @TE_V2_DEP_TSF: depends on a specific time
697 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
698 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
699 */
700enum {
701 TE_V2_DEFAULT_POLICY = 0x0,
702
703 /* notifications (event start/stop, fragment start/stop) */
704 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
705 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
706 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
707 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
708
709 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
710 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
711 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
712 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
713
714 TE_V2_NOTIF_MSK = 0xff,
715
716 /* placement characteristics */
717 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
718 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
719 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
720
721 /* are we present or absent during the Time Event. */
722 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
723};
724
725/**
726 * struct iwl_time_event_cmd_api_v2 - configuring Time Events
727 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
728 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
729 * ( TIME_EVENT_CMD = 0x29 )
730 * @id_and_color: ID and color of the relevant MAC
731 * @action: action to perform, one of FW_CTXT_ACTION_*
732 * @id: this field has two meanings, depending on the action:
733 * If the action is ADD, then it means the type of event to add.
734 * For all other actions it is the unique event ID assigned when the
735 * event was added by the FW.
736 * @apply_time: When to start the Time Event (in GP2)
737 * @max_delay: maximum delay to event's start (apply time), in TU
738 * @depends_on: the unique ID of the event we depend on (if any)
739 * @interval: interval between repetitions, in TU
740 * @duration: duration of event in TU
741 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
742 * @max_frags: maximal number of fragments the Time Event can be divided to
743 * @policy: defines whether uCode shall notify the host or other uCode modules
744 * on event and/or fragment start and/or end
745 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
746 * TE_EVENT_SOCIOPATHIC
747 * using TE_ABSENCE and using TE_NOTIF_*
748 */
749struct iwl_time_event_cmd_v2 {
750 /* COMMON_INDEX_HDR_API_S_VER_1 */
751 __le32 id_and_color;
752 __le32 action;
753 __le32 id;
754 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
755 __le32 apply_time;
756 __le32 max_delay;
757 __le32 depends_on;
758 __le32 interval;
759 __le32 duration;
760 u8 repeat;
761 u8 max_frags;
762 __le16 policy;
763} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
764
Johannes Berg8ca151b2013-01-24 14:25:36 +0100765/**
766 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
767 * @status: bit 0 indicates success, all others specify errors
768 * @id: the Time Event type
769 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
770 * @id_and_color: ID and color of the relevant MAC
771 */
772struct iwl_time_event_resp {
773 __le32 status;
774 __le32 id;
775 __le32 unique_id;
776 __le32 id_and_color;
777} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
778
779/**
780 * struct iwl_time_event_notif - notifications of time event start/stop
781 * ( TIME_EVENT_NOTIFICATION = 0x2a )
782 * @timestamp: action timestamp in GP2
783 * @session_id: session's unique id
784 * @unique_id: unique id of the Time Event itself
785 * @id_and_color: ID and color of the relevant MAC
786 * @action: one of TE_NOTIF_START or TE_NOTIF_END
787 * @status: true if scheduled, false otherwise (not executed)
788 */
789struct iwl_time_event_notif {
790 __le32 timestamp;
791 __le32 session_id;
792 __le32 unique_id;
793 __le32 id_and_color;
794 __le32 action;
795 __le32 status;
796} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
797
798
799/* Bindings and Time Quota */
800
801/**
802 * struct iwl_binding_cmd - configuring bindings
803 * ( BINDING_CONTEXT_CMD = 0x2b )
804 * @id_and_color: ID and color of the relevant Binding
805 * @action: action to perform, one of FW_CTXT_ACTION_*
806 * @macs: array of MAC id and colors which belong to the binding
807 * @phy: PHY id and color which belongs to the binding
808 */
809struct iwl_binding_cmd {
810 /* COMMON_INDEX_HDR_API_S_VER_1 */
811 __le32 id_and_color;
812 __le32 action;
813 /* BINDING_DATA_API_S_VER_1 */
814 __le32 macs[MAX_MACS_IN_BINDING];
815 __le32 phy;
816} __packed; /* BINDING_CMD_API_S_VER_1 */
817
Ilan Peer35adfd62013-02-04 13:16:24 +0200818/* The maximal number of fragments in the FW's schedule session */
819#define IWL_MVM_MAX_QUOTA 128
820
Johannes Berg8ca151b2013-01-24 14:25:36 +0100821/**
822 * struct iwl_time_quota_data - configuration of time quota per binding
823 * @id_and_color: ID and color of the relevant Binding
824 * @quota: absolute time quota in TU. The scheduler will try to divide the
825 * remainig quota (after Time Events) according to this quota.
826 * @max_duration: max uninterrupted context duration in TU
827 */
828struct iwl_time_quota_data {
829 __le32 id_and_color;
830 __le32 quota;
831 __le32 max_duration;
832} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
833
834/**
835 * struct iwl_time_quota_cmd - configuration of time quota between bindings
836 * ( TIME_QUOTA_CMD = 0x2c )
837 * @quotas: allocations per binding
838 */
839struct iwl_time_quota_cmd {
840 struct iwl_time_quota_data quotas[MAX_BINDINGS];
841} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
842
843
844/* PHY context */
845
846/* Supported bands */
847#define PHY_BAND_5 (0)
848#define PHY_BAND_24 (1)
849
850/* Supported channel width, vary if there is VHT support */
851#define PHY_VHT_CHANNEL_MODE20 (0x0)
852#define PHY_VHT_CHANNEL_MODE40 (0x1)
853#define PHY_VHT_CHANNEL_MODE80 (0x2)
854#define PHY_VHT_CHANNEL_MODE160 (0x3)
855
856/*
857 * Control channel position:
858 * For legacy set bit means upper channel, otherwise lower.
859 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
860 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
861 * center_freq
862 * |
863 * 40Mhz |_______|_______|
864 * 80Mhz |_______|_______|_______|_______|
865 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
866 * code 011 010 001 000 | 100 101 110 111
867 */
868#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
869#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
870#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
871#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
872#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
873#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
874#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
875#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
876
877/*
878 * @band: PHY_BAND_*
879 * @channel: channel number
880 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
881 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
882 */
883struct iwl_fw_channel_info {
884 u8 band;
885 u8 channel;
886 u8 width;
887 u8 ctrl_pos;
888} __packed;
889
890#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
891#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
892 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
893#define PHY_RX_CHAIN_VALID_POS (1)
894#define PHY_RX_CHAIN_VALID_MSK \
895 (0x7 << PHY_RX_CHAIN_VALID_POS)
896#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
897#define PHY_RX_CHAIN_FORCE_SEL_MSK \
898 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
899#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
900#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
901 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
902#define PHY_RX_CHAIN_CNT_POS (10)
903#define PHY_RX_CHAIN_CNT_MSK \
904 (0x3 << PHY_RX_CHAIN_CNT_POS)
905#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
906#define PHY_RX_CHAIN_MIMO_CNT_MSK \
907 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
908#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
909#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
910 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
911
912/* TODO: fix the value, make it depend on firmware at runtime? */
913#define NUM_PHY_CTX 3
914
915/* TODO: complete missing documentation */
916/**
917 * struct iwl_phy_context_cmd - config of the PHY context
918 * ( PHY_CONTEXT_CMD = 0x8 )
919 * @id_and_color: ID and color of the relevant Binding
920 * @action: action to perform, one of FW_CTXT_ACTION_*
921 * @apply_time: 0 means immediate apply and context switch.
922 * other value means apply new params after X usecs
923 * @tx_param_color: ???
924 * @channel_info:
925 * @txchain_info: ???
926 * @rxchain_info: ???
927 * @acquisition_data: ???
928 * @dsp_cfg_flags: set to 0
929 */
930struct iwl_phy_context_cmd {
931 /* COMMON_INDEX_HDR_API_S_VER_1 */
932 __le32 id_and_color;
933 __le32 action;
934 /* PHY_CONTEXT_DATA_API_S_VER_1 */
935 __le32 apply_time;
936 __le32 tx_param_color;
937 struct iwl_fw_channel_info ci;
938 __le32 txchain_info;
939 __le32 rxchain_info;
940 __le32 acquisition_data;
941 __le32 dsp_cfg_flags;
942} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
943
944#define IWL_RX_INFO_PHY_CNT 8
Avri Altmana2d7b872013-07-09 01:42:17 +0300945#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
946#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
947#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
948#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
949#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
950#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
951#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
952
Johannes Berg8ca151b2013-01-24 14:25:36 +0100953#define IWL_RX_INFO_AGC_IDX 1
954#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200955#define IWL_OFDM_AGC_A_MSK 0x0000007f
956#define IWL_OFDM_AGC_A_POS 0
957#define IWL_OFDM_AGC_B_MSK 0x00003f80
958#define IWL_OFDM_AGC_B_POS 7
959#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
960#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +0100961#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100962#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200963#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
964#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +0100965#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +0100966#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200967#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
968#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +0100969
970/**
971 * struct iwl_rx_phy_info - phy info
972 * (REPLY_RX_PHY_CMD = 0xc0)
973 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
974 * @cfg_phy_cnt: configurable DSP phy data byte count
975 * @stat_id: configurable DSP phy data set ID
976 * @reserved1:
977 * @system_timestamp: GP2 at on air rise
978 * @timestamp: TSF at on air rise
979 * @beacon_time_stamp: beacon at on-air rise
980 * @phy_flags: general phy flags: band, modulation, ...
981 * @channel: channel number
982 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
983 * @rate_n_flags: RATE_MCS_*
984 * @byte_count: frame's byte-count
985 * @frame_time: frame's time on the air, based on byte count and frame rate
986 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200987 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +0100988 *
989 * Before each Rx, the device sends this data. It contains PHY information
990 * about the reception of the packet.
991 */
992struct iwl_rx_phy_info {
993 u8 non_cfg_phy_cnt;
994 u8 cfg_phy_cnt;
995 u8 stat_id;
996 u8 reserved1;
997 __le32 system_timestamp;
998 __le64 timestamp;
999 __le32 beacon_time_stamp;
1000 __le16 phy_flags;
1001 __le16 channel;
1002 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1003 __le32 rate_n_flags;
1004 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +02001005 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +01001006 __le16 frame_time;
1007} __packed;
1008
1009struct iwl_rx_mpdu_res_start {
1010 __le16 byte_count;
1011 __le16 reserved;
1012} __packed;
1013
1014/**
1015 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1016 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1017 * @RX_RES_PHY_FLAGS_MOD_CCK:
1018 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1019 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1020 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1021 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1022 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1023 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1024 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1025 */
1026enum iwl_rx_phy_flags {
1027 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1028 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1029 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1030 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1031 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1032 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1033 RX_RES_PHY_FLAGS_AGG = BIT(7),
1034 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1035 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1036 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1037};
1038
1039/**
1040 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1041 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1042 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1043 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1044 * @RX_MPDU_RES_STATUS_KEY_VALID:
1045 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1046 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1047 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1048 * in the driver.
1049 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1050 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1051 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1052 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1053 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1054 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1055 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1056 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1057 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1058 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1059 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1060 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1061 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1062 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1063 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1064 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1065 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1066 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1067 * @RX_MPDU_RES_STATUS_RRF_KILL:
1068 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1069 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1070 */
1071enum iwl_mvm_rx_status {
1072 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1073 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1074 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1075 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1076 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1077 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1078 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1079 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1080 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1081 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1082 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1083 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1084 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
Max Stepanove36e5432013-08-27 19:56:13 +03001085 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
Johannes Berg8ca151b2013-01-24 14:25:36 +01001086 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1087 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1088 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1089 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1090 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1091 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1092 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1093 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1094 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1095 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1096 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1097 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1098 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1099};
1100
1101/**
1102 * struct iwl_radio_version_notif - information on the radio version
1103 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1104 * @radio_flavor:
1105 * @radio_step:
1106 * @radio_dash:
1107 */
1108struct iwl_radio_version_notif {
1109 __le32 radio_flavor;
1110 __le32 radio_step;
1111 __le32 radio_dash;
1112} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1113
1114enum iwl_card_state_flags {
1115 CARD_ENABLED = 0x00,
1116 HW_CARD_DISABLED = 0x01,
1117 SW_CARD_DISABLED = 0x02,
1118 CT_KILL_CARD_DISABLED = 0x04,
1119 HALT_CARD_DISABLED = 0x08,
1120 CARD_DISABLED_MSK = 0x0f,
1121 CARD_IS_RX_ON = 0x10,
1122};
1123
1124/**
1125 * struct iwl_radio_version_notif - information on the radio version
1126 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1127 * @flags: %iwl_card_state_flags
1128 */
1129struct iwl_card_state_notif {
1130 __le32 flags;
1131} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1132
1133/**
Hila Gonend64048e2013-03-13 18:00:03 +02001134 * struct iwl_missed_beacons_notif - information on missed beacons
1135 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1136 * @mac_id: interface ID
1137 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1138 * beacons since last RX.
1139 * @consec_missed_beacons: number of consecutive missed beacons
1140 * @num_expected_beacons:
1141 * @num_recvd_beacons:
1142 */
1143struct iwl_missed_beacons_notif {
1144 __le32 mac_id;
1145 __le32 consec_missed_beacons_since_last_rx;
1146 __le32 consec_missed_beacons;
1147 __le32 num_expected_beacons;
1148 __le32 num_recvd_beacons;
1149} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1150
1151/**
Johannes Berg8ca151b2013-01-24 14:25:36 +01001152 * struct iwl_set_calib_default_cmd - set default value for calibration.
1153 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1154 * @calib_index: the calibration to set value for
1155 * @length: of data
1156 * @data: the value to set for the calibration result
1157 */
1158struct iwl_set_calib_default_cmd {
1159 __le16 calib_index;
1160 __le16 length;
1161 u8 data[0];
1162} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1163
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001164#define MAX_PORT_ID_NUM 2
Eliad Pellere59647e2013-11-28 14:08:50 +02001165#define MAX_MCAST_FILTERING_ADDRESSES 256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001166
1167/**
1168 * struct iwl_mcast_filter_cmd - configure multicast filter.
1169 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1170 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1171 * to identify network interface adopted in host-device IF.
1172 * It is used by FW as index in array of addresses. This array has
1173 * MAX_PORT_ID_NUM members.
1174 * @count: Number of MAC addresses in the array
1175 * @pass_all: Set 1 to pass all multicast packets.
1176 * @bssid: current association BSSID.
1177 * @addr_list: Place holder for array of MAC addresses.
1178 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1179 */
1180struct iwl_mcast_filter_cmd {
1181 u8 filter_own;
1182 u8 port_id;
1183 u8 count;
1184 u8 pass_all;
1185 u8 bssid[6];
1186 u8 reserved[2];
1187 u8 addr_list[0];
1188} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1189
Eliad Pellerc87163b2014-01-08 10:11:11 +02001190#define MAX_BCAST_FILTERS 8
1191#define MAX_BCAST_FILTER_ATTRS 2
1192
1193/**
1194 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1195 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1196 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1197 * start of ip payload).
1198 */
1199enum iwl_mvm_bcast_filter_attr_offset {
1200 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1201 BCAST_FILTER_OFFSET_IP_END = 1,
1202};
1203
1204/**
1205 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1206 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1207 * @offset: starting offset of this pattern.
1208 * @val: value to match - big endian (MSB is the first
1209 * byte to match from offset pos).
1210 * @mask: mask to match (big endian).
1211 */
1212struct iwl_fw_bcast_filter_attr {
1213 u8 offset_type;
1214 u8 offset;
1215 __le16 reserved1;
1216 __be32 val;
1217 __be32 mask;
1218} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1219
1220/**
1221 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1222 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1223 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1224 */
1225enum iwl_mvm_bcast_filter_frame_type {
1226 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1227 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1228};
1229
1230/**
1231 * struct iwl_fw_bcast_filter - broadcast filter
1232 * @discard: discard frame (1) or let it pass (0).
1233 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1234 * @num_attrs: number of valid attributes in this filter.
1235 * @attrs: attributes of this filter. a filter is considered matched
1236 * only when all its attributes are matched (i.e. AND relationship)
1237 */
1238struct iwl_fw_bcast_filter {
1239 u8 discard;
1240 u8 frame_type;
1241 u8 num_attrs;
1242 u8 reserved1;
1243 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1244} __packed; /* BCAST_FILTER_S_VER_1 */
1245
1246/**
1247 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1248 * @default_discard: default action for this mac (discard (1) / pass (0)).
1249 * @attached_filters: bitmap of relevant filters for this mac.
1250 */
1251struct iwl_fw_bcast_mac {
1252 u8 default_discard;
1253 u8 reserved1;
1254 __le16 attached_filters;
1255} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1256
1257/**
1258 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1259 * @disable: enable (0) / disable (1)
1260 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1261 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1262 * @filters: broadcast filters
1263 * @macs: broadcast filtering configuration per-mac
1264 */
1265struct iwl_bcast_filter_cmd {
1266 u8 disable;
1267 u8 max_bcast_filters;
1268 u8 max_macs;
1269 u8 reserved1;
1270 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1271 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1272} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1273
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001274struct mvm_statistics_dbg {
1275 __le32 burst_check;
1276 __le32 burst_count;
1277 __le32 wait_for_silence_timeout_cnt;
1278 __le32 reserved[3];
1279} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1280
1281struct mvm_statistics_div {
1282 __le32 tx_on_a;
1283 __le32 tx_on_b;
1284 __le32 exec_time;
1285 __le32 probe_time;
1286 __le32 rssi_ant;
1287 __le32 reserved2;
1288} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1289
1290struct mvm_statistics_general_common {
1291 __le32 temperature; /* radio temperature */
1292 __le32 temperature_m; /* radio voltage */
1293 struct mvm_statistics_dbg dbg;
1294 __le32 sleep_time;
1295 __le32 slots_out;
1296 __le32 slots_idle;
1297 __le32 ttl_timestamp;
1298 struct mvm_statistics_div div;
1299 __le32 rx_enable_counter;
1300 /*
1301 * num_of_sos_states:
1302 * count the number of times we have to re-tune
1303 * in order to get out of bad PHY status
1304 */
1305 __le32 num_of_sos_states;
1306} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1307
1308struct mvm_statistics_rx_non_phy {
1309 __le32 bogus_cts; /* CTS received when not expecting CTS */
1310 __le32 bogus_ack; /* ACK received when not expecting ACK */
1311 __le32 non_bssid_frames; /* number of frames with BSSID that
1312 * doesn't belong to the STA BSSID */
1313 __le32 filtered_frames; /* count frames that were dumped in the
1314 * filtering process */
1315 __le32 non_channel_beacons; /* beacons with our bss id but not on
1316 * our serving channel */
1317 __le32 channel_beacons; /* beacons with our bss id and in our
1318 * serving channel */
1319 __le32 num_missed_bcon; /* number of missed beacons */
1320 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1321 * ADC was in saturation */
1322 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1323 * for INA */
1324 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1325 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1326 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1327 __le32 interference_data_flag; /* flag for interference data
1328 * availability. 1 when data is
1329 * available. */
1330 __le32 channel_load; /* counts RX Enable time in uSec */
1331 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1332 * and CCK) counter */
1333 __le32 beacon_rssi_a;
1334 __le32 beacon_rssi_b;
1335 __le32 beacon_rssi_c;
1336 __le32 beacon_energy_a;
1337 __le32 beacon_energy_b;
1338 __le32 beacon_energy_c;
1339 __le32 num_bt_kills;
1340 __le32 mac_id;
1341 __le32 directed_data_mpdu;
1342} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1343
1344struct mvm_statistics_rx_phy {
1345 __le32 ina_cnt;
1346 __le32 fina_cnt;
1347 __le32 plcp_err;
1348 __le32 crc32_err;
1349 __le32 overrun_err;
1350 __le32 early_overrun_err;
1351 __le32 crc32_good;
1352 __le32 false_alarm_cnt;
1353 __le32 fina_sync_err_cnt;
1354 __le32 sfd_timeout;
1355 __le32 fina_timeout;
1356 __le32 unresponded_rts;
1357 __le32 rxe_frame_limit_overrun;
1358 __le32 sent_ack_cnt;
1359 __le32 sent_cts_cnt;
1360 __le32 sent_ba_rsp_cnt;
1361 __le32 dsp_self_kill;
1362 __le32 mh_format_err;
1363 __le32 re_acq_main_rssi_sum;
1364 __le32 reserved;
1365} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1366
1367struct mvm_statistics_rx_ht_phy {
1368 __le32 plcp_err;
1369 __le32 overrun_err;
1370 __le32 early_overrun_err;
1371 __le32 crc32_good;
1372 __le32 crc32_err;
1373 __le32 mh_format_err;
1374 __le32 agg_crc32_good;
1375 __le32 agg_mpdu_cnt;
1376 __le32 agg_cnt;
1377 __le32 unsupport_mcs;
1378} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1379
1380#define MAX_CHAINS 3
1381
1382struct mvm_statistics_tx_non_phy_agg {
1383 __le32 ba_timeout;
1384 __le32 ba_reschedule_frames;
1385 __le32 scd_query_agg_frame_cnt;
1386 __le32 scd_query_no_agg;
1387 __le32 scd_query_agg;
1388 __le32 scd_query_mismatch;
1389 __le32 frame_not_ready;
1390 __le32 underrun;
1391 __le32 bt_prio_kill;
1392 __le32 rx_ba_rsp_cnt;
1393 __s8 txpower[MAX_CHAINS];
1394 __s8 reserved;
1395 __le32 reserved2;
1396} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1397
1398struct mvm_statistics_tx_channel_width {
1399 __le32 ext_cca_narrow_ch20[1];
1400 __le32 ext_cca_narrow_ch40[2];
1401 __le32 ext_cca_narrow_ch80[3];
1402 __le32 ext_cca_narrow_ch160[4];
1403 __le32 last_tx_ch_width_indx;
1404 __le32 rx_detected_per_ch_width[4];
1405 __le32 success_per_ch_width[4];
1406 __le32 fail_per_ch_width[4];
1407}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1408
1409struct mvm_statistics_tx {
1410 __le32 preamble_cnt;
1411 __le32 rx_detected_cnt;
1412 __le32 bt_prio_defer_cnt;
1413 __le32 bt_prio_kill_cnt;
1414 __le32 few_bytes_cnt;
1415 __le32 cts_timeout;
1416 __le32 ack_timeout;
1417 __le32 expected_ack_cnt;
1418 __le32 actual_ack_cnt;
1419 __le32 dump_msdu_cnt;
1420 __le32 burst_abort_next_frame_mismatch_cnt;
1421 __le32 burst_abort_missing_next_frame_cnt;
1422 __le32 cts_timeout_collision;
1423 __le32 ack_or_ba_timeout_collision;
1424 struct mvm_statistics_tx_non_phy_agg agg;
1425 struct mvm_statistics_tx_channel_width channel_width;
1426} __packed; /* STATISTICS_TX_API_S_VER_4 */
1427
1428
1429struct mvm_statistics_bt_activity {
1430 __le32 hi_priority_tx_req_cnt;
1431 __le32 hi_priority_tx_denied_cnt;
1432 __le32 lo_priority_tx_req_cnt;
1433 __le32 lo_priority_tx_denied_cnt;
1434 __le32 hi_priority_rx_req_cnt;
1435 __le32 hi_priority_rx_denied_cnt;
1436 __le32 lo_priority_rx_req_cnt;
1437 __le32 lo_priority_rx_denied_cnt;
1438} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1439
1440struct mvm_statistics_general {
1441 struct mvm_statistics_general_common common;
1442 __le32 beacon_filtered;
1443 __le32 missed_beacons;
Andrei Otcheretianskia20fd392013-07-21 17:23:59 +03001444 __s8 beacon_filter_average_energy;
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001445 __s8 beacon_filter_reason;
1446 __s8 beacon_filter_current_energy;
1447 __s8 beacon_filter_reserved;
1448 __le32 beacon_filter_delta_time;
1449 struct mvm_statistics_bt_activity bt_activity;
1450} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1451
1452struct mvm_statistics_rx {
1453 struct mvm_statistics_rx_phy ofdm;
1454 struct mvm_statistics_rx_phy cck;
1455 struct mvm_statistics_rx_non_phy general;
1456 struct mvm_statistics_rx_ht_phy ofdm_ht;
1457} __packed; /* STATISTICS_RX_API_S_VER_3 */
1458
1459/*
1460 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1461 *
1462 * By default, uCode issues this notification after receiving a beacon
1463 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1464 * REPLY_STATISTICS_CMD 0x9c, above.
1465 *
1466 * Statistics counters continue to increment beacon after beacon, but are
1467 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1468 * 0x9c with CLEAR_STATS bit set (see above).
1469 *
1470 * uCode also issues this notification during scans. uCode clears statistics
1471 * appropriately so that each notification contains statistics for only the
1472 * one channel that has just been scanned.
1473 */
1474
1475struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1476 __le32 flag;
1477 struct mvm_statistics_rx rx;
1478 struct mvm_statistics_tx tx;
1479 struct mvm_statistics_general general;
1480} __packed;
1481
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001482/***********************************
1483 * Smart Fifo API
1484 ***********************************/
1485/* Smart Fifo state */
1486enum iwl_sf_state {
1487 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1488 SF_FULL_ON,
1489 SF_UNINIT,
1490 SF_INIT_OFF,
1491 SF_HW_NUM_STATES
1492};
1493
1494/* Smart Fifo possible scenario */
1495enum iwl_sf_scenario {
1496 SF_SCENARIO_SINGLE_UNICAST,
1497 SF_SCENARIO_AGG_UNICAST,
1498 SF_SCENARIO_MULTICAST,
1499 SF_SCENARIO_BA_RESP,
1500 SF_SCENARIO_TX_RESP,
1501 SF_NUM_SCENARIO
1502};
1503
1504#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1505#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1506
1507/* smart FIFO default values */
1508#define SF_W_MARK_SISO 4096
1509#define SF_W_MARK_MIMO2 8192
1510#define SF_W_MARK_MIMO3 6144
1511#define SF_W_MARK_LEGACY 4096
1512#define SF_W_MARK_SCAN 4096
1513
1514/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1515#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1516#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1517#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1518#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1519#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1520#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1521#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1522#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1523#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1524#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1525
1526#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1527
1528/**
1529 * Smart Fifo configuration command.
1530 * @state: smart fifo state, types listed in iwl_sf_sate.
1531 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1532 * @long_delay_timeouts: aging and idle timer values for each scenario
1533 * in long delay state.
1534 * @full_on_timeouts: timer values for each scenario in full on state.
1535 */
1536struct iwl_sf_cfg_cmd {
1537 enum iwl_sf_state state;
1538 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1539 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1540 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1541} __packed; /* SF_CFG_API_S_VER_2 */
1542
Johannes Berg8ca151b2013-01-24 14:25:36 +01001543#endif /* __fw_api_h__ */