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James Bottomley2908d772006-08-29 09:22:51 -05001/*
2 * SAS structures and definitions header file
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA
23 *
24 */
25
26#ifndef _SAS_H_
27#define _SAS_H_
28
29#include <linux/types.h>
30#include <asm/byteorder.h>
31
32#define SAS_ADDR_SIZE 8
33#define HASHED_SAS_ADDR_SIZE 3
34#define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa)))
35
36#define SMP_REQUEST 0x40
37#define SMP_RESPONSE 0x41
38
39#define SSP_DATA 0x01
40#define SSP_XFER_RDY 0x05
41#define SSP_COMMAND 0x06
42#define SSP_RESPONSE 0x07
43#define SSP_TASK 0x16
44
45#define SMP_REPORT_GENERAL 0x00
46#define SMP_REPORT_MANUF_INFO 0x01
47#define SMP_READ_GPIO_REG 0x02
48#define SMP_DISCOVER 0x10
49#define SMP_REPORT_PHY_ERR_LOG 0x11
50#define SMP_REPORT_PHY_SATA 0x12
51#define SMP_REPORT_ROUTE_INFO 0x13
52#define SMP_WRITE_GPIO_REG 0x82
53#define SMP_CONF_ROUTE_INFO 0x90
54#define SMP_PHY_CONTROL 0x91
55#define SMP_PHY_TEST_FUNCTION 0x92
56
57#define SMP_RESP_FUNC_ACC 0x00
58#define SMP_RESP_FUNC_UNK 0x01
59#define SMP_RESP_FUNC_FAILED 0x02
60#define SMP_RESP_INV_FRM_LEN 0x03
61#define SMP_RESP_NO_PHY 0x10
62#define SMP_RESP_NO_INDEX 0x11
63#define SMP_RESP_PHY_NO_SATA 0x12
64#define SMP_RESP_PHY_UNK_OP 0x13
65#define SMP_RESP_PHY_UNK_TESTF 0x14
66#define SMP_RESP_PHY_TEST_INPROG 0x15
67#define SMP_RESP_PHY_VACANT 0x16
68
69/* SAM TMFs */
70#define TMF_ABORT_TASK 0x01
71#define TMF_ABORT_TASK_SET 0x02
72#define TMF_CLEAR_TASK_SET 0x04
73#define TMF_LU_RESET 0x08
74#define TMF_CLEAR_ACA 0x40
75#define TMF_QUERY_TASK 0x80
76
77/* SAS TMF responses */
78#define TMF_RESP_FUNC_COMPLETE 0x00
79#define TMF_RESP_INVALID_FRAME 0x02
80#define TMF_RESP_FUNC_ESUPP 0x04
81#define TMF_RESP_FUNC_FAILED 0x05
82#define TMF_RESP_FUNC_SUCC 0x08
83#define TMF_RESP_NO_LUN 0x09
84#define TMF_RESP_OVERLAPPED_TAG 0x0A
85
86enum sas_oob_mode {
87 OOB_NOT_CONNECTED,
88 SATA_OOB_MODE,
89 SAS_OOB_MODE
90};
91
92/* See sas_discover.c if you plan on changing these.
93 */
94enum sas_dev_type {
95 NO_DEVICE = 0, /* protocol */
96 SAS_END_DEV = 1, /* protocol */
97 EDGE_DEV = 2, /* protocol */
98 FANOUT_DEV = 3, /* protocol */
99 SAS_HA = 4,
100 SATA_DEV = 5,
101 SATA_PM = 7,
102 SATA_PM_PORT= 8,
103};
104
Darrick J. Wong5929faf2007-11-05 11:51:17 -0800105enum sas_protocol {
106 SAS_PROTOCOL_SATA = 0x01,
107 SAS_PROTOCOL_SMP = 0x02,
108 SAS_PROTOCOL_STP = 0x04,
109 SAS_PROTOCOL_SSP = 0x08,
110 SAS_PROTOCOL_ALL = 0x0E,
Dan Williams05a2a172011-09-23 18:09:11 -0700111 SAS_PROTOCOL_STP_ALL = SAS_PROTOCOL_STP|SAS_PROTOCOL_SATA,
James Bottomley2908d772006-08-29 09:22:51 -0500112};
113
114/* From the spec; local phys only */
115enum phy_func {
116 PHY_FUNC_NOP,
117 PHY_FUNC_LINK_RESET, /* Enables the phy */
118 PHY_FUNC_HARD_RESET,
119 PHY_FUNC_DISABLE,
120 PHY_FUNC_CLEAR_ERROR_LOG = 5,
121 PHY_FUNC_CLEAR_AFFIL,
122 PHY_FUNC_TX_SATA_PS_SIGNAL,
123 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */
James Bottomleya01e70e2006-09-06 19:28:07 -0500124 PHY_FUNC_SET_LINK_RATE,
James Bottomley2908d772006-08-29 09:22:51 -0500125};
126
127/* SAS LLDD would need to report only _very_few_ of those, like BROADCAST.
128 * Most of those are here for completeness.
129 */
130enum sas_prim {
131 SAS_PRIM_AIP_NORMAL = 1,
132 SAS_PRIM_AIP_R0 = 2,
133 SAS_PRIM_AIP_R1 = 3,
134 SAS_PRIM_AIP_R2 = 4,
135 SAS_PRIM_AIP_WC = 5,
136 SAS_PRIM_AIP_WD = 6,
137 SAS_PRIM_AIP_WP = 7,
138 SAS_PRIM_AIP_RWP = 8,
139
140 SAS_PRIM_BC_CH = 9,
141 SAS_PRIM_BC_RCH0 = 10,
142 SAS_PRIM_BC_RCH1 = 11,
143 SAS_PRIM_BC_R0 = 12,
144 SAS_PRIM_BC_R1 = 13,
145 SAS_PRIM_BC_R2 = 14,
146 SAS_PRIM_BC_R3 = 15,
147 SAS_PRIM_BC_R4 = 16,
148
149 SAS_PRIM_NOTIFY_ENSP= 17,
150 SAS_PRIM_NOTIFY_R0 = 18,
151 SAS_PRIM_NOTIFY_R1 = 19,
152 SAS_PRIM_NOTIFY_R2 = 20,
153
154 SAS_PRIM_CLOSE_CLAF = 21,
155 SAS_PRIM_CLOSE_NORM = 22,
156 SAS_PRIM_CLOSE_R0 = 23,
157 SAS_PRIM_CLOSE_R1 = 24,
158
159 SAS_PRIM_OPEN_RTRY = 25,
160 SAS_PRIM_OPEN_RJCT = 26,
161 SAS_PRIM_OPEN_ACPT = 27,
162
163 SAS_PRIM_DONE = 28,
164 SAS_PRIM_BREAK = 29,
165
166 SATA_PRIM_DMAT = 33,
167 SATA_PRIM_PMNAK = 34,
168 SATA_PRIM_PMACK = 35,
169 SATA_PRIM_PMREQ_S = 36,
170 SATA_PRIM_PMREQ_P = 37,
171 SATA_SATA_R_ERR = 38,
172};
173
174enum sas_open_rej_reason {
175 /* Abandon open */
176 SAS_OREJ_UNKNOWN = 0,
177 SAS_OREJ_BAD_DEST = 1,
178 SAS_OREJ_CONN_RATE = 2,
179 SAS_OREJ_EPROTO = 3,
180 SAS_OREJ_RESV_AB0 = 4,
181 SAS_OREJ_RESV_AB1 = 5,
182 SAS_OREJ_RESV_AB2 = 6,
183 SAS_OREJ_RESV_AB3 = 7,
184 SAS_OREJ_WRONG_DEST= 8,
185 SAS_OREJ_STP_NORES = 9,
186
187 /* Retry open */
188 SAS_OREJ_NO_DEST = 10,
189 SAS_OREJ_PATH_BLOCKED = 11,
190 SAS_OREJ_RSVD_CONT0 = 12,
191 SAS_OREJ_RSVD_CONT1 = 13,
192 SAS_OREJ_RSVD_INIT0 = 14,
193 SAS_OREJ_RSVD_INIT1 = 15,
194 SAS_OREJ_RSVD_STOP0 = 16,
195 SAS_OREJ_RSVD_STOP1 = 17,
196 SAS_OREJ_RSVD_RETRY = 18,
197};
198
Dan Williams8ec65522011-09-01 21:18:20 -0700199enum sas_gpio_reg_type {
200 SAS_GPIO_REG_CFG = 0,
201 SAS_GPIO_REG_RX = 1,
202 SAS_GPIO_REG_RX_GP = 2,
203 SAS_GPIO_REG_TX = 3,
204 SAS_GPIO_REG_TX_GP = 4,
205};
206
James Bottomley2908d772006-08-29 09:22:51 -0500207struct dev_to_host_fis {
208 u8 fis_type; /* 0x34 */
209 u8 flags;
210 u8 status;
211 u8 error;
212
213 u8 lbal;
214 union { u8 lbam; u8 byte_count_low; };
215 union { u8 lbah; u8 byte_count_high; };
216 u8 device;
217
218 u8 lbal_exp;
219 u8 lbam_exp;
220 u8 lbah_exp;
221 u8 _r_a;
222
223 union { u8 sector_count; u8 interrupt_reason; };
224 u8 sector_count_exp;
225 u8 _r_b;
226 u8 _r_c;
227
228 u32 _r_d;
229} __attribute__ ((packed));
230
231struct host_to_dev_fis {
232 u8 fis_type; /* 0x27 */
233 u8 flags;
234 u8 command;
235 u8 features;
236
237 u8 lbal;
238 union { u8 lbam; u8 byte_count_low; };
239 union { u8 lbah; u8 byte_count_high; };
240 u8 device;
241
242 u8 lbal_exp;
243 u8 lbam_exp;
244 u8 lbah_exp;
245 u8 features_exp;
246
247 union { u8 sector_count; u8 interrupt_reason; };
248 u8 sector_count_exp;
249 u8 _r_a;
250 u8 control;
251
252 u32 _r_b;
253} __attribute__ ((packed));
254
255/* Prefer to have code clarity over header file clarity.
256 */
257#ifdef __LITTLE_ENDIAN_BITFIELD
258struct sas_identify_frame {
259 /* Byte 0 */
260 u8 frame_type:4;
261 u8 dev_type:3;
262 u8 _un0:1;
263
264 /* Byte 1 */
265 u8 _un1;
266
267 /* Byte 2 */
268 union {
269 struct {
270 u8 _un20:1;
271 u8 smp_iport:1;
272 u8 stp_iport:1;
273 u8 ssp_iport:1;
274 u8 _un247:4;
275 };
276 u8 initiator_bits;
277 };
278
279 /* Byte 3 */
280 union {
281 struct {
282 u8 _un30:1;
283 u8 smp_tport:1;
284 u8 stp_tport:1;
285 u8 ssp_tport:1;
286 u8 _un347:4;
287 };
288 u8 target_bits;
289 };
290
291 /* Byte 4 - 11 */
292 u8 _un4_11[8];
293
294 /* Byte 12 - 19 */
295 u8 sas_addr[SAS_ADDR_SIZE];
296
297 /* Byte 20 */
298 u8 phy_id;
299
300 u8 _un21_27[7];
301
302 __be32 crc;
303} __attribute__ ((packed));
304
305struct ssp_frame_hdr {
306 u8 frame_type;
307 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
308 u8 _r_a;
309 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
310 __be16 _r_b;
311
312 u8 changing_data_ptr:1;
313 u8 retransmit:1;
314 u8 retry_data_frames:1;
315 u8 _r_c:5;
316
317 u8 num_fill_bytes:2;
318 u8 _r_d:6;
319
320 u32 _r_e;
321 __be16 tag;
322 __be16 tptt;
323 __be32 data_offs;
324} __attribute__ ((packed));
325
326struct ssp_response_iu {
327 u8 _r_a[10];
328
329 u8 datapres:2;
330 u8 _r_b:6;
331
332 u8 status;
333
334 u32 _r_c;
335
336 __be32 sense_data_len;
337 __be32 response_data_len;
338
339 u8 resp_data[0];
340 u8 sense_data[0];
341} __attribute__ ((packed));
342
343/* ---------- SMP ---------- */
344
345struct report_general_resp {
346 __be16 change_count;
347 __be16 route_indexes;
348 u8 _r_a;
349 u8 num_phys;
350
351 u8 conf_route_table:1;
352 u8 configuring:1;
Luben Tuikovffaac8f2011-09-22 09:41:36 -0700353 u8 config_others:1;
354 u8 orej_retry_supp:1;
355 u8 stp_cont_awt:1;
356 u8 self_config:1;
357 u8 zone_config:1;
358 u8 t2t_supp:1;
James Bottomley2908d772006-08-29 09:22:51 -0500359
360 u8 _r_c;
361
362 u8 enclosure_logical_id[8];
363
364 u8 _r_d[12];
365} __attribute__ ((packed));
366
367struct discover_resp {
368 u8 _r_a[5];
369
370 u8 phy_id;
371 __be16 _r_b;
372
373 u8 _r_c:4;
374 u8 attached_dev_type:3;
375 u8 _r_d:1;
376
377 u8 linkrate:4;
378 u8 _r_e:4;
379
380 u8 attached_sata_host:1;
381 u8 iproto:3;
382 u8 _r_f:4;
383
384 u8 attached_sata_dev:1;
385 u8 tproto:3;
386 u8 _r_g:3;
387 u8 attached_sata_ps:1;
388
389 u8 sas_addr[8];
390 u8 attached_sas_addr[8];
391 u8 attached_phy_id;
392
393 u8 _r_h[7];
394
395 u8 hmin_linkrate:4;
396 u8 pmin_linkrate:4;
397 u8 hmax_linkrate:4;
398 u8 pmax_linkrate:4;
399
400 u8 change_count;
401
402 u8 pptv:4;
403 u8 _r_i:3;
404 u8 virtual:1;
405
406 u8 routing_attr:4;
407 u8 _r_j:4;
408
409 u8 conn_type;
410 u8 conn_el_index;
411 u8 conn_phy_link;
412
413 u8 _r_k[8];
414} __attribute__ ((packed));
415
416struct report_phy_sata_resp {
417 u8 _r_a[5];
418
419 u8 phy_id;
420 u8 _r_b;
421
422 u8 affil_valid:1;
423 u8 affil_supp:1;
424 u8 _r_c:6;
425
426 u32 _r_d;
427
428 u8 stp_sas_addr[8];
429
430 struct dev_to_host_fis fis;
431
432 u32 _r_e;
433
434 u8 affil_stp_ini_addr[8];
435
436 __be32 crc;
437} __attribute__ ((packed));
438
439struct smp_resp {
440 u8 frame_type;
441 u8 function;
442 u8 result;
443 u8 reserved;
444 union {
445 struct report_general_resp rg;
446 struct discover_resp disc;
447 struct report_phy_sata_resp rps;
448 };
449} __attribute__ ((packed));
450
451#elif defined(__BIG_ENDIAN_BITFIELD)
452struct sas_identify_frame {
453 /* Byte 0 */
454 u8 _un0:1;
455 u8 dev_type:3;
456 u8 frame_type:4;
457
458 /* Byte 1 */
459 u8 _un1;
460
461 /* Byte 2 */
462 union {
463 struct {
464 u8 _un247:4;
465 u8 ssp_iport:1;
466 u8 stp_iport:1;
467 u8 smp_iport:1;
468 u8 _un20:1;
469 };
470 u8 initiator_bits;
471 };
472
473 /* Byte 3 */
474 union {
475 struct {
476 u8 _un347:4;
477 u8 ssp_tport:1;
478 u8 stp_tport:1;
479 u8 smp_tport:1;
480 u8 _un30:1;
481 };
482 u8 target_bits;
483 };
484
485 /* Byte 4 - 11 */
486 u8 _un4_11[8];
487
488 /* Byte 12 - 19 */
489 u8 sas_addr[SAS_ADDR_SIZE];
490
491 /* Byte 20 */
492 u8 phy_id;
493
494 u8 _un21_27[7];
495
496 __be32 crc;
497} __attribute__ ((packed));
498
499struct ssp_frame_hdr {
500 u8 frame_type;
501 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
502 u8 _r_a;
503 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
504 __be16 _r_b;
505
506 u8 _r_c:5;
507 u8 retry_data_frames:1;
508 u8 retransmit:1;
509 u8 changing_data_ptr:1;
510
511 u8 _r_d:6;
512 u8 num_fill_bytes:2;
513
514 u32 _r_e;
515 __be16 tag;
516 __be16 tptt;
517 __be32 data_offs;
518} __attribute__ ((packed));
519
520struct ssp_response_iu {
521 u8 _r_a[10];
522
523 u8 _r_b:6;
524 u8 datapres:2;
525
526 u8 status;
527
528 u32 _r_c;
529
530 __be32 sense_data_len;
531 __be32 response_data_len;
532
533 u8 resp_data[0];
534 u8 sense_data[0];
535} __attribute__ ((packed));
536
537/* ---------- SMP ---------- */
538
539struct report_general_resp {
540 __be16 change_count;
541 __be16 route_indexes;
542 u8 _r_a;
543 u8 num_phys;
544
Luben Tuikovffaac8f2011-09-22 09:41:36 -0700545 u8 t2t_supp:1;
546 u8 zone_config:1;
547 u8 self_config:1;
548 u8 stp_cont_awt:1;
549 u8 orej_retry_supp:1;
550 u8 config_others:1;
James Bottomley2908d772006-08-29 09:22:51 -0500551 u8 configuring:1;
552 u8 conf_route_table:1;
553
554 u8 _r_c;
555
556 u8 enclosure_logical_id[8];
557
558 u8 _r_d[12];
559} __attribute__ ((packed));
560
561struct discover_resp {
562 u8 _r_a[5];
563
564 u8 phy_id;
565 __be16 _r_b;
566
567 u8 _r_d:1;
568 u8 attached_dev_type:3;
569 u8 _r_c:4;
570
571 u8 _r_e:4;
572 u8 linkrate:4;
573
574 u8 _r_f:4;
575 u8 iproto:3;
576 u8 attached_sata_host:1;
577
578 u8 attached_sata_ps:1;
579 u8 _r_g:3;
580 u8 tproto:3;
581 u8 attached_sata_dev:1;
582
583 u8 sas_addr[8];
584 u8 attached_sas_addr[8];
585 u8 attached_phy_id;
586
587 u8 _r_h[7];
588
589 u8 pmin_linkrate:4;
590 u8 hmin_linkrate:4;
591 u8 pmax_linkrate:4;
592 u8 hmax_linkrate:4;
593
594 u8 change_count;
595
596 u8 virtual:1;
597 u8 _r_i:3;
598 u8 pptv:4;
599
600 u8 _r_j:4;
601 u8 routing_attr:4;
602
603 u8 conn_type;
604 u8 conn_el_index;
605 u8 conn_phy_link;
606
607 u8 _r_k[8];
608} __attribute__ ((packed));
609
610struct report_phy_sata_resp {
611 u8 _r_a[5];
612
613 u8 phy_id;
614 u8 _r_b;
615
616 u8 _r_c:6;
617 u8 affil_supp:1;
618 u8 affil_valid:1;
619
620 u32 _r_d;
621
622 u8 stp_sas_addr[8];
623
624 struct dev_to_host_fis fis;
625
626 u32 _r_e;
627
628 u8 affil_stp_ini_addr[8];
629
630 __be32 crc;
631} __attribute__ ((packed));
632
633struct smp_resp {
634 u8 frame_type;
635 u8 function;
636 u8 result;
637 u8 reserved;
638 union {
639 struct report_general_resp rg;
640 struct discover_resp disc;
641 struct report_phy_sata_resp rps;
642 };
643} __attribute__ ((packed));
644
645#else
646#error "Bitfield order not defined!"
647#endif
648
649#endif /* _SAS_H_ */