blob: c2ed5868dda6086ded4335539eb7fddfd37135a9 [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
Alan Coxab771632008-10-27 15:09:10 +00004 * Alan Cox <alan@lxorguk.ukuu.org.uk>
Bartlomiej Zolnierkiewicza75032e2010-02-13 14:35:53 +01005 * (C) 2007,2009,2010 Bartlomiej Zolnierkiewicz
Jeff Garzik669a5db2006-08-29 18:12:40 -04006 *
7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c
8 *
9 * First cut with LBA48/ATAPI
10 *
11 * TODO:
Alan Cox06b74dd2007-09-26 15:23:17 +010012 * Channel interlock/reset on both required ?
Jeff Garzik669a5db2006-08-29 18:12:40 -040013 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040014
Jeff Garzik669a5db2006-08-29 18:12:40 -040015#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/init.h>
19#include <linux/blkdev.h>
20#include <linux/delay.h>
21#include <scsi/scsi_host.h>
22#include <linux/libata.h>
23
24#define DRV_NAME "pata_pdc202xx_old"
Alan Cox06b74dd2007-09-26 15:23:17 +010025#define DRV_VERSION "0.4.3"
Jeff Garzik669a5db2006-08-29 18:12:40 -040026
Jeff Garzika0fcdc02007-03-09 07:24:15 -050027static int pdc2026x_cable_detect(struct ata_port *ap)
Jeff Garzik669a5db2006-08-29 18:12:40 -040028{
29 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
30 u16 cis;
Jeff Garzik85cd7252006-08-31 00:03:49 -040031
Jeff Garzik669a5db2006-08-29 18:12:40 -040032 pci_read_config_word(pdev, 0x50, &cis);
33 if (cis & (1 << (10 + ap->port_no)))
Alan Coxa0ac38f2007-07-03 15:15:13 +010034 return ATA_CBL_PATA40;
35 return ATA_CBL_PATA80;
Jeff Garzik669a5db2006-08-29 18:12:40 -040036}
37
Bartlomiej Zolnierkiewicz750e5192010-02-13 17:43:17 -050038static void pdc202xx_exec_command(struct ata_port *ap,
Bartlomiej Zolnierkiewicza75032e2010-02-13 14:35:53 +010039 const struct ata_taskfile *tf)
40{
41 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
42
43 iowrite8(tf->command, ap->ioaddr.command_addr);
44 ndelay(400);
45}
46
Sergei Shtylyov606254e2010-10-08 18:57:45 +040047static bool pdc202xx_irq_check(struct ata_port *ap)
48{
49 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
50 unsigned long master = pci_resource_start(pdev, 4);
51 u8 sc1d = inb(master + 0x1d);
52
53 if (ap->port_no) {
54 /*
55 * bit 7: error, bit 6: interrupting,
56 * bit 5: FIFO full, bit 4: FIFO empty
57 */
58 return sc1d & 0x40;
59 } else {
60 /*
61 * bit 3: error, bit 2: interrupting,
62 * bit 1: FIFO full, bit 0: FIFO empty
63 */
64 return sc1d & 0x04;
65 }
66}
67
Jeff Garzik669a5db2006-08-29 18:12:40 -040068/**
Alan Coxada406c2006-11-03 13:18:06 +000069 * pdc202xx_configure_piomode - set chip PIO timing
Jeff Garzik669a5db2006-08-29 18:12:40 -040070 * @ap: ATA interface
71 * @adev: ATA device
72 * @pio: PIO mode
73 *
74 * Called to do the PIO mode setup. Our timing registers are shared
75 * so a configure_dmamode call will undo any work we do here and vice
76 * versa
77 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040078
Alan Coxada406c2006-11-03 13:18:06 +000079static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
Jeff Garzik669a5db2006-08-29 18:12:40 -040080{
81 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +010082 int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
Jeff Garzik669a5db2006-08-29 18:12:40 -040083 static u16 pio_timing[5] = {
84 0x0913, 0x050C , 0x0308, 0x0206, 0x0104
85 };
86 u8 r_ap, r_bp;
87
88 pci_read_config_byte(pdev, port, &r_ap);
89 pci_read_config_byte(pdev, port + 1, &r_bp);
90 r_ap &= ~0x3F; /* Preserve ERRDY_EN, SYNC_IN */
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +010091 r_bp &= ~0x1F;
Jeff Garzik669a5db2006-08-29 18:12:40 -040092 r_ap |= (pio_timing[pio] >> 8);
93 r_bp |= (pio_timing[pio] & 0xFF);
Jeff Garzik85cd7252006-08-31 00:03:49 -040094
Jeff Garzik669a5db2006-08-29 18:12:40 -040095 if (ata_pio_need_iordy(adev))
96 r_ap |= 0x20; /* IORDY enable */
97 if (adev->class == ATA_DEV_ATA)
98 r_ap |= 0x10; /* FIFO enable */
99 pci_write_config_byte(pdev, port, r_ap);
100 pci_write_config_byte(pdev, port + 1, r_bp);
101}
102
103/**
Alan Coxada406c2006-11-03 13:18:06 +0000104 * pdc202xx_set_piomode - set initial PIO mode data
Jeff Garzik669a5db2006-08-29 18:12:40 -0400105 * @ap: ATA interface
106 * @adev: ATA device
107 *
108 * Called to do the PIO mode setup. Our timing registers are shared
109 * but we want to set the PIO timing by default.
110 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400111
Alan Coxada406c2006-11-03 13:18:06 +0000112static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400113{
Alan Coxada406c2006-11-03 13:18:06 +0000114 pdc202xx_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400115}
116
117/**
Alan Coxada406c2006-11-03 13:18:06 +0000118 * pdc202xx_configure_dmamode - set DMA mode in chip
Jeff Garzik669a5db2006-08-29 18:12:40 -0400119 * @ap: ATA interface
120 * @adev: ATA device
121 *
122 * Load DMA cycle times into the chip ready for a DMA transfer
123 * to occur.
124 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400125
Alan Coxada406c2006-11-03 13:18:06 +0000126static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400127{
128 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100129 int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400130 static u8 udma_timing[6][2] = {
131 { 0x60, 0x03 }, /* 33 Mhz Clock */
132 { 0x40, 0x02 },
133 { 0x20, 0x01 },
134 { 0x40, 0x02 }, /* 66 Mhz Clock */
135 { 0x20, 0x01 },
Jeff Garzik85cd7252006-08-31 00:03:49 -0400136 { 0x20, 0x01 }
Jeff Garzik669a5db2006-08-29 18:12:40 -0400137 };
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100138 static u8 mdma_timing[3][2] = {
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100139 { 0xe0, 0x0f },
Alan Cox06b74dd2007-09-26 15:23:17 +0100140 { 0x60, 0x04 },
141 { 0x60, 0x03 },
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100142 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400143 u8 r_bp, r_cp;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400144
Jeff Garzik669a5db2006-08-29 18:12:40 -0400145 pci_read_config_byte(pdev, port + 1, &r_bp);
146 pci_read_config_byte(pdev, port + 2, &r_cp);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400147
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100148 r_bp &= ~0xE0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400149 r_cp &= ~0x0F;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400150
Jeff Garzik669a5db2006-08-29 18:12:40 -0400151 if (adev->dma_mode >= XFER_UDMA_0) {
152 int speed = adev->dma_mode - XFER_UDMA_0;
153 r_bp |= udma_timing[speed][0];
154 r_cp |= udma_timing[speed][1];
Jeff Garzik85cd7252006-08-31 00:03:49 -0400155
Jeff Garzik669a5db2006-08-29 18:12:40 -0400156 } else {
157 int speed = adev->dma_mode - XFER_MW_DMA_0;
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100158 r_bp |= mdma_timing[speed][0];
159 r_cp |= mdma_timing[speed][1];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400160 }
161 pci_write_config_byte(pdev, port + 1, r_bp);
162 pci_write_config_byte(pdev, port + 2, r_cp);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400163
Jeff Garzik669a5db2006-08-29 18:12:40 -0400164}
165
166/**
167 * pdc2026x_bmdma_start - DMA engine begin
168 * @qc: ATA command
169 *
170 * In UDMA3 or higher we have to clock switch for the duration of the
171 * DMA transfer sequence.
Alan Cox06b74dd2007-09-26 15:23:17 +0100172 *
173 * Note: The host lock held by the libata layer protects
174 * us from two channels both trying to set DMA bits at once
Jeff Garzik669a5db2006-08-29 18:12:40 -0400175 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400176
Jeff Garzik669a5db2006-08-29 18:12:40 -0400177static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc)
178{
179 struct ata_port *ap = qc->ap;
180 struct ata_device *adev = qc->dev;
181 struct ata_taskfile *tf = &qc->tf;
182 int sel66 = ap->port_no ? 0x08: 0x02;
183
Tejun Heo0d5ff562007-02-01 15:06:36 +0900184 void __iomem *master = ap->host->ports[0]->ioaddr.bmdma_addr;
185 void __iomem *clock = master + 0x11;
186 void __iomem *atapi_reg = master + 0x20 + (4 * ap->port_no);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400187
Jeff Garzik669a5db2006-08-29 18:12:40 -0400188 u32 len;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400189
Jeff Garzik669a5db2006-08-29 18:12:40 -0400190 /* Check we keep host level locking here */
Bartlomiej Zolnierkiewicz6ad58b22009-04-20 22:31:25 +0200191 if (adev->dma_mode > XFER_UDMA_2)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900192 iowrite8(ioread8(clock) | sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400193 else
Tejun Heo0d5ff562007-02-01 15:06:36 +0900194 iowrite8(ioread8(clock) & ~sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400195
Jeff Garzik85cd7252006-08-31 00:03:49 -0400196 /* The DMA clocks may have been trashed by a reset. FIXME: make conditional
Jeff Garzik669a5db2006-08-29 18:12:40 -0400197 and move to qc_issue ? */
Alan Coxada406c2006-11-03 13:18:06 +0000198 pdc202xx_set_dmamode(ap, qc->dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400199
200 /* Cases the state machine will not complete correctly without help */
Tejun Heo0dc36882007-12-18 16:34:43 -0500201 if ((tf->flags & ATA_TFLAG_LBA48) || tf->protocol == ATAPI_PROT_DMA) {
Alan Cox5e518812007-03-23 18:57:23 +0000202 len = qc->nbytes / 2;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400203
Jeff Garzik669a5db2006-08-29 18:12:40 -0400204 if (tf->flags & ATA_TFLAG_WRITE)
205 len |= 0x06000000;
206 else
207 len |= 0x05000000;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400208
Tejun Heo0d5ff562007-02-01 15:06:36 +0900209 iowrite32(len, atapi_reg);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400210 }
Jeff Garzik85cd7252006-08-31 00:03:49 -0400211
212 /* Activate DMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400213 ata_bmdma_start(qc);
214}
215
216/**
217 * pdc2026x_bmdma_end - DMA engine stop
218 * @qc: ATA command
219 *
220 * After a DMA completes we need to put the clock back to 33MHz for
221 * PIO timings.
Alan Cox06b74dd2007-09-26 15:23:17 +0100222 *
223 * Note: The host lock held by the libata layer protects
224 * us from two channels both trying to set DMA bits at once
Jeff Garzik669a5db2006-08-29 18:12:40 -0400225 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400226
Jeff Garzik669a5db2006-08-29 18:12:40 -0400227static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc)
228{
229 struct ata_port *ap = qc->ap;
230 struct ata_device *adev = qc->dev;
231 struct ata_taskfile *tf = &qc->tf;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400232
Jeff Garzik669a5db2006-08-29 18:12:40 -0400233 int sel66 = ap->port_no ? 0x08: 0x02;
234 /* The clock bits are in the same register for both channels */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900235 void __iomem *master = ap->host->ports[0]->ioaddr.bmdma_addr;
236 void __iomem *clock = master + 0x11;
237 void __iomem *atapi_reg = master + 0x20 + (4 * ap->port_no);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400238
Jeff Garzik669a5db2006-08-29 18:12:40 -0400239 /* Cases the state machine will not complete correctly */
Tejun Heo0dc36882007-12-18 16:34:43 -0500240 if (tf->protocol == ATAPI_PROT_DMA || (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900241 iowrite32(0, atapi_reg);
242 iowrite8(ioread8(clock) & ~sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400243 }
Jeff Garzik669a5db2006-08-29 18:12:40 -0400244 /* Flip back to 33Mhz for PIO */
Bartlomiej Zolnierkiewicz6ad58b22009-04-20 22:31:25 +0200245 if (adev->dma_mode > XFER_UDMA_2)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900246 iowrite8(ioread8(clock) & ~sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400247 ata_bmdma_stop(qc);
Alan Cox36906d92008-01-04 00:08:49 +0000248 pdc202xx_set_piomode(ap, adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400249}
250
251/**
252 * pdc2026x_dev_config - device setup hook
Jeff Garzik669a5db2006-08-29 18:12:40 -0400253 * @adev: newly found device
254 *
255 * Perform chip specific early setup. We need to lock the transfer
256 * sizes to 8bit to avoid making the state engine on the 2026x cards
257 * barf.
258 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400259
Alancd0d3bb2007-03-02 00:56:15 +0000260static void pdc2026x_dev_config(struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400261{
262 adev->max_sectors = 256;
263}
264
Alan Cox36906d92008-01-04 00:08:49 +0000265static int pdc2026x_port_start(struct ata_port *ap)
266{
267 void __iomem *bmdma = ap->ioaddr.bmdma_addr;
268 if (bmdma) {
269 /* Enable burst mode */
270 u8 burst = ioread8(bmdma + 0x1f);
271 iowrite8(burst | 0x01, bmdma + 0x1f);
272 }
Tejun Heoc7087652010-05-10 21:41:34 +0200273 return ata_bmdma_port_start(ap);
Alan Cox36906d92008-01-04 00:08:49 +0000274}
275
Alan Coxaa8f2372008-01-19 15:51:26 +0000276/**
277 * pdc2026x_check_atapi_dma - Check whether ATAPI DMA can be supported for this command
278 * @qc: Metadata associated with taskfile to check
279 *
280 * Just say no - not supported on older Promise.
281 *
282 * LOCKING:
283 * None (inherited from caller).
284 *
285 * RETURNS: 0 when ATAPI DMA can be used
286 * 1 otherwise
287 */
288
289static int pdc2026x_check_atapi_dma(struct ata_queued_cmd *qc)
290{
291 return 1;
292}
293
Alan Coxada406c2006-11-03 13:18:06 +0000294static struct scsi_host_template pdc202xx_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900295 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400296};
297
298static struct ata_port_operations pdc2024x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900299 .inherits = &ata_bmdma_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400300
Tejun Heo029cfd62008-03-25 12:22:49 +0900301 .cable_detect = ata_cable_40wire,
302 .set_piomode = pdc202xx_set_piomode,
303 .set_dmamode = pdc202xx_set_dmamode,
Bartlomiej Zolnierkiewicza75032e2010-02-13 14:35:53 +0100304
Bartlomiej Zolnierkiewicz750e5192010-02-13 17:43:17 -0500305 .sff_exec_command = pdc202xx_exec_command,
Sergei Shtylyov606254e2010-10-08 18:57:45 +0400306 .sff_irq_check = pdc202xx_irq_check,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400307};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400308
309static struct ata_port_operations pdc2026x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900310 .inherits = &pdc2024x_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400311
Tejun Heo029cfd62008-03-25 12:22:49 +0900312 .check_atapi_dma = pdc2026x_check_atapi_dma,
313 .bmdma_start = pdc2026x_bmdma_start,
314 .bmdma_stop = pdc2026x_bmdma_stop,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400315
Tejun Heo029cfd62008-03-25 12:22:49 +0900316 .cable_detect = pdc2026x_cable_detect,
317 .dev_config = pdc2026x_dev_config,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400318
Tejun Heo029cfd62008-03-25 12:22:49 +0900319 .port_start = pdc2026x_port_start,
Bartlomiej Zolnierkiewicz750e5192010-02-13 17:43:17 -0500320
321 .sff_exec_command = pdc202xx_exec_command,
Sergei Shtylyov606254e2010-10-08 18:57:45 +0400322 .sff_irq_check = pdc202xx_irq_check,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400323};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400324
Alan Coxada406c2006-11-03 13:18:06 +0000325static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400326{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200327 static const struct ata_port_info info[3] = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400328 {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400329 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100330 .pio_mask = ATA_PIO4,
331 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400332 .udma_mask = ATA_UDMA2,
333 .port_ops = &pdc2024x_port_ops
Jeff Garzik85cd7252006-08-31 00:03:49 -0400334 },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400335 {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400336 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100337 .pio_mask = ATA_PIO4,
338 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400339 .udma_mask = ATA_UDMA4,
340 .port_ops = &pdc2026x_port_ops
341 },
342 {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400343 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100344 .pio_mask = ATA_PIO4,
345 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400346 .udma_mask = ATA_UDMA5,
347 .port_ops = &pdc2026x_port_ops
348 }
Jeff Garzik85cd7252006-08-31 00:03:49 -0400349
Jeff Garzik669a5db2006-08-29 18:12:40 -0400350 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200351 const struct ata_port_info *ppi[] = { &info[id->driver_data], NULL };
Jeff Garzik85cd7252006-08-31 00:03:49 -0400352
Jeff Garzik669a5db2006-08-29 18:12:40 -0400353 if (dev->device == PCI_DEVICE_ID_PROMISE_20265) {
354 struct pci_dev *bridge = dev->bus->self;
355 /* Don't grab anything behind a Promise I2O RAID */
356 if (bridge && bridge->vendor == PCI_VENDOR_ID_INTEL) {
Jeff Garzikb4479162007-10-25 20:47:30 -0400357 if (bridge->device == PCI_DEVICE_ID_INTEL_I960)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400358 return -ENODEV;
Jeff Garzikb4479162007-10-25 20:47:30 -0400359 if (bridge->device == PCI_DEVICE_ID_INTEL_I960RM)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400360 return -ENODEV;
361 }
362 }
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200363 return ata_pci_bmdma_init_one(dev, ppi, &pdc202xx_sht, NULL, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400364}
365
Alan Coxada406c2006-11-03 13:18:06 +0000366static const struct pci_device_id pdc202xx[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400367 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20246), 0 },
368 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20262), 1 },
369 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 1 },
370 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 2 },
371 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 2 },
372
373 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400374};
375
Alan Coxada406c2006-11-03 13:18:06 +0000376static struct pci_driver pdc202xx_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400377 .name = DRV_NAME,
Alan Coxada406c2006-11-03 13:18:06 +0000378 .id_table = pdc202xx,
379 .probe = pdc202xx_init_one,
Alan62d64ae2006-11-27 16:27:20 +0000380 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900381#ifdef CONFIG_PM
Alan62d64ae2006-11-27 16:27:20 +0000382 .suspend = ata_pci_device_suspend,
383 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900384#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400385};
386
Alan Coxada406c2006-11-03 13:18:06 +0000387static int __init pdc202xx_init(void)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400388{
Alan Coxada406c2006-11-03 13:18:06 +0000389 return pci_register_driver(&pdc202xx_pci_driver);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400390}
391
Alan Coxada406c2006-11-03 13:18:06 +0000392static void __exit pdc202xx_exit(void)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400393{
Alan Coxada406c2006-11-03 13:18:06 +0000394 pci_unregister_driver(&pdc202xx_pci_driver);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400395}
396
Jeff Garzik669a5db2006-08-29 18:12:40 -0400397MODULE_AUTHOR("Alan Cox");
398MODULE_DESCRIPTION("low-level driver for Promise 2024x and 20262-20267");
399MODULE_LICENSE("GPL");
Alan Coxada406c2006-11-03 13:18:06 +0000400MODULE_DEVICE_TABLE(pci, pdc202xx);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400401MODULE_VERSION(DRV_VERSION);
402
Alan Coxada406c2006-11-03 13:18:06 +0000403module_init(pdc202xx_init);
404module_exit(pdc202xx_exit);