blob: 0f3130599770f2a7008d2de009ea09266620e708 [file] [log] [blame]
Mike Rapoport3696a8a2007-09-23 15:59:26 +01001/*
Mike Rapoportda591932008-10-05 10:25:44 +01002 * linux/arch/arm/mach-pxa/cm-x2xx-pci.c
Mike Rapoport3696a8a2007-09-23 15:59:26 +01003 *
4 * PCI bios-type initialisation for PCI machines
5 *
6 * Bits taken from various places.
7 *
Mike Rapoport2f01a972008-06-17 12:29:58 +01008 * Copyright (C) 2007, 2008 Compulab, Ltd.
Mike Rapoport3696a8a2007-09-23 15:59:26 +01009 * Mike Rapoport <mike@compulab.co.il>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/pci.h>
18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/platform_device.h>
21#include <linux/irq.h>
Mike Rapoport2f01a972008-06-17 12:29:58 +010022#include <linux/gpio.h>
Mike Rapoport3696a8a2007-09-23 15:59:26 +010023
24#include <asm/mach/pci.h>
Mike Rapoport3696a8a2007-09-23 15:59:26 +010025#include <asm/mach-types.h>
26
27#include <asm/hardware/it8152.h>
28
Mike Rapoport2f01a972008-06-17 12:29:58 +010029unsigned long it8152_base_address;
Mike Rapoportda591932008-10-05 10:25:44 +010030static int cmx2xx_it8152_irq_gpio;
Mike Rapoport3696a8a2007-09-23 15:59:26 +010031
32/*
33 * Only first 64MB of memory can be accessed via PCI.
34 * We use GFP_DMA to allocate safe buffers to do map/unmap.
35 * This is really ugly and we need a better way of specifying
36 * DMA-capable regions of memory.
37 */
Russell Kingb65b4782010-05-22 20:58:51 +010038void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size,
Mike Rapoport3696a8a2007-09-23 15:59:26 +010039 unsigned long *zhole_size)
40{
41 unsigned int sz = SZ_64M >> PAGE_SHIFT;
42
Mike Rapoport5855a1e2008-05-12 06:41:13 +010043 if (machine_is_armcore()) {
Mike Rapoportda591932008-10-05 10:25:44 +010044 pr_info("Adjusting zones for CM-X2XX\n");
Mike Rapoport3696a8a2007-09-23 15:59:26 +010045
Mike Rapoport5855a1e2008-05-12 06:41:13 +010046 /*
47 * Only adjust if > 64M on current system
48 */
Russell Kingb65b4782010-05-22 20:58:51 +010049 if (zone_size[0] <= sz)
Mike Rapoport5855a1e2008-05-12 06:41:13 +010050 return;
Mike Rapoport3696a8a2007-09-23 15:59:26 +010051
Mike Rapoport5855a1e2008-05-12 06:41:13 +010052 zone_size[1] = zone_size[0] - sz;
53 zone_size[0] = sz;
54 zhole_size[1] = zhole_size[0];
55 zhole_size[0] = 0;
56 }
Mike Rapoport3696a8a2007-09-23 15:59:26 +010057}
58
Mike Rapoportda591932008-10-05 10:25:44 +010059static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
Mike Rapoport3696a8a2007-09-23 15:59:26 +010060{
61 /* clear our parent irq */
Eric Miao669cb512010-01-01 15:29:22 +080062 desc->chip->ack(irq);
Mike Rapoport3696a8a2007-09-23 15:59:26 +010063
64 it8152_irq_demux(irq, desc);
65}
66
Mike Rapoportda591932008-10-05 10:25:44 +010067void __cmx2xx_pci_init_irq(int irq_gpio)
Mike Rapoport3696a8a2007-09-23 15:59:26 +010068{
69 it8152_init_irq();
Mike Rapoport3696a8a2007-09-23 15:59:26 +010070
Mike Rapoportda591932008-10-05 10:25:44 +010071 cmx2xx_it8152_irq_gpio = irq_gpio;
Mike Rapoport2f01a972008-06-17 12:29:58 +010072
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +010073 set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
Mike Rapoport2f01a972008-06-17 12:29:58 +010074
Mike Rapoportda591932008-10-05 10:25:44 +010075 set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux);
Mike Rapoport3696a8a2007-09-23 15:59:26 +010076}
77
78#ifdef CONFIG_PM
79static unsigned long sleep_save_ite[10];
80
Mike Rapoportda591932008-10-05 10:25:44 +010081void __cmx2xx_pci_suspend(void)
Mike Rapoport3696a8a2007-09-23 15:59:26 +010082{
83 /* save ITE state */
84 sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR);
85 sleep_save_ite[1] = __raw_readl(IT8152_INTC_LPCNIMR);
86 sleep_save_ite[2] = __raw_readl(IT8152_INTC_LPNIAR);
87
88 /* Clear ITE IRQ's */
89 __raw_writel((0), IT8152_INTC_PDCNIRR);
90 __raw_writel((0), IT8152_INTC_LPCNIRR);
91}
92
Mike Rapoportda591932008-10-05 10:25:44 +010093void __cmx2xx_pci_resume(void)
Mike Rapoport3696a8a2007-09-23 15:59:26 +010094{
95 /* restore IT8152 state */
96 __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR);
97 __raw_writel((sleep_save_ite[1]), IT8152_INTC_LPCNIMR);
98 __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR);
99}
100#else
Mike Rapoportda591932008-10-05 10:25:44 +0100101void cmx2xx_pci_suspend(void) {}
102void cmx2xx_pci_resume(void) {}
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100103#endif
104
105/* PCI IRQ mapping*/
Mike Rapoportda591932008-10-05 10:25:44 +0100106static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100107{
108 int irq;
109
Harvey Harrison8e86f422008-03-04 15:08:02 -0800110 dev_dbg(&dev->dev, "%s: slot=%x, pin=%x\n", __func__, slot, pin);
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100111
112 irq = it8152_pci_map_irq(dev, slot, pin);
113 if (irq)
114 return irq;
115
116 /*
117 Here comes the ugly part. The routing is baseboard specific,
Mike Rapoportda591932008-10-05 10:25:44 +0100118 but defining a platform for each possible base of CM-X2XX is
119 unrealistic. Here we keep mapping for ATXBase and SB-X2XX.
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100120 */
121 /* ATXBASE PCI slot */
122 if (slot == 7)
123 return IT8152_PCI_INTA;
124
Mike Rapoportda591932008-10-05 10:25:44 +0100125 /* ATXBase/SB-X2XX CardBus */
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100126 if (slot == 8 || slot == 0)
127 return IT8152_PCI_INTB;
128
129 /* ATXBase Ethernet */
130 if (slot == 9)
131 return IT8152_PCI_INTA;
132
Mike Rapoporta7f3f032008-10-05 10:26:55 +0100133 /* CM-x255 Onboard Ethernet */
134 if (slot == 15)
135 return IT8152_PCI_INTC;
136
137 /* SB-x2xx Ethernet */
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100138 if (slot == 16)
139 return IT8152_PCI_INTA;
140
141 /* PC104+ interrupt routing */
142 if ((slot == 17) || (slot == 19))
143 return IT8152_PCI_INTA;
144 if ((slot == 18) || (slot == 20))
145 return IT8152_PCI_INTB;
146
147 return(0);
148}
149
Mike Rapoportda591932008-10-05 10:25:44 +0100150static void cmx2xx_pci_preinit(void)
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100151{
Mike Rapoportda591932008-10-05 10:25:44 +0100152 pr_info("Initializing CM-X2XX PCI subsystem\n");
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100153
154 __raw_writel(0x800, IT8152_PCI_CFG_ADDR);
155 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
Mike Rapoporta0113a92007-11-25 08:55:34 +0100156 pr_info("PCI Bridge found.\n");
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100157
158 /* set PCI I/O base at 0 */
159 writel(0x848, IT8152_PCI_CFG_ADDR);
160 writel(0, IT8152_PCI_CFG_DATA);
161
162 /* set PCI memory base at 0 */
163 writel(0x840, IT8152_PCI_CFG_ADDR);
164 writel(0, IT8152_PCI_CFG_DATA);
165
166 writel(0x20, IT8152_GPIO_GPDR);
167
168 /* CardBus Controller on ATXbase baseboard */
169 writel(0x4000, IT8152_PCI_CFG_ADDR);
170 if (readl(IT8152_PCI_CFG_DATA) == 0xAC51104C) {
Mike Rapoporta0113a92007-11-25 08:55:34 +0100171 pr_info("CardBus Bridge found.\n");
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100172
173 /* Configure socket 0 */
174 writel(0x408C, IT8152_PCI_CFG_ADDR);
175 writel(0x1022, IT8152_PCI_CFG_DATA);
176
177 writel(0x4080, IT8152_PCI_CFG_ADDR);
178 writel(0x3844d060, IT8152_PCI_CFG_DATA);
179
180 writel(0x4090, IT8152_PCI_CFG_ADDR);
181 writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
182 0x60440000),
183 IT8152_PCI_CFG_DATA);
184
185 writel(0x4018, IT8152_PCI_CFG_ADDR);
186 writel(0xb0000000, IT8152_PCI_CFG_DATA);
187
188 /* Configure socket 1 */
189 writel(0x418C, IT8152_PCI_CFG_ADDR);
190 writel(0x1022, IT8152_PCI_CFG_DATA);
191
192 writel(0x4180, IT8152_PCI_CFG_ADDR);
193 writel(0x3844d060, IT8152_PCI_CFG_DATA);
194
195 writel(0x4190, IT8152_PCI_CFG_ADDR);
196 writel(((readl(IT8152_PCI_CFG_DATA) & 0xffff) |
197 0x60440000),
198 IT8152_PCI_CFG_DATA);
199
200 writel(0x4118, IT8152_PCI_CFG_ADDR);
201 writel(0xb0000000, IT8152_PCI_CFG_DATA);
202 }
203 }
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100204}
205
Mike Rapoportda591932008-10-05 10:25:44 +0100206static struct hw_pci cmx2xx_pci __initdata = {
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100207 .swizzle = pci_std_swizzle,
Mike Rapoportda591932008-10-05 10:25:44 +0100208 .map_irq = cmx2xx_pci_map_irq,
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100209 .nr_controllers = 1,
210 .setup = it8152_pci_setup,
Mike Rapoporta0113a92007-11-25 08:55:34 +0100211 .scan = it8152_pci_scan_bus,
Mike Rapoportda591932008-10-05 10:25:44 +0100212 .preinit = cmx2xx_pci_preinit,
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100213};
214
Mike Rapoportda591932008-10-05 10:25:44 +0100215static int __init cmx2xx_init_pci(void)
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100216{
217 if (machine_is_armcore())
Mike Rapoportda591932008-10-05 10:25:44 +0100218 pci_common_init(&cmx2xx_pci);
Mike Rapoport3696a8a2007-09-23 15:59:26 +0100219
220 return 0;
221}
222
Mike Rapoportda591932008-10-05 10:25:44 +0100223subsys_initcall(cmx2xx_init_pci);