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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Driver for Motorola IMX serial ports
3 *
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 * Author: Sascha Hauer <sascha@saschahauer.de>
7 * Copyright (C) 2004 Pengutronix
8 *
Fabian Godehardtb6e49132009-06-11 14:53:18 +01009 * Copyright (C) 2009 emlix GmbH
10 * Author: Fabian Godehardt (added IrDA support for iMX)
11 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 * [29-Mar-2005] Mike Lee
27 * Added hardware handshake
28 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31#define SUPPORT_SYSRQ
32#endif
33
34#include <linux/module.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010039#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43#include <linux/serial.h>
Sascha Hauer38a41fd2008-07-05 10:02:46 +020044#include <linux/clk.h>
Fabian Godehardtb6e49132009-06-11 14:53:18 +010045#include <linux/delay.h>
Oskar Schirmer534fca02009-06-11 14:52:23 +010046#include <linux/rational.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090047#include <linux/slab.h>
Shawn Guo22698aa2011-06-25 02:04:34 +080048#include <linux/of.h>
49#include <linux/of_device.h>
Shawn Guofed78ce2012-05-06 20:21:05 +080050#include <linux/pinctrl/consumer.h>
Sachin Kamate32a9f82013-01-07 10:25:03 +053051#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <asm/irq.h>
Arnd Bergmann82906b12012-08-24 15:14:29 +020054#include <linux/platform_data/serial-imx.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Sascha Hauerff4bfb22007-04-26 08:26:13 +010056/* Register definitions */
57#define URXD0 0x0 /* Receiver Register */
58#define URTX0 0x40 /* Transmitter Register */
59#define UCR1 0x80 /* Control Register 1 */
60#define UCR2 0x84 /* Control Register 2 */
61#define UCR3 0x88 /* Control Register 3 */
62#define UCR4 0x8c /* Control Register 4 */
63#define UFCR 0x90 /* FIFO Control Register */
64#define USR1 0x94 /* Status Register 1 */
65#define USR2 0x98 /* Status Register 2 */
66#define UESC 0x9c /* Escape Character Register */
67#define UTIM 0xa0 /* Escape Timer Register */
68#define UBIR 0xa4 /* BRM Incremental Register */
69#define UBMR 0xa8 /* BRM Modulator Register */
70#define UBRC 0xac /* Baud Rate Count Register */
Shawn Guofe6b5402011-06-25 02:04:33 +080071#define IMX21_ONEMS 0xb0 /* One Millisecond register */
72#define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */
73#define IMX21_UTS 0xb4 /* UART Test Register on all other i.mx*/
Sascha Hauerff4bfb22007-04-26 08:26:13 +010074
75/* UART Control Register Bit Fields.*/
Sachin Kamat82313e62013-01-07 10:25:02 +053076#define URXD_CHARRDY (1<<15)
77#define URXD_ERR (1<<14)
78#define URXD_OVRRUN (1<<13)
79#define URXD_FRMERR (1<<12)
80#define URXD_BRK (1<<11)
81#define URXD_PRERR (1<<10)
82#define UCR1_ADEN (1<<15) /* Auto detect interrupt */
83#define UCR1_ADBR (1<<14) /* Auto detect baud rate */
84#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */
85#define UCR1_IDEN (1<<12) /* Idle condition interrupt */
86#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */
87#define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */
88#define UCR1_IREN (1<<7) /* Infrared interface enable */
89#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */
90#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */
91#define UCR1_SNDBRK (1<<4) /* Send break */
92#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */
93#define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */
94#define UCR1_DOZE (1<<1) /* Doze */
95#define UCR1_UARTEN (1<<0) /* UART enabled */
96#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */
97#define UCR2_IRTS (1<<14) /* Ignore RTS pin */
98#define UCR2_CTSC (1<<13) /* CTS pin control */
99#define UCR2_CTS (1<<12) /* Clear to send */
100#define UCR2_ESCEN (1<<11) /* Escape enable */
101#define UCR2_PREN (1<<8) /* Parity enable */
102#define UCR2_PROE (1<<7) /* Parity odd/even */
103#define UCR2_STPB (1<<6) /* Stop */
104#define UCR2_WS (1<<5) /* Word size */
105#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */
106#define UCR2_ATEN (1<<3) /* Aging Timer Enable */
107#define UCR2_TXEN (1<<2) /* Transmitter enabled */
108#define UCR2_RXEN (1<<1) /* Receiver enabled */
109#define UCR2_SRST (1<<0) /* SW reset */
110#define UCR3_DTREN (1<<13) /* DTR interrupt enable */
111#define UCR3_PARERREN (1<<12) /* Parity enable */
112#define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */
113#define UCR3_DSR (1<<10) /* Data set ready */
114#define UCR3_DCD (1<<9) /* Data carrier detect */
115#define UCR3_RI (1<<8) /* Ring indicator */
116#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */
117#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */
118#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */
119#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */
120#define IMX21_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select */
121#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */
122#define UCR3_BPEN (1<<0) /* Preset registers enable */
123#define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */
124#define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */
125#define UCR4_INVR (1<<9) /* Inverted infrared reception */
126#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */
127#define UCR4_WKEN (1<<7) /* Wake interrupt enable */
128#define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */
129#define UCR4_IRSC (1<<5) /* IR special case */
130#define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */
131#define UCR4_BKEN (1<<2) /* Break condition interrupt enable */
132#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */
133#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */
134#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */
135#define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */
136#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */
137#define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
138#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */
139#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */
140#define USR1_RTSS (1<<14) /* RTS pin status */
141#define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */
142#define USR1_RTSD (1<<12) /* RTS delta */
143#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */
144#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */
145#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */
146#define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */
147#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */
148#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */
149#define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */
150#define USR2_ADET (1<<15) /* Auto baud rate detect complete */
151#define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */
152#define USR2_DTRF (1<<13) /* DTR edge interrupt flag */
153#define USR2_IDLE (1<<12) /* Idle condition */
154#define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */
155#define USR2_WAKE (1<<7) /* Wake */
156#define USR2_RTSF (1<<4) /* RTS edge interrupt flag */
157#define USR2_TXDC (1<<3) /* Transmitter complete */
158#define USR2_BRCD (1<<2) /* Break condition */
159#define USR2_ORE (1<<1) /* Overrun error */
160#define USR2_RDR (1<<0) /* Recv data ready */
161#define UTS_FRCPERR (1<<13) /* Force parity error */
162#define UTS_LOOP (1<<12) /* Loop tx and rx */
163#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */
164#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */
165#define UTS_TXFULL (1<<4) /* TxFIFO full */
166#define UTS_RXFULL (1<<3) /* RxFIFO full */
167#define UTS_SOFTRST (1<<0) /* Software reset */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100168
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169/* We've been assigned a range on the "Low-density serial ports" major */
Sachin Kamat82313e62013-01-07 10:25:02 +0530170#define SERIAL_IMX_MAJOR 207
171#define MINOR_START 16
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200172#define DEV_NAME "ttymxc"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 * This determines how often we check the modem status signals
176 * for any change. They generally aren't connected to an IRQ
177 * so we have to poll them. We also check immediately before
178 * filling the TX fifo incase CTS has been dropped.
179 */
180#define MCTRL_TIMEOUT (250*HZ/1000)
181
182#define DRIVER_NAME "IMX-uart"
183
Sascha Hauerdbff4e92008-07-05 10:02:45 +0200184#define UART_NR 8
185
Shawn Guofe6b5402011-06-25 02:04:33 +0800186/* i.mx21 type uart runs on all i.mx except i.mx1 */
187enum imx_uart_type {
188 IMX1_UART,
189 IMX21_UART,
190};
191
192/* device type dependent stuff */
193struct imx_uart_data {
194 unsigned uts_reg;
195 enum imx_uart_type devtype;
196};
197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198struct imx_port {
199 struct uart_port port;
200 struct timer_list timer;
201 unsigned int old_status;
Sachin Kamat82313e62013-01-07 10:25:02 +0530202 int txirq, rxirq, rtsirq;
Daniel Glöckner26bbb3f2009-06-11 14:36:29 +0100203 unsigned int have_rtscts:1;
Huang Shijie20ff2fe2013-05-30 14:07:12 +0800204 unsigned int dte_mode:1;
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100205 unsigned int use_irda:1;
206 unsigned int irda_inv_rx:1;
207 unsigned int irda_inv_tx:1;
208 unsigned short trcv_delay; /* transceiver delay */
Sascha Hauer3a9465f2012-03-07 09:31:43 +0100209 struct clk *clk_ipg;
210 struct clk *clk_per;
Uwe Kleine-König7d0b0662012-05-21 21:57:39 +0200211 const struct imx_uart_data *devdata;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212};
213
Dirk Behme0ad5a812011-12-22 09:57:52 +0100214struct imx_port_ucrs {
215 unsigned int ucr1;
216 unsigned int ucr2;
217 unsigned int ucr3;
218};
219
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100220#ifdef CONFIG_IRDA
221#define USE_IRDA(sport) ((sport)->use_irda)
222#else
223#define USE_IRDA(sport) (0)
224#endif
225
Shawn Guofe6b5402011-06-25 02:04:33 +0800226static struct imx_uart_data imx_uart_devdata[] = {
227 [IMX1_UART] = {
228 .uts_reg = IMX1_UTS,
229 .devtype = IMX1_UART,
230 },
231 [IMX21_UART] = {
232 .uts_reg = IMX21_UTS,
233 .devtype = IMX21_UART,
234 },
235};
236
237static struct platform_device_id imx_uart_devtype[] = {
238 {
239 .name = "imx1-uart",
240 .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX1_UART],
241 }, {
242 .name = "imx21-uart",
243 .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX21_UART],
244 }, {
245 /* sentinel */
246 }
247};
248MODULE_DEVICE_TABLE(platform, imx_uart_devtype);
249
Shawn Guo22698aa2011-06-25 02:04:34 +0800250static struct of_device_id imx_uart_dt_ids[] = {
251 { .compatible = "fsl,imx1-uart", .data = &imx_uart_devdata[IMX1_UART], },
252 { .compatible = "fsl,imx21-uart", .data = &imx_uart_devdata[IMX21_UART], },
253 { /* sentinel */ }
254};
255MODULE_DEVICE_TABLE(of, imx_uart_dt_ids);
256
Shawn Guofe6b5402011-06-25 02:04:33 +0800257static inline unsigned uts_reg(struct imx_port *sport)
258{
259 return sport->devdata->uts_reg;
260}
261
262static inline int is_imx1_uart(struct imx_port *sport)
263{
264 return sport->devdata->devtype == IMX1_UART;
265}
266
267static inline int is_imx21_uart(struct imx_port *sport)
268{
269 return sport->devdata->devtype == IMX21_UART;
270}
271
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272/*
fabio.estevam@freescale.com44a75412013-02-06 19:00:02 -0200273 * Save and restore functions for UCR1, UCR2 and UCR3 registers
274 */
Fabio Estevame8bfa762013-06-05 00:58:46 -0300275#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_IMX_CONSOLE)
fabio.estevam@freescale.com44a75412013-02-06 19:00:02 -0200276static void imx_port_ucrs_save(struct uart_port *port,
277 struct imx_port_ucrs *ucr)
278{
279 /* save control registers */
280 ucr->ucr1 = readl(port->membase + UCR1);
281 ucr->ucr2 = readl(port->membase + UCR2);
282 ucr->ucr3 = readl(port->membase + UCR3);
283}
284
285static void imx_port_ucrs_restore(struct uart_port *port,
286 struct imx_port_ucrs *ucr)
287{
288 /* restore control registers */
289 writel(ucr->ucr1, port->membase + UCR1);
290 writel(ucr->ucr2, port->membase + UCR2);
291 writel(ucr->ucr3, port->membase + UCR3);
292}
Fabio Estevame8bfa762013-06-05 00:58:46 -0300293#endif
fabio.estevam@freescale.com44a75412013-02-06 19:00:02 -0200294
295/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 * Handle any change of modem status signal since we were last called.
297 */
298static void imx_mctrl_check(struct imx_port *sport)
299{
300 unsigned int status, changed;
301
302 status = sport->port.ops->get_mctrl(&sport->port);
303 changed = status ^ sport->old_status;
304
305 if (changed == 0)
306 return;
307
308 sport->old_status = status;
309
310 if (changed & TIOCM_RI)
311 sport->port.icount.rng++;
312 if (changed & TIOCM_DSR)
313 sport->port.icount.dsr++;
314 if (changed & TIOCM_CAR)
315 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
316 if (changed & TIOCM_CTS)
317 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
318
Alan Coxbdc04e32009-09-19 13:13:31 -0700319 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320}
321
322/*
323 * This is our per-port timeout handler, for checking the
324 * modem status signals.
325 */
326static void imx_timeout(unsigned long data)
327{
328 struct imx_port *sport = (struct imx_port *)data;
329 unsigned long flags;
330
Alan Coxebd2c8f2009-09-19 13:13:28 -0700331 if (sport->port.state) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332 spin_lock_irqsave(&sport->port.lock, flags);
333 imx_mctrl_check(sport);
334 spin_unlock_irqrestore(&sport->port.lock, flags);
335
336 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
337 }
338}
339
340/*
341 * interrupts disabled on entry
342 */
Russell Kingb129a8c2005-08-31 10:12:14 +0100343static void imx_stop_tx(struct uart_port *port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344{
345 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100346 unsigned long temp;
347
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100348 if (USE_IRDA(sport)) {
349 /* half duplex - wait for end of transmission */
350 int n = 256;
351 while ((--n > 0) &&
352 !(readl(sport->port.membase + USR2) & USR2_TXDC)) {
353 udelay(5);
354 barrier();
355 }
356 /*
357 * irda transceiver - wait a bit more to avoid
358 * cutoff, hardware dependent
359 */
360 udelay(sport->trcv_delay);
361
362 /*
363 * half duplex - reactivate receive mode,
364 * flush receive pipe echo crap
365 */
366 if (readl(sport->port.membase + USR2) & USR2_TXDC) {
367 temp = readl(sport->port.membase + UCR1);
368 temp &= ~(UCR1_TXMPTYEN | UCR1_TRDYEN);
369 writel(temp, sport->port.membase + UCR1);
370
371 temp = readl(sport->port.membase + UCR4);
372 temp &= ~(UCR4_TCEN);
373 writel(temp, sport->port.membase + UCR4);
374
375 while (readl(sport->port.membase + URXD0) &
376 URXD_CHARRDY)
377 barrier();
378
379 temp = readl(sport->port.membase + UCR1);
380 temp |= UCR1_RRDYEN;
381 writel(temp, sport->port.membase + UCR1);
382
383 temp = readl(sport->port.membase + UCR4);
384 temp |= UCR4_DREN;
385 writel(temp, sport->port.membase + UCR4);
386 }
387 return;
388 }
389
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100390 temp = readl(sport->port.membase + UCR1);
391 writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392}
393
394/*
395 * interrupts disabled on entry
396 */
397static void imx_stop_rx(struct uart_port *port)
398{
399 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100400 unsigned long temp;
401
402 temp = readl(sport->port.membase + UCR2);
Sachin Kamat82313e62013-01-07 10:25:02 +0530403 writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404}
405
406/*
407 * Set the modem control timer to fire immediately.
408 */
409static void imx_enable_ms(struct uart_port *port)
410{
411 struct imx_port *sport = (struct imx_port *)port;
412
413 mod_timer(&sport->timer, jiffies);
414}
415
416static inline void imx_transmit_buffer(struct imx_port *sport)
417{
Alan Coxebd2c8f2009-09-19 13:13:28 -0700418 struct circ_buf *xmit = &sport->port.state->xmit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419
Volker Ernst4e4e6602010-10-13 11:03:57 +0200420 while (!uart_circ_empty(xmit) &&
Shawn Guofe6b5402011-06-25 02:04:33 +0800421 !(readl(sport->port.membase + uts_reg(sport))
422 & UTS_TXFULL)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 /* send xmit->buf[xmit->tail]
424 * out the port here */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100425 writel(xmit->buf[xmit->tail], sport->port.membase + URTX0);
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100426 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427 sport->port.icount.tx++;
Sascha Hauer8c0b2542007-02-05 16:10:16 -0800428 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429
Fabian Godehardt977757312009-06-11 14:37:19 +0100430 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
431 uart_write_wakeup(&sport->port);
432
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 if (uart_circ_empty(xmit))
Russell Kingb129a8c2005-08-31 10:12:14 +0100434 imx_stop_tx(&sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435}
436
437/*
438 * interrupts disabled on entry
439 */
Russell Kingb129a8c2005-08-31 10:12:14 +0100440static void imx_start_tx(struct uart_port *port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441{
442 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100443 unsigned long temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100445 if (USE_IRDA(sport)) {
446 /* half duplex in IrDA mode; have to disable receive mode */
447 temp = readl(sport->port.membase + UCR4);
448 temp &= ~(UCR4_DREN);
449 writel(temp, sport->port.membase + UCR4);
450
451 temp = readl(sport->port.membase + UCR1);
452 temp &= ~(UCR1_RRDYEN);
453 writel(temp, sport->port.membase + UCR1);
454 }
Alexander Steinf1f836e2013-05-14 17:06:07 +0200455 /* Clear any pending ORE flag before enabling interrupt */
456 temp = readl(sport->port.membase + USR2);
457 writel(temp | USR2_ORE, sport->port.membase + USR2);
458
459 temp = readl(sport->port.membase + UCR4);
460 temp |= UCR4_OREN;
461 writel(temp, sport->port.membase + UCR4);
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100462
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100463 temp = readl(sport->port.membase + UCR1);
464 writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100466 if (USE_IRDA(sport)) {
467 temp = readl(sport->port.membase + UCR1);
468 temp |= UCR1_TRDYEN;
469 writel(temp, sport->port.membase + UCR1);
470
471 temp = readl(sport->port.membase + UCR4);
472 temp |= UCR4_TCEN;
473 writel(temp, sport->port.membase + UCR4);
474 }
475
Shawn Guofe6b5402011-06-25 02:04:33 +0800476 if (readl(sport->port.membase + uts_reg(sport)) & UTS_TXEMPTY)
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100477 imx_transmit_buffer(sport);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478}
479
David Howells7d12e782006-10-05 14:55:46 +0100480static irqreturn_t imx_rtsint(int irq, void *dev_id)
Sascha Hauerceca6292005-10-12 19:58:08 +0100481{
Jeff Garzik15aafa22008-02-06 01:36:20 -0800482 struct imx_port *sport = dev_id;
Uwe Kleine-König5680e942011-04-11 10:59:09 +0200483 unsigned int val;
Sascha Hauerceca6292005-10-12 19:58:08 +0100484 unsigned long flags;
485
486 spin_lock_irqsave(&sport->port.lock, flags);
487
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100488 writel(USR1_RTSD, sport->port.membase + USR1);
Uwe Kleine-König5680e942011-04-11 10:59:09 +0200489 val = readl(sport->port.membase + USR1) & USR1_RTSS;
Sascha Hauerceca6292005-10-12 19:58:08 +0100490 uart_handle_cts_change(&sport->port, !!val);
Alan Coxbdc04e32009-09-19 13:13:31 -0700491 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
Sascha Hauerceca6292005-10-12 19:58:08 +0100492
493 spin_unlock_irqrestore(&sport->port.lock, flags);
494 return IRQ_HANDLED;
495}
496
David Howells7d12e782006-10-05 14:55:46 +0100497static irqreturn_t imx_txint(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498{
Jeff Garzik15aafa22008-02-06 01:36:20 -0800499 struct imx_port *sport = dev_id;
Alan Coxebd2c8f2009-09-19 13:13:28 -0700500 struct circ_buf *xmit = &sport->port.state->xmit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501 unsigned long flags;
502
Sachin Kamat82313e62013-01-07 10:25:02 +0530503 spin_lock_irqsave(&sport->port.lock, flags);
Sachin Kamat699cbd62013-01-07 10:25:04 +0530504 if (sport->port.x_char) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505 /* Send next char */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100506 writel(sport->port.x_char, sport->port.membase + URTX0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507 goto out;
508 }
509
510 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
Russell Kingb129a8c2005-08-31 10:12:14 +0100511 imx_stop_tx(&sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700512 goto out;
513 }
514
515 imx_transmit_buffer(sport);
516
517 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
518 uart_write_wakeup(&sport->port);
519
520out:
Sachin Kamat82313e62013-01-07 10:25:02 +0530521 spin_unlock_irqrestore(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522 return IRQ_HANDLED;
523}
524
David Howells7d12e782006-10-05 14:55:46 +0100525static irqreturn_t imx_rxint(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526{
527 struct imx_port *sport = dev_id;
Sachin Kamat82313e62013-01-07 10:25:02 +0530528 unsigned int rx, flg, ignored = 0;
Jiri Slaby92a19f92013-01-03 15:53:03 +0100529 struct tty_port *port = &sport->port.state->port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100530 unsigned long flags, temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531
Sachin Kamat82313e62013-01-07 10:25:02 +0530532 spin_lock_irqsave(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533
Sascha Hauer0d3c3932008-04-17 08:43:14 +0100534 while (readl(sport->port.membase + USR2) & USR2_RDR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 flg = TTY_NORMAL;
536 sport->port.icount.rx++;
537
Sascha Hauer0d3c3932008-04-17 08:43:14 +0100538 rx = readl(sport->port.membase + URXD0);
539
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100540 temp = readl(sport->port.membase + USR2);
Sascha Hauer864eeed2008-04-17 08:39:22 +0100541 if (temp & USR2_BRCD) {
Andy Green94d32f92010-02-01 13:28:54 +0100542 writel(USR2_BRCD, sport->port.membase + USR2);
Sascha Hauer864eeed2008-04-17 08:39:22 +0100543 if (uart_handle_break(&sport->port))
544 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700545 }
546
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100547 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx))
Sascha Hauer864eeed2008-04-17 08:39:22 +0100548 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549
Hui Wang019dc9e2011-08-24 17:41:47 +0800550 if (unlikely(rx & URXD_ERR)) {
551 if (rx & URXD_BRK)
552 sport->port.icount.brk++;
553 else if (rx & URXD_PRERR)
Sascha Hauer864eeed2008-04-17 08:39:22 +0100554 sport->port.icount.parity++;
555 else if (rx & URXD_FRMERR)
556 sport->port.icount.frame++;
557 if (rx & URXD_OVRRUN)
558 sport->port.icount.overrun++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559
Sascha Hauer864eeed2008-04-17 08:39:22 +0100560 if (rx & sport->port.ignore_status_mask) {
561 if (++ignored > 100)
562 goto out;
563 continue;
564 }
565
566 rx &= sport->port.read_status_mask;
567
Hui Wang019dc9e2011-08-24 17:41:47 +0800568 if (rx & URXD_BRK)
569 flg = TTY_BREAK;
570 else if (rx & URXD_PRERR)
Sascha Hauer864eeed2008-04-17 08:39:22 +0100571 flg = TTY_PARITY;
572 else if (rx & URXD_FRMERR)
573 flg = TTY_FRAME;
574 if (rx & URXD_OVRRUN)
575 flg = TTY_OVERRUN;
576
577#ifdef SUPPORT_SYSRQ
578 sport->port.sysrq = 0;
579#endif
580 }
581
Jiri Slaby92a19f92013-01-03 15:53:03 +0100582 tty_insert_flip_char(port, rx, flg);
Sascha Hauer864eeed2008-04-17 08:39:22 +0100583 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584
585out:
Sachin Kamat82313e62013-01-07 10:25:02 +0530586 spin_unlock_irqrestore(&sport->port.lock, flags);
Jiri Slaby2e124b42013-01-03 15:53:06 +0100587 tty_flip_buffer_push(port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700589}
590
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200591static irqreturn_t imx_int(int irq, void *dev_id)
592{
593 struct imx_port *sport = dev_id;
594 unsigned int sts;
Alexander Steinf1f836e2013-05-14 17:06:07 +0200595 unsigned int sts2;
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200596
597 sts = readl(sport->port.membase + USR1);
598
599 if (sts & USR1_RRDY)
600 imx_rxint(irq, dev_id);
601
602 if (sts & USR1_TRDY &&
603 readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN)
604 imx_txint(irq, dev_id);
605
Marc Kleine-Budde9fbe6042008-07-28 21:26:01 +0200606 if (sts & USR1_RTSD)
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200607 imx_rtsint(irq, dev_id);
608
Fabio Estevamdb1a9b52011-12-13 01:23:48 -0200609 if (sts & USR1_AWAKE)
610 writel(USR1_AWAKE, sport->port.membase + USR1);
611
Alexander Steinf1f836e2013-05-14 17:06:07 +0200612 sts2 = readl(sport->port.membase + USR2);
613 if (sts2 & USR2_ORE) {
614 dev_err(sport->port.dev, "Rx FIFO overrun\n");
615 sport->port.icount.overrun++;
616 writel(sts2 | USR2_ORE, sport->port.membase + USR2);
617 }
618
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200619 return IRQ_HANDLED;
620}
621
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622/*
623 * Return TIOCSER_TEMT when transmitter is not busy.
624 */
625static unsigned int imx_tx_empty(struct uart_port *port)
626{
627 struct imx_port *sport = (struct imx_port *)port;
628
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100629 return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630}
631
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100632/*
633 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
634 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635static unsigned int imx_get_mctrl(struct uart_port *port)
636{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100637 struct imx_port *sport = (struct imx_port *)port;
638 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100639
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100640 if (readl(sport->port.membase + USR1) & USR1_RTSS)
641 tmp |= TIOCM_CTS;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100642
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100643 if (readl(sport->port.membase + UCR2) & UCR2_CTS)
644 tmp |= TIOCM_RTS;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100645
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100646 return tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647}
648
649static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
650{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100651 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100652 unsigned long temp;
653
654 temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100655
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100656 if (mctrl & TIOCM_RTS)
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100657 temp |= UCR2_CTS;
658
659 writel(temp, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660}
661
662/*
663 * Interrupts always disabled.
664 */
665static void imx_break_ctl(struct uart_port *port, int break_state)
666{
667 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100668 unsigned long flags, temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700669
670 spin_lock_irqsave(&sport->port.lock, flags);
671
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100672 temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK;
673
Sachin Kamat82313e62013-01-07 10:25:02 +0530674 if (break_state != 0)
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100675 temp |= UCR1_SNDBRK;
676
677 writel(temp, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678
679 spin_unlock_irqrestore(&sport->port.lock, flags);
680}
681
682#define TXTL 2 /* reset default */
683#define RXTL 1 /* reset default */
684
Sascha Hauer587897f2005-04-29 22:46:40 +0100685static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
686{
687 unsigned int val;
Sascha Hauer587897f2005-04-29 22:46:40 +0100688
Dirk Behme7be06702012-08-31 10:02:47 +0200689 /* set receiver / transmitter trigger level */
690 val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE);
691 val |= TXTL << UFCR_TXTL_SHF | RXTL;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100692 writel(val, sport->port.membase + UFCR);
Sascha Hauer587897f2005-04-29 22:46:40 +0100693 return 0;
694}
695
Valentin Longchamp1c5250d2010-05-05 11:47:07 +0200696/* half the RX buffer size */
697#define CTSTL 16
698
Linus Torvalds1da177e2005-04-16 15:20:36 -0700699static int imx_startup(struct uart_port *port)
700{
701 struct imx_port *sport = (struct imx_port *)port;
702 int retval;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100703 unsigned long flags, temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704
Huang Shijie0c375502013-06-09 10:01:19 +0800705 if (!uart_console(port)) {
706 retval = clk_prepare_enable(sport->clk_per);
707 if (retval)
708 goto error_out1;
709 retval = clk_prepare_enable(sport->clk_ipg);
710 if (retval) {
711 clk_disable_unprepare(sport->clk_per);
712 goto error_out1;
713 }
714 }
Huang Shijie28eb4272013-06-04 09:59:33 +0800715
Sascha Hauer587897f2005-04-29 22:46:40 +0100716 imx_setup_ufcr(sport, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717
718 /* disable the DREN bit (Data Ready interrupt enable) before
719 * requesting IRQs
720 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100721 temp = readl(sport->port.membase + UCR4);
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100722
723 if (USE_IRDA(sport))
724 temp |= UCR4_IRSC;
725
Valentin Longchamp1c5250d2010-05-05 11:47:07 +0200726 /* set the trigger level for CTS */
Sachin Kamat82313e62013-01-07 10:25:02 +0530727 temp &= ~(UCR4_CTSTL_MASK << UCR4_CTSTL_SHF);
728 temp |= CTSTL << UCR4_CTSTL_SHF;
Valentin Longchamp1c5250d2010-05-05 11:47:07 +0200729
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100730 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100732 if (USE_IRDA(sport)) {
733 /* reset fifo's and state machines */
734 int i = 100;
735 temp = readl(sport->port.membase + UCR2);
736 temp &= ~UCR2_SRST;
737 writel(temp, sport->port.membase + UCR2);
738 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) &&
739 (--i > 0)) {
740 udelay(1);
741 }
742 }
743
Linus Torvalds1da177e2005-04-16 15:20:36 -0700744 /*
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200745 * Allocate the IRQ(s) i.MX1 has three interrupts whereas later
746 * chips only have one interrupt.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747 */
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200748 if (sport->txirq > 0) {
749 retval = request_irq(sport->rxirq, imx_rxint, 0,
750 DRIVER_NAME, sport);
751 if (retval)
752 goto error_out1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200754 retval = request_irq(sport->txirq, imx_txint, 0,
755 DRIVER_NAME, sport);
756 if (retval)
757 goto error_out2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100759 /* do not use RTS IRQ on IrDA */
760 if (!USE_IRDA(sport)) {
Shawn Guo1ee8f652012-06-14 10:58:54 +0800761 retval = request_irq(sport->rtsirq, imx_rtsint, 0,
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100762 DRIVER_NAME, sport);
763 if (retval)
764 goto error_out3;
765 }
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200766 } else {
767 retval = request_irq(sport->port.irq, imx_int, 0,
768 DRIVER_NAME, sport);
769 if (retval) {
770 free_irq(sport->port.irq, sport);
771 goto error_out1;
772 }
773 }
Sascha Hauerceca6292005-10-12 19:58:08 +0100774
Xinyu Chen9ec18822012-08-27 09:36:51 +0200775 spin_lock_irqsave(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776 /*
777 * Finally, clear and enable interrupts
778 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100779 writel(USR1_RTSD, sport->port.membase + USR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700780
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100781 temp = readl(sport->port.membase + UCR1);
Sascha Hauer789d5252008-04-17 08:44:47 +0100782 temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN;
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100783
784 if (USE_IRDA(sport)) {
785 temp |= UCR1_IREN;
786 temp &= ~(UCR1_RTSDEN);
787 }
788
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100789 writel(temp, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700790
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100791 temp = readl(sport->port.membase + UCR2);
792 temp |= (UCR2_RXEN | UCR2_TXEN);
Lucas Stachbff09b02013-05-30 15:47:04 +0200793 if (!sport->have_rtscts)
794 temp |= UCR2_IRTS;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100795 writel(temp, sport->port.membase + UCR2);
796
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100797 if (USE_IRDA(sport)) {
798 /* clear RX-FIFO */
799 int i = 64;
800 while ((--i > 0) &&
801 (readl(sport->port.membase + URXD0) & URXD_CHARRDY)) {
802 barrier();
803 }
804 }
805
Shawn Guofe6b5402011-06-25 02:04:33 +0800806 if (is_imx21_uart(sport)) {
Sascha Hauer37d6fb62009-05-27 18:23:48 +0200807 temp = readl(sport->port.membase + UCR3);
Shawn Guofe6b5402011-06-25 02:04:33 +0800808 temp |= IMX21_UCR3_RXDMUXSEL;
Sascha Hauer37d6fb62009-05-27 18:23:48 +0200809 writel(temp, sport->port.membase + UCR3);
810 }
Marc Kleine-Budde44118052008-07-28 12:10:34 +0200811
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100812 if (USE_IRDA(sport)) {
813 temp = readl(sport->port.membase + UCR4);
814 if (sport->irda_inv_rx)
815 temp |= UCR4_INVR;
816 else
817 temp &= ~(UCR4_INVR);
818 writel(temp | UCR4_DREN, sport->port.membase + UCR4);
819
820 temp = readl(sport->port.membase + UCR3);
821 if (sport->irda_inv_tx)
822 temp |= UCR3_INVT;
823 else
824 temp &= ~(UCR3_INVT);
825 writel(temp, sport->port.membase + UCR3);
826 }
827
Linus Torvalds1da177e2005-04-16 15:20:36 -0700828 /*
829 * Enable modem status interrupts
830 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831 imx_enable_ms(&sport->port);
Sachin Kamat82313e62013-01-07 10:25:02 +0530832 spin_unlock_irqrestore(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100834 if (USE_IRDA(sport)) {
835 struct imxuart_platform_data *pdata;
836 pdata = sport->port.dev->platform_data;
837 sport->irda_inv_rx = pdata->irda_inv_rx;
838 sport->irda_inv_tx = pdata->irda_inv_tx;
839 sport->trcv_delay = pdata->transceiver_delay;
840 if (pdata->irda_enable)
841 pdata->irda_enable(1);
842 }
843
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 return 0;
845
Sascha Hauerceca6292005-10-12 19:58:08 +0100846error_out3:
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200847 if (sport->txirq)
848 free_irq(sport->txirq, sport);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849error_out2:
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200850 if (sport->rxirq)
851 free_irq(sport->rxirq, sport);
Sascha Hauer86371d02005-10-10 10:17:42 +0100852error_out1:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700853 return retval;
854}
855
856static void imx_shutdown(struct uart_port *port)
857{
858 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100859 unsigned long temp;
Xinyu Chen9ec18822012-08-27 09:36:51 +0200860 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861
Xinyu Chen9ec18822012-08-27 09:36:51 +0200862 spin_lock_irqsave(&sport->port.lock, flags);
Fabian Godehardt2e146392009-06-11 14:38:38 +0100863 temp = readl(sport->port.membase + UCR2);
864 temp &= ~(UCR2_TXEN);
865 writel(temp, sport->port.membase + UCR2);
Xinyu Chen9ec18822012-08-27 09:36:51 +0200866 spin_unlock_irqrestore(&sport->port.lock, flags);
Fabian Godehardt2e146392009-06-11 14:38:38 +0100867
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100868 if (USE_IRDA(sport)) {
869 struct imxuart_platform_data *pdata;
870 pdata = sport->port.dev->platform_data;
871 if (pdata->irda_enable)
872 pdata->irda_enable(0);
873 }
874
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875 /*
876 * Stop our timer.
877 */
878 del_timer_sync(&sport->timer);
879
880 /*
881 * Free the interrupts
882 */
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200883 if (sport->txirq > 0) {
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100884 if (!USE_IRDA(sport))
885 free_irq(sport->rtsirq, sport);
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200886 free_irq(sport->txirq, sport);
887 free_irq(sport->rxirq, sport);
888 } else
889 free_irq(sport->port.irq, sport);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890
891 /*
892 * Disable all interrupts, port and break condition.
893 */
894
Xinyu Chen9ec18822012-08-27 09:36:51 +0200895 spin_lock_irqsave(&sport->port.lock, flags);
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100896 temp = readl(sport->port.membase + UCR1);
897 temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100898 if (USE_IRDA(sport))
899 temp &= ~(UCR1_IREN);
900
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100901 writel(temp, sport->port.membase + UCR1);
Xinyu Chen9ec18822012-08-27 09:36:51 +0200902 spin_unlock_irqrestore(&sport->port.lock, flags);
Huang Shijie28eb4272013-06-04 09:59:33 +0800903
904 clk_disable_unprepare(sport->clk_per);
905 clk_disable_unprepare(sport->clk_ipg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700906}
907
908static void
Alan Cox606d0992006-12-08 02:38:45 -0800909imx_set_termios(struct uart_port *port, struct ktermios *termios,
910 struct ktermios *old)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911{
912 struct imx_port *sport = (struct imx_port *)port;
913 unsigned long flags;
914 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
915 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
Oskar Schirmer534fca02009-06-11 14:52:23 +0100916 unsigned int div, ufcr;
917 unsigned long num, denom;
Oskar Schirmerd7f8d432009-06-11 14:55:22 +0100918 uint64_t tdiv64;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700919
920 /*
921 * If we don't support modem control lines, don't allow
922 * these to be set.
923 */
924 if (0) {
925 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
926 termios->c_cflag |= CLOCAL;
927 }
928
929 /*
930 * We only support CS7 and CS8.
931 */
932 while ((termios->c_cflag & CSIZE) != CS7 &&
933 (termios->c_cflag & CSIZE) != CS8) {
934 termios->c_cflag &= ~CSIZE;
935 termios->c_cflag |= old_csize;
936 old_csize = CS8;
937 }
938
939 if ((termios->c_cflag & CSIZE) == CS8)
940 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
941 else
942 ucr2 = UCR2_SRST | UCR2_IRTS;
943
944 if (termios->c_cflag & CRTSCTS) {
Sachin Kamat82313e62013-01-07 10:25:02 +0530945 if (sport->have_rtscts) {
Sascha Hauer5b802342006-05-04 14:07:42 +0100946 ucr2 &= ~UCR2_IRTS;
947 ucr2 |= UCR2_CTSC;
948 } else {
949 termios->c_cflag &= ~CRTSCTS;
950 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 }
952
953 if (termios->c_cflag & CSTOPB)
954 ucr2 |= UCR2_STPB;
955 if (termios->c_cflag & PARENB) {
956 ucr2 |= UCR2_PREN;
Matt Reimer3261e362006-01-13 20:51:44 +0000957 if (termios->c_cflag & PARODD)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958 ucr2 |= UCR2_PROE;
959 }
960
Eric Miao995234d2011-12-23 05:39:27 +0800961 del_timer_sync(&sport->timer);
962
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963 /*
964 * Ask the core to calculate the divisor for us.
965 */
Sascha Hauer036bb152008-07-05 10:02:44 +0200966 baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700967 quot = uart_get_divisor(port, baud);
968
969 spin_lock_irqsave(&sport->port.lock, flags);
970
971 sport->port.read_status_mask = 0;
972 if (termios->c_iflag & INPCK)
973 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
974 if (termios->c_iflag & (BRKINT | PARMRK))
975 sport->port.read_status_mask |= URXD_BRK;
976
977 /*
978 * Characters to ignore
979 */
980 sport->port.ignore_status_mask = 0;
981 if (termios->c_iflag & IGNPAR)
982 sport->port.ignore_status_mask |= URXD_PRERR;
983 if (termios->c_iflag & IGNBRK) {
984 sport->port.ignore_status_mask |= URXD_BRK;
985 /*
986 * If we're ignoring parity and break indicators,
987 * ignore overruns too (for real raw support).
988 */
989 if (termios->c_iflag & IGNPAR)
990 sport->port.ignore_status_mask |= URXD_OVRRUN;
991 }
992
Linus Torvalds1da177e2005-04-16 15:20:36 -0700993 /*
994 * Update the per-port timeout.
995 */
996 uart_update_timeout(port, termios->c_cflag, baud);
997
998 /*
999 * disable interrupts and drain transmitter
1000 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001001 old_ucr1 = readl(sport->port.membase + UCR1);
1002 writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN),
1003 sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004
Sachin Kamat82313e62013-01-07 10:25:02 +05301005 while (!(readl(sport->port.membase + USR2) & USR2_TXDC))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001006 barrier();
1007
1008 /* then, disable everything */
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001009 old_txrxen = readl(sport->port.membase + UCR2);
Sachin Kamat82313e62013-01-07 10:25:02 +05301010 writel(old_txrxen & ~(UCR2_TXEN | UCR2_RXEN),
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001011 sport->port.membase + UCR2);
1012 old_txrxen &= (UCR2_TXEN | UCR2_RXEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001013
Fabian Godehardtb6e49132009-06-11 14:53:18 +01001014 if (USE_IRDA(sport)) {
1015 /*
1016 * use maximum available submodule frequency to
1017 * avoid missing short pulses due to low sampling rate
1018 */
Sascha Hauer036bb152008-07-05 10:02:44 +02001019 div = 1;
Fabian Godehardtb6e49132009-06-11 14:53:18 +01001020 } else {
1021 div = sport->port.uartclk / (baud * 16);
1022 if (div > 7)
1023 div = 7;
1024 if (!div)
1025 div = 1;
1026 }
Sascha Hauer036bb152008-07-05 10:02:44 +02001027
Oskar Schirmer534fca02009-06-11 14:52:23 +01001028 rational_best_approximation(16 * div * baud, sport->port.uartclk,
1029 1 << 16, 1 << 16, &num, &denom);
Sascha Hauer036bb152008-07-05 10:02:44 +02001030
Alan Coxeab4f5a2010-06-01 22:52:52 +02001031 tdiv64 = sport->port.uartclk;
1032 tdiv64 *= num;
1033 do_div(tdiv64, denom * 16 * div);
1034 tty_termios_encode_baud_rate(termios,
Sascha Hauer1a2c4b32009-06-16 17:02:15 +01001035 (speed_t)tdiv64, (speed_t)tdiv64);
Oskar Schirmerd7f8d432009-06-11 14:55:22 +01001036
Oskar Schirmer534fca02009-06-11 14:52:23 +01001037 num -= 1;
1038 denom -= 1;
Sascha Hauer036bb152008-07-05 10:02:44 +02001039
1040 ufcr = readl(sport->port.membase + UFCR);
Fabian Godehardtb6e49132009-06-11 14:53:18 +01001041 ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div);
Huang Shijie20ff2fe2013-05-30 14:07:12 +08001042 if (sport->dte_mode)
1043 ufcr |= UFCR_DCEDTE;
Sascha Hauer036bb152008-07-05 10:02:44 +02001044 writel(ufcr, sport->port.membase + UFCR);
1045
Oskar Schirmer534fca02009-06-11 14:52:23 +01001046 writel(num, sport->port.membase + UBIR);
1047 writel(denom, sport->port.membase + UBMR);
1048
Shawn Guofe6b5402011-06-25 02:04:33 +08001049 if (is_imx21_uart(sport))
Sascha Hauer37d6fb62009-05-27 18:23:48 +02001050 writel(sport->port.uartclk / div / 1000,
Shawn Guofe6b5402011-06-25 02:04:33 +08001051 sport->port.membase + IMX21_ONEMS);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001053 writel(old_ucr1, sport->port.membase + UCR1);
1054
1055 /* set the parity, stop bits and data size */
1056 writel(ucr2 | old_txrxen, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001057
1058 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
1059 imx_enable_ms(&sport->port);
1060
1061 spin_unlock_irqrestore(&sport->port.lock, flags);
1062}
1063
1064static const char *imx_type(struct uart_port *port)
1065{
1066 struct imx_port *sport = (struct imx_port *)port;
1067
1068 return sport->port.type == PORT_IMX ? "IMX" : NULL;
1069}
1070
1071/*
1072 * Release the memory region(s) being used by 'port'.
1073 */
1074static void imx_release_port(struct uart_port *port)
1075{
Sascha Hauer3d454442008-04-17 08:47:32 +01001076 struct platform_device *pdev = to_platform_device(port->dev);
1077 struct resource *mmres;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001078
Sascha Hauer3d454442008-04-17 08:47:32 +01001079 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Joe Perches28f65c112011-06-09 09:13:32 -07001080 release_mem_region(mmres->start, resource_size(mmres));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001081}
1082
1083/*
1084 * Request the memory region(s) being used by 'port'.
1085 */
1086static int imx_request_port(struct uart_port *port)
1087{
Sascha Hauer3d454442008-04-17 08:47:32 +01001088 struct platform_device *pdev = to_platform_device(port->dev);
1089 struct resource *mmres;
1090 void *ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001091
Sascha Hauer3d454442008-04-17 08:47:32 +01001092 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1093 if (!mmres)
1094 return -ENODEV;
1095
Joe Perches28f65c112011-06-09 09:13:32 -07001096 ret = request_mem_region(mmres->start, resource_size(mmres), "imx-uart");
Sascha Hauer3d454442008-04-17 08:47:32 +01001097
1098 return ret ? 0 : -EBUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001099}
1100
1101/*
1102 * Configure/autoconfigure the port.
1103 */
1104static void imx_config_port(struct uart_port *port, int flags)
1105{
1106 struct imx_port *sport = (struct imx_port *)port;
1107
1108 if (flags & UART_CONFIG_TYPE &&
1109 imx_request_port(&sport->port) == 0)
1110 sport->port.type = PORT_IMX;
1111}
1112
1113/*
1114 * Verify the new serial_struct (for TIOCSSERIAL).
1115 * The only change we allow are to the flags and type, and
1116 * even then only between PORT_IMX and PORT_UNKNOWN
1117 */
1118static int
1119imx_verify_port(struct uart_port *port, struct serial_struct *ser)
1120{
1121 struct imx_port *sport = (struct imx_port *)port;
1122 int ret = 0;
1123
1124 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
1125 ret = -EINVAL;
1126 if (sport->port.irq != ser->irq)
1127 ret = -EINVAL;
1128 if (ser->io_type != UPIO_MEM)
1129 ret = -EINVAL;
1130 if (sport->port.uartclk / 16 != ser->baud_base)
1131 ret = -EINVAL;
1132 if ((void *)sport->port.mapbase != ser->iomem_base)
1133 ret = -EINVAL;
1134 if (sport->port.iobase != ser->port)
1135 ret = -EINVAL;
1136 if (ser->hub6 != 0)
1137 ret = -EINVAL;
1138 return ret;
1139}
1140
Saleem Abdulrasool01f56ab2011-12-22 09:57:53 +01001141#if defined(CONFIG_CONSOLE_POLL)
1142static int imx_poll_get_char(struct uart_port *port)
1143{
1144 struct imx_port_ucrs old_ucr;
1145 unsigned int status;
1146 unsigned char c;
1147
1148 /* save control registers */
1149 imx_port_ucrs_save(port, &old_ucr);
1150
1151 /* disable interrupts */
1152 writel(UCR1_UARTEN, port->membase + UCR1);
1153 writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI),
1154 port->membase + UCR2);
1155 writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN),
1156 port->membase + UCR3);
1157
1158 /* poll */
1159 do {
1160 status = readl(port->membase + USR2);
1161 } while (~status & USR2_RDR);
1162
1163 /* read */
1164 c = readl(port->membase + URXD0);
1165
1166 /* restore control registers */
1167 imx_port_ucrs_restore(port, &old_ucr);
1168
1169 return c;
1170}
1171
1172static void imx_poll_put_char(struct uart_port *port, unsigned char c)
1173{
1174 struct imx_port_ucrs old_ucr;
1175 unsigned int status;
1176
1177 /* save control registers */
1178 imx_port_ucrs_save(port, &old_ucr);
1179
1180 /* disable interrupts */
1181 writel(UCR1_UARTEN, port->membase + UCR1);
1182 writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI),
1183 port->membase + UCR2);
1184 writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN),
1185 port->membase + UCR3);
1186
1187 /* drain */
1188 do {
1189 status = readl(port->membase + USR1);
1190 } while (~status & USR1_TRDY);
1191
1192 /* write */
1193 writel(c, port->membase + URTX0);
1194
1195 /* flush */
1196 do {
1197 status = readl(port->membase + USR2);
1198 } while (~status & USR2_TXDC);
1199
1200 /* restore control registers */
1201 imx_port_ucrs_restore(port, &old_ucr);
1202}
1203#endif
1204
Linus Torvalds1da177e2005-04-16 15:20:36 -07001205static struct uart_ops imx_pops = {
1206 .tx_empty = imx_tx_empty,
1207 .set_mctrl = imx_set_mctrl,
1208 .get_mctrl = imx_get_mctrl,
1209 .stop_tx = imx_stop_tx,
1210 .start_tx = imx_start_tx,
1211 .stop_rx = imx_stop_rx,
1212 .enable_ms = imx_enable_ms,
1213 .break_ctl = imx_break_ctl,
1214 .startup = imx_startup,
1215 .shutdown = imx_shutdown,
1216 .set_termios = imx_set_termios,
1217 .type = imx_type,
1218 .release_port = imx_release_port,
1219 .request_port = imx_request_port,
1220 .config_port = imx_config_port,
1221 .verify_port = imx_verify_port,
Saleem Abdulrasool01f56ab2011-12-22 09:57:53 +01001222#if defined(CONFIG_CONSOLE_POLL)
1223 .poll_get_char = imx_poll_get_char,
1224 .poll_put_char = imx_poll_put_char,
1225#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001226};
1227
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001228static struct imx_port *imx_ports[UART_NR];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001229
1230#ifdef CONFIG_SERIAL_IMX_CONSOLE
Russell Kingd3587882006-03-20 20:00:09 +00001231static void imx_console_putchar(struct uart_port *port, int ch)
1232{
1233 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001234
Shawn Guofe6b5402011-06-25 02:04:33 +08001235 while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL)
Russell Kingd3587882006-03-20 20:00:09 +00001236 barrier();
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001237
1238 writel(ch, sport->port.membase + URTX0);
Russell Kingd3587882006-03-20 20:00:09 +00001239}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001240
1241/*
1242 * Interrupts are disabled on entering
1243 */
1244static void
1245imx_console_write(struct console *co, const char *s, unsigned int count)
1246{
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001247 struct imx_port *sport = imx_ports[co->index];
Dirk Behme0ad5a812011-12-22 09:57:52 +01001248 struct imx_port_ucrs old_ucr;
1249 unsigned int ucr1;
Shawn Guof30e8262013-02-18 13:15:36 +08001250 unsigned long flags = 0;
Thomas Gleixner677fe552013-02-14 21:01:06 +01001251 int locked = 1;
Xinyu Chen9ec18822012-08-27 09:36:51 +02001252
Thomas Gleixner677fe552013-02-14 21:01:06 +01001253 if (sport->port.sysrq)
1254 locked = 0;
1255 else if (oops_in_progress)
1256 locked = spin_trylock_irqsave(&sport->port.lock, flags);
1257 else
1258 spin_lock_irqsave(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259
1260 /*
Dirk Behme0ad5a812011-12-22 09:57:52 +01001261 * First, save UCR1/2/3 and then disable interrupts
Linus Torvalds1da177e2005-04-16 15:20:36 -07001262 */
Dirk Behme0ad5a812011-12-22 09:57:52 +01001263 imx_port_ucrs_save(&sport->port, &old_ucr);
1264 ucr1 = old_ucr.ucr1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001265
Shawn Guofe6b5402011-06-25 02:04:33 +08001266 if (is_imx1_uart(sport))
1267 ucr1 |= IMX1_UCR1_UARTCLKEN;
Sascha Hauer37d6fb62009-05-27 18:23:48 +02001268 ucr1 |= UCR1_UARTEN;
1269 ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
1270
1271 writel(ucr1, sport->port.membase + UCR1);
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001272
Dirk Behme0ad5a812011-12-22 09:57:52 +01001273 writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001274
Russell Kingd3587882006-03-20 20:00:09 +00001275 uart_console_write(&sport->port, s, count, imx_console_putchar);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001276
1277 /*
1278 * Finally, wait for transmitter to become empty
Dirk Behme0ad5a812011-12-22 09:57:52 +01001279 * and restore UCR1/2/3
Linus Torvalds1da177e2005-04-16 15:20:36 -07001280 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001281 while (!(readl(sport->port.membase + USR2) & USR2_TXDC));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001282
Dirk Behme0ad5a812011-12-22 09:57:52 +01001283 imx_port_ucrs_restore(&sport->port, &old_ucr);
Xinyu Chen9ec18822012-08-27 09:36:51 +02001284
Thomas Gleixner677fe552013-02-14 21:01:06 +01001285 if (locked)
1286 spin_unlock_irqrestore(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001287}
1288
1289/*
1290 * If the port was already initialised (eg, by a boot loader),
1291 * try to determine the current setup.
1292 */
1293static void __init
1294imx_console_get_options(struct imx_port *sport, int *baud,
1295 int *parity, int *bits)
1296{
Sascha Hauer587897f2005-04-29 22:46:40 +01001297
Roel Kluin2e2eb502009-12-09 12:31:36 -08001298 if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001299 /* ok, the port was enabled */
Sachin Kamat82313e62013-01-07 10:25:02 +05301300 unsigned int ucr2, ubir, ubmr, uartclk;
Sascha Hauer587897f2005-04-29 22:46:40 +01001301 unsigned int baud_raw;
1302 unsigned int ucfr_rfdiv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001303
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001304 ucr2 = readl(sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001305
1306 *parity = 'n';
1307 if (ucr2 & UCR2_PREN) {
1308 if (ucr2 & UCR2_PROE)
1309 *parity = 'o';
1310 else
1311 *parity = 'e';
1312 }
1313
1314 if (ucr2 & UCR2_WS)
1315 *bits = 8;
1316 else
1317 *bits = 7;
1318
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001319 ubir = readl(sport->port.membase + UBIR) & 0xffff;
1320 ubmr = readl(sport->port.membase + UBMR) & 0xffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001321
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001322 ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7;
Sascha Hauer587897f2005-04-29 22:46:40 +01001323 if (ucfr_rfdiv == 6)
1324 ucfr_rfdiv = 7;
1325 else
1326 ucfr_rfdiv = 6 - ucfr_rfdiv;
1327
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001328 uartclk = clk_get_rate(sport->clk_per);
Sascha Hauer587897f2005-04-29 22:46:40 +01001329 uartclk /= ucfr_rfdiv;
1330
1331 { /*
1332 * The next code provides exact computation of
1333 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
1334 * without need of float support or long long division,
1335 * which would be required to prevent 32bit arithmetic overflow
1336 */
1337 unsigned int mul = ubir + 1;
1338 unsigned int div = 16 * (ubmr + 1);
1339 unsigned int rem = uartclk % div;
1340
1341 baud_raw = (uartclk / div) * mul;
1342 baud_raw += (rem * mul + div / 2) / div;
1343 *baud = (baud_raw + 50) / 100 * 100;
1344 }
1345
Sachin Kamat82313e62013-01-07 10:25:02 +05301346 if (*baud != baud_raw)
Sachin Kamat50bbdba2013-01-07 10:25:05 +05301347 pr_info("Console IMX rounded baud rate from %d to %d\n",
Sascha Hauer587897f2005-04-29 22:46:40 +01001348 baud_raw, *baud);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001349 }
1350}
1351
1352static int __init
1353imx_console_setup(struct console *co, char *options)
1354{
1355 struct imx_port *sport;
1356 int baud = 9600;
1357 int bits = 8;
1358 int parity = 'n';
1359 int flow = 'n';
1360
1361 /*
1362 * Check whether an invalid uart number has been specified, and
1363 * if so, search for the first available port that does have
1364 * console support.
1365 */
1366 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
1367 co->index = 0;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001368 sport = imx_ports[co->index];
Sachin Kamat82313e62013-01-07 10:25:02 +05301369 if (sport == NULL)
Eric Lammertse76afc42009-05-19 20:53:20 -04001370 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001371
1372 if (options)
1373 uart_parse_options(options, &baud, &parity, &bits, &flow);
1374 else
1375 imx_console_get_options(sport, &baud, &parity, &bits);
1376
Sascha Hauer587897f2005-04-29 22:46:40 +01001377 imx_setup_ufcr(sport, 0);
1378
Linus Torvalds1da177e2005-04-16 15:20:36 -07001379 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
1380}
1381
Vincent Sanders9f4426d2005-10-01 22:56:34 +01001382static struct uart_driver imx_reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001383static struct console imx_console = {
Sascha Hauere3d13ff2008-07-05 10:02:48 +02001384 .name = DEV_NAME,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001385 .write = imx_console_write,
1386 .device = uart_console_device,
1387 .setup = imx_console_setup,
1388 .flags = CON_PRINTBUFFER,
1389 .index = -1,
1390 .data = &imx_reg,
1391};
1392
Linus Torvalds1da177e2005-04-16 15:20:36 -07001393#define IMX_CONSOLE &imx_console
1394#else
1395#define IMX_CONSOLE NULL
1396#endif
1397
1398static struct uart_driver imx_reg = {
1399 .owner = THIS_MODULE,
1400 .driver_name = DRIVER_NAME,
Sascha Hauere3d13ff2008-07-05 10:02:48 +02001401 .dev_name = DEV_NAME,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001402 .major = SERIAL_IMX_MAJOR,
1403 .minor = MINOR_START,
1404 .nr = ARRAY_SIZE(imx_ports),
1405 .cons = IMX_CONSOLE,
1406};
1407
Russell King3ae5eae2005-11-09 22:32:44 +00001408static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001409{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001410 struct imx_port *sport = platform_get_drvdata(dev);
Fabio Estevamdb1a9b52011-12-13 01:23:48 -02001411 unsigned int val;
1412
1413 /* enable wakeup from i.MX UART */
1414 val = readl(sport->port.membase + UCR3);
1415 val |= UCR3_AWAKEN;
1416 writel(val, sport->port.membase + UCR3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001417
Richard Zhao034dc4d2012-09-18 16:14:59 +08001418 uart_suspend_port(&imx_reg, &sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001419
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001420 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421}
1422
Russell King3ae5eae2005-11-09 22:32:44 +00001423static int serial_imx_resume(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001424{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001425 struct imx_port *sport = platform_get_drvdata(dev);
Fabio Estevamdb1a9b52011-12-13 01:23:48 -02001426 unsigned int val;
1427
1428 /* disable wakeup from i.MX UART */
1429 val = readl(sport->port.membase + UCR3);
1430 val &= ~UCR3_AWAKEN;
1431 writel(val, sport->port.membase + UCR3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001432
Richard Zhao034dc4d2012-09-18 16:14:59 +08001433 uart_resume_port(&imx_reg, &sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001434
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001435 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001436}
1437
Shawn Guo22698aa2011-06-25 02:04:34 +08001438#ifdef CONFIG_OF
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001439/*
1440 * This function returns 1 iff pdev isn't a device instatiated by dt, 0 iff it
1441 * could successfully get all information from dt or a negative errno.
1442 */
Shawn Guo22698aa2011-06-25 02:04:34 +08001443static int serial_imx_probe_dt(struct imx_port *sport,
1444 struct platform_device *pdev)
1445{
1446 struct device_node *np = pdev->dev.of_node;
1447 const struct of_device_id *of_id =
1448 of_match_device(imx_uart_dt_ids, &pdev->dev);
Shawn Guoff059672011-09-22 14:48:13 +08001449 int ret;
Shawn Guo22698aa2011-06-25 02:04:34 +08001450
1451 if (!np)
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001452 /* no device tree device */
1453 return 1;
Shawn Guo22698aa2011-06-25 02:04:34 +08001454
Shawn Guoff059672011-09-22 14:48:13 +08001455 ret = of_alias_get_id(np, "serial");
1456 if (ret < 0) {
1457 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
Uwe Kleine-Königa197a192011-12-14 21:26:51 +01001458 return ret;
Shawn Guoff059672011-09-22 14:48:13 +08001459 }
1460 sport->port.line = ret;
Shawn Guo22698aa2011-06-25 02:04:34 +08001461
1462 if (of_get_property(np, "fsl,uart-has-rtscts", NULL))
1463 sport->have_rtscts = 1;
1464
1465 if (of_get_property(np, "fsl,irda-mode", NULL))
1466 sport->use_irda = 1;
1467
Huang Shijie20ff2fe2013-05-30 14:07:12 +08001468 if (of_get_property(np, "fsl,dte-mode", NULL))
1469 sport->dte_mode = 1;
1470
Shawn Guo22698aa2011-06-25 02:04:34 +08001471 sport->devdata = of_id->data;
1472
1473 return 0;
1474}
1475#else
1476static inline int serial_imx_probe_dt(struct imx_port *sport,
1477 struct platform_device *pdev)
1478{
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001479 return 1;
Shawn Guo22698aa2011-06-25 02:04:34 +08001480}
1481#endif
1482
1483static void serial_imx_probe_pdata(struct imx_port *sport,
1484 struct platform_device *pdev)
1485{
1486 struct imxuart_platform_data *pdata = pdev->dev.platform_data;
1487
1488 sport->port.line = pdev->id;
1489 sport->devdata = (struct imx_uart_data *) pdev->id_entry->driver_data;
1490
1491 if (!pdata)
1492 return;
1493
1494 if (pdata->flags & IMXUART_HAVE_RTSCTS)
1495 sport->have_rtscts = 1;
1496
1497 if (pdata->flags & IMXUART_IRDA)
1498 sport->use_irda = 1;
1499}
1500
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001501static int serial_imx_probe(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001502{
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001503 struct imx_port *sport;
Sascha Hauer5b802342006-05-04 14:07:42 +01001504 struct imxuart_platform_data *pdata;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001505 void __iomem *base;
1506 int ret = 0;
1507 struct resource *res;
Shawn Guofed78ce2012-05-06 20:21:05 +08001508 struct pinctrl *pinctrl;
Sascha Hauer5b802342006-05-04 14:07:42 +01001509
Sachin Kamat42d34192013-01-07 10:25:06 +05301510 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001511 if (!sport)
1512 return -ENOMEM;
1513
Shawn Guo22698aa2011-06-25 02:04:34 +08001514 ret = serial_imx_probe_dt(sport, pdev);
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001515 if (ret > 0)
Shawn Guo22698aa2011-06-25 02:04:34 +08001516 serial_imx_probe_pdata(sport, pdev);
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001517 else if (ret < 0)
Sachin Kamat42d34192013-01-07 10:25:06 +05301518 return ret;
Shawn Guo22698aa2011-06-25 02:04:34 +08001519
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001520 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Sachin Kamat42d34192013-01-07 10:25:06 +05301521 if (!res)
1522 return -ENODEV;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001523
Sachin Kamat42d34192013-01-07 10:25:06 +05301524 base = devm_ioremap(&pdev->dev, res->start, PAGE_SIZE);
1525 if (!base)
1526 return -ENOMEM;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001527
1528 sport->port.dev = &pdev->dev;
1529 sport->port.mapbase = res->start;
1530 sport->port.membase = base;
1531 sport->port.type = PORT_IMX,
1532 sport->port.iotype = UPIO_MEM;
1533 sport->port.irq = platform_get_irq(pdev, 0);
1534 sport->rxirq = platform_get_irq(pdev, 0);
1535 sport->txirq = platform_get_irq(pdev, 1);
1536 sport->rtsirq = platform_get_irq(pdev, 2);
1537 sport->port.fifosize = 32;
1538 sport->port.ops = &imx_pops;
1539 sport->port.flags = UPF_BOOT_AUTOCONF;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001540 init_timer(&sport->timer);
1541 sport->timer.function = imx_timeout;
1542 sport->timer.data = (unsigned long)sport;
Sascha Hauer38a41fd2008-07-05 10:02:46 +02001543
Shawn Guofed78ce2012-05-06 20:21:05 +08001544 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1545 if (IS_ERR(pinctrl)) {
1546 ret = PTR_ERR(pinctrl);
Uwe Kleine-König833462e2012-08-20 09:57:04 +02001547 dev_err(&pdev->dev, "failed to get default pinctrl: %d\n", ret);
Sachin Kamat42d34192013-01-07 10:25:06 +05301548 return ret;
Shawn Guofed78ce2012-05-06 20:21:05 +08001549 }
1550
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001551 sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1552 if (IS_ERR(sport->clk_ipg)) {
1553 ret = PTR_ERR(sport->clk_ipg);
Uwe Kleine-König833462e2012-08-20 09:57:04 +02001554 dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
Sachin Kamat42d34192013-01-07 10:25:06 +05301555 return ret;
Sascha Hauer38a41fd2008-07-05 10:02:46 +02001556 }
Sascha Hauer38a41fd2008-07-05 10:02:46 +02001557
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001558 sport->clk_per = devm_clk_get(&pdev->dev, "per");
1559 if (IS_ERR(sport->clk_per)) {
1560 ret = PTR_ERR(sport->clk_per);
Uwe Kleine-König833462e2012-08-20 09:57:04 +02001561 dev_err(&pdev->dev, "failed to get per clk: %d\n", ret);
Sachin Kamat42d34192013-01-07 10:25:06 +05301562 return ret;
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001563 }
1564
1565 clk_prepare_enable(sport->clk_per);
1566 clk_prepare_enable(sport->clk_ipg);
1567
1568 sport->port.uartclk = clk_get_rate(sport->clk_per);
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001569
Shawn Guo22698aa2011-06-25 02:04:34 +08001570 imx_ports[sport->port.line] = sport;
Sascha Hauer5b802342006-05-04 14:07:42 +01001571
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001572 pdata = pdev->dev.platform_data;
Baruch Siachbbcd18d2009-12-21 16:26:46 -08001573 if (pdata && pdata->init) {
Darius Augulisc45e7d72008-09-02 10:19:29 +02001574 ret = pdata->init(pdev);
1575 if (ret)
1576 goto clkput;
1577 }
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001578
Daniel Glöckner9f322ad2009-06-11 14:39:21 +01001579 ret = uart_add_one_port(&imx_reg, &sport->port);
1580 if (ret)
1581 goto deinit;
Richard Zhao0a86a862012-09-18 16:14:58 +08001582 platform_set_drvdata(pdev, sport);
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001583
Huang Shijie0c375502013-06-09 10:01:19 +08001584 if (!uart_console(&sport->port)) {
1585 clk_disable_unprepare(sport->clk_per);
1586 clk_disable_unprepare(sport->clk_ipg);
1587 }
Huang Shijie28eb4272013-06-04 09:59:33 +08001588
Linus Torvalds1da177e2005-04-16 15:20:36 -07001589 return 0;
Daniel Glöckner9f322ad2009-06-11 14:39:21 +01001590deinit:
Baruch Siachbbcd18d2009-12-21 16:26:46 -08001591 if (pdata && pdata->exit)
Daniel Glöckner9f322ad2009-06-11 14:39:21 +01001592 pdata->exit(pdev);
Darius Augulisc45e7d72008-09-02 10:19:29 +02001593clkput:
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001594 clk_disable_unprepare(sport->clk_per);
1595 clk_disable_unprepare(sport->clk_ipg);
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001596 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001597}
1598
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001599static int serial_imx_remove(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001600{
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001601 struct imxuart_platform_data *pdata;
1602 struct imx_port *sport = platform_get_drvdata(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001603
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001604 pdata = pdev->dev.platform_data;
1605
1606 platform_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001607
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001608 uart_remove_one_port(&imx_reg, &sport->port);
1609
Baruch Siachbbcd18d2009-12-21 16:26:46 -08001610 if (pdata && pdata->exit)
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001611 pdata->exit(pdev);
1612
Linus Torvalds1da177e2005-04-16 15:20:36 -07001613 return 0;
1614}
1615
Russell King3ae5eae2005-11-09 22:32:44 +00001616static struct platform_driver serial_imx_driver = {
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001617 .probe = serial_imx_probe,
1618 .remove = serial_imx_remove,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001619
1620 .suspend = serial_imx_suspend,
1621 .resume = serial_imx_resume,
Shawn Guofe6b5402011-06-25 02:04:33 +08001622 .id_table = imx_uart_devtype,
Russell King3ae5eae2005-11-09 22:32:44 +00001623 .driver = {
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001624 .name = "imx-uart",
Kay Sieverse169c132008-04-15 14:34:35 -07001625 .owner = THIS_MODULE,
Shawn Guo22698aa2011-06-25 02:04:34 +08001626 .of_match_table = imx_uart_dt_ids,
Russell King3ae5eae2005-11-09 22:32:44 +00001627 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001628};
1629
1630static int __init imx_serial_init(void)
1631{
1632 int ret;
1633
Sachin Kamat50bbdba2013-01-07 10:25:05 +05301634 pr_info("Serial: IMX driver\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001635
Linus Torvalds1da177e2005-04-16 15:20:36 -07001636 ret = uart_register_driver(&imx_reg);
1637 if (ret)
1638 return ret;
1639
Russell King3ae5eae2005-11-09 22:32:44 +00001640 ret = platform_driver_register(&serial_imx_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001641 if (ret != 0)
1642 uart_unregister_driver(&imx_reg);
1643
Uwe Kleine-Königf2278242011-11-22 14:22:55 +01001644 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001645}
1646
1647static void __exit imx_serial_exit(void)
1648{
Russell Kingc889b892005-11-21 17:05:21 +00001649 platform_driver_unregister(&serial_imx_driver);
Sascha Hauer4b300c32007-07-17 13:35:46 +01001650 uart_unregister_driver(&imx_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001651}
1652
1653module_init(imx_serial_init);
1654module_exit(imx_serial_exit);
1655
1656MODULE_AUTHOR("Sascha Hauer");
1657MODULE_DESCRIPTION("IMX generic serial port driver");
1658MODULE_LICENSE("GPL");
Kay Sieverse169c132008-04-15 14:34:35 -07001659MODULE_ALIAS("platform:imx-uart");