Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2005-2011 Atheros Communications Inc. |
| 3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. |
| 4 | * |
| 5 | * Permission to use, copy, modify, and/or distribute this software for any |
| 6 | * purpose with or without fee is hereby granted, provided that the above |
| 7 | * copyright notice and this permission notice appear in all copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 16 | */ |
| 17 | |
| 18 | #ifndef _CORE_H_ |
| 19 | #define _CORE_H_ |
| 20 | |
| 21 | #include <linux/completion.h> |
| 22 | #include <linux/if_ether.h> |
| 23 | #include <linux/types.h> |
| 24 | #include <linux/pci.h> |
| 25 | |
Michal Kazior | edb8236 | 2013-07-05 16:15:14 +0300 | [diff] [blame] | 26 | #include "htt.h" |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 27 | #include "htc.h" |
| 28 | #include "hw.h" |
| 29 | #include "targaddrs.h" |
| 30 | #include "wmi.h" |
| 31 | #include "../ath.h" |
| 32 | #include "../regd.h" |
| 33 | |
| 34 | #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) |
| 35 | #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) |
| 36 | #define WO(_f) ((_f##_OFFSET) >> 2) |
| 37 | |
| 38 | #define ATH10K_SCAN_ID 0 |
| 39 | #define WMI_READY_TIMEOUT (5 * HZ) |
| 40 | #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) |
Michal Kazior | 2e1dea4 | 2013-07-31 10:32:40 +0200 | [diff] [blame] | 41 | #define ATH10K_NUM_CHANS 38 |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 42 | |
| 43 | /* Antenna noise floor */ |
| 44 | #define ATH10K_DEFAULT_NOISE_FLOOR -95 |
| 45 | |
| 46 | struct ath10k; |
| 47 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 48 | struct ath10k_skb_cb { |
| 49 | dma_addr_t paddr; |
| 50 | bool is_mapped; |
| 51 | bool is_aborted; |
| 52 | |
| 53 | struct { |
| 54 | u8 vdev_id; |
| 55 | u16 msdu_id; |
| 56 | u8 tid; |
| 57 | bool is_offchan; |
| 58 | bool is_conf; |
| 59 | bool discard; |
| 60 | bool no_ack; |
| 61 | u8 refcount; |
| 62 | struct sk_buff *txfrag; |
| 63 | struct sk_buff *msdu; |
| 64 | } __packed htt; |
| 65 | |
| 66 | /* 4 bytes left on 64bit arch */ |
| 67 | } __packed; |
| 68 | |
| 69 | static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) |
| 70 | { |
| 71 | BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > |
| 72 | IEEE80211_TX_INFO_DRIVER_DATA_SIZE); |
| 73 | return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; |
| 74 | } |
| 75 | |
| 76 | static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb) |
| 77 | { |
| 78 | if (ATH10K_SKB_CB(skb)->is_mapped) |
| 79 | return -EINVAL; |
| 80 | |
| 81 | ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len, |
| 82 | DMA_TO_DEVICE); |
| 83 | |
| 84 | if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr))) |
| 85 | return -EIO; |
| 86 | |
| 87 | ATH10K_SKB_CB(skb)->is_mapped = true; |
| 88 | return 0; |
| 89 | } |
| 90 | |
| 91 | static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb) |
| 92 | { |
| 93 | if (!ATH10K_SKB_CB(skb)->is_mapped) |
| 94 | return -EINVAL; |
| 95 | |
| 96 | dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len, |
| 97 | DMA_TO_DEVICE); |
| 98 | ATH10K_SKB_CB(skb)->is_mapped = false; |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | static inline u32 host_interest_item_address(u32 item_offset) |
| 103 | { |
| 104 | return QCA988X_HOST_INTEREST_ADDRESS + item_offset; |
| 105 | } |
| 106 | |
| 107 | struct ath10k_bmi { |
| 108 | bool done_sent; |
| 109 | }; |
| 110 | |
| 111 | struct ath10k_wmi { |
| 112 | enum ath10k_htc_ep_id eid; |
| 113 | struct completion service_ready; |
| 114 | struct completion unified_ready; |
| 115 | atomic_t pending_tx_count; |
| 116 | wait_queue_head_t wq; |
| 117 | |
| 118 | struct sk_buff_head wmi_event_list; |
| 119 | struct work_struct wmi_event_work; |
| 120 | }; |
| 121 | |
| 122 | struct ath10k_peer_stat { |
| 123 | u8 peer_macaddr[ETH_ALEN]; |
| 124 | u32 peer_rssi; |
| 125 | u32 peer_tx_rate; |
| 126 | }; |
| 127 | |
| 128 | struct ath10k_target_stats { |
| 129 | /* PDEV stats */ |
| 130 | s32 ch_noise_floor; |
| 131 | u32 tx_frame_count; |
| 132 | u32 rx_frame_count; |
| 133 | u32 rx_clear_count; |
| 134 | u32 cycle_count; |
| 135 | u32 phy_err_count; |
| 136 | u32 chan_tx_power; |
| 137 | |
| 138 | /* PDEV TX stats */ |
| 139 | s32 comp_queued; |
| 140 | s32 comp_delivered; |
| 141 | s32 msdu_enqued; |
| 142 | s32 mpdu_enqued; |
| 143 | s32 wmm_drop; |
| 144 | s32 local_enqued; |
| 145 | s32 local_freed; |
| 146 | s32 hw_queued; |
| 147 | s32 hw_reaped; |
| 148 | s32 underrun; |
| 149 | s32 tx_abort; |
| 150 | s32 mpdus_requed; |
| 151 | u32 tx_ko; |
| 152 | u32 data_rc; |
| 153 | u32 self_triggers; |
| 154 | u32 sw_retry_failure; |
| 155 | u32 illgl_rate_phy_err; |
| 156 | u32 pdev_cont_xretry; |
| 157 | u32 pdev_tx_timeout; |
| 158 | u32 pdev_resets; |
| 159 | u32 phy_underrun; |
| 160 | u32 txop_ovf; |
| 161 | |
| 162 | /* PDEV RX stats */ |
| 163 | s32 mid_ppdu_route_change; |
| 164 | s32 status_rcvd; |
| 165 | s32 r0_frags; |
| 166 | s32 r1_frags; |
| 167 | s32 r2_frags; |
| 168 | s32 r3_frags; |
| 169 | s32 htt_msdus; |
| 170 | s32 htt_mpdus; |
| 171 | s32 loc_msdus; |
| 172 | s32 loc_mpdus; |
| 173 | s32 oversize_amsdu; |
| 174 | s32 phy_errs; |
| 175 | s32 phy_err_drop; |
| 176 | s32 mpdu_errs; |
| 177 | |
| 178 | /* VDEV STATS */ |
| 179 | |
| 180 | /* PEER STATS */ |
| 181 | u8 peers; |
| 182 | struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS]; |
| 183 | |
| 184 | /* TODO: Beacon filter stats */ |
| 185 | |
| 186 | }; |
| 187 | |
| 188 | #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ |
| 189 | |
| 190 | struct ath10k_peer { |
| 191 | struct list_head list; |
| 192 | int vdev_id; |
| 193 | u8 addr[ETH_ALEN]; |
| 194 | DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); |
| 195 | struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; |
| 196 | }; |
| 197 | |
| 198 | #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) |
| 199 | |
| 200 | struct ath10k_vif { |
| 201 | u32 vdev_id; |
| 202 | enum wmi_vdev_type vdev_type; |
| 203 | enum wmi_vdev_subtype vdev_subtype; |
| 204 | u32 beacon_interval; |
| 205 | u32 dtim_period; |
| 206 | |
| 207 | struct ath10k *ar; |
| 208 | struct ieee80211_vif *vif; |
| 209 | |
| 210 | struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; |
| 211 | u8 def_wep_key_index; |
| 212 | |
| 213 | u16 tx_seq_no; |
| 214 | |
| 215 | union { |
| 216 | struct { |
| 217 | u8 bssid[ETH_ALEN]; |
| 218 | u32 uapsd; |
| 219 | } sta; |
| 220 | struct { |
| 221 | /* 127 stations; wmi limit */ |
| 222 | u8 tim_bitmap[16]; |
| 223 | u8 tim_len; |
| 224 | u32 ssid_len; |
| 225 | u8 ssid[IEEE80211_MAX_SSID_LEN]; |
| 226 | bool hidden_ssid; |
| 227 | /* P2P_IE with NoA attribute for P2P_GO case */ |
| 228 | u32 noa_len; |
| 229 | u8 *noa_data; |
| 230 | } ap; |
| 231 | struct { |
| 232 | u8 bssid[ETH_ALEN]; |
| 233 | } ibss; |
| 234 | } u; |
| 235 | }; |
| 236 | |
| 237 | struct ath10k_vif_iter { |
| 238 | u32 vdev_id; |
| 239 | struct ath10k_vif *arvif; |
| 240 | }; |
| 241 | |
| 242 | struct ath10k_debug { |
| 243 | struct dentry *debugfs_phy; |
| 244 | |
| 245 | struct ath10k_target_stats target_stats; |
| 246 | u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE]; |
| 247 | |
| 248 | struct completion event_stats_compl; |
| 249 | }; |
| 250 | |
Michal Kazior | f7843d7 | 2013-07-16 09:38:52 +0200 | [diff] [blame] | 251 | enum ath10k_state { |
| 252 | ATH10K_STATE_OFF = 0, |
| 253 | ATH10K_STATE_ON, |
Michal Kazior | affd321 | 2013-07-16 09:54:35 +0200 | [diff] [blame] | 254 | |
| 255 | /* When doing firmware recovery the device is first powered down. |
| 256 | * mac80211 is supposed to call in to start() hook later on. It is |
| 257 | * however possible that driver unloading and firmware crash overlap. |
| 258 | * mac80211 can wait on conf_mutex in stop() while the device is |
| 259 | * stopped in ath10k_core_restart() work holding conf_mutex. The state |
| 260 | * RESTARTED means that the device is up and mac80211 has started hw |
| 261 | * reconfiguration. Once mac80211 is done with the reconfiguration we |
| 262 | * set the state to STATE_ON in restart_complete(). */ |
| 263 | ATH10K_STATE_RESTARTING, |
| 264 | ATH10K_STATE_RESTARTED, |
| 265 | |
| 266 | /* The device has crashed while restarting hw. This state is like ON |
| 267 | * but commands are blocked in HTC and -ECOMM response is given. This |
| 268 | * prevents completion timeouts and makes the driver more responsive to |
| 269 | * userspace commands. This is also prevents recursive recovery. */ |
| 270 | ATH10K_STATE_WEDGED, |
Michal Kazior | f7843d7 | 2013-07-16 09:38:52 +0200 | [diff] [blame] | 271 | }; |
| 272 | |
Michal Kazior | 0d9b043 | 2013-08-09 10:13:33 +0200 | [diff] [blame^] | 273 | enum ath10k_fw_features { |
| 274 | /* wmi_mgmt_rx_hdr contains extra RSSI information */ |
| 275 | ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, |
| 276 | |
| 277 | /* keep last */ |
| 278 | ATH10K_FW_FEATURE_COUNT, |
| 279 | }; |
| 280 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 281 | struct ath10k { |
| 282 | struct ath_common ath_common; |
| 283 | struct ieee80211_hw *hw; |
| 284 | struct device *dev; |
| 285 | u8 mac_addr[ETH_ALEN]; |
| 286 | |
| 287 | u32 target_version; |
| 288 | u8 fw_version_major; |
| 289 | u32 fw_version_minor; |
| 290 | u16 fw_version_release; |
| 291 | u16 fw_version_build; |
| 292 | u32 phy_capability; |
| 293 | u32 hw_min_tx_power; |
| 294 | u32 hw_max_tx_power; |
| 295 | u32 ht_cap_info; |
| 296 | u32 vht_cap_info; |
Michal Kazior | 8865bee4 | 2013-07-24 12:36:46 +0200 | [diff] [blame] | 297 | u32 num_rf_chains; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 298 | |
Michal Kazior | 0d9b043 | 2013-08-09 10:13:33 +0200 | [diff] [blame^] | 299 | DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); |
| 300 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 301 | struct targetdef *targetdef; |
| 302 | struct hostdef *hostdef; |
| 303 | |
| 304 | bool p2p; |
| 305 | |
| 306 | struct { |
| 307 | void *priv; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 308 | const struct ath10k_hif_ops *ops; |
| 309 | } hif; |
| 310 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 311 | wait_queue_head_t event_queue; |
| 312 | bool is_target_paused; |
| 313 | |
| 314 | struct ath10k_bmi bmi; |
Michal Kazior | edb8236 | 2013-07-05 16:15:14 +0300 | [diff] [blame] | 315 | struct ath10k_wmi wmi; |
Michal Kazior | cd003fa | 2013-07-05 16:15:13 +0300 | [diff] [blame] | 316 | struct ath10k_htc htc; |
Michal Kazior | edb8236 | 2013-07-05 16:15:14 +0300 | [diff] [blame] | 317 | struct ath10k_htt htt; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 318 | |
| 319 | struct ath10k_hw_params { |
| 320 | u32 id; |
| 321 | const char *name; |
| 322 | u32 patch_load_addr; |
| 323 | |
| 324 | struct ath10k_hw_params_fw { |
| 325 | const char *dir; |
| 326 | const char *fw; |
| 327 | const char *otp; |
| 328 | const char *board; |
| 329 | } fw; |
| 330 | } hw_params; |
| 331 | |
Michal Kazior | 2938505 | 2013-07-16 09:38:58 +0200 | [diff] [blame] | 332 | const struct firmware *board_data; |
| 333 | const struct firmware *otp; |
| 334 | const struct firmware *firmware; |
| 335 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 336 | struct { |
| 337 | struct completion started; |
| 338 | struct completion completed; |
| 339 | struct completion on_channel; |
| 340 | struct timer_list timeout; |
| 341 | bool is_roc; |
| 342 | bool in_progress; |
| 343 | bool aborting; |
| 344 | int vdev_id; |
| 345 | int roc_freq; |
| 346 | } scan; |
| 347 | |
| 348 | struct { |
| 349 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; |
| 350 | } mac; |
| 351 | |
| 352 | /* should never be NULL; needed for regular htt rx */ |
| 353 | struct ieee80211_channel *rx_channel; |
| 354 | |
| 355 | /* valid during scan; needed for mgmt rx during scan */ |
| 356 | struct ieee80211_channel *scan_channel; |
| 357 | |
| 358 | int free_vdev_map; |
| 359 | int monitor_vdev_id; |
| 360 | bool monitor_enabled; |
| 361 | bool monitor_present; |
| 362 | unsigned int filter_flags; |
| 363 | |
| 364 | struct wmi_pdev_set_wmm_params_arg wmm_params; |
| 365 | struct completion install_key_done; |
| 366 | |
| 367 | struct completion vdev_setup_done; |
| 368 | |
| 369 | struct workqueue_struct *workqueue; |
| 370 | |
| 371 | /* prevents concurrent FW reconfiguration */ |
| 372 | struct mutex conf_mutex; |
| 373 | |
| 374 | /* protects shared structure data */ |
| 375 | spinlock_t data_lock; |
| 376 | |
| 377 | struct list_head peers; |
| 378 | wait_queue_head_t peer_mapping_wq; |
| 379 | |
| 380 | struct work_struct offchan_tx_work; |
| 381 | struct sk_buff_head offchan_tx_queue; |
| 382 | struct completion offchan_tx_completed; |
| 383 | struct sk_buff *offchan_tx_skb; |
| 384 | |
Michal Kazior | f7843d7 | 2013-07-16 09:38:52 +0200 | [diff] [blame] | 385 | enum ath10k_state state; |
| 386 | |
Michal Kazior | affd321 | 2013-07-16 09:54:35 +0200 | [diff] [blame] | 387 | struct work_struct restart_work; |
| 388 | |
Michal Kazior | 2e1dea4 | 2013-07-31 10:32:40 +0200 | [diff] [blame] | 389 | /* cycle count is reported twice for each visited channel during scan. |
| 390 | * access protected by data_lock */ |
| 391 | u32 survey_last_rx_clear_count; |
| 392 | u32 survey_last_cycle_count; |
| 393 | struct survey_info survey[ATH10K_NUM_CHANS]; |
| 394 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 395 | #ifdef CONFIG_ATH10K_DEBUGFS |
| 396 | struct ath10k_debug debug; |
| 397 | #endif |
| 398 | }; |
| 399 | |
| 400 | struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 401 | const struct ath10k_hif_ops *hif_ops); |
| 402 | void ath10k_core_destroy(struct ath10k *ar); |
| 403 | |
Michal Kazior | dd30a36 | 2013-07-16 09:38:51 +0200 | [diff] [blame] | 404 | int ath10k_core_start(struct ath10k *ar); |
| 405 | void ath10k_core_stop(struct ath10k *ar); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 406 | int ath10k_core_register(struct ath10k *ar); |
| 407 | void ath10k_core_unregister(struct ath10k *ar); |
| 408 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 409 | #endif /* _CORE_H_ */ |