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Ben Dooks0d1bb412009-06-14 13:52:37 +01001/* linux/drivers/mmc/host/sdhci-s3c.c
2 *
3 * Copyright 2008 Openmoko Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * SDHCI (HSMMC) support for Samsung SoC
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/delay.h>
16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h>
Arnd Bergmanncc014f32013-03-04 18:28:21 +010018#include <linux/platform_data/mmc-sdhci-s3c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090019#include <linux/slab.h>
Ben Dooks0d1bb412009-06-14 13:52:37 +010020#include <linux/clk.h>
21#include <linux/io.h>
Marek Szyprowski17866e12010-08-10 18:01:58 -070022#include <linux/gpio.h>
Mark Brown55156d22011-07-29 15:35:00 +010023#include <linux/module.h>
Mark Brownd5e9c022012-03-03 00:46:41 +000024#include <linux/of.h>
25#include <linux/of_gpio.h>
26#include <linux/pm.h>
Mark Brown9f4e8152012-03-31 23:31:55 -040027#include <linux/pm_runtime.h>
Ben Dooks0d1bb412009-06-14 13:52:37 +010028
29#include <linux/mmc/host.h>
30
Arnd Bergmanncc014f32013-03-04 18:28:21 +010031#include "sdhci-s3c-regs.h"
Ben Dooks0d1bb412009-06-14 13:52:37 +010032#include "sdhci.h"
33
34#define MAX_BUS_CLK (4)
35
36/**
37 * struct sdhci_s3c - S3C SDHCI instance
38 * @host: The SDHCI host created
39 * @pdev: The platform device we where created from.
40 * @ioarea: The resource created when we claimed the IO area.
41 * @pdata: The platform data for this controller.
42 * @cur_clk: The index of the current bus clock.
43 * @clk_io: The clock for the internal bus interface.
44 * @clk_bus: The clocks that are available for the SD/MMC bus clock.
45 */
46struct sdhci_s3c {
47 struct sdhci_host *host;
48 struct platform_device *pdev;
49 struct resource *ioarea;
50 struct s3c_sdhci_platdata *pdata;
Tomasz Figa3ac147f2014-01-11 22:39:05 +010051 int cur_clk;
Marek Szyprowski17866e12010-08-10 18:01:58 -070052 int ext_cd_irq;
53 int ext_cd_gpio;
Ben Dooks0d1bb412009-06-14 13:52:37 +010054
55 struct clk *clk_io;
56 struct clk *clk_bus[MAX_BUS_CLK];
Tomasz Figa6eb28bd2014-01-11 22:39:02 +010057 unsigned long clk_rates[MAX_BUS_CLK];
Russell King17710592014-04-25 12:58:55 +010058
59 bool no_divider;
Ben Dooks0d1bb412009-06-14 13:52:37 +010060};
61
Thomas Abraham3119936a2012-02-16 22:23:58 +090062/**
63 * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
64 * @sdhci_quirks: sdhci host specific quirks.
65 *
66 * Specifies platform specific configuration of sdhci controller.
67 * Note: A structure for driver specific platform data is used for future
68 * expansion of its usage.
69 */
70struct sdhci_s3c_drv_data {
71 unsigned int sdhci_quirks;
Russell King17710592014-04-25 12:58:55 +010072 bool no_divider;
Thomas Abraham3119936a2012-02-16 22:23:58 +090073};
74
Ben Dooks0d1bb412009-06-14 13:52:37 +010075static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
76{
77 return sdhci_priv(host);
78}
79
80/**
Ben Dooks0d1bb412009-06-14 13:52:37 +010081 * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
82 * @host: The SDHCI host instance.
83 *
84 * Callback to return the maximum clock rate acheivable by the controller.
85*/
86static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
87{
88 struct sdhci_s3c *ourhost = to_s3c(host);
Tomasz Figa222a13c2014-01-11 22:39:04 +010089 unsigned long rate, max = 0;
90 int src;
Ben Dooks0d1bb412009-06-14 13:52:37 +010091
Tomasz Figa222a13c2014-01-11 22:39:04 +010092 for (src = 0; src < MAX_BUS_CLK; src++) {
93 rate = ourhost->clk_rates[src];
Ben Dooks0d1bb412009-06-14 13:52:37 +010094 if (rate > max)
95 max = rate;
96 }
97
98 return max;
99}
100
Ben Dooks0d1bb412009-06-14 13:52:37 +0100101/**
102 * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
103 * @ourhost: Our SDHCI instance.
104 * @src: The source clock index.
105 * @wanted: The clock frequency wanted.
106 */
107static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
108 unsigned int src,
109 unsigned int wanted)
110{
111 unsigned long rate;
112 struct clk *clksrc = ourhost->clk_bus[src];
Tomasz Figa8880a4a2014-01-11 22:39:01 +0100113 int shift;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100114
Tomasz Figa8f4b78d2014-01-11 22:39:03 +0100115 if (IS_ERR(clksrc))
Ben Dooks0d1bb412009-06-14 13:52:37 +0100116 return UINT_MAX;
117
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900118 /*
Thomas Abraham3119936a2012-02-16 22:23:58 +0900119 * If controller uses a non-standard clock division, find the best clock
120 * speed possible with selected clock source and skip the division.
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900121 */
Russell King17710592014-04-25 12:58:55 +0100122 if (ourhost->no_divider) {
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900123 rate = clk_round_rate(clksrc, wanted);
124 return wanted - rate;
125 }
126
Tomasz Figa6eb28bd2014-01-11 22:39:02 +0100127 rate = ourhost->clk_rates[src];
Ben Dooks0d1bb412009-06-14 13:52:37 +0100128
Tomasz Figa22003002014-01-11 22:39:06 +0100129 for (shift = 0; shift <= 8; ++shift) {
Tomasz Figa8880a4a2014-01-11 22:39:01 +0100130 if ((rate >> shift) <= wanted)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100131 break;
132 }
133
Tomasz Figa22003002014-01-11 22:39:06 +0100134 if (shift > 8) {
135 dev_dbg(&ourhost->pdev->dev,
136 "clk %d: rate %ld, min rate %lu > wanted %u\n",
137 src, rate, rate / 256, wanted);
138 return UINT_MAX;
139 }
140
Ben Dooks0d1bb412009-06-14 13:52:37 +0100141 dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
Tomasz Figa8880a4a2014-01-11 22:39:01 +0100142 src, rate, wanted, rate >> shift);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100143
Tomasz Figa8880a4a2014-01-11 22:39:01 +0100144 return wanted - (rate >> shift);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100145}
146
147/**
148 * sdhci_s3c_set_clock - callback on clock change
149 * @host: The SDHCI host being changed
150 * @clock: The clock rate being requested.
151 *
152 * When the card's clock is going to be changed, look at the new frequency
153 * and find the best clock source to go with it.
154*/
155static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
156{
157 struct sdhci_s3c *ourhost = to_s3c(host);
158 unsigned int best = UINT_MAX;
159 unsigned int delta;
160 int best_src = 0;
161 int src;
162 u32 ctrl;
163
Russell King1650d0c2014-04-25 12:58:50 +0100164 host->mmc->actual_clock = 0;
165
Ben Dooks0d1bb412009-06-14 13:52:37 +0100166 /* don't bother if the clock is going off. */
Russell King17710592014-04-25 12:58:55 +0100167 if (clock == 0) {
168 sdhci_set_clock(host, clock);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100169 return;
Russell King17710592014-04-25 12:58:55 +0100170 }
Ben Dooks0d1bb412009-06-14 13:52:37 +0100171
172 for (src = 0; src < MAX_BUS_CLK; src++) {
173 delta = sdhci_s3c_consider_clock(ourhost, src, clock);
174 if (delta < best) {
175 best = delta;
176 best_src = src;
177 }
178 }
179
180 dev_dbg(&ourhost->pdev->dev,
181 "selected source %d, clock %d, delta %d\n",
182 best_src, clock, best);
183
184 /* select the new clock source */
Ben Dooks0d1bb412009-06-14 13:52:37 +0100185 if (ourhost->cur_clk != best_src) {
186 struct clk *clk = ourhost->clk_bus[best_src];
187
Thomas Abraham0f310a052012-10-03 08:35:43 +0900188 clk_prepare_enable(clk);
Tomasz Figa3ac147f2014-01-11 22:39:05 +0100189 if (ourhost->cur_clk >= 0)
190 clk_disable_unprepare(
191 ourhost->clk_bus[ourhost->cur_clk]);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100192
193 ourhost->cur_clk = best_src;
Tomasz Figa6eb28bd2014-01-11 22:39:02 +0100194 host->max_clk = ourhost->clk_rates[best_src];
Ben Dooks0d1bb412009-06-14 13:52:37 +0100195 }
196
Tomasz Figa3ac147f2014-01-11 22:39:05 +0100197 /* turn clock off to card before changing clock source */
198 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
199
200 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
201 ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
202 ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
203 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
204
Thomas Abraham6fe47172011-09-14 12:39:17 +0530205 /* reprogram default hardware configuration */
206 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
207 host->ioaddr + S3C64XX_SDHCI_CONTROL4);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100208
Thomas Abraham6fe47172011-09-14 12:39:17 +0530209 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
210 ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
211 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
212 S3C_SDHCI_CTRL2_ENFBCLKRX |
213 S3C_SDHCI_CTRL2_DFCNT_NONE |
214 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
215 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100216
Thomas Abraham6fe47172011-09-14 12:39:17 +0530217 /* reconfigure the controller for new clock rate */
218 ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
219 if (clock < 25 * 1000000)
220 ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
221 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
Russell King17710592014-04-25 12:58:55 +0100222
223 sdhci_set_clock(host, clock);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100224}
225
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700226/**
227 * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
228 * @host: The SDHCI host being queried
229 *
230 * To init mmc host properly a minimal clock value is needed. For high system
231 * bus clock's values the standard formula gives values out of allowed range.
232 * The clock still can be set to lower values, if clock source other then
233 * system bus is selected.
234*/
235static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
236{
237 struct sdhci_s3c *ourhost = to_s3c(host);
Tomasz Figa222a13c2014-01-11 22:39:04 +0100238 unsigned long rate, min = ULONG_MAX;
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700239 int src;
240
241 for (src = 0; src < MAX_BUS_CLK; src++) {
Tomasz Figa222a13c2014-01-11 22:39:04 +0100242 rate = ourhost->clk_rates[src] / 256;
243 if (!rate)
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700244 continue;
Tomasz Figa222a13c2014-01-11 22:39:04 +0100245 if (rate < min)
246 min = rate;
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700247 }
Tomasz Figa222a13c2014-01-11 22:39:04 +0100248
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700249 return min;
250}
251
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900252/* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
253static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host)
254{
255 struct sdhci_s3c *ourhost = to_s3c(host);
Tomasz Figa222a13c2014-01-11 22:39:04 +0100256 unsigned long rate, max = 0;
257 int src;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900258
Tomasz Figa222a13c2014-01-11 22:39:04 +0100259 for (src = 0; src < MAX_BUS_CLK; src++) {
260 struct clk *clk;
261
262 clk = ourhost->clk_bus[src];
263 if (IS_ERR(clk))
264 continue;
265
266 rate = clk_round_rate(clk, ULONG_MAX);
267 if (rate > max)
268 max = rate;
269 }
270
271 return max;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900272}
273
274/* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
275static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host)
276{
277 struct sdhci_s3c *ourhost = to_s3c(host);
Tomasz Figa222a13c2014-01-11 22:39:04 +0100278 unsigned long rate, min = ULONG_MAX;
279 int src;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900280
Tomasz Figa222a13c2014-01-11 22:39:04 +0100281 for (src = 0; src < MAX_BUS_CLK; src++) {
282 struct clk *clk;
283
284 clk = ourhost->clk_bus[src];
285 if (IS_ERR(clk))
286 continue;
287
288 rate = clk_round_rate(clk, 0);
289 if (rate < min)
290 min = rate;
291 }
292
293 return min;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900294}
295
296/* sdhci_cmu_set_clock - callback on clock change.*/
297static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
298{
299 struct sdhci_s3c *ourhost = to_s3c(host);
Jingoo Han2ad0b242012-08-29 14:35:06 +0900300 struct device *dev = &ourhost->pdev->dev;
Thomas Abraham3119936a2012-02-16 22:23:58 +0900301 unsigned long timeout;
302 u16 clk = 0;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900303
Russell King1650d0c2014-04-25 12:58:50 +0100304 host->mmc->actual_clock = 0;
305
Jaehoon Chung7ef2a5e2013-08-02 23:08:58 +0900306 /* If the clock is going off, set to 0 at clock control register */
307 if (clock == 0) {
308 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900309 return;
Jaehoon Chung7ef2a5e2013-08-02 23:08:58 +0900310 }
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900311
312 sdhci_s3c_set_clock(host, clock);
313
314 clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
315
Thomas Abraham3119936a2012-02-16 22:23:58 +0900316 clk = SDHCI_CLOCK_INT_EN;
317 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
318
319 /* Wait max 20 ms */
320 timeout = 20;
321 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
322 & SDHCI_CLOCK_INT_STABLE)) {
323 if (timeout == 0) {
Jingoo Han2ad0b242012-08-29 14:35:06 +0900324 dev_err(dev, "%s: Internal clock never stabilised.\n",
325 mmc_hostname(host->mmc));
Thomas Abraham3119936a2012-02-16 22:23:58 +0900326 return;
327 }
328 timeout--;
329 mdelay(1);
330 }
331
332 clk |= SDHCI_CLOCK_CARD_EN;
333 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900334}
335
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900336/**
Russell King2317f562014-04-25 12:57:07 +0100337 * sdhci_s3c_set_bus_width - support 8bit buswidth
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900338 * @host: The SDHCI host being queried
339 * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
340 *
341 * We have 8-bit width support but is not a v3 controller.
Sascha Hauer7bc088d2013-01-21 19:02:27 +0800342 * So we add platform_bus_width() and support 8bit width.
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900343 */
Russell King2317f562014-04-25 12:57:07 +0100344static void sdhci_s3c_set_bus_width(struct sdhci_host *host, int width)
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900345{
346 u8 ctrl;
347
348 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
349
350 switch (width) {
351 case MMC_BUS_WIDTH_8:
352 ctrl |= SDHCI_CTRL_8BITBUS;
353 ctrl &= ~SDHCI_CTRL_4BITBUS;
354 break;
355 case MMC_BUS_WIDTH_4:
356 ctrl |= SDHCI_CTRL_4BITBUS;
357 ctrl &= ~SDHCI_CTRL_8BITBUS;
358 break;
359 default:
Girish K S49bb1e62011-08-26 14:58:18 +0530360 ctrl &= ~SDHCI_CTRL_4BITBUS;
361 ctrl &= ~SDHCI_CTRL_8BITBUS;
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900362 break;
363 }
364
365 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900366}
367
Ben Dooks0d1bb412009-06-14 13:52:37 +0100368static struct sdhci_ops sdhci_s3c_ops = {
369 .get_max_clock = sdhci_s3c_get_max_clk,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100370 .set_clock = sdhci_s3c_set_clock,
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700371 .get_min_clock = sdhci_s3c_get_min_clock,
Russell King2317f562014-04-25 12:57:07 +0100372 .set_bus_width = sdhci_s3c_set_bus_width,
Russell King03231f92014-04-25 12:57:12 +0100373 .reset = sdhci_reset,
Russell King96d7b782014-04-25 12:59:26 +0100374 .set_uhs_signaling = sdhci_set_uhs_signaling,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100375};
376
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000377#ifdef CONFIG_OF
Bill Pembertonc3be1ef2012-11-19 13:23:06 -0500378static int sdhci_s3c_parse_dt(struct device *dev,
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000379 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
380{
381 struct device_node *node = dev->of_node;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000382 u32 max_width;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000383
384 /* if the bus-width property is not specified, assume width as 1 */
385 if (of_property_read_u32(node, "bus-width", &max_width))
386 max_width = 1;
387 pdata->max_width = max_width;
388
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000389 /* get the card detection method */
Tushar Beheraab5023e2012-11-20 09:41:53 +0530390 if (of_get_property(node, "broken-cd", NULL)) {
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000391 pdata->cd_type = S3C_SDHCI_CD_NONE;
Thomas Abrahame19499a2013-03-06 17:06:16 +0530392 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000393 }
394
Tushar Beheraab5023e2012-11-20 09:41:53 +0530395 if (of_get_property(node, "non-removable", NULL)) {
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000396 pdata->cd_type = S3C_SDHCI_CD_PERMANENT;
Thomas Abrahame19499a2013-03-06 17:06:16 +0530397 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000398 }
399
Jaehoon Chung11bc9382014-05-26 13:58:28 +0900400 if (of_get_named_gpio(node, "cd-gpios", 0))
Thomas Abrahame19499a2013-03-06 17:06:16 +0530401 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000402
Tomasz Figab96efcc2012-11-16 15:28:17 +0100403 /* assuming internal card detect that will be configured by pinctrl */
404 pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000405 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000406}
407#else
Bill Pembertonc3be1ef2012-11-19 13:23:06 -0500408static int sdhci_s3c_parse_dt(struct device *dev,
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000409 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
410{
411 return -EINVAL;
412}
413#endif
414
415static const struct of_device_id sdhci_s3c_dt_match[];
416
Thomas Abraham3119936a2012-02-16 22:23:58 +0900417static inline struct sdhci_s3c_drv_data *sdhci_s3c_get_driver_data(
418 struct platform_device *pdev)
419{
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000420#ifdef CONFIG_OF
421 if (pdev->dev.of_node) {
422 const struct of_device_id *match;
423 match = of_match_node(sdhci_s3c_dt_match, pdev->dev.of_node);
424 return (struct sdhci_s3c_drv_data *)match->data;
425 }
426#endif
Thomas Abraham3119936a2012-02-16 22:23:58 +0900427 return (struct sdhci_s3c_drv_data *)
428 platform_get_device_id(pdev)->driver_data;
429}
430
Bill Pembertonc3be1ef2012-11-19 13:23:06 -0500431static int sdhci_s3c_probe(struct platform_device *pdev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100432{
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900433 struct s3c_sdhci_platdata *pdata;
Thomas Abraham3119936a2012-02-16 22:23:58 +0900434 struct sdhci_s3c_drv_data *drv_data;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100435 struct device *dev = &pdev->dev;
436 struct sdhci_host *host;
437 struct sdhci_s3c *sc;
438 struct resource *res;
439 int ret, irq, ptr, clks;
440
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000441 if (!pdev->dev.platform_data && !pdev->dev.of_node) {
Ben Dooks0d1bb412009-06-14 13:52:37 +0100442 dev_err(dev, "no device data specified\n");
443 return -ENOENT;
444 }
445
446 irq = platform_get_irq(pdev, 0);
447 if (irq < 0) {
448 dev_err(dev, "no irq specified\n");
449 return irq;
450 }
451
Ben Dooks0d1bb412009-06-14 13:52:37 +0100452 host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
453 if (IS_ERR(host)) {
454 dev_err(dev, "sdhci_alloc_host() failed\n");
455 return PTR_ERR(host);
456 }
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000457 sc = sdhci_priv(host);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100458
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900459 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
460 if (!pdata) {
461 ret = -ENOMEM;
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500462 goto err_pdata_io_clk;
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900463 }
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000464
465 if (pdev->dev.of_node) {
466 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata);
467 if (ret)
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500468 goto err_pdata_io_clk;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000469 } else {
470 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
471 sc->ext_cd_gpio = -1; /* invalid gpio number */
472 }
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900473
Thomas Abraham3119936a2012-02-16 22:23:58 +0900474 drv_data = sdhci_s3c_get_driver_data(pdev);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100475
476 sc->host = host;
477 sc->pdev = pdev;
478 sc->pdata = pdata;
Tomasz Figa3ac147f2014-01-11 22:39:05 +0100479 sc->cur_clk = -1;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100480
481 platform_set_drvdata(pdev, host);
482
Jingoo Han3aaf7ba2013-02-12 12:24:39 +0900483 sc->clk_io = devm_clk_get(dev, "hsmmc");
Ben Dooks0d1bb412009-06-14 13:52:37 +0100484 if (IS_ERR(sc->clk_io)) {
485 dev_err(dev, "failed to get io clock\n");
486 ret = PTR_ERR(sc->clk_io);
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500487 goto err_pdata_io_clk;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100488 }
489
490 /* enable the local io clock and keep it running for the moment. */
Thomas Abraham0f310a052012-10-03 08:35:43 +0900491 clk_prepare_enable(sc->clk_io);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100492
493 for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
Rajeshwari Shinde4346b6d2011-11-03 10:52:58 +0900494 char name[14];
Ben Dooks0d1bb412009-06-14 13:52:37 +0100495
Rajeshwari Shinde4346b6d2011-11-03 10:52:58 +0900496 snprintf(name, 14, "mmc_busclk.%d", ptr);
Tomasz Figa8f4b78d2014-01-11 22:39:03 +0100497 sc->clk_bus[ptr] = devm_clk_get(dev, name);
498 if (IS_ERR(sc->clk_bus[ptr]))
Ben Dooks0d1bb412009-06-14 13:52:37 +0100499 continue;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100500
501 clks++;
Tomasz Figa6eb28bd2014-01-11 22:39:02 +0100502 sc->clk_rates[ptr] = clk_get_rate(sc->clk_bus[ptr]);
503
Ben Dooks0d1bb412009-06-14 13:52:37 +0100504 dev_info(dev, "clock source %d: %s (%ld Hz)\n",
Tomasz Figa6eb28bd2014-01-11 22:39:02 +0100505 ptr, name, sc->clk_rates[ptr]);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100506 }
507
508 if (clks == 0) {
509 dev_err(dev, "failed to find any bus clocks\n");
510 ret = -ENOENT;
511 goto err_no_busclks;
512 }
513
Julia Lawall9bda6da2012-03-08 23:24:53 -0500514 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Thierry Redinga3e2cd72013-01-21 11:09:11 +0100515 host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
516 if (IS_ERR(host->ioaddr)) {
517 ret = PTR_ERR(host->ioaddr);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100518 goto err_req_regs;
519 }
520
521 /* Ensure we have minimal gpio selected CMD/CLK/Detect */
522 if (pdata->cfg_gpio)
523 pdata->cfg_gpio(pdev, pdata->max_width);
524
525 host->hw_name = "samsung-hsmmc";
526 host->ops = &sdhci_s3c_ops;
527 host->quirks = 0;
Jaehoon Chung285e2442013-08-02 23:09:00 +0900528 host->quirks2 = 0;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100529 host->irq = irq;
530
531 /* Setup quirks for the controller */
Thomas Abrahamb2e75ef2010-05-26 14:42:05 -0700532 host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
Marek Szyprowskia1d56462010-08-10 18:01:57 -0700533 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
Russell King17710592014-04-25 12:58:55 +0100534 if (drv_data) {
Thomas Abraham3119936a2012-02-16 22:23:58 +0900535 host->quirks |= drv_data->sdhci_quirks;
Russell King17710592014-04-25 12:58:55 +0100536 sc->no_divider = drv_data->no_divider;
537 }
Ben Dooks0d1bb412009-06-14 13:52:37 +0100538
539#ifndef CONFIG_MMC_SDHCI_S3C_DMA
540
541 /* we currently see overruns on errors, so disable the SDMA
542 * support as well. */
543 host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
544
Ben Dooks0d1bb412009-06-14 13:52:37 +0100545#endif /* CONFIG_MMC_SDHCI_S3C_DMA */
546
547 /* It seems we do not get an DATA transfer complete on non-busy
548 * transfers, not sure if this is a problem with this specific
549 * SDHCI block, or a missing configuration that needs to be set. */
550 host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
551
Kyungmin Park732f0e32010-10-30 12:58:56 +0900552 /* This host supports the Auto CMD12 */
553 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
554
Jaehoon Chung7199e2b2011-07-12 17:30:47 +0900555 /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */
556 host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC;
557
Marek Szyprowski17866e12010-08-10 18:01:58 -0700558 if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
559 pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
560 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
561
562 if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
563 host->mmc->caps = MMC_CAP_NONREMOVABLE;
564
Thomas Abraham0d22c772012-03-31 23:29:45 -0400565 switch (pdata->max_width) {
566 case 8:
567 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
568 case 4:
569 host->mmc->caps |= MMC_CAP_4_BIT_DATA;
570 break;
571 }
572
Sangwook Leefa1773c2011-11-07 17:05:22 +0000573 if (pdata->pm_caps)
574 host->mmc->pm_caps |= pdata->pm_caps;
575
Ben Dooks0d1bb412009-06-14 13:52:37 +0100576 host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
577 SDHCI_QUIRK_32BIT_DMA_SIZE);
578
Hyuk Lee3fe42e02010-08-10 18:01:55 -0700579 /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
580 host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
581
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900582 /*
583 * If controller does not have internal clock divider,
584 * we can use overriding functions instead of default.
585 */
Russell King17710592014-04-25 12:58:55 +0100586 if (sc->no_divider) {
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900587 sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
588 sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
589 sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
590 }
591
Jeongbae Seob3824f22010-10-08 17:46:20 +0900592 /* It supports additional host capabilities if needed */
593 if (pdata->host_caps)
594 host->mmc->caps |= pdata->host_caps;
595
Jaehoon Chungc1c4b662012-02-07 15:59:01 +0900596 if (pdata->host_caps2)
597 host->mmc->caps2 |= pdata->host_caps2;
598
Mark Brown9f4e8152012-03-31 23:31:55 -0400599 pm_runtime_enable(&pdev->dev);
600 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
601 pm_runtime_use_autosuspend(&pdev->dev);
602 pm_suspend_ignore_children(&pdev->dev, 1);
603
Jaehoon Chung11bc9382014-05-26 13:58:28 +0900604 mmc_of_parse(host->mmc);
605
Ben Dooks0d1bb412009-06-14 13:52:37 +0100606 ret = sdhci_add_host(host);
607 if (ret) {
608 dev_err(dev, "sdhci_add_host() failed\n");
Mark Brown9f4e8152012-03-31 23:31:55 -0400609 pm_runtime_forbid(&pdev->dev);
610 pm_runtime_get_noresume(&pdev->dev);
Julia Lawall9bda6da2012-03-08 23:24:53 -0500611 goto err_req_regs;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100612 }
613
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000614#ifdef CONFIG_PM_RUNTIME
Seungwon Jeon0aa55c22012-10-30 14:28:36 +0900615 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
616 clk_disable_unprepare(sc->clk_io);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000617#endif
Ben Dooks0d1bb412009-06-14 13:52:37 +0100618 return 0;
619
Ben Dooks0d1bb412009-06-14 13:52:37 +0100620 err_req_regs:
Ben Dooks0d1bb412009-06-14 13:52:37 +0100621 err_no_busclks:
Thomas Abraham0f310a052012-10-03 08:35:43 +0900622 clk_disable_unprepare(sc->clk_io);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100623
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500624 err_pdata_io_clk:
Ben Dooks0d1bb412009-06-14 13:52:37 +0100625 sdhci_free_host(host);
626
627 return ret;
628}
629
Bill Pemberton6e0ee712012-11-19 13:26:03 -0500630static int sdhci_s3c_remove(struct platform_device *pdev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100631{
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700632 struct sdhci_host *host = platform_get_drvdata(pdev);
633 struct sdhci_s3c *sc = sdhci_priv(host);
Marek Szyprowski17866e12010-08-10 18:01:58 -0700634
635 if (sc->ext_cd_irq)
636 free_irq(sc->ext_cd_irq, sc);
637
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000638#ifdef CONFIG_PM_RUNTIME
Jaehoon Chung11bc9382014-05-26 13:58:28 +0900639 if (sc->pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
Seungwon Jeon0aa55c22012-10-30 14:28:36 +0900640 clk_prepare_enable(sc->clk_io);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000641#endif
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700642 sdhci_remove_host(host, 1);
643
Chander Kashyap387a8cbd2012-09-14 09:08:50 +0000644 pm_runtime_dont_use_autosuspend(&pdev->dev);
Mark Brown9f4e8152012-03-31 23:31:55 -0400645 pm_runtime_disable(&pdev->dev);
646
Thomas Abraham0f310a052012-10-03 08:35:43 +0900647 clk_disable_unprepare(sc->clk_io);
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700648
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700649 sdhci_free_host(host);
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700650
Ben Dooks0d1bb412009-06-14 13:52:37 +0100651 return 0;
652}
653
Mark Brownd5e9c022012-03-03 00:46:41 +0000654#ifdef CONFIG_PM_SLEEP
Manuel Lauss29495aa2011-11-03 11:09:45 +0100655static int sdhci_s3c_suspend(struct device *dev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100656{
Manuel Lauss29495aa2011-11-03 11:09:45 +0100657 struct sdhci_host *host = dev_get_drvdata(dev);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100658
Manuel Lauss29495aa2011-11-03 11:09:45 +0100659 return sdhci_suspend_host(host);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100660}
661
Manuel Lauss29495aa2011-11-03 11:09:45 +0100662static int sdhci_s3c_resume(struct device *dev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100663{
Manuel Lauss29495aa2011-11-03 11:09:45 +0100664 struct sdhci_host *host = dev_get_drvdata(dev);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100665
Wonil Choi65d13512011-06-29 11:38:38 +0900666 return sdhci_resume_host(host);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100667}
Mark Brownd5e9c022012-03-03 00:46:41 +0000668#endif
Ben Dooks0d1bb412009-06-14 13:52:37 +0100669
Mark Brown9f4e8152012-03-31 23:31:55 -0400670#ifdef CONFIG_PM_RUNTIME
671static int sdhci_s3c_runtime_suspend(struct device *dev)
672{
673 struct sdhci_host *host = dev_get_drvdata(dev);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000674 struct sdhci_s3c *ourhost = to_s3c(host);
675 struct clk *busclk = ourhost->clk_io;
676 int ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400677
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000678 ret = sdhci_runtime_suspend_host(host);
679
Tomasz Figa3ac147f2014-01-11 22:39:05 +0100680 if (ourhost->cur_clk >= 0)
681 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
Thomas Abraham0f310a052012-10-03 08:35:43 +0900682 clk_disable_unprepare(busclk);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000683 return ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400684}
685
686static int sdhci_s3c_runtime_resume(struct device *dev)
687{
688 struct sdhci_host *host = dev_get_drvdata(dev);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000689 struct sdhci_s3c *ourhost = to_s3c(host);
690 struct clk *busclk = ourhost->clk_io;
691 int ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400692
Thomas Abraham0f310a052012-10-03 08:35:43 +0900693 clk_prepare_enable(busclk);
Tomasz Figa3ac147f2014-01-11 22:39:05 +0100694 if (ourhost->cur_clk >= 0)
695 clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000696 ret = sdhci_runtime_resume_host(host);
697 return ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400698}
699#endif
700
Mark Brownd5e9c022012-03-03 00:46:41 +0000701#ifdef CONFIG_PM
Manuel Lauss29495aa2011-11-03 11:09:45 +0100702static const struct dev_pm_ops sdhci_s3c_pmops = {
Mark Brownd5e9c022012-03-03 00:46:41 +0000703 SET_SYSTEM_SLEEP_PM_OPS(sdhci_s3c_suspend, sdhci_s3c_resume)
Mark Brown9f4e8152012-03-31 23:31:55 -0400704 SET_RUNTIME_PM_OPS(sdhci_s3c_runtime_suspend, sdhci_s3c_runtime_resume,
705 NULL)
Manuel Lauss29495aa2011-11-03 11:09:45 +0100706};
707
708#define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
709
Ben Dooks0d1bb412009-06-14 13:52:37 +0100710#else
Manuel Lauss29495aa2011-11-03 11:09:45 +0100711#define SDHCI_S3C_PMOPS NULL
Ben Dooks0d1bb412009-06-14 13:52:37 +0100712#endif
713
Thomas Abraham3119936a2012-02-16 22:23:58 +0900714#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212)
715static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = {
Russell King17710592014-04-25 12:58:55 +0100716 .no_divider = true,
Thomas Abraham3119936a2012-02-16 22:23:58 +0900717};
718#define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data)
719#else
720#define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)NULL)
721#endif
722
723static struct platform_device_id sdhci_s3c_driver_ids[] = {
724 {
725 .name = "s3c-sdhci",
726 .driver_data = (kernel_ulong_t)NULL,
727 }, {
728 .name = "exynos4-sdhci",
729 .driver_data = EXYNOS4_SDHCI_DRV_DATA,
730 },
731 { }
732};
733MODULE_DEVICE_TABLE(platform, sdhci_s3c_driver_ids);
734
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000735#ifdef CONFIG_OF
736static const struct of_device_id sdhci_s3c_dt_match[] = {
737 { .compatible = "samsung,s3c6410-sdhci", },
738 { .compatible = "samsung,exynos4210-sdhci",
739 .data = (void *)EXYNOS4_SDHCI_DRV_DATA },
740 {},
741};
742MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match);
743#endif
744
Ben Dooks0d1bb412009-06-14 13:52:37 +0100745static struct platform_driver sdhci_s3c_driver = {
746 .probe = sdhci_s3c_probe,
Bill Pemberton0433c142012-11-19 13:20:26 -0500747 .remove = sdhci_s3c_remove,
Thomas Abraham3119936a2012-02-16 22:23:58 +0900748 .id_table = sdhci_s3c_driver_ids,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100749 .driver = {
750 .owner = THIS_MODULE,
751 .name = "s3c-sdhci",
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000752 .of_match_table = of_match_ptr(sdhci_s3c_dt_match),
Manuel Lauss29495aa2011-11-03 11:09:45 +0100753 .pm = SDHCI_S3C_PMOPS,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100754 },
755};
756
Axel Lind1f81a62011-11-26 12:55:43 +0800757module_platform_driver(sdhci_s3c_driver);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100758
759MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
760MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
761MODULE_LICENSE("GPL v2");
762MODULE_ALIAS("platform:s3c-sdhci");