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Stefan Wahren12091112015-01-29 18:10:50 +00001#include <dt-bindings/pinctrl/bcm2835.h>
2#include "skeleton.dtsi"
Simon Arlottec9653b2012-05-26 01:04:43 -06003
4/ {
5 compatible = "brcm,bcm2835";
6 model = "BCM2835";
Simon Arlott89214f02012-09-12 19:57:26 -06007 interrupt-parent = <&intc>;
Simon Arlottec9653b2012-05-26 01:04:43 -06008
9 chosen {
Simon Arlott407f9be2012-09-10 23:29:17 -060010 bootargs = "earlyprintk console=ttyAMA0";
Simon Arlottec9653b2012-05-26 01:04:43 -060011 };
12
13 soc {
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 ranges = <0x7e000000 0x20000000 0x02000000>;
Eric Anholt1215baa2015-05-05 13:10:11 -070018 dma-ranges = <0x40000000 0x00000000 0x20000000>;
Simon Arlott89214f02012-09-12 19:57:26 -060019
Stephen Warren25b2f1b2014-02-11 21:48:47 -070020 timer@7e003000 {
Simon Arlottee4af562012-09-10 22:38:35 -060021 compatible = "brcm,bcm2835-system-timer";
22 reg = <0x7e003000 0x1000>;
23 interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
24 clock-frequency = <1000000>;
25 };
26
Florian Meier89072332014-01-13 12:11:43 +010027 dma: dma@7e007000 {
28 compatible = "brcm,bcm2835-dma";
29 reg = <0x7e007000 0xf00>;
30 interrupts = <1 16>,
31 <1 17>,
32 <1 18>,
33 <1 19>,
34 <1 20>,
35 <1 21>,
36 <1 22>,
37 <1 23>,
38 <1 24>,
39 <1 25>,
40 <1 26>,
41 <1 27>,
42 <1 28>;
43
44 #dma-cells = <1>;
45 brcm,dma-channel-mask = <0x7f35>;
46 };
47
Stephen Warren25b2f1b2014-02-11 21:48:47 -070048 intc: interrupt-controller@7e00b200 {
Simon Arlott89214f02012-09-12 19:57:26 -060049 compatible = "brcm,bcm2835-armctrl-ic";
50 reg = <0x7e00b200 0x200>;
51 interrupt-controller;
52 #interrupt-cells = <2>;
53 };
Simon Arlott407f9be2012-09-10 23:29:17 -060054
Stephen Warren25b2f1b2014-02-11 21:48:47 -070055 watchdog@7e100000 {
Stephen Warrend0f1c7f2012-09-15 22:18:10 -060056 compatible = "brcm,bcm2835-pm-wdt";
57 reg = <0x7e100000 0x28>;
58 };
59
Stephen Warren25b2f1b2014-02-11 21:48:47 -070060 rng@7e104000 {
Lubomir Rintela1bf7082013-03-28 07:12:04 +010061 compatible = "brcm,bcm2835-rng";
62 reg = <0x7e104000 0x10>;
63 };
64
Eric Anholt05b682b2015-05-05 13:27:46 -070065 mailbox: mailbox@7e00b800 {
66 compatible = "brcm,bcm2835-mbox";
67 reg = <0x7e00b880 0x40>;
68 interrupts = <0 1>;
69 #mbox-cells = <0>;
70 };
71
Stephen Warren25b2f1b2014-02-11 21:48:47 -070072 gpio: gpio@7e200000 {
Stephen Warren805504a2012-09-27 21:54:21 -060073 compatible = "brcm,bcm2835-gpio";
74 reg = <0x7e200000 0xb4>;
75 /*
76 * The GPIO IP block is designed for 3 banks of GPIOs.
77 * Each bank has a GPIO interrupt for itself.
78 * There is an overall "any bank" interrupt.
79 * In order, these are GIC interrupts 17, 18, 19, 20.
80 * Since the BCM2835 only has 2 banks, the 2nd bank
81 * interrupt output appears to be mirrored onto the
82 * 3rd bank's interrupt signal.
83 * So, a bank0 interrupt shows up on 17, 20, and
84 * a bank1 interrupt shows up on 18, 19, 20!
85 */
86 interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
87
88 gpio-controller;
89 #gpio-cells = <2>;
90
91 interrupt-controller;
92 #interrupt-cells = <2>;
93 };
Stephen Warren5186bf22012-12-24 21:58:56 -070094
Stephen Warren25b2f1b2014-02-11 21:48:47 -070095 uart@7e201000 {
Stephen Warrenef3c6902014-02-11 21:44:35 -070096 compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
97 reg = <0x7e201000 0x1000>;
98 interrupts = <2 25>;
99 clock-frequency = <3000000>;
100 arm,primecell-periphid = <0x00241011>;
101 };
102
Florian Meier9511cc4d2014-01-13 12:16:40 +0100103 i2s: i2s@7e203000 {
104 compatible = "brcm,bcm2835-i2s";
105 reg = <0x7e203000 0x20>,
106 <0x7e101098 0x02>;
107
108 dmas = <&dma 2>,
109 <&dma 3>;
110 dma-names = "tx", "rx";
Mark Brown667bbd52014-09-16 19:51:36 -0600111 status = "disabled";
Florian Meier9511cc4d2014-01-13 12:16:40 +0100112 };
113
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700114 spi: spi@7e204000 {
Stephen Warren6ce5f022013-02-19 21:39:58 -0700115 compatible = "brcm,bcm2835-spi";
116 reg = <0x7e204000 0x1000>;
117 interrupts = <2 22>;
118 clocks = <&clk_spi>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 status = "disabled";
122 };
123
Baruch Siach64146f22015-03-18 11:00:22 +0200124 i2c0: i2c@7e205000 {
Stephen Warren232fed42012-12-31 23:26:45 -0700125 compatible = "brcm,bcm2835-i2c";
126 reg = <0x7e205000 0x1000>;
127 interrupts = <2 21>;
128 clocks = <&clk_i2c>;
Stephen Warrena31ab442013-11-25 20:35:42 -0700129 #address-cells = <1>;
130 #size-cells = <0>;
Stephen Warren232fed42012-12-31 23:26:45 -0700131 status = "disabled";
132 };
133
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700134 sdhci: sdhci@7e300000 {
Stephen Warrenef3c6902014-02-11 21:44:35 -0700135 compatible = "brcm,bcm2835-sdhci";
136 reg = <0x7e300000 0x100>;
137 interrupts = <2 30>;
138 clocks = <&clk_mmc>;
139 status = "disabled";
140 };
141
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700142 i2c1: i2c@7e804000 {
Stephen Warren232fed42012-12-31 23:26:45 -0700143 compatible = "brcm,bcm2835-i2c";
144 reg = <0x7e804000 0x1000>;
145 interrupts = <2 21>;
146 clocks = <&clk_i2c>;
Stephen Warrena31ab442013-11-25 20:35:42 -0700147 #address-cells = <1>;
148 #size-cells = <0>;
Stephen Warren232fed42012-12-31 23:26:45 -0700149 status = "disabled";
150 };
151
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700152 usb@7e980000 {
Stephen Warren5631e7f2013-12-26 19:43:10 -0700153 compatible = "brcm,bcm2835-usb";
154 reg = <0x7e980000 0x10000>;
155 interrupts = <1 9>;
156 };
Vince Weaver14ac6522013-12-31 16:54:16 -0500157
158 arm-pmu {
159 compatible = "arm,arm1176-pmu";
160 };
Stephen Warren5186bf22012-12-24 21:58:56 -0700161 };
162
Stephen Warren9692c192013-01-14 21:07:20 -0700163 clocks {
164 compatible = "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <0>;
Stephen Warren232fed42012-12-31 23:26:45 -0700167
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700168 clk_mmc: clock@0 {
Stephen Warren9692c192013-01-14 21:07:20 -0700169 compatible = "fixed-clock";
170 reg = <0>;
171 #clock-cells = <0>;
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700172 clock-output-names = "mmc";
Stephen Warren9692c192013-01-14 21:07:20 -0700173 clock-frequency = <100000000>;
174 };
175
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700176 clk_i2c: clock@1 {
Stephen Warren9692c192013-01-14 21:07:20 -0700177 compatible = "fixed-clock";
178 reg = <1>;
179 #clock-cells = <0>;
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700180 clock-output-names = "i2c";
Stephen Warren2837a1d2013-02-21 22:42:38 -0700181 clock-frequency = <250000000>;
Stephen Warren9692c192013-01-14 21:07:20 -0700182 };
Stephen Warren6ce5f022013-02-19 21:39:58 -0700183
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700184 clk_spi: clock@2 {
Stephen Warren6ce5f022013-02-19 21:39:58 -0700185 compatible = "fixed-clock";
186 reg = <2>;
187 #clock-cells = <0>;
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700188 clock-output-names = "spi";
Stephen Warren6ce5f022013-02-19 21:39:58 -0700189 clock-frequency = <250000000>;
190 };
Simon Arlottec9653b2012-05-26 01:04:43 -0600191 };
192};