David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 1 | /* iommu.c: Generic sparc64 IOMMU support. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 3 | * Copyright (C) 1999, 2007, 2008 David S. Miller (davem@davemloft.net) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com) |
| 5 | */ |
| 6 | |
| 7 | #include <linux/kernel.h> |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 8 | #include <linux/module.h> |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 9 | #include <linux/delay.h> |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 10 | #include <linux/device.h> |
| 11 | #include <linux/dma-mapping.h> |
| 12 | #include <linux/errno.h> |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 13 | #include <linux/iommu-helper.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 15 | #ifdef CONFIG_PCI |
| 16 | #include <linux/pci.h> |
| 17 | #endif |
| 18 | |
| 19 | #include <asm/iommu.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | |
| 21 | #include "iommu_common.h" |
| 22 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 23 | #define STC_CTXMATCH_ADDR(STC, CTX) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | ((STC)->strbuf_ctxmatch_base + ((CTX) << 3)) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 25 | #define STC_FLUSHFLAG_INIT(STC) \ |
| 26 | (*((STC)->strbuf_flushflag) = 0UL) |
| 27 | #define STC_FLUSHFLAG_SET(STC) \ |
| 28 | (*((STC)->strbuf_flushflag) != 0UL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 30 | #define iommu_read(__reg) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | ({ u64 __ret; \ |
| 32 | __asm__ __volatile__("ldxa [%1] %2, %0" \ |
| 33 | : "=r" (__ret) \ |
| 34 | : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \ |
| 35 | : "memory"); \ |
| 36 | __ret; \ |
| 37 | }) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 38 | #define iommu_write(__reg, __val) \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | __asm__ __volatile__("stxa %0, [%1] %2" \ |
| 40 | : /* no outputs */ \ |
| 41 | : "r" (__val), "r" (__reg), \ |
| 42 | "i" (ASI_PHYS_BYPASS_EC_E)) |
| 43 | |
| 44 | /* Must be invoked under the IOMMU lock. */ |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 45 | static void iommu_flushall(struct iommu *iommu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | { |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 47 | if (iommu->iommu_flushinv) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 48 | iommu_write(iommu->iommu_flushinv, ~(u64)0); |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 49 | } else { |
| 50 | unsigned long tag; |
| 51 | int entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 53 | tag = iommu->iommu_tags; |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 54 | for (entry = 0; entry < 16; entry++) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 55 | iommu_write(tag, 0); |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame] | 56 | tag += 8; |
| 57 | } |
| 58 | |
| 59 | /* Ensure completion of previous PIO writes. */ |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 60 | (void) iommu_read(iommu->write_complete_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | #define IOPTE_CONSISTENT(CTX) \ |
| 65 | (IOPTE_VALID | IOPTE_CACHE | \ |
| 66 | (((CTX) << 47) & IOPTE_CONTEXT)) |
| 67 | |
| 68 | #define IOPTE_STREAMING(CTX) \ |
| 69 | (IOPTE_CONSISTENT(CTX) | IOPTE_STBUF) |
| 70 | |
| 71 | /* Existing mappings are never marked invalid, instead they |
| 72 | * are pointed to a dummy page. |
| 73 | */ |
| 74 | #define IOPTE_IS_DUMMY(iommu, iopte) \ |
| 75 | ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa) |
| 76 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 77 | static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | { |
| 79 | unsigned long val = iopte_val(*iopte); |
| 80 | |
| 81 | val &= ~IOPTE_PAGE; |
| 82 | val |= iommu->dummy_page_pa; |
| 83 | |
| 84 | iopte_val(*iopte) = val; |
| 85 | } |
| 86 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 87 | /* Based almost entirely upon the ppc64 iommu allocator. If you use the 'handle' |
| 88 | * facility it must all be done in one pass while under the iommu lock. |
| 89 | * |
| 90 | * On sun4u platforms, we only flush the IOMMU once every time we've passed |
| 91 | * over the entire page table doing allocations. Therefore we only ever advance |
| 92 | * the hint and cannot backtrack it. |
| 93 | */ |
| 94 | unsigned long iommu_range_alloc(struct device *dev, |
| 95 | struct iommu *iommu, |
| 96 | unsigned long npages, |
| 97 | unsigned long *handle) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 98 | { |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 99 | unsigned long n, end, start, limit, boundary_size; |
David S. Miller | 9b3627f | 2007-04-24 23:51:18 -0700 | [diff] [blame] | 100 | struct iommu_arena *arena = &iommu->arena; |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 101 | int pass = 0; |
| 102 | |
| 103 | /* This allocator was derived from x86_64's bit string search */ |
| 104 | |
| 105 | /* Sanity check */ |
| 106 | if (unlikely(npages == 0)) { |
| 107 | if (printk_ratelimit()) |
| 108 | WARN_ON(1); |
| 109 | return DMA_ERROR_CODE; |
| 110 | } |
| 111 | |
| 112 | if (handle && *handle) |
| 113 | start = *handle; |
| 114 | else |
| 115 | start = arena->hint; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 116 | |
| 117 | limit = arena->limit; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 118 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 119 | /* The case below can happen if we have a small segment appended |
| 120 | * to a large, or when the previous alloc was at the very end of |
| 121 | * the available space. If so, go back to the beginning and flush. |
| 122 | */ |
| 123 | if (start >= limit) { |
| 124 | start = 0; |
| 125 | if (iommu->flush_all) |
| 126 | iommu->flush_all(iommu); |
| 127 | } |
| 128 | |
| 129 | again: |
| 130 | |
| 131 | if (dev) |
| 132 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
| 133 | 1 << IO_PAGE_SHIFT); |
| 134 | else |
| 135 | boundary_size = ALIGN(1UL << 32, 1 << IO_PAGE_SHIFT); |
| 136 | |
| 137 | n = iommu_area_alloc(arena->map, limit, start, npages, 0, |
| 138 | boundary_size >> IO_PAGE_SHIFT, 0); |
| 139 | if (n == -1) { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 140 | if (likely(pass < 1)) { |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 141 | /* First failure, rescan from the beginning. */ |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 142 | start = 0; |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 143 | if (iommu->flush_all) |
| 144 | iommu->flush_all(iommu); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 145 | pass++; |
| 146 | goto again; |
| 147 | } else { |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 148 | /* Second failure, give up */ |
| 149 | return DMA_ERROR_CODE; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 150 | } |
| 151 | } |
| 152 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 153 | end = n + npages; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 154 | |
| 155 | arena->hint = end; |
| 156 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 157 | /* Update handle for SG allocations */ |
| 158 | if (handle) |
| 159 | *handle = end; |
| 160 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 161 | return n; |
| 162 | } |
| 163 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 164 | void iommu_range_free(struct iommu *iommu, dma_addr_t dma_addr, unsigned long npages) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 165 | { |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 166 | struct iommu_arena *arena = &iommu->arena; |
| 167 | unsigned long entry; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 168 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 169 | entry = (dma_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT; |
| 170 | |
| 171 | iommu_area_free(arena->map, entry, npages); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 172 | } |
| 173 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 174 | int iommu_table_init(struct iommu *iommu, int tsbsize, |
| 175 | u32 dma_offset, u32 dma_addr_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 177 | unsigned long i, tsbbase, order, sz, num_tsb_entries; |
| 178 | |
| 179 | num_tsb_entries = tsbsize / sizeof(iopte_t); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 181 | /* Setup initial software IOMMU state. */ |
| 182 | spin_lock_init(&iommu->lock); |
| 183 | iommu->ctx_lowest_free = 1; |
| 184 | iommu->page_table_map_base = dma_offset; |
| 185 | iommu->dma_addr_mask = dma_addr_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 187 | /* Allocate and initialize the free area map. */ |
| 188 | sz = num_tsb_entries / 8; |
| 189 | sz = (sz + 7UL) & ~7UL; |
Eric Sesterhenn | 9132983 | 2006-03-06 13:48:40 -0800 | [diff] [blame] | 190 | iommu->arena.map = kzalloc(sz, GFP_KERNEL); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 191 | if (!iommu->arena.map) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 192 | printk(KERN_ERR "IOMMU: Error, kmalloc(arena.map) failed.\n"); |
| 193 | return -ENOMEM; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 194 | } |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 195 | iommu->arena.limit = num_tsb_entries; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 196 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 197 | if (tlb_type != hypervisor) |
| 198 | iommu->flush_all = iommu_flushall; |
| 199 | |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 200 | /* Allocate and initialize the dummy page which we |
| 201 | * set inactive IO PTEs to point to. |
| 202 | */ |
| 203 | iommu->dummy_page = __get_free_pages(GFP_KERNEL, 0); |
| 204 | if (!iommu->dummy_page) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 205 | printk(KERN_ERR "IOMMU: Error, gfp(dummy_page) failed.\n"); |
| 206 | goto out_free_map; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 207 | } |
| 208 | memset((void *)iommu->dummy_page, 0, PAGE_SIZE); |
| 209 | iommu->dummy_page_pa = (unsigned long) __pa(iommu->dummy_page); |
| 210 | |
| 211 | /* Now allocate and setup the IOMMU page table itself. */ |
| 212 | order = get_order(tsbsize); |
| 213 | tsbbase = __get_free_pages(GFP_KERNEL, order); |
| 214 | if (!tsbbase) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 215 | printk(KERN_ERR "IOMMU: Error, gfp(tsb) failed.\n"); |
| 216 | goto out_free_dummy_page; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 217 | } |
| 218 | iommu->page_table = (iopte_t *)tsbbase; |
| 219 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 220 | for (i = 0; i < num_tsb_entries; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | iopte_make_dummy(iommu, &iommu->page_table[i]); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 222 | |
| 223 | return 0; |
| 224 | |
| 225 | out_free_dummy_page: |
| 226 | free_page(iommu->dummy_page); |
| 227 | iommu->dummy_page = 0UL; |
| 228 | |
| 229 | out_free_map: |
| 230 | kfree(iommu->arena.map); |
| 231 | iommu->arena.map = NULL; |
| 232 | |
| 233 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | } |
| 235 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 236 | static inline iopte_t *alloc_npages(struct device *dev, struct iommu *iommu, |
| 237 | unsigned long npages) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 238 | { |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 239 | unsigned long entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 241 | entry = iommu_range_alloc(dev, iommu, npages, NULL); |
| 242 | if (unlikely(entry == DMA_ERROR_CODE)) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 243 | return NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 245 | return iommu->page_table + entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | } |
| 247 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 248 | static int iommu_alloc_ctx(struct iommu *iommu) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 249 | { |
| 250 | int lowest = iommu->ctx_lowest_free; |
| 251 | int sz = IOMMU_NUM_CTXS - lowest; |
| 252 | int n = find_next_zero_bit(iommu->ctx_bitmap, sz, lowest); |
| 253 | |
| 254 | if (unlikely(n == sz)) { |
| 255 | n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1); |
| 256 | if (unlikely(n == lowest)) { |
| 257 | printk(KERN_WARNING "IOMMU: Ran out of contexts.\n"); |
| 258 | n = 0; |
| 259 | } |
| 260 | } |
| 261 | if (n) |
| 262 | __set_bit(n, iommu->ctx_bitmap); |
| 263 | |
| 264 | return n; |
| 265 | } |
| 266 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 267 | static inline void iommu_free_ctx(struct iommu *iommu, int ctx) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 268 | { |
| 269 | if (likely(ctx)) { |
| 270 | __clear_bit(ctx, iommu->ctx_bitmap); |
| 271 | if (ctx < iommu->ctx_lowest_free) |
| 272 | iommu->ctx_lowest_free = ctx; |
| 273 | } |
| 274 | } |
| 275 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 276 | static void *dma_4u_alloc_coherent(struct device *dev, size_t size, |
| 277 | dma_addr_t *dma_addrp, gfp_t gfp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 279 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | iopte_t *iopte; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 281 | unsigned long flags, order, first_page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | void *ret; |
| 283 | int npages; |
| 284 | |
| 285 | size = IO_PAGE_ALIGN(size); |
| 286 | order = get_order(size); |
| 287 | if (order >= 10) |
| 288 | return NULL; |
| 289 | |
David S. Miller | 42f1423 | 2006-05-23 02:07:22 -0700 | [diff] [blame] | 290 | first_page = __get_free_pages(gfp, order); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | if (first_page == 0UL) |
| 292 | return NULL; |
| 293 | memset((char *)first_page, 0, PAGE_SIZE << order); |
| 294 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 295 | iommu = dev->archdata.iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | |
| 297 | spin_lock_irqsave(&iommu->lock, flags); |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 298 | iopte = alloc_npages(dev, iommu, size >> IO_PAGE_SHIFT); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 299 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 300 | |
| 301 | if (unlikely(iopte == NULL)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | free_pages(first_page, order); |
| 303 | return NULL; |
| 304 | } |
| 305 | |
| 306 | *dma_addrp = (iommu->page_table_map_base + |
| 307 | ((iopte - iommu->page_table) << IO_PAGE_SHIFT)); |
| 308 | ret = (void *) first_page; |
| 309 | npages = size >> IO_PAGE_SHIFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | first_page = __pa(first_page); |
| 311 | while (npages--) { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 312 | iopte_val(*iopte) = (IOPTE_CONSISTENT(0UL) | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | IOPTE_WRITE | |
| 314 | (first_page & IOPTE_PAGE)); |
| 315 | iopte++; |
| 316 | first_page += IO_PAGE_SIZE; |
| 317 | } |
| 318 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | return ret; |
| 320 | } |
| 321 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 322 | static void dma_4u_free_coherent(struct device *dev, size_t size, |
| 323 | void *cpu, dma_addr_t dvma) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 325 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | iopte_t *iopte; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 327 | unsigned long flags, order, npages; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | |
| 329 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 330 | iommu = dev->archdata.iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 331 | iopte = iommu->page_table + |
| 332 | ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 333 | |
| 334 | spin_lock_irqsave(&iommu->lock, flags); |
| 335 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 336 | iommu_range_free(iommu, dvma, npages); |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 337 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 339 | |
| 340 | order = get_order(size); |
| 341 | if (order < 10) |
| 342 | free_pages((unsigned long)cpu, order); |
| 343 | } |
| 344 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 345 | static dma_addr_t dma_4u_map_single(struct device *dev, void *ptr, size_t sz, |
| 346 | enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 348 | struct iommu *iommu; |
| 349 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | iopte_t *base; |
| 351 | unsigned long flags, npages, oaddr; |
| 352 | unsigned long i, base_paddr, ctx; |
| 353 | u32 bus_addr, ret; |
| 354 | unsigned long iopte_protection; |
| 355 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 356 | iommu = dev->archdata.iommu; |
| 357 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 359 | if (unlikely(direction == DMA_NONE)) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 360 | goto bad_no_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | |
| 362 | oaddr = (unsigned long)ptr; |
| 363 | npages = IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); |
| 364 | npages >>= IO_PAGE_SHIFT; |
| 365 | |
| 366 | spin_lock_irqsave(&iommu->lock, flags); |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 367 | base = alloc_npages(dev, iommu, npages); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 368 | ctx = 0; |
| 369 | if (iommu->iommu_ctxflush) |
| 370 | ctx = iommu_alloc_ctx(iommu); |
| 371 | spin_unlock_irqrestore(&iommu->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 373 | if (unlikely(!base)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 374 | goto bad; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 375 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | bus_addr = (iommu->page_table_map_base + |
| 377 | ((base - iommu->page_table) << IO_PAGE_SHIFT)); |
| 378 | ret = bus_addr | (oaddr & ~IO_PAGE_MASK); |
| 379 | base_paddr = __pa(oaddr & IO_PAGE_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 380 | if (strbuf->strbuf_enabled) |
| 381 | iopte_protection = IOPTE_STREAMING(ctx); |
| 382 | else |
| 383 | iopte_protection = IOPTE_CONSISTENT(ctx); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 384 | if (direction != DMA_TO_DEVICE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | iopte_protection |= IOPTE_WRITE; |
| 386 | |
| 387 | for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) |
| 388 | iopte_val(*base) = iopte_protection | base_paddr; |
| 389 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | return ret; |
| 391 | |
| 392 | bad: |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 393 | iommu_free_ctx(iommu, ctx); |
| 394 | bad_no_ctx: |
| 395 | if (printk_ratelimit()) |
| 396 | WARN_ON(1); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 397 | return DMA_ERROR_CODE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 398 | } |
| 399 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 400 | static void strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, |
| 401 | u32 vaddr, unsigned long ctx, unsigned long npages, |
| 402 | enum dma_data_direction direction) |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 403 | { |
| 404 | int limit; |
| 405 | |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 406 | if (strbuf->strbuf_ctxflush && |
| 407 | iommu->iommu_ctxflush) { |
| 408 | unsigned long matchreg, flushreg; |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 409 | u64 val; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 410 | |
| 411 | flushreg = strbuf->strbuf_ctxflush; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 412 | matchreg = STC_CTXMATCH_ADDR(strbuf, ctx); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 413 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 414 | iommu_write(flushreg, ctx); |
| 415 | val = iommu_read(matchreg); |
David S. Miller | 88314ee | 2005-05-31 19:13:52 -0700 | [diff] [blame] | 416 | val &= 0xffff; |
| 417 | if (!val) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 418 | goto do_flush_sync; |
| 419 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 420 | while (val) { |
| 421 | if (val & 0x1) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 422 | iommu_write(flushreg, ctx); |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 423 | val >>= 1; |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 424 | } |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 425 | val = iommu_read(matchreg); |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 426 | if (unlikely(val)) { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 427 | printk(KERN_WARNING "strbuf_flush: ctx flush " |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 428 | "timeout matchreg[%lx] ctx[%lx]\n", |
| 429 | val, ctx); |
| 430 | goto do_page_flush; |
| 431 | } |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 432 | } else { |
| 433 | unsigned long i; |
| 434 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 435 | do_page_flush: |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 436 | for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 437 | iommu_write(strbuf->strbuf_pflush, vaddr); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 438 | } |
| 439 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 440 | do_flush_sync: |
| 441 | /* If the device could not have possibly put dirty data into |
| 442 | * the streaming cache, no flush-flag synchronization needs |
| 443 | * to be performed. |
| 444 | */ |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 445 | if (direction == DMA_TO_DEVICE) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 446 | return; |
| 447 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 448 | STC_FLUSHFLAG_INIT(strbuf); |
| 449 | iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa); |
| 450 | (void) iommu_read(iommu->write_complete_reg); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 451 | |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 452 | limit = 100000; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 453 | while (!STC_FLUSHFLAG_SET(strbuf)) { |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 454 | limit--; |
| 455 | if (!limit) |
| 456 | break; |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 457 | udelay(1); |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 458 | rmb(); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 459 | } |
| 460 | if (!limit) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 461 | printk(KERN_WARNING "strbuf_flush: flushflag timeout " |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 462 | "vaddr[%08x] ctx[%lx] npages[%ld]\n", |
| 463 | vaddr, ctx, npages); |
| 464 | } |
| 465 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 466 | static void dma_4u_unmap_single(struct device *dev, dma_addr_t bus_addr, |
| 467 | size_t sz, enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 469 | struct iommu *iommu; |
| 470 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | iopte_t *base; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 472 | unsigned long flags, npages, ctx, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 474 | if (unlikely(direction == DMA_NONE)) { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 475 | if (printk_ratelimit()) |
| 476 | WARN_ON(1); |
| 477 | return; |
| 478 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 480 | iommu = dev->archdata.iommu; |
| 481 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | |
| 483 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| 484 | npages >>= IO_PAGE_SHIFT; |
| 485 | base = iommu->page_table + |
| 486 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | bus_addr &= IO_PAGE_MASK; |
| 488 | |
| 489 | spin_lock_irqsave(&iommu->lock, flags); |
| 490 | |
| 491 | /* Record the context, if any. */ |
| 492 | ctx = 0; |
| 493 | if (iommu->iommu_ctxflush) |
| 494 | ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL; |
| 495 | |
| 496 | /* Step 1: Kick data out of streaming buffers if necessary. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 497 | if (strbuf->strbuf_enabled) |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 498 | strbuf_flush(strbuf, iommu, bus_addr, ctx, |
| 499 | npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 501 | /* Step 2: Clear out TSB entries. */ |
| 502 | for (i = 0; i < npages; i++) |
| 503 | iopte_make_dummy(iommu, base + i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | |
David S. Miller | d284142 | 2008-02-08 18:05:46 -0800 | [diff] [blame] | 505 | iommu_range_free(iommu, bus_addr, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 506 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 507 | iommu_free_ctx(iommu, ctx); |
| 508 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 509 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 510 | } |
| 511 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 512 | static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist, |
| 513 | int nelems, enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | { |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 515 | struct scatterlist *s, *outs, *segstart; |
| 516 | unsigned long flags, handle, prot, ctx; |
| 517 | dma_addr_t dma_next = 0, dma_addr; |
| 518 | unsigned int max_seg_size; |
| 519 | int outcount, incount, i; |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 520 | struct strbuf *strbuf; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame] | 521 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 523 | BUG_ON(direction == DMA_NONE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 525 | iommu = dev->archdata.iommu; |
| 526 | strbuf = dev->archdata.stc; |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 527 | if (nelems == 0 || !iommu) |
| 528 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | |
| 530 | spin_lock_irqsave(&iommu->lock, flags); |
| 531 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 532 | ctx = 0; |
| 533 | if (iommu->iommu_ctxflush) |
| 534 | ctx = iommu_alloc_ctx(iommu); |
| 535 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 536 | if (strbuf->strbuf_enabled) |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 537 | prot = IOPTE_STREAMING(ctx); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | else |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 539 | prot = IOPTE_CONSISTENT(ctx); |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 540 | if (direction != DMA_TO_DEVICE) |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 541 | prot |= IOPTE_WRITE; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 542 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 543 | outs = s = segstart = &sglist[0]; |
| 544 | outcount = 1; |
| 545 | incount = nelems; |
| 546 | handle = 0; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 547 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 548 | /* Init first segment length for backout at failure */ |
| 549 | outs->dma_length = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 551 | max_seg_size = dma_get_max_seg_size(dev); |
| 552 | for_each_sg(sglist, s, nelems, i) { |
| 553 | unsigned long paddr, npages, entry, slen; |
| 554 | iopte_t *base; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame] | 555 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 556 | slen = s->length; |
| 557 | /* Sanity check */ |
| 558 | if (slen == 0) { |
| 559 | dma_next = 0; |
| 560 | continue; |
| 561 | } |
| 562 | /* Allocate iommu entries for that segment */ |
| 563 | paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s); |
| 564 | npages = iommu_num_pages(paddr, slen); |
| 565 | entry = iommu_range_alloc(dev, iommu, npages, &handle); |
| 566 | |
| 567 | /* Handle failure */ |
| 568 | if (unlikely(entry == DMA_ERROR_CODE)) { |
| 569 | if (printk_ratelimit()) |
| 570 | printk(KERN_INFO "iommu_alloc failed, iommu %p paddr %lx" |
| 571 | " npages %lx\n", iommu, paddr, npages); |
| 572 | goto iommu_map_failed; |
| 573 | } |
| 574 | |
| 575 | base = iommu->page_table + entry; |
| 576 | |
| 577 | /* Convert entry to a dma_addr_t */ |
| 578 | dma_addr = iommu->page_table_map_base + |
| 579 | (entry << IO_PAGE_SHIFT); |
| 580 | dma_addr |= (s->offset & ~IO_PAGE_MASK); |
| 581 | |
| 582 | /* Insert into HW table */ |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame] | 583 | paddr &= IO_PAGE_MASK; |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 584 | while (npages--) { |
| 585 | iopte_val(*base) = prot | paddr; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame] | 586 | base++; |
| 587 | paddr += IO_PAGE_SIZE; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame] | 588 | } |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 589 | |
| 590 | /* If we are in an open segment, try merging */ |
| 591 | if (segstart != s) { |
| 592 | /* We cannot merge if: |
| 593 | * - allocated dma_addr isn't contiguous to previous allocation |
| 594 | */ |
| 595 | if ((dma_addr != dma_next) || |
| 596 | (outs->dma_length + s->length > max_seg_size)) { |
| 597 | /* Can't merge: create a new segment */ |
| 598 | segstart = s; |
| 599 | outcount++; |
| 600 | outs = sg_next(outs); |
| 601 | } else { |
| 602 | outs->dma_length += s->length; |
| 603 | } |
| 604 | } |
| 605 | |
| 606 | if (segstart == s) { |
| 607 | /* This is a new segment, fill entries */ |
| 608 | outs->dma_address = dma_addr; |
| 609 | outs->dma_length = slen; |
| 610 | } |
| 611 | |
| 612 | /* Calculate next page pointer for contiguous check */ |
| 613 | dma_next = dma_addr + slen; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame] | 614 | } |
| 615 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 616 | spin_unlock_irqrestore(&iommu->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 618 | if (outcount < incount) { |
| 619 | outs = sg_next(outs); |
| 620 | outs->dma_address = DMA_ERROR_CODE; |
| 621 | outs->dma_length = 0; |
| 622 | } |
| 623 | |
| 624 | return outcount; |
| 625 | |
| 626 | iommu_map_failed: |
| 627 | for_each_sg(sglist, s, nelems, i) { |
| 628 | if (s->dma_length != 0) { |
| 629 | unsigned long vaddr, npages, entry, i; |
| 630 | iopte_t *base; |
| 631 | |
| 632 | vaddr = s->dma_address & IO_PAGE_MASK; |
| 633 | npages = iommu_num_pages(s->dma_address, s->dma_length); |
| 634 | iommu_range_free(iommu, vaddr, npages); |
| 635 | |
| 636 | entry = (vaddr - iommu->page_table_map_base) |
| 637 | >> IO_PAGE_SHIFT; |
| 638 | base = iommu->page_table + entry; |
| 639 | |
| 640 | for (i = 0; i < npages; i++) |
| 641 | iopte_make_dummy(iommu, base + i); |
| 642 | |
| 643 | s->dma_address = DMA_ERROR_CODE; |
| 644 | s->dma_length = 0; |
| 645 | } |
| 646 | if (s == outs) |
| 647 | break; |
| 648 | } |
| 649 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 650 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 651 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | } |
| 653 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 654 | /* If contexts are being used, they are the same in all of the mappings |
| 655 | * we make for a particular SG. |
| 656 | */ |
| 657 | static unsigned long fetch_sg_ctx(struct iommu *iommu, struct scatterlist *sg) |
| 658 | { |
| 659 | unsigned long ctx = 0; |
| 660 | |
| 661 | if (iommu->iommu_ctxflush) { |
| 662 | iopte_t *base; |
| 663 | u32 bus_addr; |
| 664 | |
| 665 | bus_addr = sg->dma_address & IO_PAGE_MASK; |
| 666 | base = iommu->page_table + |
| 667 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 668 | |
| 669 | ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL; |
| 670 | } |
| 671 | return ctx; |
| 672 | } |
| 673 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 674 | static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist, |
| 675 | int nelems, enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 676 | { |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 677 | unsigned long flags, ctx; |
| 678 | struct scatterlist *sg; |
David S. Miller | 38192d5 | 2008-02-06 03:50:26 -0800 | [diff] [blame] | 679 | struct strbuf *strbuf; |
| 680 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 681 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 682 | BUG_ON(direction == DMA_NONE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 683 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 684 | iommu = dev->archdata.iommu; |
| 685 | strbuf = dev->archdata.stc; |
| 686 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 687 | ctx = fetch_sg_ctx(iommu, sglist); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 688 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | spin_lock_irqsave(&iommu->lock, flags); |
| 690 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 691 | sg = sglist; |
| 692 | while (nelems--) { |
| 693 | dma_addr_t dma_handle = sg->dma_address; |
| 694 | unsigned int len = sg->dma_length; |
| 695 | unsigned long npages, entry; |
| 696 | iopte_t *base; |
| 697 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 699 | if (!len) |
| 700 | break; |
| 701 | npages = iommu_num_pages(dma_handle, len); |
| 702 | iommu_range_free(iommu, dma_handle, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 704 | entry = ((dma_handle - iommu->page_table_map_base) |
| 705 | >> IO_PAGE_SHIFT); |
| 706 | base = iommu->page_table + entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | |
David S. Miller | 13fa14e | 2008-02-09 03:11:01 -0800 | [diff] [blame^] | 708 | dma_handle &= IO_PAGE_MASK; |
| 709 | if (strbuf->strbuf_enabled) |
| 710 | strbuf_flush(strbuf, iommu, dma_handle, ctx, |
| 711 | npages, direction); |
| 712 | |
| 713 | for (i = 0; i < npages; i++) |
| 714 | iopte_make_dummy(iommu, base + i); |
| 715 | |
| 716 | sg = sg_next(sg); |
| 717 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 719 | iommu_free_ctx(iommu, ctx); |
| 720 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 722 | } |
| 723 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 724 | static void dma_4u_sync_single_for_cpu(struct device *dev, |
| 725 | dma_addr_t bus_addr, size_t sz, |
| 726 | enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 727 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 728 | struct iommu *iommu; |
| 729 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | unsigned long flags, ctx, npages; |
| 731 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 732 | iommu = dev->archdata.iommu; |
| 733 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | |
| 735 | if (!strbuf->strbuf_enabled) |
| 736 | return; |
| 737 | |
| 738 | spin_lock_irqsave(&iommu->lock, flags); |
| 739 | |
| 740 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| 741 | npages >>= IO_PAGE_SHIFT; |
| 742 | bus_addr &= IO_PAGE_MASK; |
| 743 | |
| 744 | /* Step 1: Record the context, if any. */ |
| 745 | ctx = 0; |
| 746 | if (iommu->iommu_ctxflush && |
| 747 | strbuf->strbuf_ctxflush) { |
| 748 | iopte_t *iopte; |
| 749 | |
| 750 | iopte = iommu->page_table + |
| 751 | ((bus_addr - iommu->page_table_map_base)>>IO_PAGE_SHIFT); |
| 752 | ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL; |
| 753 | } |
| 754 | |
| 755 | /* Step 2: Kick data out of streaming buffers. */ |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 756 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | |
| 758 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 759 | } |
| 760 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 761 | static void dma_4u_sync_sg_for_cpu(struct device *dev, |
| 762 | struct scatterlist *sglist, int nelems, |
| 763 | enum dma_data_direction direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 765 | struct iommu *iommu; |
| 766 | struct strbuf *strbuf; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 767 | unsigned long flags, ctx, npages, i; |
Jens Axboe | 2c941a2 | 2007-08-07 09:37:10 +0200 | [diff] [blame] | 768 | struct scatterlist *sg, *sgprv; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 769 | u32 bus_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 771 | iommu = dev->archdata.iommu; |
| 772 | strbuf = dev->archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | |
| 774 | if (!strbuf->strbuf_enabled) |
| 775 | return; |
| 776 | |
| 777 | spin_lock_irqsave(&iommu->lock, flags); |
| 778 | |
| 779 | /* Step 1: Record the context, if any. */ |
| 780 | ctx = 0; |
| 781 | if (iommu->iommu_ctxflush && |
| 782 | strbuf->strbuf_ctxflush) { |
| 783 | iopte_t *iopte; |
| 784 | |
| 785 | iopte = iommu->page_table + |
| 786 | ((sglist[0].dma_address - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 787 | ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL; |
| 788 | } |
| 789 | |
| 790 | /* Step 2: Kick data out of streaming buffers. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 791 | bus_addr = sglist[0].dma_address & IO_PAGE_MASK; |
Jens Axboe | 2c941a2 | 2007-08-07 09:37:10 +0200 | [diff] [blame] | 792 | sgprv = NULL; |
| 793 | for_each_sg(sglist, sg, nelems, i) { |
| 794 | if (sg->dma_length == 0) |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 795 | break; |
Jens Axboe | 2c941a2 | 2007-08-07 09:37:10 +0200 | [diff] [blame] | 796 | sgprv = sg; |
| 797 | } |
| 798 | |
| 799 | npages = (IO_PAGE_ALIGN(sgprv->dma_address + sgprv->dma_length) |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 800 | - bus_addr) >> IO_PAGE_SHIFT; |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 801 | strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 802 | |
| 803 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 804 | } |
| 805 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 806 | const struct dma_ops sun4u_dma_ops = { |
| 807 | .alloc_coherent = dma_4u_alloc_coherent, |
| 808 | .free_coherent = dma_4u_free_coherent, |
| 809 | .map_single = dma_4u_map_single, |
| 810 | .unmap_single = dma_4u_unmap_single, |
| 811 | .map_sg = dma_4u_map_sg, |
| 812 | .unmap_sg = dma_4u_unmap_sg, |
| 813 | .sync_single_for_cpu = dma_4u_sync_single_for_cpu, |
| 814 | .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu, |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 815 | }; |
| 816 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 817 | const struct dma_ops *dma_ops = &sun4u_dma_ops; |
| 818 | EXPORT_SYMBOL(dma_ops); |
| 819 | |
| 820 | int dma_supported(struct device *dev, u64 device_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 821 | { |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 822 | struct iommu *iommu = dev->archdata.iommu; |
| 823 | u64 dma_addr_mask = iommu->dma_addr_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 824 | |
| 825 | if (device_mask >= (1UL << 32UL)) |
| 826 | return 0; |
| 827 | |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 828 | if ((device_mask & dma_addr_mask) == dma_addr_mask) |
| 829 | return 1; |
| 830 | |
| 831 | #ifdef CONFIG_PCI |
| 832 | if (dev->bus == &pci_bus_type) |
| 833 | return pci_dma_supported(to_pci_dev(dev), device_mask); |
| 834 | #endif |
| 835 | |
| 836 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | } |
David S. Miller | ad7ad57 | 2007-07-27 22:39:14 -0700 | [diff] [blame] | 838 | EXPORT_SYMBOL(dma_supported); |
| 839 | |
| 840 | int dma_set_mask(struct device *dev, u64 dma_mask) |
| 841 | { |
| 842 | #ifdef CONFIG_PCI |
| 843 | if (dev->bus == &pci_bus_type) |
| 844 | return pci_set_dma_mask(to_pci_dev(dev), dma_mask); |
| 845 | #endif |
| 846 | return -EINVAL; |
| 847 | } |
| 848 | EXPORT_SYMBOL(dma_set_mask); |