blob: bb6aeea1c87f27789607e9d7934b3a078d92be39 [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
Vasanthakumar Thiagarajan1b2df402012-02-06 20:15:53 +05304 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
Kalle Valobdcd8172011-07-18 00:22:30 +03005 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
Joe Perches516304b2012-03-18 17:30:52 -070019#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
Stephen Rothwellc6efe5782011-09-28 18:32:34 +100021#include <linux/moduleparam.h>
Sangwook Leef7830202011-10-26 16:28:38 +010022#include <linux/errno.h>
Kalle Valod6a434d2012-01-17 20:09:36 +020023#include <linux/export.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030024#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030025#include <linux/mmc/sdio_func.h>
Vivek Natarajan84377542012-03-28 19:21:25 +053026#include <linux/vmalloc.h>
Kalle Valod6a434d2012-01-17 20:09:36 +020027
Kalle Valobdcd8172011-07-18 00:22:30 +030028#include "core.h"
29#include "cfg80211.h"
30#include "target.h"
31#include "debug.h"
32#include "hif-ops.h"
Kalle Valoe76ac2bf2012-03-25 17:15:27 +030033#include "htc-ops.h"
Kalle Valobdcd8172011-07-18 00:22:30 +030034
Kalle Valo856f4b312011-11-14 19:30:29 +020035static const struct ath6kl_hw hw_list[] = {
36 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020037 .id = AR6003_HW_2_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020038 .name = "ar6003 hw 2.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020039 .dataset_patch_addr = 0x57e884,
40 .app_load_addr = 0x543180,
41 .board_ext_data_addr = 0x57e500,
42 .reserved_ram_size = 6912,
Ryan Hsu39586bf2011-12-13 17:11:07 +080043 .refclk_hz = 26000000,
44 .uarttx_pin = 8,
Bala Shanmugam06e360a2012-05-22 13:23:12 +053045 .flags = 0,
Kalle Valo856f4b312011-11-14 19:30:29 +020046
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
Kalle Valod1a94212011-11-14 19:31:23 +020049
Kalle Valoc0038972011-12-16 20:53:31 +020050 .fw = {
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020056 },
57
Kalle Valod1a94212011-11-14 19:31:23 +020058 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020060 },
61 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020062 .id = AR6003_HW_2_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020063 .name = "ar6003 hw 2.1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +020064 .dataset_patch_addr = 0x57ff74,
65 .app_load_addr = 0x1234,
66 .board_ext_data_addr = 0x542330,
67 .reserved_ram_size = 512,
Ryan Hsu39586bf2011-12-13 17:11:07 +080068 .refclk_hz = 26000000,
69 .uarttx_pin = 8,
Alex Yangcd23c1c2012-01-17 15:32:29 +020070 .testscript_addr = 0x57ef74,
Bala Shanmugam06e360a2012-05-22 13:23:12 +053071 .flags = 0,
Kalle Valod1a94212011-11-14 19:31:23 +020072
Kalle Valoc0038972011-12-16 20:53:31 +020073 .fw = {
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
Alex Yangcd23c1c2012-01-17 15:32:29 +020079 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020081 },
82
Kalle Valod1a94212011-11-14 19:31:23 +020083 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
Kalle Valo05aab172012-03-07 20:04:00 +020084 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020085 },
86 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020087 .id = AR6004_HW_1_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020088 .name = "ar6004 hw 1.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020089 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 19456,
Kalle Valo0d4d72b2011-11-14 19:30:39 +020093 .board_addr = 0x433900,
Ryan Hsu39586bf2011-12-13 17:11:07 +080094 .refclk_hz = 26000000,
95 .uarttx_pin = 11,
Mohammed Shafi Shajakhan7ac25ea2012-09-27 18:19:51 +053096 .flags = ATH6KL_HW_64BIT_RATES |
97 ATH6KL_HW_AP_INACTIVITY_MINS,
Kalle Valod1a94212011-11-14 19:31:23 +020098
Kalle Valoc0038972011-12-16 20:53:31 +020099 .fw = {
100 .dir = AR6004_HW_1_0_FW_DIR,
101 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +0200102 },
103
Kalle Valod1a94212011-11-14 19:31:23 +0200104 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
105 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200106 },
107 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +0200108 .id = AR6004_HW_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +0200109 .name = "ar6004 hw 1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +0200110 .dataset_patch_addr = 0x57e884,
111 .app_load_addr = 0x1234,
112 .board_ext_data_addr = 0x437000,
113 .reserved_ram_size = 11264,
Kalle Valo0d4d72b2011-11-14 19:30:39 +0200114 .board_addr = 0x43d400,
Ryan Hsu39586bf2011-12-13 17:11:07 +0800115 .refclk_hz = 40000000,
116 .uarttx_pin = 11,
Mohammed Shafi Shajakhan7ac25ea2012-09-27 18:19:51 +0530117 .flags = ATH6KL_HW_64BIT_RATES |
118 ATH6KL_HW_AP_INACTIVITY_MINS,
Kalle Valoc0038972011-12-16 20:53:31 +0200119 .fw = {
120 .dir = AR6004_HW_1_1_FW_DIR,
121 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +0200122 },
123
Kalle Valod1a94212011-11-14 19:31:23 +0200124 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
125 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200126 },
Ray Chen6146ca62012-04-11 10:03:13 +0800127 {
128 .id = AR6004_HW_1_2_VERSION,
129 .name = "ar6004 hw 1.2",
130 .dataset_patch_addr = 0x436ecc,
131 .app_load_addr = 0x1234,
132 .board_ext_data_addr = 0x437000,
133 .reserved_ram_size = 9216,
134 .board_addr = 0x435c00,
135 .refclk_hz = 40000000,
136 .uarttx_pin = 11,
Mohammed Shafi Shajakhan7ac25ea2012-09-27 18:19:51 +0530137 .flags = ATH6KL_HW_64BIT_RATES |
138 ATH6KL_HW_AP_INACTIVITY_MINS,
Ray Chen6146ca62012-04-11 10:03:13 +0800139
140 .fw = {
141 .dir = AR6004_HW_1_2_FW_DIR,
142 .fw = AR6004_HW_1_2_FIRMWARE_FILE,
143 },
144 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE,
145 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
146 },
Bala Shanmugambf744f12012-07-17 12:01:55 +0530147 {
148 .id = AR6004_HW_1_3_VERSION,
149 .name = "ar6004 hw 1.3",
150 .dataset_patch_addr = 0x437860,
151 .app_load_addr = 0x1234,
152 .board_ext_data_addr = 0x437000,
153 .reserved_ram_size = 7168,
154 .board_addr = 0x436400,
155 .refclk_hz = 40000000,
156 .uarttx_pin = 11,
Mohammed Shafi Shajakhan7ac25ea2012-09-27 18:19:51 +0530157 .flags = ATH6KL_HW_64BIT_RATES |
Mohammed Shafi Shajakhan171fe762012-09-27 18:19:52 +0530158 ATH6KL_HW_AP_INACTIVITY_MINS |
159 ATH6KL_HW_MAP_LP_ENDPOINT,
Bala Shanmugambf744f12012-07-17 12:01:55 +0530160
161 .fw = {
162 .dir = AR6004_HW_1_3_FW_DIR,
163 .fw = AR6004_HW_1_3_FIRMWARE_FILE,
164 },
165
166 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE,
167 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
168 },
Kalle Valo856f4b312011-11-14 19:30:29 +0200169};
170
Kalle Valobdcd8172011-07-18 00:22:30 +0300171/*
172 * Include definitions here that can be used to tune the WLAN module
173 * behavior. Different customers can tune the behavior as per their needs,
174 * here.
175 */
176
177/*
178 * This configuration item enable/disable keepalive support.
179 * Keepalive support: In the absence of any data traffic to AP, null
180 * frames will be sent to the AP at periodic interval, to keep the association
181 * active. This configuration item defines the periodic interval.
182 * Use value of zero to disable keepalive support
183 * Default: 60 seconds
184 */
185#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
186
187/*
188 * This configuration item sets the value of disconnect timeout
189 * Firmware delays sending the disconnec event to the host for this
190 * timeout after is gets disconnected from the current AP.
191 * If the firmware successly roams within the disconnect timeout
192 * it sends a new connect event
193 */
194#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
195
Kalle Valobdcd8172011-07-18 00:22:30 +0300196
Kalle Valobdcd8172011-07-18 00:22:30 +0300197#define ATH6KL_DATA_OFFSET 64
198struct sk_buff *ath6kl_buf_alloc(int size)
199{
200 struct sk_buff *skb;
201 u16 reserved;
202
203 /* Add chacheline space at front and back of buffer */
204 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +0530205 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +0300206 skb = dev_alloc_skb(size + reserved);
207
208 if (skb)
209 skb_reserve(skb, reserved - L1_CACHE_BYTES);
210 return skb;
211}
212
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530213void ath6kl_init_profile_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300214{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530215 vif->ssid_len = 0;
216 memset(vif->ssid, 0, sizeof(vif->ssid));
217
218 vif->dot11_auth_mode = OPEN_AUTH;
219 vif->auth_mode = NONE_AUTH;
220 vif->prwise_crypto = NONE_CRYPT;
221 vif->prwise_crypto_len = 0;
222 vif->grp_crypto = NONE_CRYPT;
223 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530224 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +0530225 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
226 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530227 vif->bss_ch = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300228}
229
Kalle Valobdcd8172011-07-18 00:22:30 +0300230static int ath6kl_set_host_app_area(struct ath6kl *ar)
231{
232 u32 address, data;
233 struct host_app_area host_app_area;
234
235 /* Fetch the address of the host_app_area_s
236 * instance in the host interest area */
237 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800238 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300239
Kalle Valoaddb44b2011-09-02 10:32:05 +0300240 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300241 return -EIO;
242
Kevin Fang31024d92011-07-11 17:14:13 +0800243 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300244 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300245 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
246 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300247 return -EIO;
248
249 return 0;
250}
251
252static inline void set_ac2_ep_map(struct ath6kl *ar,
253 u8 ac,
254 enum htc_endpoint_id ep)
255{
256 ar->ac2ep_map[ac] = ep;
257 ar->ep2ac_map[ep] = ac;
258}
259
260/* connect to a service */
261static int ath6kl_connectservice(struct ath6kl *ar,
262 struct htc_service_connect_req *con_req,
263 char *desc)
264{
265 int status;
266 struct htc_service_connect_resp response;
267
268 memset(&response, 0, sizeof(response));
269
Kalle Vaload226ec2011-08-10 09:49:12 +0300270 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300271 if (status) {
272 ath6kl_err("failed to connect to %s service status:%d\n",
273 desc, status);
274 return status;
275 }
276
277 switch (con_req->svc_id) {
278 case WMI_CONTROL_SVC:
279 if (test_bit(WMI_ENABLED, &ar->flag))
280 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
281 ar->ctrl_ep = response.endpoint;
282 break;
283 case WMI_DATA_BE_SVC:
284 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
285 break;
286 case WMI_DATA_BK_SVC:
287 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
288 break;
289 case WMI_DATA_VI_SVC:
290 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
291 break;
292 case WMI_DATA_VO_SVC:
293 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
294 break;
295 default:
296 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
297 return -EINVAL;
298 }
299
300 return 0;
301}
302
303static int ath6kl_init_service_ep(struct ath6kl *ar)
304{
305 struct htc_service_connect_req connect;
306
307 memset(&connect, 0, sizeof(connect));
308
309 /* these fields are the same for all service endpoints */
Kalle Valo900d6b32012-03-25 17:15:23 +0300310 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
Kalle Valobdcd8172011-07-18 00:22:30 +0300311 connect.ep_cb.rx = ath6kl_rx;
312 connect.ep_cb.rx_refill = ath6kl_rx_refill;
313 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
314
315 /*
316 * Set the max queue depth so that our ath6kl_tx_queue_full handler
317 * gets called.
318 */
319 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
320 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
321 if (!connect.ep_cb.rx_refill_thresh)
322 connect.ep_cb.rx_refill_thresh++;
323
324 /* connect to control service */
325 connect.svc_id = WMI_CONTROL_SVC;
326 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
327 return -EIO;
328
329 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
330
331 /*
332 * Limit the HTC message size on the send path, although e can
333 * receive A-MSDU frames of 4K, we will only send ethernet-sized
334 * (802.3) frames on the send path.
335 */
336 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
337
338 /*
339 * To reduce the amount of committed memory for larger A_MSDU
340 * frames, use the recv-alloc threshold mechanism for larger
341 * packets.
342 */
343 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
344 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
345
346 /*
347 * For the remaining data services set the connection flag to
348 * reduce dribbling, if configured to do so.
349 */
350 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
351 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
352 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
353
354 connect.svc_id = WMI_DATA_BE_SVC;
355
356 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
357 return -EIO;
358
359 /* connect to back-ground map this to WMI LOW_PRI */
360 connect.svc_id = WMI_DATA_BK_SVC;
361 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
362 return -EIO;
363
Mohammed Shafi Shajakhan171fe762012-09-27 18:19:52 +0530364 /* connect to Video service, map this to HI PRI */
Kalle Valobdcd8172011-07-18 00:22:30 +0300365 connect.svc_id = WMI_DATA_VI_SVC;
366 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
367 return -EIO;
368
369 /*
370 * Connect to VO service, this is currently not mapped to a WMI
371 * priority stream due to historical reasons. WMI originally
372 * defined 3 priorities over 3 mailboxes We can change this when
373 * WMI is reworked so that priorities are not dependent on
374 * mailboxes.
375 */
376 connect.svc_id = WMI_DATA_VO_SVC;
377 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
378 return -EIO;
379
380 return 0;
381}
382
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530383void ath6kl_init_control_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300384{
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530385 ath6kl_init_profile_info(vif);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530386 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530387 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530388 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300389}
390
391/*
392 * Set HTC/Mbox operational parameters, this can only be called when the
393 * target is in the BMI phase.
394 */
395static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
396 u8 htc_ctrl_buf)
397{
398 int status;
399 u32 blk_size;
400
401 blk_size = ar->mbox_info.block_size;
402
403 if (htc_ctrl_buf)
404 blk_size |= ((u32)htc_ctrl_buf) << 16;
405
406 /* set the host interest area for the block size */
Kalle Valo24fc32b2012-03-07 20:03:58 +0200407 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
Kalle Valobdcd8172011-07-18 00:22:30 +0300408 if (status) {
409 ath6kl_err("bmi_write_memory for IO block size failed\n");
410 goto out;
411 }
412
413 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
414 blk_size,
415 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
416
417 if (mbox_isr_yield_val) {
418 /* set the host interest area for the mbox ISR yield limit */
Kalle Valo24fc32b2012-03-07 20:03:58 +0200419 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
420 mbox_isr_yield_val);
Kalle Valobdcd8172011-07-18 00:22:30 +0300421 if (status) {
422 ath6kl_err("bmi_write_memory for yield limit failed\n");
423 goto out;
424 }
425 }
426
427out:
428 return status;
429}
430
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530431static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
Kalle Valobdcd8172011-07-18 00:22:30 +0300432{
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300433 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300434
435 /*
436 * Configure the device for rx dot11 header rules. "0,0" are the
437 * default values. Required if checksum offload is needed. Set
438 * RxMetaVersion to 2.
439 */
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200440 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
441 ar->rx_meta_ver, 0, 0);
442 if (ret) {
443 ath6kl_err("unable to set the rx frame format: %d\n", ret);
444 return ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300445 }
446
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200447 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
448 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
Kalle Valo05aab172012-03-07 20:04:00 +0200449 IGNORE_PS_FAIL_DURING_SCAN);
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200450 if (ret) {
451 ath6kl_err("unable to set power save fail event policy: %d\n",
452 ret);
453 return ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300454 }
Kalle Valobdcd8172011-07-18 00:22:30 +0300455 }
456
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200457 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
458 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
Kalle Valo05aab172012-03-07 20:04:00 +0200459 WMI_FOLLOW_BARKER_IN_ERP);
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200460 if (ret) {
461 ath6kl_err("unable to set barker preamble policy: %d\n",
462 ret);
463 return ret;
464 }
Kalle Valobdcd8172011-07-18 00:22:30 +0300465 }
466
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200467 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
468 WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
469 if (ret) {
470 ath6kl_err("unable to set keep alive interval: %d\n", ret);
471 return ret;
472 }
473
474 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
475 WLAN_CONFIG_DISCONNECT_TIMEOUT);
476 if (ret) {
477 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
478 return ret;
479 }
480
481 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
482 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
483 if (ret) {
484 ath6kl_err("unable to set txop bursting: %d\n", ret);
485 return ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300486 }
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200487 }
Kalle Valobdcd8172011-07-18 00:22:30 +0300488
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530489 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530490 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300491 P2P_FLAG_CAPABILITIES_REQ |
492 P2P_FLAG_MACADDR_REQ |
493 P2P_FLAG_HMODEL_REQ);
494 if (ret) {
Kalle Valocdeb8602012-04-12 11:02:18 +0300495 ath6kl_dbg(ATH6KL_DBG_TRC,
496 "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
497 ret);
Rusty Russell3db1cd52011-12-19 13:56:45 +0000498 ar->p2p = false;
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300499 }
500 }
501
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530502 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300503 /* Enable Probe Request reporting for P2P */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530504 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300505 if (ret) {
Kalle Valocdeb8602012-04-12 11:02:18 +0300506 ath6kl_dbg(ATH6KL_DBG_TRC,
507 "failed to enable Probe Request reporting (%d)\n",
508 ret);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300509 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300510 }
511
Kalle Valo1ca4d0b2012-03-07 20:03:59 +0200512 return ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300513}
514
515int ath6kl_configure_target(struct ath6kl *ar)
516{
517 u32 param, ram_reserved_size;
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530518 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
Ryan Hsu39586bf2011-12-13 17:11:07 +0800519 int i, status;
Kalle Valobdcd8172011-07-18 00:22:30 +0300520
Kalle Valof29af972012-01-17 20:08:56 +0200521 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
Kalle Valo24fc32b2012-03-07 20:03:58 +0200522 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
Vasanthakumar Thiagarajana10e2f22011-12-29 16:05:38 +0530523 ath6kl_err("bmi_write_memory for uart debug failed\n");
524 return -EIO;
525 }
526
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530527 /*
528 * Note: Even though the firmware interface type is
529 * chosen as BSS_STA for all three interfaces, can
530 * be configured to IBSS/AP as long as the fw submode
531 * remains normal mode (0 - AP, STA and IBSS). But
532 * due to an target assert in firmware only one interface is
533 * configured for now.
534 */
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530535 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300536
Kalle Valo71f96ee2011-11-14 19:31:30 +0200537 for (i = 0; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530538 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
539
540 /*
Vasanthakumar Thiagarajan1e8d13b2012-04-06 20:24:30 +0530541 * Submodes when fw does not support dynamic interface
542 * switching:
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530543 * vif[0] - AP/STA/IBSS
544 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
545 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
Vasanthakumar Thiagarajan1e8d13b2012-04-06 20:24:30 +0530546 * Otherwise, All the interface are initialized to p2p dev.
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530547 */
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530548
Vasanthakumar Thiagarajan1e8d13b2012-04-06 20:24:30 +0530549 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
550 ar->fw_capabilities)) {
551 for (i = 0; i < ar->vif_max; i++)
552 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
553 (i * HI_OPTION_FW_SUBMODE_BITS);
554 } else {
555 for (i = 0; i < ar->max_norm_iface; i++)
556 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
557 (i * HI_OPTION_FW_SUBMODE_BITS);
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530558
Vasanthakumar Thiagarajan1e8d13b2012-04-06 20:24:30 +0530559 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
560 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
561 (i * HI_OPTION_FW_SUBMODE_BITS);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530562
Vasanthakumar Thiagarajan1e8d13b2012-04-06 20:24:30 +0530563 if (ar->p2p && ar->vif_max == 1)
564 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
565 }
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530566
Kalle Valo24fc32b2012-03-07 20:03:58 +0200567 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
568 HTC_PROTOCOL_VERSION) != 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300569 ath6kl_err("bmi_write_memory for htc version failed\n");
570 return -EIO;
571 }
572
573 /* set the firmware mode to STA/IBSS/AP */
574 param = 0;
575
Kalle Valo80fb2682012-03-07 20:03:59 +0200576 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300577 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
578 return -EIO;
579 }
580
Kalle Valo71f96ee2011-11-14 19:31:30 +0200581 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530582 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
583 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
584
Kalle Valobdcd8172011-07-18 00:22:30 +0300585 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
586 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
587
Kalle Valo24fc32b2012-03-07 20:03:58 +0200588 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300589 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
590 return -EIO;
591 }
592
593 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
594
595 /*
596 * Hardcode the address use for the extended board data
597 * Ideally this should be pre-allocate by the OS at boot time
598 * But since it is a new feature and board data is loaded
599 * at init time, we have to workaround this from host.
600 * It is difficult to patch the firmware boot code,
601 * but possible in theory.
602 */
603
Kalle Valo6b42d302012-03-25 17:15:21 +0300604 if (ar->target_type == TARGET_TYPE_AR6003) {
605 param = ar->hw.board_ext_data_addr;
606 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300607
Kalle Valo6b42d302012-03-25 17:15:21 +0300608 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
609 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
610 return -EIO;
611 }
Kalle Valo991b27e2011-09-07 10:55:17 +0300612
Kalle Valo6b42d302012-03-25 17:15:21 +0300613 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
614 ram_reserved_size) != 0) {
615 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
616 return -EIO;
617 }
Kalle Valobdcd8172011-07-18 00:22:30 +0300618 }
619
620 /* set the block size for the target */
621 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
622 /* use default number of control buffers */
623 return -EIO;
624
Ryan Hsu39586bf2011-12-13 17:11:07 +0800625 /* Configure GPIO AR600x UART */
Kalle Valo24fc32b2012-03-07 20:03:58 +0200626 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
627 ar->hw.uarttx_pin);
Ryan Hsu39586bf2011-12-13 17:11:07 +0800628 if (status)
629 return status;
630
631 /* Configure target refclk_hz */
Kalle Valo24fc32b2012-03-07 20:03:58 +0200632 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
Ryan Hsu39586bf2011-12-13 17:11:07 +0800633 if (status)
634 return status;
635
Kalle Valobdcd8172011-07-18 00:22:30 +0300636 return 0;
637}
638
Kalle Valobdcd8172011-07-18 00:22:30 +0300639/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300640static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
641 u8 **fw, size_t *fw_len)
642{
643 const struct firmware *fw_entry;
644 int ret;
645
646 ret = request_firmware(&fw_entry, filename, ar->dev);
647 if (ret)
648 return ret;
649
650 *fw_len = fw_entry->size;
651 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
652
653 if (*fw == NULL)
654 ret = -ENOMEM;
655
656 release_firmware(fw_entry);
657
658 return ret;
659}
660
Sam Leffler92ecbff2011-09-07 10:55:16 +0300661#ifdef CONFIG_OF
Sam Leffler92ecbff2011-09-07 10:55:16 +0300662/*
663 * Check the device tree for a board-id and use it to construct
664 * the pathname to the firmware file. Used (for now) to find a
665 * fallback to the "bdata.bin" file--typically a symlink to the
666 * appropriate board-specific file.
667 */
668static bool check_device_tree(struct ath6kl *ar)
669{
670 static const char *board_id_prop = "atheros,board-id";
671 struct device_node *node;
672 char board_filename[64];
673 const char *board_id;
674 int ret;
675
676 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
677 board_id = of_get_property(node, board_id_prop, NULL);
678 if (board_id == NULL) {
679 ath6kl_warn("No \"%s\" property on %s node.\n",
680 board_id_prop, node->name);
681 continue;
682 }
683 snprintf(board_filename, sizeof(board_filename),
Kalle Valoc0038972011-12-16 20:53:31 +0200684 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
Sam Leffler92ecbff2011-09-07 10:55:16 +0300685
686 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
687 &ar->fw_board_len);
688 if (ret) {
689 ath6kl_err("Failed to get DT board file %s: %d\n",
690 board_filename, ret);
691 continue;
692 }
693 return true;
694 }
695 return false;
696}
697#else
698static bool check_device_tree(struct ath6kl *ar)
699{
700 return false;
701}
702#endif /* CONFIG_OF */
703
Kalle Valobdcd8172011-07-18 00:22:30 +0300704static int ath6kl_fetch_board_file(struct ath6kl *ar)
705{
706 const char *filename;
707 int ret;
708
Kalle Valo772c31e2011-09-07 10:55:16 +0300709 if (ar->fw_board != NULL)
710 return 0;
711
Kalle Valod1a94212011-11-14 19:31:23 +0200712 if (WARN_ON(ar->hw.fw_board == NULL))
713 return -EINVAL;
714
715 filename = ar->hw.fw_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300716
717 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
718 &ar->fw_board_len);
719 if (ret == 0) {
720 /* managed to get proper board file */
721 return 0;
722 }
723
Sam Leffler92ecbff2011-09-07 10:55:16 +0300724 if (check_device_tree(ar)) {
725 /* got board file from device tree */
726 return 0;
727 }
728
Kalle Valobdcd8172011-07-18 00:22:30 +0300729 /* there was no proper board file, try to use default instead */
730 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
731 filename, ret);
732
Kalle Valod1a94212011-11-14 19:31:23 +0200733 filename = ar->hw.fw_default_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300734
735 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
736 &ar->fw_board_len);
737 if (ret) {
738 ath6kl_err("Failed to get default board file %s: %d\n",
739 filename, ret);
740 return ret;
741 }
742
743 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
744 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
745
746 return 0;
747}
748
Kalle Valo772c31e2011-09-07 10:55:16 +0300749static int ath6kl_fetch_otp_file(struct ath6kl *ar)
750{
Kalle Valoc0038972011-12-16 20:53:31 +0200751 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300752 int ret;
753
754 if (ar->fw_otp != NULL)
755 return 0;
756
Kalle Valoc0038972011-12-16 20:53:31 +0200757 if (ar->hw.fw.otp == NULL) {
Kalle Valod1a94212011-11-14 19:31:23 +0200758 ath6kl_dbg(ATH6KL_DBG_BOOT,
759 "no OTP file configured for this hw\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300760 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300761 }
762
Kalle Valoc0038972011-12-16 20:53:31 +0200763 snprintf(filename, sizeof(filename), "%s/%s",
764 ar->hw.fw.dir, ar->hw.fw.otp);
Kalle Valod1a94212011-11-14 19:31:23 +0200765
Kalle Valo772c31e2011-09-07 10:55:16 +0300766 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
767 &ar->fw_otp_len);
768 if (ret) {
769 ath6kl_err("Failed to get OTP file %s: %d\n",
770 filename, ret);
771 return ret;
772 }
773
774 return 0;
775}
776
Kalle Valo5f1127f2012-01-24 13:50:16 +0200777static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
778{
779 char filename[100];
780 int ret;
781
782 if (ar->testmode == 0)
783 return 0;
784
785 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
786
787 if (ar->testmode == 2) {
788 if (ar->hw.fw.utf == NULL) {
789 ath6kl_warn("testmode 2 not supported\n");
790 return -EOPNOTSUPP;
791 }
792
793 snprintf(filename, sizeof(filename), "%s/%s",
794 ar->hw.fw.dir, ar->hw.fw.utf);
795 } else {
796 if (ar->hw.fw.tcmd == NULL) {
797 ath6kl_warn("testmode 1 not supported\n");
798 return -EOPNOTSUPP;
799 }
800
801 snprintf(filename, sizeof(filename), "%s/%s",
802 ar->hw.fw.dir, ar->hw.fw.tcmd);
803 }
804
805 set_bit(TESTMODE, &ar->flag);
806
807 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
808 if (ret) {
809 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
810 ar->testmode, filename, ret);
811 return ret;
812 }
813
814 return 0;
815}
816
Kalle Valo772c31e2011-09-07 10:55:16 +0300817static int ath6kl_fetch_fw_file(struct ath6kl *ar)
818{
Kalle Valoc0038972011-12-16 20:53:31 +0200819 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300820 int ret;
821
822 if (ar->fw != NULL)
823 return 0;
824
Kalle Valoc0038972011-12-16 20:53:31 +0200825 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
826 if (WARN_ON(ar->hw.fw.fw == NULL))
Kalle Valod1a94212011-11-14 19:31:23 +0200827 return -EINVAL;
828
Kalle Valoc0038972011-12-16 20:53:31 +0200829 snprintf(filename, sizeof(filename), "%s/%s",
830 ar->hw.fw.dir, ar->hw.fw.fw);
Kalle Valo772c31e2011-09-07 10:55:16 +0300831
Kalle Valo772c31e2011-09-07 10:55:16 +0300832 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
833 if (ret) {
834 ath6kl_err("Failed to get firmware file %s: %d\n",
835 filename, ret);
836 return ret;
837 }
838
839 return 0;
840}
841
842static int ath6kl_fetch_patch_file(struct ath6kl *ar)
843{
Kalle Valoc0038972011-12-16 20:53:31 +0200844 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300845 int ret;
846
Kalle Valod1a94212011-11-14 19:31:23 +0200847 if (ar->fw_patch != NULL)
Kalle Valo772c31e2011-09-07 10:55:16 +0300848 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300849
Kalle Valoc0038972011-12-16 20:53:31 +0200850 if (ar->hw.fw.patch == NULL)
Kalle Valod1a94212011-11-14 19:31:23 +0200851 return 0;
852
Kalle Valoc0038972011-12-16 20:53:31 +0200853 snprintf(filename, sizeof(filename), "%s/%s",
854 ar->hw.fw.dir, ar->hw.fw.patch);
Kalle Valod1a94212011-11-14 19:31:23 +0200855
856 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
857 &ar->fw_patch_len);
858 if (ret) {
859 ath6kl_err("Failed to get patch file %s: %d\n",
860 filename, ret);
861 return ret;
Kalle Valo772c31e2011-09-07 10:55:16 +0300862 }
863
864 return 0;
865}
866
Alex Yangcd23c1c2012-01-17 15:32:29 +0200867static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
868{
869 char filename[100];
870 int ret;
871
Kalle Valo5f1127f2012-01-24 13:50:16 +0200872 if (ar->testmode != 2)
Alex Yangcd23c1c2012-01-17 15:32:29 +0200873 return 0;
874
875 if (ar->fw_testscript != NULL)
876 return 0;
877
878 if (ar->hw.fw.testscript == NULL)
879 return 0;
880
881 snprintf(filename, sizeof(filename), "%s/%s",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200882 ar->hw.fw.dir, ar->hw.fw.testscript);
Alex Yangcd23c1c2012-01-17 15:32:29 +0200883
884 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
885 &ar->fw_testscript_len);
886 if (ret) {
887 ath6kl_err("Failed to get testscript file %s: %d\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200888 filename, ret);
Alex Yangcd23c1c2012-01-17 15:32:29 +0200889 return ret;
890 }
891
892 return 0;
893}
894
Kalle Valo50d41232011-09-07 10:55:17 +0300895static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300896{
897 int ret;
898
Kalle Valo772c31e2011-09-07 10:55:16 +0300899 ret = ath6kl_fetch_otp_file(ar);
900 if (ret)
901 return ret;
902
903 ret = ath6kl_fetch_fw_file(ar);
904 if (ret)
905 return ret;
906
907 ret = ath6kl_fetch_patch_file(ar);
908 if (ret)
909 return ret;
910
Alex Yangcd23c1c2012-01-17 15:32:29 +0200911 ret = ath6kl_fetch_testscript_file(ar);
912 if (ret)
913 return ret;
914
Kalle Valo772c31e2011-09-07 10:55:16 +0300915 return 0;
916}
Kalle Valobdcd8172011-07-18 00:22:30 +0300917
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200918static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
Kalle Valo50d41232011-09-07 10:55:17 +0300919{
920 size_t magic_len, len, ie_len;
921 const struct firmware *fw;
922 struct ath6kl_fw_ie *hdr;
Kalle Valoc0038972011-12-16 20:53:31 +0200923 char filename[100];
Kalle Valo50d41232011-09-07 10:55:17 +0300924 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300925 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300926 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300927
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200928 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
Kalle Valo50d41232011-09-07 10:55:17 +0300929
930 ret = request_firmware(&fw, filename, ar->dev);
931 if (ret)
932 return ret;
933
934 data = fw->data;
935 len = fw->size;
936
937 /* magic also includes the null byte, check that as well */
938 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
939
940 if (len < magic_len) {
941 ret = -EINVAL;
942 goto out;
943 }
944
945 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
946 ret = -EINVAL;
947 goto out;
948 }
949
950 len -= magic_len;
951 data += magic_len;
952
953 /* loop elements */
954 while (len > sizeof(struct ath6kl_fw_ie)) {
955 /* hdr is unaligned! */
956 hdr = (struct ath6kl_fw_ie *) data;
957
958 ie_id = le32_to_cpup(&hdr->id);
959 ie_len = le32_to_cpup(&hdr->len);
960
961 len -= sizeof(*hdr);
962 data += sizeof(*hdr);
963
964 if (len < ie_len) {
965 ret = -EINVAL;
966 goto out;
967 }
968
969 switch (ie_id) {
Naveen Singhb5b6f6a2012-06-07 00:44:02 -0700970 case ATH6KL_FW_IE_FW_VERSION:
971 strlcpy(ar->wiphy->fw_version, data,
972 sizeof(ar->wiphy->fw_version));
973
974 ath6kl_dbg(ATH6KL_DBG_BOOT,
975 "found fw version %s\n",
976 ar->wiphy->fw_version);
977 break;
Kalle Valo50d41232011-09-07 10:55:17 +0300978 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300979 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200980 ie_len);
Kalle Valo6bc36432011-09-27 14:31:11 +0300981
Kalle Valo50d41232011-09-07 10:55:17 +0300982 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
983
984 if (ar->fw_otp == NULL) {
985 ret = -ENOMEM;
986 goto out;
987 }
988
989 ar->fw_otp_len = ie_len;
990 break;
991 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300992 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +0200993 ie_len);
Kalle Valo6bc36432011-09-27 14:31:11 +0300994
Kalle Valo5f1127f2012-01-24 13:50:16 +0200995 /* in testmode we already might have a fw file */
996 if (ar->fw != NULL)
997 break;
998
Vivek Natarajan84377542012-03-28 19:21:25 +0530999 ar->fw = vmalloc(ie_len);
Kalle Valo50d41232011-09-07 10:55:17 +03001000
1001 if (ar->fw == NULL) {
1002 ret = -ENOMEM;
1003 goto out;
1004 }
1005
Vivek Natarajan84377542012-03-28 19:21:25 +05301006 memcpy(ar->fw, data, ie_len);
Kalle Valo50d41232011-09-07 10:55:17 +03001007 ar->fw_len = ie_len;
1008 break;
1009 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +03001010 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +02001011 ie_len);
Kalle Valo6bc36432011-09-27 14:31:11 +03001012
Kalle Valo50d41232011-09-07 10:55:17 +03001013 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1014
1015 if (ar->fw_patch == NULL) {
1016 ret = -ENOMEM;
1017 goto out;
1018 }
1019
1020 ar->fw_patch_len = ie_len;
1021 break;
Kalle Valo8a137482011-09-07 10:55:17 +03001022 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1023 val = (__le32 *) data;
1024 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +03001025
1026 ath6kl_dbg(ATH6KL_DBG_BOOT,
1027 "found reserved ram size ie 0x%d\n",
1028 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +03001029 break;
Kalle Valo97e04962011-09-12 13:47:34 +03001030 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo6bc36432011-09-27 14:31:11 +03001031 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +03001032 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001033 ie_len);
1034
Kalle Valo97e04962011-09-12 13:47:34 +03001035 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
Kalle Valo277d90f2011-12-13 14:51:58 +02001036 index = i / 8;
Kalle Valo97e04962011-09-12 13:47:34 +03001037 bit = i % 8;
1038
Thomas Pedersenc85251f2012-06-11 13:36:12 -07001039 if (index == ie_len)
1040 break;
1041
Kalle Valo97e04962011-09-12 13:47:34 +03001042 if (data[index] & (1 << bit))
1043 __set_bit(i, ar->fw_capabilities);
1044 }
Kalle Valo6bc36432011-09-27 14:31:11 +03001045
1046 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1047 ar->fw_capabilities,
1048 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +03001049 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +03001050 case ATH6KL_FW_IE_PATCH_ADDR:
1051 if (ie_len != sizeof(*val))
1052 break;
1053
1054 val = (__le32 *) data;
1055 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +03001056
1057 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valo03ef0252011-11-14 19:30:47 +02001058 "found patch address ie 0x%x\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001059 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +03001060 break;
Kalle Valo03ef0252011-11-14 19:30:47 +02001061 case ATH6KL_FW_IE_BOARD_ADDR:
1062 if (ie_len != sizeof(*val))
1063 break;
1064
1065 val = (__le32 *) data;
1066 ar->hw.board_addr = le32_to_cpup(val);
1067
1068 ath6kl_dbg(ATH6KL_DBG_BOOT,
1069 "found board address ie 0x%x\n",
1070 ar->hw.board_addr);
1071 break;
Kalle Valo368b1b02011-11-14 19:31:38 +02001072 case ATH6KL_FW_IE_VIF_MAX:
1073 if (ie_len != sizeof(*val))
1074 break;
1075
1076 val = (__le32 *) data;
1077 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1078 ATH6KL_VIF_MAX);
1079
Vasanthakumar Thiagarajanf1433792011-11-18 10:05:27 +05301080 if (ar->vif_max > 1 && !ar->p2p)
1081 ar->max_norm_iface = 2;
1082
Kalle Valo368b1b02011-11-14 19:31:38 +02001083 ath6kl_dbg(ATH6KL_DBG_BOOT,
1084 "found vif max ie %d\n", ar->vif_max);
1085 break;
Kalle Valo50d41232011-09-07 10:55:17 +03001086 default:
Kalle Valo6bc36432011-09-27 14:31:11 +03001087 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +03001088 le32_to_cpup(&hdr->id));
1089 break;
1090 }
1091
1092 len -= ie_len;
1093 data += ie_len;
1094 };
1095
1096 ret = 0;
1097out:
1098 release_firmware(fw);
1099
1100 return ret;
1101}
1102
Kalle Valo45eaa782012-01-17 20:09:05 +02001103int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
Kalle Valo50d41232011-09-07 10:55:17 +03001104{
1105 int ret;
1106
1107 ret = ath6kl_fetch_board_file(ar);
1108 if (ret)
1109 return ret;
1110
Kalle Valo5f1127f2012-01-24 13:50:16 +02001111 ret = ath6kl_fetch_testmode_file(ar);
1112 if (ret)
1113 return ret;
1114
Thomas Pedersenb1f47e32012-08-15 16:51:24 -07001115 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1116 if (ret == 0) {
1117 ar->fw_api = 4;
1118 goto out;
1119 }
1120
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001121 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
Kalle Valo6bc36432011-09-27 14:31:11 +03001122 if (ret == 0) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001123 ar->fw_api = 3;
1124 goto out;
1125 }
1126
1127 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1128 if (ret == 0) {
1129 ar->fw_api = 2;
1130 goto out;
Kalle Valo6bc36432011-09-27 14:31:11 +03001131 }
Kalle Valo50d41232011-09-07 10:55:17 +03001132
1133 ret = ath6kl_fetch_fw_api1(ar);
1134 if (ret)
1135 return ret;
1136
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001137 ar->fw_api = 1;
1138
1139out:
1140 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo6bc36432011-09-27 14:31:11 +03001141
Kalle Valo50d41232011-09-07 10:55:17 +03001142 return 0;
1143}
1144
Kalle Valobdcd8172011-07-18 00:22:30 +03001145static int ath6kl_upload_board_file(struct ath6kl *ar)
1146{
1147 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +08001148 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +03001149 int ret;
1150
Kalle Valo772c31e2011-09-07 10:55:16 +03001151 if (WARN_ON(ar->fw_board == NULL))
1152 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001153
Kevin Fang31024d92011-07-11 17:14:13 +08001154 /*
1155 * Determine where in Target RAM to write Board Data.
1156 * For AR6004, host determine Target RAM address for
1157 * writing board data.
1158 */
Kalle Valo0d4d72b2011-11-14 19:30:39 +02001159 if (ar->hw.board_addr != 0) {
Kalle Valob0fc7c12012-03-12 13:22:54 +02001160 board_address = ar->hw.board_addr;
Kalle Valo24fc32b2012-03-07 20:03:58 +02001161 ath6kl_bmi_write_hi32(ar, hi_board_data,
Kalle Valob0fc7c12012-03-12 13:22:54 +02001162 board_address);
Kevin Fang31024d92011-07-11 17:14:13 +08001163 } else {
Kalle Valo80fb2682012-03-07 20:03:59 +02001164 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
Kevin Fang31024d92011-07-11 17:14:13 +08001165 }
1166
Kalle Valobdcd8172011-07-18 00:22:30 +03001167 /* determine where in target ram to write extended board data */
Kalle Valo80fb2682012-03-07 20:03:59 +02001168 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
Kalle Valobdcd8172011-07-18 00:22:30 +03001169
Kalle Valo50e27402011-11-11 12:18:06 +02001170 if (ar->target_type == TARGET_TYPE_AR6003 &&
1171 board_ext_address == 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001172 ath6kl_err("Failed to get board file target address.\n");
1173 return -EINVAL;
1174 }
1175
Kevin Fang31024d92011-07-11 17:14:13 +08001176 switch (ar->target_type) {
1177 case TARGET_TYPE_AR6003:
1178 board_data_size = AR6003_BOARD_DATA_SZ;
1179 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
Prasanna Kumarfb1ac2e2012-02-07 14:58:54 -08001180 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1181 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
Kevin Fang31024d92011-07-11 17:14:13 +08001182 break;
1183 case TARGET_TYPE_AR6004:
1184 board_data_size = AR6004_BOARD_DATA_SZ;
1185 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1186 break;
1187 default:
1188 WARN_ON(1);
1189 return -EINVAL;
1190 break;
1191 }
1192
Kalle Valo50e27402011-11-11 12:18:06 +02001193 if (board_ext_address &&
1194 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
Kevin Fang31024d92011-07-11 17:14:13 +08001195
Kalle Valobdcd8172011-07-18 00:22:30 +03001196 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001197 ath6kl_dbg(ATH6KL_DBG_BOOT,
1198 "writing extended board data to 0x%x (%d B)\n",
1199 board_ext_address, board_ext_data_size);
1200
Kalle Valobdcd8172011-07-18 00:22:30 +03001201 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001202 ar->fw_board + board_data_size,
1203 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001204 if (ret) {
1205 ath6kl_err("Failed to write extended board data: %d\n",
1206 ret);
1207 return ret;
1208 }
1209
1210 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001211 param = (board_ext_data_size << 16) | 1;
1212
Kalle Valo24fc32b2012-03-07 20:03:58 +02001213 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001214 }
1215
Kevin Fang31024d92011-07-11 17:14:13 +08001216 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001217 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1218 ret = -EINVAL;
1219 return ret;
1220 }
1221
Kalle Valo6bc36432011-09-27 14:31:11 +03001222 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1223 board_address, board_data_size);
1224
Kalle Valobdcd8172011-07-18 00:22:30 +03001225 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001226 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001227
1228 if (ret) {
1229 ath6kl_err("Board file bmi write failed: %d\n", ret);
1230 return ret;
1231 }
1232
1233 /* record the fact that Board Data IS initialized */
Kalle Valo24fc32b2012-03-07 20:03:58 +02001234 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
Kalle Valobdcd8172011-07-18 00:22:30 +03001235
1236 return ret;
1237}
1238
1239static int ath6kl_upload_otp(struct ath6kl *ar)
1240{
Kalle Valobdcd8172011-07-18 00:22:30 +03001241 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001242 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001243 int ret;
1244
Kalle Valo50e27402011-11-11 12:18:06 +02001245 if (ar->fw_otp == NULL)
1246 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001247
Kalle Valoa01ac412011-09-07 10:55:17 +03001248 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001249
Kalle Valoef548622011-10-01 09:43:09 +03001250 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001251 ar->fw_otp_len);
1252
Kalle Valobdcd8172011-07-18 00:22:30 +03001253 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1254 ar->fw_otp_len);
1255 if (ret) {
1256 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1257 return ret;
1258 }
1259
Kalle Valo639d0b82011-09-12 12:48:09 +03001260 /* read firmware start address */
Kalle Valo80fb2682012-03-07 20:03:59 +02001261 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
Kalle Valo639d0b82011-09-12 12:48:09 +03001262
1263 if (ret) {
1264 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1265 return ret;
1266 }
1267
Kalle Valobef26a72011-10-12 09:58:28 +03001268 if (ar->hw.app_start_override_addr == 0) {
1269 ar->hw.app_start_override_addr = address;
1270 from_hw = true;
1271 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001272
Kalle Valobef26a72011-10-12 09:58:28 +03001273 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1274 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001275 ar->hw.app_start_override_addr);
1276
Kalle Valobdcd8172011-07-18 00:22:30 +03001277 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001278 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1279 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001280 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001281 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001282
1283 return ret;
1284}
1285
1286static int ath6kl_upload_firmware(struct ath6kl *ar)
1287{
Kalle Valobdcd8172011-07-18 00:22:30 +03001288 u32 address;
1289 int ret;
1290
Kalle Valo772c31e2011-09-07 10:55:16 +03001291 if (WARN_ON(ar->fw == NULL))
Kalle Valo50e27402011-11-11 12:18:06 +02001292 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001293
Kalle Valoa01ac412011-09-07 10:55:17 +03001294 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001295
Kalle Valoef548622011-10-01 09:43:09 +03001296 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001297 address, ar->fw_len);
1298
Kalle Valobdcd8172011-07-18 00:22:30 +03001299 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1300
1301 if (ret) {
1302 ath6kl_err("Failed to write firmware: %d\n", ret);
1303 return ret;
1304 }
1305
Kevin Fang31024d92011-07-11 17:14:13 +08001306 /*
1307 * Set starting address for firmware
1308 * Don't need to setup app_start override addr on AR6004
1309 */
1310 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001311 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001312 ath6kl_bmi_set_app_start(ar, address);
1313 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001314 return ret;
1315}
1316
1317static int ath6kl_upload_patch(struct ath6kl *ar)
1318{
Kalle Valo24fc32b2012-03-07 20:03:58 +02001319 u32 address;
Kalle Valobdcd8172011-07-18 00:22:30 +03001320 int ret;
1321
Kalle Valo50e27402011-11-11 12:18:06 +02001322 if (ar->fw_patch == NULL)
1323 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001324
Kalle Valoa01ac412011-09-07 10:55:17 +03001325 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001326
Kalle Valoef548622011-10-01 09:43:09 +03001327 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001328 address, ar->fw_patch_len);
1329
Kalle Valobdcd8172011-07-18 00:22:30 +03001330 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1331 if (ret) {
1332 ath6kl_err("Failed to write patch file: %d\n", ret);
1333 return ret;
1334 }
1335
Kalle Valo24fc32b2012-03-07 20:03:58 +02001336 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
Kalle Valobdcd8172011-07-18 00:22:30 +03001337
1338 return 0;
1339}
1340
Alex Yangcd23c1c2012-01-17 15:32:29 +02001341static int ath6kl_upload_testscript(struct ath6kl *ar)
1342{
Kalle Valo24fc32b2012-03-07 20:03:58 +02001343 u32 address;
Alex Yangcd23c1c2012-01-17 15:32:29 +02001344 int ret;
1345
Kalle Valo5f1127f2012-01-24 13:50:16 +02001346 if (ar->testmode != 2)
Alex Yangcd23c1c2012-01-17 15:32:29 +02001347 return 0;
1348
1349 if (ar->fw_testscript == NULL)
1350 return 0;
1351
1352 address = ar->hw.testscript_addr;
1353
1354 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
Kalle Valo96f1fad2012-03-07 20:03:57 +02001355 address, ar->fw_testscript_len);
Alex Yangcd23c1c2012-01-17 15:32:29 +02001356
1357 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1358 ar->fw_testscript_len);
1359 if (ret) {
1360 ath6kl_err("Failed to write testscript file: %d\n", ret);
1361 return ret;
1362 }
1363
Kalle Valo24fc32b2012-03-07 20:03:58 +02001364 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1365 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1366 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
Alex Yangcd23c1c2012-01-17 15:32:29 +02001367
1368 return 0;
1369}
1370
Kalle Valobdcd8172011-07-18 00:22:30 +03001371static int ath6kl_init_upload(struct ath6kl *ar)
1372{
1373 u32 param, options, sleep, address;
1374 int status = 0;
1375
Kevin Fang31024d92011-07-11 17:14:13 +08001376 if (ar->target_type != TARGET_TYPE_AR6003 &&
Kalle Valo96f1fad2012-03-07 20:03:57 +02001377 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001378 return -EINVAL;
1379
1380 /* temporarily disable system sleep */
1381 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1382 status = ath6kl_bmi_reg_read(ar, address, &param);
1383 if (status)
1384 return status;
1385
1386 options = param;
1387
1388 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1389 status = ath6kl_bmi_reg_write(ar, address, param);
1390 if (status)
1391 return status;
1392
1393 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1394 status = ath6kl_bmi_reg_read(ar, address, &param);
1395 if (status)
1396 return status;
1397
1398 sleep = param;
1399
1400 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1401 status = ath6kl_bmi_reg_write(ar, address, param);
1402 if (status)
1403 return status;
1404
1405 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1406 options, sleep);
1407
1408 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001409 /* no need to control 40/44MHz clock on AR6004 */
1410 if (ar->target_type != TARGET_TYPE_AR6004) {
1411 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1412 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001413
Kevin Fang31024d92011-07-11 17:14:13 +08001414 if (status)
1415 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001416
Kevin Fang31024d92011-07-11 17:14:13 +08001417 /* Run at 80/88MHz by default */
1418 param = SM(CPU_CLOCK_STANDARD, 1);
1419
1420 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1421 status = ath6kl_bmi_reg_write(ar, address, param);
1422 if (status)
1423 return status;
1424 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001425
1426 param = 0;
1427 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1428 param = SM(LPO_CAL_ENABLE, 1);
1429 status = ath6kl_bmi_reg_write(ar, address, param);
1430 if (status)
1431 return status;
1432
1433 /* WAR to avoid SDIO CRC err */
Raja Mani4480bb52012-02-22 12:03:51 +05301434 if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1435 ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001436 ath6kl_err("temporary war to avoid sdio crc error\n");
1437
Vasanthakumar Thiagarajanfa338be2012-05-22 12:52:48 +05301438 param = 0x28;
1439 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1440 status = ath6kl_bmi_reg_write(ar, address, param);
1441 if (status)
1442 return status;
1443
Kalle Valobdcd8172011-07-18 00:22:30 +03001444 param = 0x20;
1445
1446 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1447 status = ath6kl_bmi_reg_write(ar, address, param);
1448 if (status)
1449 return status;
1450
1451 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1452 status = ath6kl_bmi_reg_write(ar, address, param);
1453 if (status)
1454 return status;
1455
1456 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1457 status = ath6kl_bmi_reg_write(ar, address, param);
1458 if (status)
1459 return status;
1460
1461 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1462 status = ath6kl_bmi_reg_write(ar, address, param);
1463 if (status)
1464 return status;
1465 }
1466
1467 /* write EEPROM data to Target RAM */
1468 status = ath6kl_upload_board_file(ar);
1469 if (status)
1470 return status;
1471
1472 /* transfer One time Programmable data */
1473 status = ath6kl_upload_otp(ar);
1474 if (status)
1475 return status;
1476
1477 /* Download Target firmware */
1478 status = ath6kl_upload_firmware(ar);
1479 if (status)
1480 return status;
1481
1482 status = ath6kl_upload_patch(ar);
1483 if (status)
1484 return status;
1485
Alex Yangcd23c1c2012-01-17 15:32:29 +02001486 /* Download the test script */
1487 status = ath6kl_upload_testscript(ar);
1488 if (status)
1489 return status;
1490
Kalle Valobdcd8172011-07-18 00:22:30 +03001491 /* Restore system sleep */
1492 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1493 status = ath6kl_bmi_reg_write(ar, address, sleep);
1494 if (status)
1495 return status;
1496
1497 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1498 param = options | 0x20;
1499 status = ath6kl_bmi_reg_write(ar, address, param);
1500 if (status)
1501 return status;
1502
Kalle Valobdcd8172011-07-18 00:22:30 +03001503 return status;
1504}
1505
Kalle Valo45eaa782012-01-17 20:09:05 +02001506int ath6kl_init_hw_params(struct ath6kl *ar)
Kalle Valoa01ac412011-09-07 10:55:17 +03001507{
Kalle Valo1b46dc042012-01-31 21:26:22 +02001508 const struct ath6kl_hw *uninitialized_var(hw);
Kalle Valo856f4b312011-11-14 19:30:29 +02001509 int i;
Kalle Valobef26a72011-10-12 09:58:28 +03001510
Kalle Valo856f4b312011-11-14 19:30:29 +02001511 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1512 hw = &hw_list[i];
Kalle Valobef26a72011-10-12 09:58:28 +03001513
Kalle Valo856f4b312011-11-14 19:30:29 +02001514 if (hw->id == ar->version.target_ver)
1515 break;
1516 }
1517
1518 if (i == ARRAY_SIZE(hw_list)) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001519 ath6kl_err("Unsupported hardware version: 0x%x\n",
1520 ar->version.target_ver);
1521 return -EINVAL;
1522 }
1523
Kalle Valo856f4b312011-11-14 19:30:29 +02001524 ar->hw = *hw;
1525
Kalle Valo6bc36432011-09-27 14:31:11 +03001526 ath6kl_dbg(ATH6KL_DBG_BOOT,
1527 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1528 ar->version.target_ver, ar->target_type,
1529 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1530 ath6kl_dbg(ATH6KL_DBG_BOOT,
1531 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1532 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1533 ar->hw.reserved_ram_size);
Ryan Hsu39586bf2011-12-13 17:11:07 +08001534 ath6kl_dbg(ATH6KL_DBG_BOOT,
1535 "refclk_hz %d uarttx_pin %d",
1536 ar->hw.refclk_hz, ar->hw.uarttx_pin);
Kalle Valo6bc36432011-09-27 14:31:11 +03001537
Kalle Valoa01ac412011-09-07 10:55:17 +03001538 return 0;
1539}
1540
Kalle Valo293badf2011-11-14 19:30:54 +02001541static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1542{
1543 switch (type) {
1544 case ATH6KL_HIF_TYPE_SDIO:
1545 return "sdio";
1546 case ATH6KL_HIF_TYPE_USB:
1547 return "usb";
1548 }
1549
1550 return NULL;
1551}
1552
Vasanthakumar Thiagarajanede615d2012-08-29 19:40:25 +05301553static int __ath6kl_init_hw_start(struct ath6kl *ar)
Kalle Valo20459ee2011-10-27 18:48:37 +03001554{
1555 long timeleft;
1556 int ret, i;
1557
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001558 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1559
Kalle Valo20459ee2011-10-27 18:48:37 +03001560 ret = ath6kl_hif_power_on(ar);
1561 if (ret)
1562 return ret;
1563
1564 ret = ath6kl_configure_target(ar);
1565 if (ret)
1566 goto err_power_off;
1567
1568 ret = ath6kl_init_upload(ar);
1569 if (ret)
1570 goto err_power_off;
1571
1572 /* Do we need to finish the BMI phase */
1573 /* FIXME: return error from ath6kl_bmi_done() */
1574 if (ath6kl_bmi_done(ar)) {
1575 ret = -EIO;
1576 goto err_power_off;
1577 }
1578
1579 /*
1580 * The reason we have to wait for the target here is that the
1581 * driver layer has to init BMI in order to set the host block
1582 * size.
1583 */
1584 if (ath6kl_htc_wait_target(ar->htc_target)) {
1585 ret = -EIO;
1586 goto err_power_off;
1587 }
1588
1589 if (ath6kl_init_service_ep(ar)) {
1590 ret = -EIO;
1591 goto err_cleanup_scatter;
1592 }
1593
1594 /* setup credit distribution */
Kalle Valoe76ac2bf2012-03-25 17:15:27 +03001595 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
Kalle Valo20459ee2011-10-27 18:48:37 +03001596
1597 /* start HTC */
1598 ret = ath6kl_htc_start(ar->htc_target);
1599 if (ret) {
1600 /* FIXME: call this */
1601 ath6kl_cookie_cleanup(ar);
1602 goto err_cleanup_scatter;
1603 }
1604
1605 /* Wait for Wmi event to be ready */
1606 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1607 test_bit(WMI_READY,
1608 &ar->flag),
1609 WMI_TIMEOUT);
1610
1611 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1612
Kalle Valo293badf2011-11-14 19:30:54 +02001613
1614 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001615 ath6kl_info("%s %s fw %s api %d%s\n",
Kalle Valo293badf2011-11-14 19:30:54 +02001616 ar->hw.name,
1617 ath6kl_init_get_hif_name(ar->hif_type),
1618 ar->wiphy->fw_version,
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001619 ar->fw_api,
Kalle Valo293badf2011-11-14 19:30:54 +02001620 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1621 }
1622
Kalle Valo20459ee2011-10-27 18:48:37 +03001623 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1624 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1625 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1626 ret = -EIO;
1627 goto err_htc_stop;
1628 }
1629
1630 if (!timeleft || signal_pending(current)) {
1631 ath6kl_err("wmi is not ready or wait was interrupted\n");
1632 ret = -EIO;
1633 goto err_htc_stop;
1634 }
1635
1636 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1637
1638 /* communicate the wmi protocol verision to the target */
1639 /* FIXME: return error */
1640 if ((ath6kl_set_host_app_area(ar)) != 0)
1641 ath6kl_err("unable to set the host app area\n");
1642
Kalle Valo71f96ee2011-11-14 19:31:30 +02001643 for (i = 0; i < ar->vif_max; i++) {
Kalle Valo20459ee2011-10-27 18:48:37 +03001644 ret = ath6kl_target_config_wlan_params(ar, i);
1645 if (ret)
1646 goto err_htc_stop;
1647 }
1648
1649 return 0;
1650
1651err_htc_stop:
1652 ath6kl_htc_stop(ar->htc_target);
1653err_cleanup_scatter:
1654 ath6kl_hif_cleanup_scatter(ar);
1655err_power_off:
1656 ath6kl_hif_power_off(ar);
1657
1658 return ret;
1659}
1660
Vasanthakumar Thiagarajanede615d2012-08-29 19:40:25 +05301661int ath6kl_init_hw_start(struct ath6kl *ar)
1662{
1663 int err;
1664
1665 err = __ath6kl_init_hw_start(ar);
1666 if (err)
1667 return err;
1668 ar->state = ATH6KL_STATE_ON;
1669 return 0;
1670}
1671
1672static int __ath6kl_init_hw_stop(struct ath6kl *ar)
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001673{
1674 int ret;
1675
1676 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1677
1678 ath6kl_htc_stop(ar->htc_target);
1679
1680 ath6kl_hif_stop(ar);
1681
1682 ath6kl_bmi_reset(ar);
1683
1684 ret = ath6kl_hif_power_off(ar);
1685 if (ret)
1686 ath6kl_warn("failed to power off hif: %d\n", ret);
1687
Vasanthakumar Thiagarajanede615d2012-08-29 19:40:25 +05301688 return 0;
1689}
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001690
Vasanthakumar Thiagarajanede615d2012-08-29 19:40:25 +05301691int ath6kl_init_hw_stop(struct ath6kl *ar)
1692{
1693 int err;
1694
1695 err = __ath6kl_init_hw_stop(ar);
1696 if (err)
1697 return err;
1698 ar->state = ATH6KL_STATE_OFF;
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001699 return 0;
1700}
1701
Vasanthakumar Thiagarajan84caf802012-08-29 19:40:26 +05301702void ath6kl_init_hw_restart(struct ath6kl *ar)
1703{
Vasanthakumar Thiagarajan58109df2012-09-11 12:07:00 +05301704 clear_bit(WMI_READY, &ar->flag);
1705
Vasanthakumar Thiagarajan84caf802012-08-29 19:40:26 +05301706 ath6kl_cfg80211_stop_all(ar);
1707
Vasanthakumar Thiagarajan58109df2012-09-11 12:07:00 +05301708 if (__ath6kl_init_hw_stop(ar)) {
1709 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
Vasanthakumar Thiagarajan84caf802012-08-29 19:40:26 +05301710 return;
Vasanthakumar Thiagarajan58109df2012-09-11 12:07:00 +05301711 }
Vasanthakumar Thiagarajan84caf802012-08-29 19:40:26 +05301712
1713 if (__ath6kl_init_hw_start(ar)) {
1714 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1715 return;
1716 }
Vasanthakumar Thiagarajan84caf802012-08-29 19:40:26 +05301717}
1718
Kalle Valoc25889e2012-01-17 20:08:27 +02001719/* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301720void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301721{
1722 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1723 bool discon_issued;
1724
1725 netif_stop_queue(vif->ndev);
1726
1727 clear_bit(WLAN_ENABLED, &vif->flags);
1728
1729 if (wmi_ready) {
1730 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1731 test_bit(CONNECT_PEND, &vif->flags);
1732 ath6kl_disconnect(vif);
1733 del_timer(&vif->disconnect_timer);
1734
1735 if (discon_issued)
1736 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1737 (vif->nw_type & AP_NETWORK) ?
1738 bcast_mac : vif->bssid,
1739 0, NULL, 0);
1740 }
1741
1742 if (vif->scan_req) {
1743 cfg80211_scan_done(vif->scan_req, true);
1744 vif->scan_req = NULL;
1745 }
Thomas Pedersenc422d52d2012-05-15 00:09:23 -07001746
1747 /* need to clean up enhanced bmiss detection fw state */
1748 ath6kl_cfg80211_sta_bmiss_enhance(vif, false);
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301749}
1750
Kalle Valobdcd8172011-07-18 00:22:30 +03001751void ath6kl_stop_txrx(struct ath6kl *ar)
1752{
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301753 struct ath6kl_vif *vif, *tmp_vif;
Vasanthakumar Thiagarajan1d2a4452012-01-21 15:22:53 +05301754 int i;
Kalle Valobdcd8172011-07-18 00:22:30 +03001755
1756 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1757
1758 if (down_interruptible(&ar->sem)) {
1759 ath6kl_err("down_interruptible failed\n");
1760 return;
1761 }
1762
Vasanthakumar Thiagarajan1d2a4452012-01-21 15:22:53 +05301763 for (i = 0; i < AP_MAX_NUM_STA; i++)
1764 aggr_reset_state(ar->sta_list[i].aggr_conn);
1765
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301766 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301767 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1768 list_del(&vif->list);
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301769 spin_unlock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301770 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301771 rtnl_lock();
Kalle Valoc25889e2012-01-17 20:08:27 +02001772 ath6kl_cfg80211_vif_cleanup(vif);
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301773 rtnl_unlock();
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301774 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301775 }
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301776 spin_unlock_bh(&ar->list_lock);
Kalle Valobdcd8172011-07-18 00:22:30 +03001777
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301778 clear_bit(WMI_READY, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001779
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301780 /*
1781 * After wmi_shudown all WMI events will be dropped. We
1782 * need to cleanup the buffers allocated in AP mode and
1783 * give disconnect notification to stack, which usually
1784 * happens in the disconnect_event. Simulate the disconnect
1785 * event by calling the function directly. Sometimes
1786 * disconnect_event will be received when the debug logs
1787 * are collected.
1788 */
1789 ath6kl_wmi_shutdown(ar->wmi);
Kalle Valobdcd8172011-07-18 00:22:30 +03001790
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301791 clear_bit(WMI_ENABLED, &ar->flag);
1792 if (ar->htc_target) {
1793 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1794 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001795 }
1796
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301797 /*
1798 * Try to reset the device if we can. The driver may have been
1799 * configure NOT to reset the target during a debug session.
1800 */
1801 ath6kl_dbg(ATH6KL_DBG_TRC,
Kalle Valo96f1fad2012-03-07 20:03:57 +02001802 "attempting to reset target on instance destroy\n");
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301803 ath6kl_reset_device(ar, ar->target_type, true, true);
Kalle Valobdcd8172011-07-18 00:22:30 +03001804
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301805 clear_bit(WLAN_ENABLED, &ar->flag);
Vasanthakumar Thiagarajane8ad9a02012-02-14 20:32:59 +05301806
1807 up(&ar->sem);
Kalle Valobdcd8172011-07-18 00:22:30 +03001808}
Kalle Valod6a434d2012-01-17 20:09:36 +02001809EXPORT_SYMBOL(ath6kl_stop_txrx);