Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-integrator/integrator_cp.c |
| 3 | * |
| 4 | * Copyright (C) 2003 Deep Blue Solutions Ltd |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License. |
| 9 | */ |
| 10 | #include <linux/types.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/list.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 14 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/dma-mapping.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/string.h> |
Kay Sievers | edbaa60 | 2011-12-21 16:26:03 -0800 | [diff] [blame] | 17 | #include <linux/device.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 18 | #include <linux/amba/bus.h> |
| 19 | #include <linux/amba/kmi.h> |
| 20 | #include <linux/amba/clcd.h> |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 21 | #include <linux/amba/mmci.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 22 | #include <linux/io.h> |
Linus Walleij | 2389d50 | 2012-10-31 22:04:31 +0100 | [diff] [blame] | 23 | #include <linux/irqchip/versatile-fpga.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 24 | #include <linux/gfp.h> |
Marc Zyngier | 046dfa0 | 2011-05-18 10:51:53 +0100 | [diff] [blame] | 25 | #include <linux/mtd/physmap.h> |
Linus Walleij | 4980f9b | 2012-09-06 09:08:24 +0100 | [diff] [blame] | 26 | #include <linux/of_irq.h> |
| 27 | #include <linux/of_address.h> |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 28 | #include <linux/of_platform.h> |
Linus Walleij | 64100a0 | 2012-11-02 01:20:43 +0100 | [diff] [blame] | 29 | #include <linux/sys_soc.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include <asm/setup.h> |
| 32 | #include <asm/mach-types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <asm/mach/arch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/mach/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <asm/mach/map.h> |
| 36 | #include <asm/mach/time.h> |
| 37 | |
Russell King | 9dfec4f | 2011-01-18 20:10:10 +0000 | [diff] [blame] | 38 | #include <plat/clcd.h> |
Russell King | d77e270 | 2011-01-22 11:37:54 +0000 | [diff] [blame] | 39 | #include <plat/sched_clock.h> |
Russell King | 9dfec4f | 2011-01-18 20:10:10 +0000 | [diff] [blame] | 40 | |
Linus Walleij | 1b1ef75 | 2014-02-13 21:26:24 +0100 | [diff] [blame^] | 41 | #include "hardware.h" |
Linus Walleij | bb4dbef | 2013-06-16 02:44:27 +0200 | [diff] [blame] | 42 | #include "cm.h" |
Russell King | 98c672c | 2010-05-22 18:18:57 +0100 | [diff] [blame] | 43 | #include "common.h" |
| 44 | |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 45 | /* Base address to the CP controller */ |
| 46 | static void __iomem *intcp_con_base; |
| 47 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #define INTCP_PA_FLASH_BASE 0x24000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
| 50 | #define INTCP_PA_CLCD_BASE 0xc0000000 |
| 51 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | #define INTCP_FLASHPROG 0x04 |
| 53 | #define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) |
| 54 | #define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) |
| 55 | |
| 56 | /* |
| 57 | * Logical Physical |
Linus Walleij | 608914b | 2014-01-24 14:04:28 +0100 | [diff] [blame] | 58 | * f1000000 10000000 Core module registers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | * f1300000 13000000 Counter/Timer |
| 60 | * f1400000 14000000 Interrupt controller |
| 61 | * f1600000 16000000 UART 0 |
| 62 | * f1700000 17000000 UART 1 |
| 63 | * f1a00000 1a000000 Debug LEDs |
Russell King | da7ba95 | 2010-01-17 19:59:58 +0000 | [diff] [blame] | 64 | * fc900000 c9000000 GPIO |
| 65 | * fca00000 ca000000 SIC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | */ |
| 67 | |
Arnd Bergmann | 060fd1b | 2013-02-14 13:50:57 +0100 | [diff] [blame] | 68 | static struct map_desc intcp_io_desc[] __initdata __maybe_unused = { |
Deepak Saxena | c8d2729 | 2005-10-28 15:19:10 +0100 | [diff] [blame] | 69 | { |
Linus Walleij | 608914b | 2014-01-24 14:04:28 +0100 | [diff] [blame] | 70 | .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE), |
| 71 | .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE), |
| 72 | .length = SZ_4K, |
| 73 | .type = MT_DEVICE |
| 74 | }, { |
Deepak Saxena | c8d2729 | 2005-10-28 15:19:10 +0100 | [diff] [blame] | 75 | .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE), |
| 76 | .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE), |
| 77 | .length = SZ_4K, |
| 78 | .type = MT_DEVICE |
| 79 | }, { |
| 80 | .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE), |
| 81 | .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE), |
| 82 | .length = SZ_4K, |
| 83 | .type = MT_DEVICE |
| 84 | }, { |
| 85 | .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE), |
| 86 | .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE), |
| 87 | .length = SZ_4K, |
| 88 | .type = MT_DEVICE |
| 89 | }, { |
Deepak Saxena | c8d2729 | 2005-10-28 15:19:10 +0100 | [diff] [blame] | 90 | .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE), |
| 91 | .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE), |
| 92 | .length = SZ_4K, |
| 93 | .type = MT_DEVICE |
| 94 | }, { |
Russell King | da7ba95 | 2010-01-17 19:59:58 +0000 | [diff] [blame] | 95 | .virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE), |
| 96 | .pfn = __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE), |
Deepak Saxena | c8d2729 | 2005-10-28 15:19:10 +0100 | [diff] [blame] | 97 | .length = SZ_4K, |
| 98 | .type = MT_DEVICE |
| 99 | }, { |
Russell King | da7ba95 | 2010-01-17 19:59:58 +0000 | [diff] [blame] | 100 | .virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE), |
| 101 | .pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE), |
Deepak Saxena | c8d2729 | 2005-10-28 15:19:10 +0100 | [diff] [blame] | 102 | .length = SZ_4K, |
| 103 | .type = MT_DEVICE |
Deepak Saxena | c8d2729 | 2005-10-28 15:19:10 +0100 | [diff] [blame] | 104 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | }; |
| 106 | |
| 107 | static void __init intcp_map_io(void) |
| 108 | { |
| 109 | iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc)); |
| 110 | } |
| 111 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | * Flash handling. |
| 114 | */ |
Marc Zyngier | 046dfa0 | 2011-05-18 10:51:53 +0100 | [diff] [blame] | 115 | static int intcp_flash_init(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | { |
| 117 | u32 val; |
| 118 | |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 119 | val = readl(intcp_con_base + INTCP_FLASHPROG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | val |= CINTEGRATOR_FLASHPROG_FLWREN; |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 121 | writel(val, intcp_con_base + INTCP_FLASHPROG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | |
| 123 | return 0; |
| 124 | } |
| 125 | |
Marc Zyngier | 046dfa0 | 2011-05-18 10:51:53 +0100 | [diff] [blame] | 126 | static void intcp_flash_exit(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | { |
| 128 | u32 val; |
| 129 | |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 130 | val = readl(intcp_con_base + INTCP_FLASHPROG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN); |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 132 | writel(val, intcp_con_base + INTCP_FLASHPROG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | } |
| 134 | |
Marc Zyngier | 667f390 | 2011-05-18 10:51:55 +0100 | [diff] [blame] | 135 | static void intcp_flash_set_vpp(struct platform_device *pdev, int on) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | { |
| 137 | u32 val; |
| 138 | |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 139 | val = readl(intcp_con_base + INTCP_FLASHPROG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | if (on) |
| 141 | val |= CINTEGRATOR_FLASHPROG_FLVPPEN; |
| 142 | else |
| 143 | val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN; |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 144 | writel(val, intcp_con_base + INTCP_FLASHPROG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | } |
| 146 | |
Marc Zyngier | 046dfa0 | 2011-05-18 10:51:53 +0100 | [diff] [blame] | 147 | static struct physmap_flash_data intcp_flash_data = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | .width = 4, |
| 149 | .init = intcp_flash_init, |
| 150 | .exit = intcp_flash_exit, |
| 151 | .set_vpp = intcp_flash_set_vpp, |
| 152 | }; |
| 153 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | /* |
| 155 | * It seems that the card insertion interrupt remains active after |
| 156 | * we've acknowledged it. We therefore ignore the interrupt, and |
| 157 | * rely on reading it from the SIC. This also means that we must |
| 158 | * clear the latched interrupt. |
| 159 | */ |
| 160 | static unsigned int mmc_status(struct device *dev) |
| 161 | { |
Arnd Bergmann | b7a3f8d | 2012-09-14 20:16:39 +0000 | [diff] [blame] | 162 | unsigned int status = readl(__io_address(0xca000000 + 4)); |
Linus Walleij | e6fae08 | 2012-11-04 21:03:02 +0100 | [diff] [blame] | 163 | writel(8, intcp_con_base + 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | |
| 165 | return status & 8; |
| 166 | } |
| 167 | |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 168 | static struct mmci_platform_data mmc_data = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 170 | .status = mmc_status, |
Russell King | 7fb2bbf | 2009-07-09 15:15:12 +0100 | [diff] [blame] | 171 | .gpio_wp = -1, |
| 172 | .gpio_cd = -1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | }; |
| 174 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | /* |
| 176 | * CLCD support |
| 177 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | /* |
| 179 | * Ensure VGA is selected. |
| 180 | */ |
| 181 | static void cp_clcd_enable(struct clcd_fb *fb) |
| 182 | { |
Russell King | e6b9c1f | 2011-01-22 11:02:10 +0000 | [diff] [blame] | 183 | struct fb_var_screeninfo *var = &fb->fb.var; |
Jonathan Austin | 30aeadd | 2013-08-29 18:41:11 +0100 | [diff] [blame] | 184 | u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2 |
| 185 | | CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1; |
Russell King | 4774e22 | 2005-04-30 23:32:38 +0100 | [diff] [blame] | 186 | |
Russell King | e6b9c1f | 2011-01-22 11:02:10 +0000 | [diff] [blame] | 187 | if (var->bits_per_pixel <= 8 || |
| 188 | (var->bits_per_pixel == 16 && var->green.length == 5)) |
| 189 | /* Pseudocolor, RGB555, BGR555 */ |
| 190 | val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555; |
Russell King | 4774e22 | 2005-04-30 23:32:38 +0100 | [diff] [blame] | 191 | else if (fb->fb.var.bits_per_pixel <= 16) |
Russell King | e6b9c1f | 2011-01-22 11:02:10 +0000 | [diff] [blame] | 192 | /* truecolor RGB565 */ |
| 193 | val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555; |
Russell King | 4774e22 | 2005-04-30 23:32:38 +0100 | [diff] [blame] | 194 | else |
| 195 | val = 0; /* no idea for this, don't trust the docs */ |
| 196 | |
| 197 | cm_control(CM_CTRL_LCDMUXSEL_MASK| |
| 198 | CM_CTRL_LCDEN0| |
| 199 | CM_CTRL_LCDEN1| |
| 200 | CM_CTRL_STATIC1| |
| 201 | CM_CTRL_STATIC2| |
| 202 | CM_CTRL_STATIC| |
| 203 | CM_CTRL_n24BITEN, val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | } |
| 205 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | static int cp_clcd_setup(struct clcd_fb *fb) |
| 207 | { |
Russell King | 9dfec4f | 2011-01-18 20:10:10 +0000 | [diff] [blame] | 208 | fb->panel = versatile_clcd_get_panel("VGA"); |
| 209 | if (!fb->panel) |
| 210 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | |
Russell King | 9dfec4f | 2011-01-18 20:10:10 +0000 | [diff] [blame] | 212 | return versatile_clcd_setup_dma(fb, SZ_1M); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | } |
| 214 | |
| 215 | static struct clcd_board clcd_data = { |
| 216 | .name = "Integrator/CP", |
Russell King | 9dfec4f | 2011-01-18 20:10:10 +0000 | [diff] [blame] | 217 | .caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | .check = clcdfb_check, |
| 219 | .decode = clcdfb_decode, |
| 220 | .enable = cp_clcd_enable, |
| 221 | .setup = cp_clcd_setup, |
Russell King | 9dfec4f | 2011-01-18 20:10:10 +0000 | [diff] [blame] | 222 | .mmap = versatile_clcd_mmap_dma, |
| 223 | .remove = versatile_clcd_remove_dma, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | }; |
| 225 | |
Russell King | d77e270 | 2011-01-22 11:37:54 +0000 | [diff] [blame] | 226 | #define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28) |
| 227 | |
Russell King | c735c98 | 2011-01-11 13:00:04 +0000 | [diff] [blame] | 228 | static void __init intcp_init_early(void) |
| 229 | { |
Russell King | d77e270 | 2011-01-22 11:37:54 +0000 | [diff] [blame] | 230 | #ifdef CONFIG_PLAT_VERSATILE_SCHED_CLOCK |
| 231 | versatile_sched_clock_init(REFCOUNTER, 24000000); |
| 232 | #endif |
Russell King | c735c98 | 2011-01-11 13:00:04 +0000 | [diff] [blame] | 233 | } |
| 234 | |
Linus Walleij | 4980f9b | 2012-09-06 09:08:24 +0100 | [diff] [blame] | 235 | static const struct of_device_id fpga_irq_of_match[] __initconst = { |
| 236 | { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, |
| 237 | { /* Sentinel */ } |
| 238 | }; |
| 239 | |
| 240 | static void __init intcp_init_irq_of(void) |
| 241 | { |
Linus Walleij | bb4dbef | 2013-06-16 02:44:27 +0200 | [diff] [blame] | 242 | cm_init(); |
Linus Walleij | 4980f9b | 2012-09-06 09:08:24 +0100 | [diff] [blame] | 243 | of_irq_init(fpga_irq_of_match); |
Linus Walleij | 4980f9b | 2012-09-06 09:08:24 +0100 | [diff] [blame] | 244 | } |
| 245 | |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 246 | /* |
| 247 | * For the Device Tree, add in the UART, MMC and CLCD specifics as AUXDATA |
| 248 | * and enforce the bus names since these are used for clock lookups. |
| 249 | */ |
| 250 | static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = { |
| 251 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE, |
| 252 | "rtc", NULL), |
| 253 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE, |
Linus Walleij | 379df27 | 2012-11-17 19:24:23 +0100 | [diff] [blame] | 254 | "uart0", NULL), |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 255 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE, |
Linus Walleij | 379df27 | 2012-11-17 19:24:23 +0100 | [diff] [blame] | 256 | "uart1", NULL), |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 257 | OF_DEV_AUXDATA("arm,primecell", KMI0_BASE, |
| 258 | "kmi0", NULL), |
| 259 | OF_DEV_AUXDATA("arm,primecell", KMI1_BASE, |
| 260 | "kmi1", NULL), |
| 261 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE, |
| 262 | "mmci", &mmc_data), |
| 263 | OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE, |
| 264 | "aaci", &mmc_data), |
| 265 | OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE, |
| 266 | "clcd", &clcd_data), |
Linus Walleij | 73efd53 | 2012-09-06 09:09:11 +0100 | [diff] [blame] | 267 | OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE, |
| 268 | "physmap-flash", &intcp_flash_data), |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 269 | { /* sentinel */ }, |
| 270 | }; |
| 271 | |
Linus Walleij | df36680 | 2013-10-10 18:24:58 +0200 | [diff] [blame] | 272 | static const struct of_device_id intcp_syscon_match[] = { |
| 273 | { .compatible = "arm,integrator-cp-syscon"}, |
| 274 | { }, |
| 275 | }; |
| 276 | |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 277 | static void __init intcp_init_of(void) |
| 278 | { |
Linus Walleij | 64100a0 | 2012-11-02 01:20:43 +0100 | [diff] [blame] | 279 | struct device_node *root; |
| 280 | struct device_node *cpcon; |
| 281 | struct device *parent; |
| 282 | struct soc_device *soc_dev; |
| 283 | struct soc_device_attribute *soc_dev_attr; |
| 284 | u32 intcp_sc_id; |
| 285 | int err; |
| 286 | |
| 287 | /* Here we create an SoC device for the root node */ |
| 288 | root = of_find_node_by_path("/"); |
| 289 | if (!root) |
| 290 | return; |
Linus Walleij | df36680 | 2013-10-10 18:24:58 +0200 | [diff] [blame] | 291 | |
| 292 | cpcon = of_find_matching_node(root, intcp_syscon_match); |
Linus Walleij | 64100a0 | 2012-11-02 01:20:43 +0100 | [diff] [blame] | 293 | if (!cpcon) |
| 294 | return; |
| 295 | |
| 296 | intcp_con_base = of_iomap(cpcon, 0); |
| 297 | if (!intcp_con_base) |
| 298 | return; |
| 299 | |
| 300 | intcp_sc_id = readl(intcp_con_base); |
| 301 | |
| 302 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); |
| 303 | if (!soc_dev_attr) |
| 304 | return; |
| 305 | |
| 306 | err = of_property_read_string(root, "compatible", |
| 307 | &soc_dev_attr->soc_id); |
| 308 | if (err) |
| 309 | return; |
| 310 | err = of_property_read_string(root, "model", &soc_dev_attr->machine); |
| 311 | if (err) |
| 312 | return; |
| 313 | soc_dev_attr->family = "Integrator"; |
| 314 | soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", |
| 315 | 'A' + (intcp_sc_id & 0x0f)); |
| 316 | |
| 317 | soc_dev = soc_device_register(soc_dev_attr); |
Russell King | b269b17 | 2013-02-24 10:42:27 +0000 | [diff] [blame] | 318 | if (IS_ERR(soc_dev)) { |
Linus Walleij | 64100a0 | 2012-11-02 01:20:43 +0100 | [diff] [blame] | 319 | kfree(soc_dev_attr->revision); |
| 320 | kfree(soc_dev_attr); |
| 321 | return; |
| 322 | } |
| 323 | |
| 324 | parent = soc_device_to_device(soc_dev); |
Russell King | b269b17 | 2013-02-24 10:42:27 +0000 | [diff] [blame] | 325 | integrator_init_sysfs(parent, intcp_sc_id); |
Linus Walleij | 64100a0 | 2012-11-02 01:20:43 +0100 | [diff] [blame] | 326 | of_platform_populate(root, of_default_bus_match_table, |
| 327 | intcp_auxdata_lookup, parent); |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 328 | } |
| 329 | |
Linus Walleij | 4980f9b | 2012-09-06 09:08:24 +0100 | [diff] [blame] | 330 | static const char * intcp_dt_board_compat[] = { |
| 331 | "arm,integrator-cp", |
| 332 | NULL, |
| 333 | }; |
| 334 | |
| 335 | DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)") |
| 336 | .reserve = integrator_reserve, |
| 337 | .map_io = intcp_map_io, |
Linus Walleij | 4980f9b | 2012-09-06 09:08:24 +0100 | [diff] [blame] | 338 | .init_early = intcp_init_early, |
| 339 | .init_irq = intcp_init_irq_of, |
| 340 | .handle_irq = fpga_handle_irq, |
Linus Walleij | 4672cdd | 2012-09-06 09:08:47 +0100 | [diff] [blame] | 341 | .init_machine = intcp_init_of, |
Linus Walleij | 4980f9b | 2012-09-06 09:08:24 +0100 | [diff] [blame] | 342 | .restart = integrator_restart, |
| 343 | .dt_compat = intcp_dt_board_compat, |
| 344 | MACHINE_END |