Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include "skeleton64.dtsi" |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 14 | #include <dt-bindings/clock/qcom,gcc-sdm845.h> |
| 15 | #include <dt-bindings/clock/qcom,camcc-sdm845.h> |
| 16 | #include <dt-bindings/clock/qcom,dispcc-sdm845.h> |
| 17 | #include <dt-bindings/clock/qcom,gpucc-sdm845.h> |
| 18 | #include <dt-bindings/clock/qcom,videocc-sdm845.h> |
| 19 | #include <dt-bindings/clock/qcom,cpucc-sdm845.h> |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 20 | #include <dt-bindings/clock/qcom,rpmh.h> |
Taniya Das | a8d52b9 | 2017-04-18 17:02:49 +0530 | [diff] [blame] | 21 | #include <dt-bindings/clock/qcom,aop-qmp.h> |
David Collins | 5ab42b9 | 2016-07-07 17:38:51 -0700 | [diff] [blame] | 22 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
Satya Durga Srinivasu Prabhala | fbddbe7 | 2016-09-12 11:40:11 -0700 | [diff] [blame] | 23 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 24 | #include <dt-bindings/soc/qcom,tcs-mbox.h> |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 25 | #include <dt-bindings/spmi/spmi.h> |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 26 | #include <dt-bindings/thermal/thermal.h> |
Stephen Boyd | b1adf31 | 2017-04-03 16:02:12 -0700 | [diff] [blame] | 27 | #include <dt-bindings/msm/msm-bus-ids.h> |
Satyajit Desai | 9f29326 | 2017-09-29 14:31:44 -0700 | [diff] [blame] | 28 | #include <dt-bindings/soc/qcom,dcc_v2.h> |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 29 | |
Stephen Boyd | 0829052 | 2017-06-16 09:48:48 -0700 | [diff] [blame] | 30 | #define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024)) |
| 31 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 32 | / { |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 33 | model = "Qualcomm Technologies, Inc. SDM845"; |
| 34 | compatible = "qcom,sdm845"; |
Kyle Yan | fd7d142 | 2017-08-04 16:14:21 -0700 | [diff] [blame] | 35 | qcom,msm-id = <321 0x10000>; |
Archana Sathyakumar | 00a36ab | 2017-03-03 14:38:26 -0700 | [diff] [blame] | 36 | interrupt-parent = <&pdc>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 37 | |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 38 | aliases { |
| 39 | ufshc1 = &ufshc_mem; /* Embedded UFS slot */ |
Tony Truong | c0e0a5f0 | 2017-03-15 11:57:40 -0700 | [diff] [blame] | 40 | pci-domain0 = &pcie0; |
Tony Truong | 1693835 | 2017-05-04 13:39:24 -0700 | [diff] [blame] | 41 | pci-domain1 = &pcie1; |
Xiaonian Wang | 3c14ea3 | 2017-04-08 06:39:42 +0800 | [diff] [blame] | 42 | sdhc2 = &sdhc_2; /* SDC2 SD card slot */ |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 43 | }; |
| 44 | |
Puja Gupta | a91fb84 | 2017-06-12 18:58:06 -0700 | [diff] [blame] | 45 | aliases { |
| 46 | serial0 = &qupv3_se9_2uart; |
| 47 | spi0 = &qupv3_se8_spi; |
| 48 | i2c0 = &qupv3_se10_i2c; |
| 49 | i2c1 = &qupv3_se3_i2c; |
| 50 | hsuart0 = &qupv3_se6_4uart; |
| 51 | }; |
| 52 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 53 | cpus { |
| 54 | #address-cells = <2>; |
| 55 | #size-cells = <0>; |
| 56 | |
| 57 | CPU0: cpu@0 { |
| 58 | device_type = "cpu"; |
| 59 | compatible = "arm,armv8"; |
| 60 | reg = <0x0 0x0>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 61 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 62 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 63 | cache-size = <0x8000>; |
| 64 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 65 | qcom,lmh-dcvs = <&lmh_dcvs0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 66 | #cooling-cells = <2>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 67 | next-level-cache = <&L2_0>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 68 | sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 69 | L2_0: l2-cache { |
| 70 | compatible = "arm,arch-cache"; |
| 71 | cache-size = <0x20000>; |
| 72 | cache-level = <2>; |
| 73 | next-level-cache = <&L3_0>; |
| 74 | |
| 75 | L3_0: l3-cache { |
| 76 | compatible = "arm,arch-cache"; |
| 77 | cache-size = <0x200000>; |
| 78 | cache-level = <3>; |
| 79 | }; |
| 80 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 81 | L1_I_0: l1-icache { |
| 82 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 83 | qcom,dump-size = <0x12000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 84 | }; |
| 85 | L1_D_0: l1-dcache { |
| 86 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 87 | qcom,dump-size = <0xa000>; |
| 88 | }; |
| 89 | L1_TLB_0: l1-tlb { |
| 90 | qcom,dump-size = <0x3000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 91 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 92 | }; |
| 93 | |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 94 | CPU1: cpu@100 { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 95 | device_type = "cpu"; |
| 96 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 97 | reg = <0x0 0x100>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 98 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 99 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 100 | cache-size = <0x8000>; |
| 101 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 102 | qcom,lmh-dcvs = <&lmh_dcvs0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 103 | #cooling-cells = <2>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 104 | next-level-cache = <&L2_100>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 105 | sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 106 | L2_100: l2-cache { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 107 | compatible = "arm,arch-cache"; |
| 108 | cache-size = <0x20000>; |
| 109 | cache-level = <2>; |
| 110 | next-level-cache = <&L3_0>; |
| 111 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 112 | L1_I_100: l1-icache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 113 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 114 | qcom,dump-size = <0x12000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 115 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 116 | L1_D_100: l1-dcache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 117 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 118 | qcom,dump-size = <0xa000>; |
| 119 | }; |
| 120 | L1_TLB_100: l1-tlb { |
| 121 | qcom,dump-size = <0x3000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 122 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 123 | }; |
| 124 | |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 125 | CPU2: cpu@200 { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 126 | device_type = "cpu"; |
| 127 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 128 | reg = <0x0 0x200>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 129 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 130 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 131 | cache-size = <0x8000>; |
| 132 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 133 | qcom,lmh-dcvs = <&lmh_dcvs0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 134 | #cooling-cells = <2>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 135 | next-level-cache = <&L2_200>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 136 | sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 137 | L2_200: l2-cache { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 138 | compatible = "arm,arch-cache"; |
| 139 | cache-size = <0x20000>; |
| 140 | cache-level = <2>; |
| 141 | next-level-cache = <&L3_0>; |
| 142 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 143 | L1_I_200: l1-icache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 144 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 145 | qcom,dump-size = <0x12000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 146 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 147 | L1_D_200: l1-dcache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 148 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 149 | qcom,dump-size = <0xa000>; |
| 150 | }; |
| 151 | L1_TLB_200: l1-tlb { |
| 152 | qcom,dump-size = <0x3000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 153 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 154 | }; |
| 155 | |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 156 | CPU3: cpu@300 { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 157 | device_type = "cpu"; |
| 158 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 159 | reg = <0x0 0x300>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 160 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 161 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 162 | cache-size = <0x8000>; |
| 163 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 164 | qcom,lmh-dcvs = <&lmh_dcvs0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 165 | #cooling-cells = <2>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 166 | next-level-cache = <&L2_300>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 167 | sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 168 | L2_300: l2-cache { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 169 | compatible = "arm,arch-cache"; |
| 170 | cache-size = <0x20000>; |
| 171 | cache-level = <2>; |
| 172 | next-level-cache = <&L3_0>; |
| 173 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 174 | L1_I_300: l1-icache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 175 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 176 | qcom,dump-size = <0x12000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 177 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 178 | L1_D_300: l1-dcache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 179 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 180 | qcom,dump-size = <0xa000>; |
| 181 | }; |
| 182 | L1_TLB_300: l1-tlb { |
| 183 | qcom,dump-size = <0x3000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 184 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 185 | }; |
| 186 | |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 187 | CPU4: cpu@400 { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 188 | device_type = "cpu"; |
| 189 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 190 | reg = <0x0 0x400>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 191 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 192 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 193 | cache-size = <0x20000>; |
| 194 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 195 | qcom,lmh-dcvs = <&lmh_dcvs1>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 196 | #cooling-cells = <2>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 197 | next-level-cache = <&L2_400>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 198 | sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 199 | L2_400: l2-cache { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 200 | compatible = "arm,arch-cache"; |
| 201 | cache-size = <0x40000>; |
| 202 | cache-level = <2>; |
| 203 | next-level-cache = <&L3_0>; |
| 204 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 205 | L1_I_400: l1-icache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 206 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 207 | qcom,dump-size = <0x24000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 208 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 209 | L1_D_400: l1-dcache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 210 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 211 | qcom,dump-size = <0x14000>; |
| 212 | }; |
| 213 | L1_TLB_400: l1-tlb { |
Channagoud Kadabi | ac64fd2 | 2017-10-09 16:10:08 -0700 | [diff] [blame] | 214 | qcom,dump-size = <0x3c00>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 215 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 216 | }; |
| 217 | |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 218 | CPU5: cpu@500 { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 219 | device_type = "cpu"; |
| 220 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 221 | reg = <0x0 0x500>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 222 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 223 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 224 | cache-size = <0x20000>; |
| 225 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 226 | qcom,lmh-dcvs = <&lmh_dcvs1>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 227 | #cooling-cells = <2>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 228 | next-level-cache = <&L2_500>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 229 | sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 230 | L2_500: l2-cache { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 231 | compatible = "arm,arch-cache"; |
| 232 | cache-size = <0x40000>; |
| 233 | cache-level = <2>; |
| 234 | next-level-cache = <&L3_0>; |
| 235 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 236 | L1_I_500: l1-icache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 237 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 238 | qcom,dump-size = <0x24000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 239 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 240 | L1_D_500: l1-dcache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 241 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 242 | qcom,dump-size = <0x14000>; |
| 243 | }; |
| 244 | L1_TLB_500: l1-tlb { |
Channagoud Kadabi | ac64fd2 | 2017-10-09 16:10:08 -0700 | [diff] [blame] | 245 | qcom,dump-size = <0x3c00>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 246 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 247 | }; |
| 248 | |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 249 | CPU6: cpu@600 { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 250 | device_type = "cpu"; |
| 251 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 252 | reg = <0x0 0x600>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 253 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 254 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 255 | cache-size = <0x20000>; |
| 256 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 257 | qcom,lmh-dcvs = <&lmh_dcvs1>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 258 | #cooling-cells = <2>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 259 | next-level-cache = <&L2_600>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 260 | sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 261 | L2_600: l2-cache { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 262 | compatible = "arm,arch-cache"; |
| 263 | cache-size = <0x40000>; |
| 264 | cache-level = <2>; |
| 265 | next-level-cache = <&L3_0>; |
| 266 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 267 | L1_I_600: l1-icache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 268 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 269 | qcom,dump-size = <0x24000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 270 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 271 | L1_D_600: l1-dcache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 272 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 273 | qcom,dump-size = <0x14000>; |
| 274 | }; |
| 275 | L1_TLB_600: l1-tlb { |
Channagoud Kadabi | ac64fd2 | 2017-10-09 16:10:08 -0700 | [diff] [blame] | 276 | qcom,dump-size = <0x3c00>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 277 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 278 | }; |
| 279 | |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 280 | CPU7: cpu@700 { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 281 | device_type = "cpu"; |
| 282 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 283 | reg = <0x0 0x700>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 284 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 285 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 286 | cache-size = <0x20000>; |
| 287 | cpu-release-addr = <0x0 0x90000000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 288 | qcom,lmh-dcvs = <&lmh_dcvs1>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 289 | #cooling-cells = <2>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 290 | next-level-cache = <&L2_700>; |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 291 | sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 292 | L2_700: l2-cache { |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 293 | compatible = "arm,arch-cache"; |
| 294 | cache-size = <0x40000>; |
| 295 | cache-level = <2>; |
| 296 | next-level-cache = <&L3_0>; |
| 297 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 298 | L1_I_700: l1-icache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 299 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | 6077a78 | 2017-10-05 12:13:29 -0700 | [diff] [blame] | 300 | qcom,dump-size = <0x24000>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 301 | }; |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 302 | L1_D_700: l1-dcache { |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 303 | compatible = "arm,arch-cache"; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 304 | qcom,dump-size = <0x14000>; |
| 305 | }; |
| 306 | L1_TLB_700: l1-tlb { |
Channagoud Kadabi | ac64fd2 | 2017-10-09 16:10:08 -0700 | [diff] [blame] | 307 | qcom,dump-size = <0x3c00>; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 308 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 309 | }; |
| 310 | |
| 311 | cpu-map { |
| 312 | cluster0 { |
| 313 | core0 { |
| 314 | cpu = <&CPU0>; |
| 315 | }; |
| 316 | |
| 317 | core1 { |
| 318 | cpu = <&CPU1>; |
| 319 | }; |
| 320 | |
| 321 | core2 { |
| 322 | cpu = <&CPU2>; |
| 323 | }; |
| 324 | |
| 325 | core3 { |
| 326 | cpu = <&CPU3>; |
| 327 | }; |
| 328 | }; |
| 329 | |
| 330 | cluster1 { |
| 331 | core0 { |
| 332 | cpu = <&CPU4>; |
| 333 | }; |
| 334 | |
| 335 | core1 { |
| 336 | cpu = <&CPU5>; |
| 337 | }; |
| 338 | |
| 339 | core2 { |
| 340 | cpu = <&CPU6>; |
| 341 | }; |
| 342 | |
| 343 | core3 { |
| 344 | cpu = <&CPU7>; |
| 345 | }; |
| 346 | }; |
| 347 | }; |
| 348 | }; |
| 349 | |
Joonwoo Park | f3f7dac | 2017-08-17 16:02:29 -0700 | [diff] [blame] | 350 | energy_costs: energy-costs { |
Joonwoo Park | 32850e8 | 2017-06-12 16:01:57 -0700 | [diff] [blame] | 351 | compatible = "sched-energy"; |
| 352 | |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 353 | CPU_COST_0: core-cost0 { |
| 354 | busy-cost-data = < |
Joonwoo Park | 32850e8 | 2017-06-12 16:01:57 -0700 | [diff] [blame] | 355 | 300000 31 |
| 356 | 422400 38 |
| 357 | 499200 42 |
| 358 | 576000 46 |
| 359 | 652800 51 |
| 360 | 748800 58 |
| 361 | 825600 64 |
| 362 | 902400 70 |
| 363 | 979200 76 |
| 364 | 1056000 83 |
| 365 | 1132800 90 |
| 366 | 1209600 97 |
| 367 | 1286400 105 |
| 368 | 1363200 114 |
| 369 | 1440000 124 |
| 370 | 1516800 136 |
| 371 | 1593600 152 |
| 372 | 1651200 167 /* speedbin 0,1 */ |
| 373 | 1670400 173 /* speedbin 2 */ |
| 374 | 1708800 186 /* speedbin 0,1 */ |
| 375 | 1747200 201 /* speedbin 2 */ |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 376 | >; |
| 377 | idle-cost-data = < |
| 378 | 22 18 14 12 |
| 379 | >; |
| 380 | }; |
| 381 | CPU_COST_1: core-cost1 { |
| 382 | busy-cost-data = < |
Joonwoo Park | 32850e8 | 2017-06-12 16:01:57 -0700 | [diff] [blame] | 383 | 300000 258 |
| 384 | 422400 260 |
| 385 | 499200 261 |
| 386 | 576000 263 |
| 387 | 652800 267 |
| 388 | 729600 272 |
| 389 | 806400 280 |
| 390 | 883200 291 |
| 391 | 960000 305 |
| 392 | 1036800 324 |
| 393 | 1113600 348 |
| 394 | 1190400 378 |
| 395 | 1267200 415 |
| 396 | 1344000 460 |
| 397 | 1420800 513 |
| 398 | 1497600 576 |
| 399 | 1574400 649 |
| 400 | 1651200 732 |
| 401 | 1728000 824 |
| 402 | 1804800 923 |
| 403 | 1881600 1027 |
| 404 | 1958400 1131 |
| 405 | 2035000 1228 /* speedbin 1,2 */ |
| 406 | 2092000 1290 /* speedbin 1 */ |
| 407 | 2112000 1308 /* speedbin 2 */ |
| 408 | 2208000 1363 /* speedbin 2 */ |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 409 | >; |
| 410 | idle-cost-data = < |
Joonwoo Park | a5bb67e | 2017-05-15 15:48:25 -0700 | [diff] [blame] | 411 | 100 80 60 40 |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 412 | >; |
| 413 | }; |
| 414 | CLUSTER_COST_0: cluster-cost0 { |
| 415 | busy-cost-data = < |
Joonwoo Park | 32850e8 | 2017-06-12 16:01:57 -0700 | [diff] [blame] | 416 | 300000 3 |
| 417 | 422400 4 |
| 418 | 499200 4 |
| 419 | 576000 4 |
| 420 | 652800 5 |
| 421 | 748800 5 |
| 422 | 825600 6 |
| 423 | 902400 7 |
| 424 | 979200 7 |
| 425 | 1056000 8 |
| 426 | 1132800 9 |
| 427 | 1209600 9 |
| 428 | 1286400 10 |
| 429 | 1363200 11 |
| 430 | 1440000 12 |
| 431 | 1516800 13 |
| 432 | 1593600 15 |
| 433 | 1651200 17 /* speedbin 0,1 */ |
| 434 | 1670400 19 /* speedbin 2 */ |
| 435 | 1708800 21 /* speedbin 0,1 */ |
| 436 | 1747200 23 /* speedbin 2 */ |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 437 | >; |
| 438 | idle-cost-data = < |
| 439 | 4 3 2 1 |
| 440 | >; |
| 441 | }; |
| 442 | CLUSTER_COST_1: cluster-cost1 { |
| 443 | busy-cost-data = < |
Joonwoo Park | 32850e8 | 2017-06-12 16:01:57 -0700 | [diff] [blame] | 444 | 300000 24 |
| 445 | 422400 24 |
| 446 | 499200 25 |
| 447 | 576000 25 |
| 448 | 652800 26 |
| 449 | 729600 27 |
| 450 | 806400 28 |
| 451 | 883200 29 |
| 452 | 960000 30 |
| 453 | 1036800 32 |
| 454 | 1113600 34 |
| 455 | 1190400 37 |
| 456 | 1267200 40 |
| 457 | 1344000 45 |
| 458 | 1420800 50 |
| 459 | 1497600 57 |
| 460 | 1574400 64 |
| 461 | 1651200 74 |
| 462 | 1728000 84 |
| 463 | 1804800 96 |
| 464 | 1881600 106 |
| 465 | 1958400 113 |
| 466 | 2035000 120 /* speedbin 1,2 */ |
| 467 | 2092000 125 /* speedbin 1 */ |
| 468 | 2112000 127 /* speedbin 2 */ |
| 469 | 2208000 130 /* speedbin 2 */ |
Vikram Mulukutla | eb5eab2 | 2017-05-08 13:51:08 -0700 | [diff] [blame] | 470 | >; |
| 471 | idle-cost-data = < |
| 472 | 4 3 2 1 |
| 473 | >; |
| 474 | }; |
| 475 | }; /* energy-costs */ |
| 476 | |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 477 | psci { |
| 478 | compatible = "arm,psci-1.0"; |
| 479 | method = "smc"; |
| 480 | }; |
| 481 | |
Channagoud Kadabi | ffbc5f1 | 2017-07-06 17:09:43 -0700 | [diff] [blame] | 482 | chosen { |
| 483 | bootargs = "rcupdate.rcu_expedited=1"; |
| 484 | }; |
| 485 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 486 | soc: soc { }; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 487 | |
Puja Gupta | 0f42ee3 | 2017-05-03 15:32:31 -0700 | [diff] [blame] | 488 | vendor: vendor { |
| 489 | #address-cells = <1>; |
| 490 | #size-cells = <1>; |
| 491 | ranges = <0 0 0 0xffffffff>; |
| 492 | compatible = "simple-bus"; |
| 493 | }; |
| 494 | |
Puja Gupta | cce5d0b | 2017-05-05 14:22:25 -0700 | [diff] [blame] | 495 | firmware: firmware { |
| 496 | android { |
| 497 | compatible = "android,firmware"; |
Puja Gupta | 3068486 | 2017-06-08 16:17:00 -0700 | [diff] [blame] | 498 | vbmeta { |
| 499 | compatible = "android,vbmeta"; |
| 500 | parts = "vbmeta,boot,system,vendor,dtbo"; |
| 501 | }; |
| 502 | |
Puja Gupta | cce5d0b | 2017-05-05 14:22:25 -0700 | [diff] [blame] | 503 | fstab { |
| 504 | compatible = "android,fstab"; |
| 505 | vendor { |
| 506 | compatible = "android,vendor"; |
| 507 | dev = "/dev/block/platform/soc/1d84000.ufshc/by-name/vendor"; |
| 508 | type = "ext4"; |
| 509 | mnt_flags = "ro,barrier=1,discard"; |
Puja Gupta | 3068486 | 2017-06-08 16:17:00 -0700 | [diff] [blame] | 510 | fsmgr_flags = "wait,slotselect,avb"; |
Puja Gupta | cce5d0b | 2017-05-05 14:22:25 -0700 | [diff] [blame] | 511 | }; |
| 512 | }; |
| 513 | }; |
| 514 | }; |
| 515 | |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 516 | reserved-memory { |
| 517 | #address-cells = <2>; |
| 518 | #size-cells = <2>; |
| 519 | ranges; |
| 520 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 521 | hyp_region: hyp_region@85700000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 522 | no-map; |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 523 | reg = <0 0x85700000 0 0x600000>; |
Patrick Daly | 2ff257e | 2017-06-06 16:28:50 -0700 | [diff] [blame] | 524 | }; |
| 525 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 526 | xbl_region: xbl_region@85e00000 { |
| 527 | no-map; |
| 528 | reg = <0 0x85e00000 0 0x100000>; |
| 529 | }; |
| 530 | |
| 531 | removed_region: removed_region@85fc0000 { |
Patrick Daly | 2ff257e | 2017-06-06 16:28:50 -0700 | [diff] [blame] | 532 | no-map; |
| 533 | reg = <0 0x85fc0000 0 0x2f40000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 534 | }; |
| 535 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 536 | pil_camera_mem: camera_region@8ab00000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 537 | compatible = "removed-dma-pool"; |
| 538 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 539 | reg = <0 0x8ab00000 0 0x500000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 540 | }; |
| 541 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 542 | pil_adsp_mem: pil_adsp_region@8b100000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 543 | compatible = "removed-dma-pool"; |
| 544 | no-map; |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 545 | reg = <0 0x8b100000 0 0x1a00000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 546 | }; |
| 547 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 548 | wlan_fw_region: wlan_fw_region@8cb00000 { |
| 549 | compatible = "shared-dma-pool"; |
| 550 | reg = <0 0x8cb00000 0 0x100000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 551 | }; |
| 552 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 553 | pil_modem_mem: modem_region@8cc00000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 554 | compatible = "removed-dma-pool"; |
| 555 | no-map; |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 556 | reg = <0 0x8cc00000 0 0x7600000>; |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 557 | }; |
| 558 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 559 | pil_video_mem: pil_video_region@94200000 { |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 560 | compatible = "removed-dma-pool"; |
| 561 | no-map; |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 562 | reg = <0 0x94200000 0 0x500000>; |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 563 | }; |
| 564 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 565 | pil_cdsp_mem: cdsp_regions@94700000 { |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 566 | compatible = "removed-dma-pool"; |
| 567 | no-map; |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 568 | reg = <0 0x94700000 0 0x800000>; |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 569 | }; |
| 570 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 571 | pil_mba_mem: pil_mba_region@0x94f00000 { |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 572 | compatible = "removed-dma-pool"; |
| 573 | no-map; |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 574 | reg = <0 0x94f00000 0 0x200000>; |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 575 | }; |
| 576 | |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 577 | pil_slpi_mem: pil_slpi_region@95100000 { |
Patrick Daly | d2b2c26 | 2017-04-03 17:34:50 -0700 | [diff] [blame] | 578 | compatible = "removed-dma-pool"; |
| 579 | no-map; |
Patrick Daly | 04471a6 | 2017-06-30 14:26:00 -0700 | [diff] [blame] | 580 | reg = <0 0x95100000 0 0x1400000>; |
| 581 | }; |
| 582 | |
| 583 | |
| 584 | pil_spss_mem: spss_region@96500000 { |
| 585 | compatible = "removed-dma-pool"; |
| 586 | no-map; |
| 587 | reg = <0 0x96500000 0 0x100000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 588 | }; |
| 589 | |
| 590 | adsp_mem: adsp_region { |
| 591 | compatible = "shared-dma-pool"; |
| 592 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 593 | reusable; |
| 594 | alignment = <0 0x400000>; |
c_mtharu | d8dde20 | 2017-11-10 09:23:19 +0530 | [diff] [blame] | 595 | size = <0 0x1000000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 596 | }; |
| 597 | |
| 598 | qseecom_mem: qseecom_region { |
| 599 | compatible = "shared-dma-pool"; |
| 600 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
Patrick Daly | b7af083 | 2017-08-14 15:06:46 -0700 | [diff] [blame] | 601 | no-map; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 602 | alignment = <0 0x400000>; |
| 603 | size = <0 0x1400000>; |
| 604 | }; |
| 605 | |
Patrick Daly | c5fff41 | 2017-12-06 15:38:32 -0800 | [diff] [blame] | 606 | qseecom_ta_mem: qseecom_ta_region { |
| 607 | compatible = "shared-dma-pool"; |
| 608 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 609 | reusable; |
| 610 | alignment = <0 0x400000>; |
| 611 | size = <0 0x1000000>; |
| 612 | }; |
| 613 | |
Sudarshan Rajagopalan | c3e15fc | 2017-05-17 18:34:42 -0700 | [diff] [blame] | 614 | secure_sp_mem: secure_sp_region { /* SPSS-HLOS ION shared mem */ |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 615 | compatible = "shared-dma-pool"; |
| 616 | alloc-ranges = <0 0x00000000 0 0xffffffff>; /* 32-bit */ |
| 617 | reusable; |
| 618 | alignment = <0 0x400000>; |
| 619 | size = <0 0x800000>; |
| 620 | }; |
| 621 | |
Shashank Babu Chinta Venkata | e19344a | 2017-05-15 14:01:15 -0700 | [diff] [blame] | 622 | cont_splash_memory: cont_splash_region@9d400000 { |
| 623 | reg = <0x0 0x9d400000 0x0 0x02400000>; |
| 624 | label = "cont_splash_region"; |
| 625 | }; |
| 626 | |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 627 | secure_display_memory: secure_display_region { |
| 628 | compatible = "shared-dma-pool"; |
| 629 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 630 | reusable; |
| 631 | alignment = <0 0x400000>; |
| 632 | size = <0 0x5c00000>; |
| 633 | }; |
| 634 | |
Satyajit Desai | 89c4e2e | 2017-05-11 19:34:47 -0700 | [diff] [blame] | 635 | dump_mem: mem_dump_region { |
| 636 | compatible = "shared-dma-pool"; |
| 637 | reusable; |
| 638 | size = <0 0x2400000>; |
| 639 | }; |
| 640 | |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 641 | /* global autoconfigured region for contiguous allocations */ |
| 642 | linux,cma { |
| 643 | compatible = "shared-dma-pool"; |
| 644 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 645 | reusable; |
| 646 | alignment = <0 0x400000>; |
| 647 | size = <0 0x2000000>; |
| 648 | linux,cma-default; |
| 649 | }; |
| 650 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 651 | }; |
| 652 | |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 653 | #include "msm-gdsc-sdm845.dtsi" |
Shashank Babu Chinta Venkata | 46bb3b5 | 2017-04-05 12:14:18 -0700 | [diff] [blame] | 654 | #include "sdm845-sde-pll.dtsi" |
tharun kumar | 7eca0bb | 2017-06-28 16:49:18 +0530 | [diff] [blame] | 655 | #include "msm-rdbg.dtsi" |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 656 | #include "sdm845-sde.dtsi" |
Girish Mahadevan | 2e2fbe7 | 2017-03-28 13:28:18 -0600 | [diff] [blame] | 657 | #include "sdm845-qupv3.dtsi" |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 658 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 659 | &soc { |
| 660 | #address-cells = <1>; |
| 661 | #size-cells = <1>; |
| 662 | ranges = <0 0 0 0xffffffff>; |
| 663 | compatible = "simple-bus"; |
| 664 | |
Satyajit Desai | 22f9110 | 2017-09-06 16:35:19 -0700 | [diff] [blame] | 665 | jtag_mm0: jtagmm@7040000 { |
| 666 | compatible = "qcom,jtagv8-mm"; |
| 667 | reg = <0x7040000 0x1000>; |
| 668 | reg-names = "etm-base"; |
| 669 | |
| 670 | clocks = <&clock_aop QDSS_CLK>; |
| 671 | clock-names = "core_clk"; |
| 672 | |
| 673 | qcom,coresight-jtagmm-cpu = <&CPU0>; |
| 674 | }; |
| 675 | |
| 676 | jtag_mm1: jtagmm@7140000 { |
| 677 | compatible = "qcom,jtagv8-mm"; |
| 678 | reg = <0x7140000 0x1000>; |
| 679 | reg-names = "etm-base"; |
| 680 | |
| 681 | clocks = <&clock_aop QDSS_CLK>; |
| 682 | clock-names = "core_clk"; |
| 683 | |
| 684 | qcom,coresight-jtagmm-cpu = <&CPU1>; |
| 685 | }; |
| 686 | |
| 687 | jtag_mm2: jtagmm@7240000 { |
| 688 | compatible = "qcom,jtagv8-mm"; |
| 689 | reg = <0x7240000 0x1000>; |
| 690 | reg-names = "etm-base"; |
| 691 | |
| 692 | clocks = <&clock_aop QDSS_CLK>; |
| 693 | clock-names = "core_clk"; |
| 694 | |
| 695 | qcom,coresight-jtagmm-cpu = <&CPU2>; |
| 696 | }; |
| 697 | |
| 698 | jtag_mm3: jtagmm@7340000 { |
| 699 | compatible = "qcom,jtagv8-mm"; |
| 700 | reg = <0x7340000 0x1000>; |
| 701 | reg-names = "etm-base"; |
| 702 | |
| 703 | clocks = <&clock_aop QDSS_CLK>; |
| 704 | clock-names = "core_clk"; |
| 705 | |
| 706 | qcom,coresight-jtagmm-cpu = <&CPU3>; |
| 707 | }; |
| 708 | |
| 709 | jtag_mm4: jtagmm@7440000 { |
| 710 | compatible = "qcom,jtagv8-mm"; |
| 711 | reg = <0x7440000 0x1000>; |
| 712 | reg-names = "etm-base"; |
| 713 | |
| 714 | clocks = <&clock_aop QDSS_CLK>; |
| 715 | clock-names = "core_clk"; |
| 716 | |
| 717 | qcom,coresight-jtagmm-cpu = <&CPU4>; |
| 718 | }; |
| 719 | |
| 720 | jtag_mm5: jtagmm@7540000 { |
| 721 | compatible = "qcom,jtagv8-mm"; |
| 722 | reg = <0x7540000 0x1000>; |
| 723 | reg-names = "etm-base"; |
| 724 | |
| 725 | clocks = <&clock_aop QDSS_CLK>; |
| 726 | clock-names = "core_clk"; |
| 727 | |
| 728 | qcom,coresight-jtagmm-cpu = <&CPU5>; |
| 729 | }; |
| 730 | |
| 731 | jtag_mm6: jtagmm@7640000 { |
| 732 | compatible = "qcom,jtagv8-mm"; |
| 733 | reg = <0x7640000 0x1000>; |
| 734 | reg-names = "etm-base"; |
| 735 | |
| 736 | clocks = <&clock_aop QDSS_CLK>; |
| 737 | clock-names = "core_clk"; |
| 738 | |
| 739 | qcom,coresight-jtagmm-cpu = <&CPU6>; |
| 740 | }; |
| 741 | |
| 742 | jtag_mm7: jtagmm@7740000 { |
| 743 | compatible = "qcom,jtagv8-mm"; |
| 744 | reg = <0x7740000 0x1000>; |
| 745 | reg-names = "etm-base"; |
| 746 | |
| 747 | clocks = <&clock_aop QDSS_CLK>; |
| 748 | clock-names = "core_clk"; |
| 749 | |
| 750 | qcom,coresight-jtagmm-cpu = <&CPU7>; |
| 751 | }; |
| 752 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 753 | intc: interrupt-controller@17a00000 { |
| 754 | compatible = "arm,gic-v3"; |
| 755 | #interrupt-cells = <3>; |
| 756 | interrupt-controller; |
| 757 | #redistributor-regions = <1>; |
| 758 | redistributor-stride = <0x0 0x20000>; |
| 759 | reg = <0x17a00000 0x10000>, /* GICD */ |
Kyle Yan | c59b355 | 2016-09-29 16:25:03 -0700 | [diff] [blame] | 760 | <0x17a60000 0x100000>; /* GICR * 8 */ |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 761 | interrupts = <1 9 4>; |
Archana Sathyakumar | 00a36ab | 2017-03-03 14:38:26 -0700 | [diff] [blame] | 762 | interrupt-parent = <&intc>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 763 | }; |
| 764 | |
Raghavendra Kakarla | 04f03216 | 2017-12-08 19:11:54 +0530 | [diff] [blame] | 765 | pdc: interrupt-controller@b220000{ |
| 766 | compatible = "qcom,pdc-sdm845"; |
| 767 | reg = <0xb220000 0x400>; |
| 768 | #interrupt-cells = <3>; |
| 769 | interrupt-parent = <&intc>; |
| 770 | interrupt-controller; |
| 771 | }; |
| 772 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 773 | timer { |
| 774 | compatible = "arm,armv8-timer"; |
| 775 | interrupts = <1 1 0xf08>, |
| 776 | <1 2 0xf08>, |
| 777 | <1 3 0xf08>, |
| 778 | <1 0 0xf08>; |
| 779 | clock-frequency = <19200000>; |
| 780 | }; |
| 781 | |
| 782 | timer@0x17C90000{ |
| 783 | #address-cells = <1>; |
| 784 | #size-cells = <1>; |
| 785 | ranges; |
| 786 | compatible = "arm,armv7-timer-mem"; |
| 787 | reg = <0x17C90000 0x1000>; |
| 788 | clock-frequency = <19200000>; |
| 789 | |
| 790 | frame@0x17CA0000 { |
| 791 | frame-number = <0>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 792 | interrupts = <0 7 0x4>, |
| 793 | <0 6 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 794 | reg = <0x17CA0000 0x1000>, |
| 795 | <0x17CB0000 0x1000>; |
| 796 | }; |
| 797 | |
| 798 | frame@17cc0000 { |
| 799 | frame-number = <1>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 800 | interrupts = <0 8 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 801 | reg = <0x17cc0000 0x1000>; |
| 802 | status = "disabled"; |
| 803 | }; |
| 804 | |
| 805 | frame@17cd0000 { |
| 806 | frame-number = <2>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 807 | interrupts = <0 9 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 808 | reg = <0x17cd0000 0x1000>; |
| 809 | status = "disabled"; |
| 810 | }; |
| 811 | |
| 812 | frame@17ce0000 { |
| 813 | frame-number = <3>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 814 | interrupts = <0 10 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 815 | reg = <0x17ce0000 0x1000>; |
| 816 | status = "disabled"; |
| 817 | }; |
| 818 | |
| 819 | frame@17cf0000 { |
| 820 | frame-number = <4>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 821 | interrupts = <0 11 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 822 | reg = <0x17cf0000 0x1000>; |
| 823 | status = "disabled"; |
| 824 | }; |
| 825 | |
| 826 | frame@17d00000 { |
| 827 | frame-number = <5>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 828 | interrupts = <0 12 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 829 | reg = <0x17d00000 0x1000>; |
| 830 | status = "disabled"; |
| 831 | }; |
| 832 | |
| 833 | frame@17d10000 { |
| 834 | frame-number = <6>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 835 | interrupts = <0 13 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 836 | reg = <0x17d10000 0x1000>; |
| 837 | status = "disabled"; |
| 838 | }; |
| 839 | }; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 840 | |
Kyle Yan | a795b9d | 2017-02-14 16:16:13 -0800 | [diff] [blame] | 841 | restart@10ac000 { |
| 842 | compatible = "qcom,pshold"; |
| 843 | reg = <0xC264000 0x4>, |
| 844 | <0x1fd3000 0x4>; |
| 845 | reg-names = "pshold-base", "tcsr-boot-misc-detect"; |
| 846 | }; |
| 847 | |
Mahesh Sivasubramanian | 4782ca6 | 2017-06-15 14:59:31 -0600 | [diff] [blame] | 848 | aop-msg-client { |
| 849 | compatible = "qcom,debugfs-qmp-client"; |
| 850 | mboxes = <&qmp_aop 0>; |
| 851 | mbox-names = "aop"; |
| 852 | }; |
| 853 | |
David Collins | ef3dd9c | 2017-01-12 14:14:23 -0800 | [diff] [blame] | 854 | spmi_bus: qcom,spmi@c440000 { |
| 855 | compatible = "qcom,spmi-pmic-arb"; |
| 856 | reg = <0xc440000 0x1100>, |
| 857 | <0xc600000 0x2000000>, |
| 858 | <0xe600000 0x100000>, |
| 859 | <0xe700000 0xa0000>, |
| 860 | <0xc40a000 0x26000>; |
| 861 | reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| 862 | interrupt-names = "periph_irq"; |
| 863 | interrupts = <GIC_SPI 481 IRQ_TYPE_NONE>; |
| 864 | qcom,ee = <0>; |
| 865 | qcom,channel = <0>; |
| 866 | #address-cells = <2>; |
| 867 | #size-cells = <0>; |
| 868 | interrupt-controller; |
| 869 | #interrupt-cells = <4>; |
| 870 | cell-index = <0>; |
David Collins | 4938fce | 2017-09-28 17:41:31 -0700 | [diff] [blame] | 871 | qcom,enable-ahb-bus-workaround; |
David Collins | ef3dd9c | 2017-01-12 14:14:23 -0800 | [diff] [blame] | 872 | }; |
| 873 | |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 874 | spmi_debug_bus: qcom,spmi-debug@6b22000 { |
| 875 | compatible = "qcom,spmi-pmic-arb-debug"; |
| 876 | reg = <0x6b22000 0x60>, <0x7820A8 4>; |
| 877 | reg-names = "core", "fuse"; |
David Collins | 42936de | 2017-06-08 14:52:43 -0700 | [diff] [blame] | 878 | clocks = <&clock_aop QDSS_CLK>; |
| 879 | clock-names = "core_clk"; |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 880 | qcom,fuse-disable-bit = <12>; |
| 881 | #address-cells = <2>; |
| 882 | #size-cells = <0>; |
| 883 | |
| 884 | qcom,pm8998-debug@0 { |
| 885 | compatible = "qcom,spmi-pmic"; |
| 886 | reg = <0x0 SPMI_USID>; |
| 887 | #address-cells = <2>; |
| 888 | #size-cells = <0>; |
David Collins | db91361 | 2017-06-08 17:13:28 -0700 | [diff] [blame] | 889 | qcom,can-sleep; |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 890 | }; |
| 891 | |
| 892 | qcom,pm8998-debug@1 { |
| 893 | compatible = "qcom,spmi-pmic"; |
| 894 | reg = <0x1 SPMI_USID>; |
| 895 | #address-cells = <2>; |
| 896 | #size-cells = <0>; |
David Collins | db91361 | 2017-06-08 17:13:28 -0700 | [diff] [blame] | 897 | qcom,can-sleep; |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 898 | }; |
| 899 | |
| 900 | qcom,pmi8998-debug@2 { |
| 901 | compatible = "qcom,spmi-pmic"; |
| 902 | reg = <0x2 SPMI_USID>; |
| 903 | #address-cells = <2>; |
| 904 | #size-cells = <0>; |
David Collins | db91361 | 2017-06-08 17:13:28 -0700 | [diff] [blame] | 905 | qcom,can-sleep; |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 906 | }; |
| 907 | |
| 908 | qcom,pmi8998-debug@3 { |
| 909 | compatible = "qcom,spmi-pmic"; |
| 910 | reg = <0x3 SPMI_USID>; |
| 911 | #address-cells = <2>; |
| 912 | #size-cells = <0>; |
David Collins | db91361 | 2017-06-08 17:13:28 -0700 | [diff] [blame] | 913 | qcom,can-sleep; |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 914 | }; |
| 915 | |
| 916 | qcom,pm8005-debug@4 { |
| 917 | compatible = "qcom,spmi-pmic"; |
| 918 | reg = <0x4 SPMI_USID>; |
| 919 | #address-cells = <2>; |
| 920 | #size-cells = <0>; |
David Collins | db91361 | 2017-06-08 17:13:28 -0700 | [diff] [blame] | 921 | qcom,can-sleep; |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 922 | }; |
| 923 | |
| 924 | qcom,pm8005-debug@5 { |
| 925 | compatible = "qcom,spmi-pmic"; |
| 926 | reg = <0x5 SPMI_USID>; |
| 927 | #address-cells = <2>; |
| 928 | #size-cells = <0>; |
David Collins | db91361 | 2017-06-08 17:13:28 -0700 | [diff] [blame] | 929 | qcom,can-sleep; |
David Collins | 86dc5b5 | 2017-04-11 14:29:36 -0700 | [diff] [blame] | 930 | }; |
| 931 | }; |
| 932 | |
Rohit Gupta | 64b7e65 | 2017-03-01 10:47:52 -0800 | [diff] [blame] | 933 | cpubw: qcom,cpubw { |
| 934 | compatible = "qcom,devbw"; |
| 935 | governor = "performance"; |
Stephen Boyd | 567b1fc | 2017-06-06 17:47:12 -0700 | [diff] [blame] | 936 | qcom,src-dst-ports = |
| 937 | <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_LLCC>; |
Rohit Gupta | 64b7e65 | 2017-03-01 10:47:52 -0800 | [diff] [blame] | 938 | qcom,active-only; |
| 939 | qcom,bw-tbl = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 940 | < MHZ_TO_MBPS(150, 16) >, /* 2288 MB/s */ |
| 941 | < MHZ_TO_MBPS(300, 16) >, /* 4577 MB/s */ |
| 942 | < MHZ_TO_MBPS(426, 16) >, /* 6500 MB/s */ |
| 943 | < MHZ_TO_MBPS(533, 16) >, /* 8132 MB/s */ |
| 944 | < MHZ_TO_MBPS(600, 16) >, /* 9155 MB/s */ |
| 945 | < MHZ_TO_MBPS(700, 16) >; /* 10681 MB/s */ |
Rohit Gupta | 64b7e65 | 2017-03-01 10:47:52 -0800 | [diff] [blame] | 946 | }; |
| 947 | |
| 948 | bwmon: qcom,cpu-bwmon { |
| 949 | compatible = "qcom,bimc-bwmon4"; |
| 950 | reg = <0x1436400 0x300>, <0x1436300 0x200>; |
| 951 | reg-names = "base", "global_base"; |
| 952 | interrupts = <0 581 4>; |
| 953 | qcom,mport = <0>; |
| 954 | qcom,hw-timer-hz = <19200000>; |
| 955 | qcom,target-dev = <&cpubw>; |
| 956 | }; |
| 957 | |
Stephen Boyd | b1adf31 | 2017-04-03 16:02:12 -0700 | [diff] [blame] | 958 | llccbw: qcom,llccbw { |
| 959 | compatible = "qcom,devbw"; |
Jonathan Avila | 81b63f0 | 2017-09-27 13:21:19 -0700 | [diff] [blame] | 960 | governor = "performance"; |
Stephen Boyd | b1adf31 | 2017-04-03 16:02:12 -0700 | [diff] [blame] | 961 | qcom,src-dst-ports = |
Stephen Boyd | 567b1fc | 2017-06-06 17:47:12 -0700 | [diff] [blame] | 962 | <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>; |
Stephen Boyd | b1adf31 | 2017-04-03 16:02:12 -0700 | [diff] [blame] | 963 | qcom,active-only; |
| 964 | qcom,bw-tbl = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 965 | < MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */ |
| 966 | < MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */ |
| 967 | < MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */ |
| 968 | < MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */ |
| 969 | < MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */ |
| 970 | < MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */ |
| 971 | < MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */ |
| 972 | < MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */ |
| 973 | < MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */ |
| 974 | < MHZ_TO_MBPS(1804, 4) >; /* 6881 MB/s */ |
Stephen Boyd | b1adf31 | 2017-04-03 16:02:12 -0700 | [diff] [blame] | 975 | }; |
| 976 | |
| 977 | llcc_bwmon: qcom,llcc-bwmon { |
| 978 | compatible = "qcom,bimc-bwmon5"; |
| 979 | reg = <0x0114A000 0x1000>; |
| 980 | reg-names = "base"; |
| 981 | interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; |
| 982 | qcom,hw-timer-hz = <19200000>; |
| 983 | qcom,target-dev = <&llccbw>; |
| 984 | qcom,count-unit = <0x400000>; |
| 985 | qcom,byte-mid-mask = <0xe000>; |
| 986 | qcom,byte-mid-match = <0xe000>; |
| 987 | }; |
| 988 | |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 989 | memlat_cpu0: qcom,memlat-cpu0 { |
| 990 | compatible = "qcom,devbw"; |
| 991 | governor = "powersave"; |
| 992 | qcom,src-dst-ports = <1 512>; |
| 993 | qcom,active-only; |
| 994 | qcom,bw-tbl = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 995 | < MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */ |
| 996 | < MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */ |
| 997 | < MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */ |
| 998 | < MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */ |
| 999 | < MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */ |
| 1000 | < MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */ |
| 1001 | < MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */ |
| 1002 | < MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */ |
| 1003 | < MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */ |
| 1004 | < MHZ_TO_MBPS(1804, 4) >; /* 6881 MB/s */ |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1005 | }; |
| 1006 | |
| 1007 | memlat_cpu4: qcom,memlat-cpu4 { |
| 1008 | compatible = "qcom,devbw"; |
| 1009 | governor = "powersave"; |
| 1010 | qcom,src-dst-ports = <1 512>; |
| 1011 | qcom,active-only; |
| 1012 | status = "ok"; |
| 1013 | qcom,bw-tbl = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 1014 | < MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */ |
| 1015 | < MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */ |
| 1016 | < MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */ |
| 1017 | < MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */ |
| 1018 | < MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */ |
| 1019 | < MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */ |
| 1020 | < MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */ |
| 1021 | < MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */ |
| 1022 | < MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */ |
| 1023 | < MHZ_TO_MBPS(1804, 4) >; /* 6881 MB/s */ |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1024 | }; |
| 1025 | |
David Dai | cbf740d | 2017-04-05 17:13:54 -0700 | [diff] [blame] | 1026 | snoc_cnoc_keepalive: qcom,snoc_cnoc_keepalive { |
| 1027 | compatible = "qcom,devbw"; |
| 1028 | governor = "powersave"; |
| 1029 | qcom,src-dst-ports = <139 627>; |
| 1030 | qcom,active-only; |
| 1031 | status = "ok"; |
| 1032 | qcom,bw-tbl = |
| 1033 | < 1 >; |
| 1034 | }; |
| 1035 | |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1036 | devfreq_memlat_0: qcom,cpu0-memlat-mon { |
| 1037 | compatible = "qcom,arm-memlat-mon"; |
| 1038 | qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; |
| 1039 | qcom,target-dev = <&memlat_cpu0>; |
| 1040 | qcom,cachemiss-ev = <0x2A>; |
| 1041 | qcom,core-dev-table = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 1042 | < 300000 MHZ_TO_MBPS( 200, 4) >, |
| 1043 | < 748800 MHZ_TO_MBPS( 451, 4) >, |
| 1044 | < 1132800 MHZ_TO_MBPS( 547, 4) >, |
| 1045 | < 1440000 MHZ_TO_MBPS( 768, 4) >, |
| 1046 | < 1593600 MHZ_TO_MBPS(1017, 4) >; |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1047 | }; |
| 1048 | |
| 1049 | devfreq_memlat_4: qcom,cpu4-memlat-mon { |
| 1050 | compatible = "qcom,arm-memlat-mon"; |
| 1051 | qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; |
| 1052 | qcom,target-dev = <&memlat_cpu4>; |
| 1053 | qcom,cachemiss-ev = <0x2A>; |
| 1054 | qcom,core-dev-table = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 1055 | < 300000 MHZ_TO_MBPS( 200, 4) >, |
| 1056 | < 499200 MHZ_TO_MBPS( 451, 4) >, |
| 1057 | < 806400 MHZ_TO_MBPS( 547, 4) >, |
| 1058 | < 1036800 MHZ_TO_MBPS( 768, 4) >, |
| 1059 | < 1190400 MHZ_TO_MBPS(1017, 4) >, |
| 1060 | < 1574400 MHZ_TO_MBPS(1296, 4) >, |
| 1061 | < 1728000 MHZ_TO_MBPS(1555, 4) >, |
| 1062 | < 1958400 MHZ_TO_MBPS(1804, 4) >; |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1063 | }; |
| 1064 | |
| 1065 | l3_cpu0: qcom,l3-cpu0 { |
| 1066 | compatible = "devfreq-simple-dev"; |
| 1067 | clock-names = "devfreq_clk"; |
| 1068 | clocks = <&clock_cpucc L3_CLUSTER0_VOTE_CLK>; |
| 1069 | governor = "performance"; |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1070 | }; |
| 1071 | |
| 1072 | l3_cpu4: qcom,l3-cpu4 { |
| 1073 | compatible = "devfreq-simple-dev"; |
| 1074 | clock-names = "devfreq_clk"; |
| 1075 | clocks = <&clock_cpucc L3_CLUSTER1_VOTE_CLK>; |
| 1076 | governor = "performance"; |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1077 | }; |
| 1078 | |
| 1079 | devfreq_l3lat_0: qcom,cpu0-l3lat-mon { |
| 1080 | compatible = "qcom,arm-memlat-mon"; |
| 1081 | qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; |
| 1082 | qcom,target-dev = <&l3_cpu0>; |
| 1083 | qcom,cachemiss-ev = <0x17>; |
| 1084 | qcom,core-dev-table = |
Rohit Gupta | 6cbadca | 2017-07-10 16:29:46 -0700 | [diff] [blame] | 1085 | < 300000 300000000 >, |
| 1086 | < 748800 576000000 >, |
| 1087 | < 979200 652800000 >, |
| 1088 | < 1209600 806400000 >, |
| 1089 | < 1516800 883200000 >, |
| 1090 | < 1593600 960000000 >, |
Rohit Gupta | 53fdca0 | 2017-07-12 16:01:52 -0700 | [diff] [blame] | 1091 | < 1708800 1305600000 >; |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1092 | }; |
| 1093 | |
| 1094 | devfreq_l3lat_4: qcom,cpu4-l3lat-mon { |
| 1095 | compatible = "qcom,arm-memlat-mon"; |
| 1096 | qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; |
| 1097 | qcom,target-dev = <&l3_cpu4>; |
| 1098 | qcom,cachemiss-ev = <0x17>; |
| 1099 | qcom,core-dev-table = |
Rohit Gupta | 6cbadca | 2017-07-10 16:29:46 -0700 | [diff] [blame] | 1100 | < 300000 300000000 >, |
| 1101 | < 1036800 576000000 >, |
| 1102 | < 1190400 806400000 >, |
| 1103 | < 1574400 883200000 >, |
| 1104 | < 1804800 960000000 >, |
Rohit Gupta | 53fdca0 | 2017-07-12 16:01:52 -0700 | [diff] [blame] | 1105 | < 1958400 1305600000 >; |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 1106 | }; |
| 1107 | |
Jonathan Avila | 2d49ac1 | 2017-10-17 15:00:15 -0700 | [diff] [blame] | 1108 | l3_cdsp: qcom,l3-cdsp { |
| 1109 | compatible = "devfreq-simple-dev"; |
| 1110 | clock-names = "devfreq_clk"; |
| 1111 | clocks = <&clock_cpucc L3_MISC_VOTE_CLK>; |
| 1112 | governor = "powersave"; |
| 1113 | }; |
| 1114 | |
Patrick Fay | 4b46f42 | 2017-04-05 10:09:49 -0700 | [diff] [blame] | 1115 | cpu_pmu: cpu-pmu { |
| 1116 | compatible = "arm,armv8-pmuv3"; |
| 1117 | qcom,irq-is-percpu; |
| 1118 | interrupts = <1 5 4>; |
| 1119 | }; |
| 1120 | |
Rohit Gupta | 3097ad7 | 2017-05-19 17:31:13 -0700 | [diff] [blame] | 1121 | mincpubw: qcom,mincpubw { |
| 1122 | compatible = "qcom,devbw"; |
| 1123 | governor = "powersave"; |
| 1124 | qcom,src-dst-ports = <1 512>; |
| 1125 | qcom,active-only; |
| 1126 | qcom,bw-tbl = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 1127 | < MHZ_TO_MBPS( 200, 4) >, /* 762 MB/s */ |
| 1128 | < MHZ_TO_MBPS( 300, 4) >, /* 1144 MB/s */ |
| 1129 | < MHZ_TO_MBPS( 451, 4) >, /* 1720 MB/s */ |
| 1130 | < MHZ_TO_MBPS( 547, 4) >, /* 2086 MB/s */ |
| 1131 | < MHZ_TO_MBPS( 681, 4) >, /* 2597 MB/s */ |
| 1132 | < MHZ_TO_MBPS( 768, 4) >, /* 2929 MB/s */ |
| 1133 | < MHZ_TO_MBPS(1017, 4) >, /* 3879 MB/s */ |
| 1134 | < MHZ_TO_MBPS(1296, 4) >, /* 4943 MB/s */ |
| 1135 | < MHZ_TO_MBPS(1555, 4) >, /* 5931 MB/s */ |
| 1136 | < MHZ_TO_MBPS(1804, 4) >; /* 6881 MB/s */ |
Rohit Gupta | 3097ad7 | 2017-05-19 17:31:13 -0700 | [diff] [blame] | 1137 | }; |
| 1138 | |
Stephen Boyd | 31aac5f | 2017-09-01 09:16:06 -0700 | [diff] [blame] | 1139 | devfreq_cpufreq: devfreq-cpufreq { |
Rohit Gupta | 3097ad7 | 2017-05-19 17:31:13 -0700 | [diff] [blame] | 1140 | mincpubw-cpufreq { |
| 1141 | target-dev = <&mincpubw>; |
| 1142 | cpu-to-dev-map-0 = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 1143 | < 1708800 MHZ_TO_MBPS(200, 4) >; |
Rohit Gupta | 3097ad7 | 2017-05-19 17:31:13 -0700 | [diff] [blame] | 1144 | cpu-to-dev-map-4 = |
Stephen Boyd | c4ea837 | 2017-06-06 18:45:15 -0700 | [diff] [blame] | 1145 | < 1881600 MHZ_TO_MBPS(200, 4) >, |
| 1146 | < 2208000 MHZ_TO_MBPS(681, 4) >; |
Rohit Gupta | 3097ad7 | 2017-05-19 17:31:13 -0700 | [diff] [blame] | 1147 | }; |
| 1148 | }; |
| 1149 | |
Jonathan Avila | c7a6fd5 | 2017-10-12 15:24:05 -0700 | [diff] [blame] | 1150 | devfreq_compute: qcom,devfreq-compute { |
| 1151 | compatible = "qcom,arm-cpu-mon"; |
| 1152 | qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; |
| 1153 | qcom,target-dev = <&mincpubw>; |
| 1154 | qcom,core-dev-table = |
| 1155 | < 1881600 MHZ_TO_MBPS(200, 4) >, |
| 1156 | < 2208000 MHZ_TO_MBPS(681, 4) >; |
| 1157 | }; |
| 1158 | |
Taniya Das | 9b42110 | 2017-05-05 13:59:58 +0530 | [diff] [blame] | 1159 | clock_rpmh: qcom,rpmhclk { |
| 1160 | compatible = "qcom,rpmh-clk-sdm845"; |
| 1161 | #clock-cells = <1>; |
| 1162 | mboxes = <&apps_rsc 0>; |
| 1163 | mbox-names = "apps"; |
| 1164 | }; |
| 1165 | |
Deepak Katragadda | f8b9cc6 | 2016-11-02 15:17:15 -0700 | [diff] [blame] | 1166 | clock_gcc: qcom,gcc@100000 { |
Deepak Katragadda | 98bdd50 | 2017-04-03 13:54:13 -0700 | [diff] [blame] | 1167 | compatible = "qcom,gcc-sdm845", "syscon"; |
Deepak Katragadda | f8b9cc6 | 2016-11-02 15:17:15 -0700 | [diff] [blame] | 1168 | reg = <0x100000 0x1f0000>; |
| 1169 | reg-names = "cc_base"; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1170 | vdd_cx-supply = <&pm8998_s9_level>; |
| 1171 | vdd_cx_ao-supply = <&pm8998_s9_level_ao>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1172 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 1173 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1174 | }; |
| 1175 | |
Deepak Katragadda | b09ab88 | 2016-11-09 17:47:29 -0800 | [diff] [blame] | 1176 | clock_videocc: qcom,videocc@ab00000 { |
Deepak Katragadda | 98bdd50 | 2017-04-03 13:54:13 -0700 | [diff] [blame] | 1177 | compatible = "qcom,video_cc-sdm845", "syscon"; |
Deepak Katragadda | b09ab88 | 2016-11-09 17:47:29 -0800 | [diff] [blame] | 1178 | reg = <0xab00000 0x10000>; |
| 1179 | reg-names = "cc_base"; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1180 | vdd_cx-supply = <&pm8998_s9_level>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1181 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 1182 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1183 | }; |
| 1184 | |
Deepak Katragadda | 7f073cb | 2016-12-15 14:22:38 -0800 | [diff] [blame] | 1185 | clock_camcc: qcom,camcc@ad00000 { |
Deepak Katragadda | 98bdd50 | 2017-04-03 13:54:13 -0700 | [diff] [blame] | 1186 | compatible = "qcom,cam_cc-sdm845", "syscon"; |
Deepak Katragadda | 7f073cb | 2016-12-15 14:22:38 -0800 | [diff] [blame] | 1187 | reg = <0xad00000 0x10000>; |
| 1188 | reg-names = "cc_base"; |
| 1189 | vdd_cx-supply = <&pm8998_s9_level>; |
| 1190 | vdd_mx-supply = <&pm8998_s6_level>; |
Pavan Kumar Chilamkurthi | 6bc57c1 | 2017-05-31 22:16:55 -0700 | [diff] [blame] | 1191 | qcom,cam_cc_csi0phytimer_clk_src-opp-handle = <&cam_csiphy0>; |
| 1192 | qcom,cam_cc_csi1phytimer_clk_src-opp-handle = <&cam_csiphy1>; |
| 1193 | qcom,cam_cc_csi2phytimer_clk_src-opp-handle = <&cam_csiphy2>; |
| 1194 | qcom,cam_cc_cci_clk_src-opp-handle = <&cam_cci>; |
| 1195 | qcom,cam_cc_ife_0_csid_clk_src-opp-handle = <&cam_csid0>; |
| 1196 | qcom,cam_cc_ife_0_clk_src-opp-handle = <&cam_vfe0>; |
| 1197 | qcom,cam_cc_ife_1_csid_clk_src-opp-handle = <&cam_csid1>; |
| 1198 | qcom,cam_cc_ife_1_clk_src-opp-handle = <&cam_vfe1>; |
| 1199 | qcom,cam_cc_ife_lite_csid_clk_src-opp-handle = <&cam_csid_lite>; |
| 1200 | qcom,cam_cc_ife_lite_clk_src-opp-handle = <&cam_vfe_lite>; |
| 1201 | qcom,cam_cc_icp_clk_src-opp-handle = <&cam_a5>; |
| 1202 | qcom,cam_cc_ipe_0_clk_src-opp-handle = <&cam_ipe0>; |
| 1203 | qcom,cam_cc_ipe_1_clk_src-opp-handle = <&cam_ipe1>; |
| 1204 | qcom,cam_cc_bps_clk_src-opp-handle = <&cam_bps>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1205 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 1206 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1207 | }; |
| 1208 | |
Deepak Katragadda | d738ee3 | 2016-12-16 14:29:48 -0800 | [diff] [blame] | 1209 | clock_dispcc: qcom,dispcc@af00000 { |
Deepak Katragadda | 98bdd50 | 2017-04-03 13:54:13 -0700 | [diff] [blame] | 1210 | compatible = "qcom,dispcc-sdm845", "syscon"; |
Deepak Katragadda | 7c7730b | 2017-04-14 12:09:49 -0700 | [diff] [blame] | 1211 | reg = <0xaf00000 0x10000>; |
Deepak Katragadda | d738ee3 | 2016-12-16 14:29:48 -0800 | [diff] [blame] | 1212 | reg-names = "cc_base"; |
| 1213 | vdd_cx-supply = <&pm8998_s9_level>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1214 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 1215 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1216 | }; |
| 1217 | |
Vicky Wallace | 4dc0068 | 2017-02-22 19:04:40 -0800 | [diff] [blame] | 1218 | clock_gpucc: qcom,gpucc@5090000 { |
Deepak Katragadda | 98bdd50 | 2017-04-03 13:54:13 -0700 | [diff] [blame] | 1219 | compatible = "qcom,gpucc-sdm845", "syscon"; |
Vicky Wallace | 4dc0068 | 2017-02-22 19:04:40 -0800 | [diff] [blame] | 1220 | reg = <0x5090000 0x9000>; |
| 1221 | reg-names = "cc_base"; |
| 1222 | vdd_cx-supply = <&pm8998_s9_level>; |
Vicky Wallace | 27bf5040 | 2017-08-24 19:38:36 -0700 | [diff] [blame] | 1223 | vdd_mx-supply = <&pm8998_s6_level>; |
Vicky Wallace | 4af7a40 | 2017-04-04 19:29:42 -0700 | [diff] [blame] | 1224 | qcom,gpu_cc_gmu_clk_src-opp-handle = <&gmu>; |
Vicky Wallace | 4dc0068 | 2017-02-22 19:04:40 -0800 | [diff] [blame] | 1225 | #clock-cells = <1>; |
| 1226 | #reset-cells = <1>; |
| 1227 | }; |
| 1228 | |
| 1229 | clock_gfx: qcom,gfxcc@5090000 { |
| 1230 | compatible = "qcom,gfxcc-sdm845"; |
| 1231 | reg = <0x5090000 0x9000>; |
| 1232 | reg-names = "cc_base"; |
| 1233 | vdd_gfx-supply = <&pm8005_s1_level>; |
Vicky Wallace | 4af7a40 | 2017-04-04 19:29:42 -0700 | [diff] [blame] | 1234 | qcom,gpu_cc_gx_gfx3d_clk_src-opp-handle = <&msm_gpu>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1235 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 1236 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 1237 | }; |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1238 | |
Deepak Katragadda | 6d1a504 | 2017-05-11 09:31:58 -0700 | [diff] [blame] | 1239 | cpucc_debug: syscon@17970018 { |
| 1240 | compatible = "syscon"; |
| 1241 | reg = <0x17970018 0x4>; |
| 1242 | }; |
| 1243 | |
Deepak Katragadda | a910b44 | 2017-03-07 13:11:32 -0800 | [diff] [blame] | 1244 | clock_cpucc: qcom,cpucc@0x17d41000 { |
| 1245 | compatible = "qcom,clk-cpu-osm"; |
| 1246 | reg = <0x17d41000 0x1400>, |
| 1247 | <0x17d43000 0x1400>, |
David Collins | 1e04840 | 2017-11-29 15:43:09 -0800 | [diff] [blame] | 1248 | <0x17d45800 0x1400>; |
| 1249 | reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base"; |
Deepak Katragadda | 02617bd | 2017-11-10 16:03:43 -0800 | [diff] [blame] | 1250 | vdd_l3_mx_ao-supply = <&pm8998_s6_level_ao>; |
| 1251 | vdd_pwrcl_mx_ao-supply = <&pm8998_s6_level_ao>; |
Deepak Katragadda | a910b44 | 2017-03-07 13:11:32 -0800 | [diff] [blame] | 1252 | |
Deepak Katragadda | 02617bd | 2017-11-10 16:03:43 -0800 | [diff] [blame] | 1253 | qcom,mx-turbo-freq = <1478400000 1689600000 3300000001>; |
Jonathan Avila | 2d49ac1 | 2017-10-17 15:00:15 -0700 | [diff] [blame] | 1254 | l3-devs = <&l3_cpu0 &l3_cpu4 &l3_cdsp>; |
Deepak Katragadda | 3427274 | 2017-05-24 11:42:40 -0700 | [diff] [blame] | 1255 | |
Deepak Katragadda | a910b44 | 2017-03-07 13:11:32 -0800 | [diff] [blame] | 1256 | clock-names = "xo_ao"; |
| 1257 | clocks = <&clock_rpmh RPMH_CXO_CLK_A>; |
Deepak Katragadda | 95b7724 | 2016-12-19 14:10:03 -0800 | [diff] [blame] | 1258 | #clock-cells = <1>; |
Deepak Katragadda | 95b7724 | 2016-12-19 14:10:03 -0800 | [diff] [blame] | 1259 | }; |
| 1260 | |
Deepak Katragadda | 98bdd50 | 2017-04-03 13:54:13 -0700 | [diff] [blame] | 1261 | clock_debug: qcom,cc-debug@100000 { |
| 1262 | compatible = "qcom,debugcc-sdm845"; |
| 1263 | qcom,cc-count = <5>; |
| 1264 | qcom,gcc = <&clock_gcc>; |
| 1265 | qcom,videocc = <&clock_videocc>; |
| 1266 | qcom,camcc = <&clock_camcc>; |
| 1267 | qcom,dispcc = <&clock_dispcc>; |
| 1268 | qcom,gpucc = <&clock_gpucc>; |
Deepak Katragadda | 6d1a504 | 2017-05-11 09:31:58 -0700 | [diff] [blame] | 1269 | qcom,cpucc = <&cpucc_debug>; |
Deepak Katragadda | 98bdd50 | 2017-04-03 13:54:13 -0700 | [diff] [blame] | 1270 | clock-names = "xo_clk_src"; |
| 1271 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| 1272 | #clock-cells = <1>; |
| 1273 | }; |
| 1274 | |
Taniya Das | a8d52b9 | 2017-04-18 17:02:49 +0530 | [diff] [blame] | 1275 | clock_aop: qcom,aopclk { |
Deepak Katragadda | 90954d7 | 2017-07-27 14:22:24 -0700 | [diff] [blame] | 1276 | compatible = "qcom,aop-qmp-clk-v1"; |
Taniya Das | a8d52b9 | 2017-04-18 17:02:49 +0530 | [diff] [blame] | 1277 | #clock-cells = <1>; |
| 1278 | mboxes = <&qmp_aop 0>; |
| 1279 | mbox-names = "qdss_clk"; |
| 1280 | }; |
| 1281 | |
AnilKumar Chimata | 2e81590 | 2017-04-13 12:14:56 -0700 | [diff] [blame] | 1282 | ufs_ice: ufsice@1d90000 { |
| 1283 | compatible = "qcom,ice"; |
| 1284 | reg = <0x1d90000 0x8000>; |
| 1285 | qcom,enable-ice-clk; |
| 1286 | clock-names = "ufs_core_clk", "bus_clk", |
| 1287 | "iface_clk", "ice_core_clk"; |
| 1288 | clocks = <&clock_gcc GCC_UFS_PHY_AXI_CLK>, |
| 1289 | <&clock_gcc GCC_UFS_MEM_CLKREF_CLK>, |
| 1290 | <&clock_gcc GCC_UFS_PHY_AHB_CLK>, |
| 1291 | <&clock_gcc GCC_UFS_PHY_ICE_CORE_CLK>; |
| 1292 | qcom,op-freq-hz = <0>, <0>, <0>, <300000000>; |
| 1293 | vdd-hba-supply = <&ufs_phy_gdsc>; |
| 1294 | qcom,msm-bus,name = "ufs_ice_noc"; |
| 1295 | qcom,msm-bus,num-cases = <2>; |
| 1296 | qcom,msm-bus,num-paths = <1>; |
| 1297 | qcom,msm-bus,vectors-KBps = |
| 1298 | <1 650 0 0>, /* No vote */ |
| 1299 | <1 650 1000 0>; /* Max. bandwidth */ |
| 1300 | qcom,bus-vector-names = "MIN", |
| 1301 | "MAX"; |
| 1302 | qcom,instance-type = "ufs"; |
| 1303 | }; |
| 1304 | |
Subhash Jadavani | de2b9c0 | 2016-09-20 17:58:21 -0700 | [diff] [blame] | 1305 | ufsphy_mem: ufsphy_mem@1d87000 { |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1306 | reg = <0x1d87000 0xda8>; /* PHY regs */ |
| 1307 | reg-names = "phy_mem"; |
| 1308 | #phy-cells = <0>; |
| 1309 | |
Subhash Jadavani | b606c84 | 2017-04-03 18:03:57 -0700 | [diff] [blame] | 1310 | lanes-per-direction = <2>; |
| 1311 | |
Subhash Jadavani | 9981b03 | 2017-03-24 17:24:05 -0700 | [diff] [blame] | 1312 | clock-names = "ref_clk_src", |
| 1313 | "ref_clk", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1314 | "ref_aux_clk"; |
Osvaldo Banuelos | 918ffad | 2017-04-12 14:07:45 -0700 | [diff] [blame] | 1315 | clocks = <&clock_rpmh RPMH_CXO_CLK>, |
Subhash Jadavani | 9981b03 | 2017-03-24 17:24:05 -0700 | [diff] [blame] | 1316 | <&clock_gcc GCC_UFS_MEM_CLKREF_CLK>, |
Subhash Jadavani | b2f5a63 | 2017-04-10 23:48:58 -0700 | [diff] [blame] | 1317 | <&clock_gcc GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK>; |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1318 | |
| 1319 | status = "disabled"; |
| 1320 | }; |
| 1321 | |
Subhash Jadavani | bb52a44 | 2017-04-27 16:50:58 -0700 | [diff] [blame] | 1322 | ufshc_mem: ufshc@1d84000 { |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1323 | compatible = "qcom,ufshc"; |
| 1324 | reg = <0x1d84000 0x2500>; |
| 1325 | interrupts = <0 265 0>; |
| 1326 | phys = <&ufsphy_mem>; |
| 1327 | phy-names = "ufsphy"; |
AnilKumar Chimata | 2e81590 | 2017-04-13 12:14:56 -0700 | [diff] [blame] | 1328 | ufs-qcom-crypto = <&ufs_ice>; |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1329 | |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 1330 | lanes-per-direction = <2>; |
Subhash Jadavani | 5534d49 | 2016-12-13 16:13:19 -0800 | [diff] [blame] | 1331 | dev-ref-clk-freq = <0>; /* 19.2 MHz */ |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 1332 | |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1333 | clock-names = |
| 1334 | "core_clk", |
| 1335 | "bus_aggr_clk", |
| 1336 | "iface_clk", |
| 1337 | "core_clk_unipro", |
| 1338 | "core_clk_ice", |
Subhash Jadavani | 9981b03 | 2017-03-24 17:24:05 -0700 | [diff] [blame] | 1339 | "ref_clk", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1340 | "tx_lane0_sync_clk", |
| 1341 | "rx_lane0_sync_clk", |
| 1342 | "rx_lane1_sync_clk"; |
| 1343 | clocks = |
Subhash Jadavani | b2f5a63 | 2017-04-10 23:48:58 -0700 | [diff] [blame] | 1344 | <&clock_gcc GCC_UFS_PHY_AXI_HW_CTL_CLK>, |
| 1345 | <&clock_gcc GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK>, |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1346 | <&clock_gcc GCC_UFS_PHY_AHB_CLK>, |
Subhash Jadavani | b2f5a63 | 2017-04-10 23:48:58 -0700 | [diff] [blame] | 1347 | <&clock_gcc GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK>, |
| 1348 | <&clock_gcc GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK>, |
Osvaldo Banuelos | 918ffad | 2017-04-12 14:07:45 -0700 | [diff] [blame] | 1349 | <&clock_rpmh RPMH_CXO_CLK>, |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1350 | <&clock_gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, |
| 1351 | <&clock_gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, |
| 1352 | <&clock_gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; |
| 1353 | freq-table-hz = |
| 1354 | <50000000 200000000>, |
| 1355 | <0 0>, |
| 1356 | <0 0>, |
| 1357 | <37500000 150000000>, |
| 1358 | <75000000 300000000>, |
| 1359 | <0 0>, |
| 1360 | <0 0>, |
Subhash Jadavani | 9981b03 | 2017-03-24 17:24:05 -0700 | [diff] [blame] | 1361 | <0 0>, |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1362 | <0 0>; |
| 1363 | |
Sayali Lokhande | 49c1dde | 2017-10-10 15:46:19 +0530 | [diff] [blame] | 1364 | non-removable; |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 1365 | qcom,msm-bus,name = "ufshc_mem"; |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 1366 | qcom,msm-bus,num-cases = <22>; |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1367 | qcom,msm-bus,num-paths = <2>; |
| 1368 | qcom,msm-bus,vectors-KBps = |
Subhash Jadavani | 63705c4 | 2017-03-27 16:37:28 -0700 | [diff] [blame] | 1369 | /* |
| 1370 | * During HS G3 UFS runs at nominal voltage corner, vote |
| 1371 | * higher bandwidth to push other buses in the data path |
| 1372 | * to run at nominal to achieve max throughput. |
| 1373 | * 4GBps pushes BIMC to run at nominal. |
| 1374 | * 200MBps pushes CNOC to run at nominal. |
| 1375 | * Vote for half of this bandwidth for HS G3 1-lane. |
| 1376 | * For max bandwidth, vote high enough to push the buses |
| 1377 | * to run in turbo voltage corner. |
| 1378 | */ |
Subhash Jadavani | 1cc8f32 | 2017-03-23 16:32:57 -0700 | [diff] [blame] | 1379 | <123 512 0 0>, <1 757 0 0>, /* No vote */ |
| 1380 | <123 512 922 0>, <1 757 1000 0>, /* PWM G1 */ |
| 1381 | <123 512 1844 0>, <1 757 1000 0>, /* PWM G2 */ |
| 1382 | <123 512 3688 0>, <1 757 1000 0>, /* PWM G3 */ |
| 1383 | <123 512 7376 0>, <1 757 1000 0>, /* PWM G4 */ |
| 1384 | <123 512 1844 0>, <1 757 1000 0>, /* PWM G1 L2 */ |
| 1385 | <123 512 3688 0>, <1 757 1000 0>, /* PWM G2 L2 */ |
| 1386 | <123 512 7376 0>, <1 757 1000 0>, /* PWM G3 L2 */ |
| 1387 | <123 512 14752 0>, <1 757 1000 0>, /* PWM G4 L2 */ |
| 1388 | <123 512 127796 0>, <1 757 1000 0>, /* HS G1 RA */ |
| 1389 | <123 512 255591 0>, <1 757 1000 0>, /* HS G2 RA */ |
Subhash Jadavani | 63705c4 | 2017-03-27 16:37:28 -0700 | [diff] [blame] | 1390 | <123 512 2097152 0>, <1 757 102400 0>, /* HS G3 RA */ |
Subhash Jadavani | 1cc8f32 | 2017-03-23 16:32:57 -0700 | [diff] [blame] | 1391 | <123 512 255591 0>, <1 757 1000 0>, /* HS G1 RA L2 */ |
| 1392 | <123 512 511181 0>, <1 757 1000 0>, /* HS G2 RA L2 */ |
Subhash Jadavani | 63705c4 | 2017-03-27 16:37:28 -0700 | [diff] [blame] | 1393 | <123 512 4194304 0>, <1 757 204800 0>, /* HS G3 RA L2 */ |
Subhash Jadavani | 1cc8f32 | 2017-03-23 16:32:57 -0700 | [diff] [blame] | 1394 | <123 512 149422 0>, <1 757 1000 0>, /* HS G1 RB */ |
| 1395 | <123 512 298189 0>, <1 757 1000 0>, /* HS G2 RB */ |
Subhash Jadavani | 63705c4 | 2017-03-27 16:37:28 -0700 | [diff] [blame] | 1396 | <123 512 2097152 0>, <1 757 102400 0>, /* HS G3 RB */ |
Subhash Jadavani | 1cc8f32 | 2017-03-23 16:32:57 -0700 | [diff] [blame] | 1397 | <123 512 298189 0>, <1 757 1000 0>, /* HS G1 RB L2 */ |
| 1398 | <123 512 596378 0>, <1 757 1000 0>, /* HS G2 RB L2 */ |
Can Guo | 82a760c | 2017-11-04 09:01:19 +0800 | [diff] [blame] | 1399 | /* As UFS working in HS G3 RB L2 mode, aggregated |
| 1400 | * bandwidth (AB) should take care of providing |
| 1401 | * optimum throughput requested. However, as tested, |
| 1402 | * in order to scale up CNOC clock, instantaneous |
| 1403 | * bindwidth (IB) needs to be given a proper value too. |
| 1404 | */ |
| 1405 | <123 512 4194304 0>, <1 757 204800 409600>, /* HS G3 RB L2 */ |
Subhash Jadavani | 63705c4 | 2017-03-27 16:37:28 -0700 | [diff] [blame] | 1406 | <123 512 7643136 0>, <1 757 307200 0>; /* Max. bandwidth */ |
| 1407 | |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1408 | qcom,bus-vector-names = "MIN", |
| 1409 | "PWM_G1_L1", "PWM_G2_L1", "PWM_G3_L1", "PWM_G4_L1", |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 1410 | "PWM_G1_L2", "PWM_G2_L2", "PWM_G3_L2", "PWM_G4_L2", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1411 | "HS_RA_G1_L1", "HS_RA_G2_L1", "HS_RA_G3_L1", |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 1412 | "HS_RA_G1_L2", "HS_RA_G2_L2", "HS_RA_G3_L2", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1413 | "HS_RB_G1_L1", "HS_RB_G2_L1", "HS_RB_G3_L1", |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 1414 | "HS_RB_G1_L2", "HS_RB_G2_L2", "HS_RB_G3_L2", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1415 | "MAX"; |
| 1416 | |
Subhash Jadavani | 63705c4 | 2017-03-27 16:37:28 -0700 | [diff] [blame] | 1417 | /* PM QoS */ |
| 1418 | qcom,pm-qos-cpu-groups = <0x0f 0xf0>; |
| 1419 | qcom,pm-qos-cpu-group-latency-us = <70 70>; |
| 1420 | qcom,pm-qos-default-cpu = <0>; |
| 1421 | |
Subhash Jadavani | afe2a79 | 2017-03-31 21:08:29 -0700 | [diff] [blame] | 1422 | pinctrl-names = "dev-reset-assert", "dev-reset-deassert"; |
| 1423 | pinctrl-0 = <&ufs_dev_reset_assert>; |
| 1424 | pinctrl-1 = <&ufs_dev_reset_deassert>; |
Subhash Jadavani | 63705c4 | 2017-03-27 16:37:28 -0700 | [diff] [blame] | 1425 | |
| 1426 | resets = <&clock_gcc GCC_UFS_PHY_BCR>; |
| 1427 | reset-names = "core_reset"; |
| 1428 | |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 1429 | status = "disabled"; |
| 1430 | }; |
Satyajit Desai | 17da059 | 2016-08-08 18:38:32 -0700 | [diff] [blame] | 1431 | |
Xiaonian Wang | 3c14ea3 | 2017-04-08 06:39:42 +0800 | [diff] [blame] | 1432 | sdhc_2: sdhci@8804000 { |
| 1433 | compatible = "qcom,sdhci-msm-v5"; |
| 1434 | reg = <0x8804000 0x1000>; |
| 1435 | reg-names = "hc_mem"; |
| 1436 | |
| 1437 | interrupts = <0 204 0>, <0 222 0>; |
| 1438 | interrupt-names = "hc_irq", "pwr_irq"; |
| 1439 | |
| 1440 | qcom,bus-width = <4>; |
| 1441 | qcom,large-address-bus; |
| 1442 | |
| 1443 | qcom,msm-bus,name = "sdhc2"; |
| 1444 | qcom,msm-bus,num-cases = <8>; |
| 1445 | qcom,msm-bus,num-paths = <2>; |
| 1446 | qcom,msm-bus,vectors-KBps = |
| 1447 | /* No vote */ |
| 1448 | <81 512 0 0>, <1 608 0 0>, |
| 1449 | /* 400 KB/s*/ |
| 1450 | <81 512 1046 1600>, |
| 1451 | <1 608 1600 1600>, |
| 1452 | /* 20 MB/s */ |
| 1453 | <81 512 52286 80000>, |
| 1454 | <1 608 80000 80000>, |
| 1455 | /* 25 MB/s */ |
| 1456 | <81 512 65360 100000>, |
| 1457 | <1 608 100000 100000>, |
| 1458 | /* 50 MB/s */ |
| 1459 | <81 512 130718 200000>, |
| 1460 | <1 608 133320 133320>, |
| 1461 | /* 100 MB/s */ |
| 1462 | <81 512 261438 200000>, |
| 1463 | <1 608 150000 150000>, |
| 1464 | /* 200 MB/s */ |
| 1465 | <81 512 261438 400000>, |
| 1466 | <1 608 300000 300000>, |
| 1467 | /* Max. bandwidth */ |
| 1468 | <81 512 1338562 4096000>, |
| 1469 | <1 608 1338562 4096000>; |
| 1470 | qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 |
Subhash Jadavani | 0842b27 | 2017-07-19 17:05:13 -0700 | [diff] [blame] | 1471 | 100750000 200000000 4294967295>; |
Xiaonian Wang | 3c14ea3 | 2017-04-08 06:39:42 +0800 | [diff] [blame] | 1472 | |
Xiaonian Wang | 5d7e5d1 | 2017-04-07 19:51:23 -0700 | [diff] [blame] | 1473 | qcom,sdr104-wa; |
| 1474 | |
Bao D. Nguyen | 40d42ae | 2017-06-29 21:20:25 -0700 | [diff] [blame] | 1475 | qcom,restore-after-cx-collapse; |
| 1476 | |
Subhash Jadavani | 0842b27 | 2017-07-19 17:05:13 -0700 | [diff] [blame] | 1477 | qcom,clk-rates = <400000 20000000 25000000 |
| 1478 | 50000000 100000000 201500000>; |
| 1479 | qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", |
| 1480 | "SDR104"; |
| 1481 | |
| 1482 | qcom,devfreq,freq-table = <50000000 201500000>; |
Xiaonian Wang | 3c14ea3 | 2017-04-08 06:39:42 +0800 | [diff] [blame] | 1483 | clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>, |
| 1484 | <&clock_gcc GCC_SDCC2_APPS_CLK>; |
| 1485 | clock-names = "iface_clk", "core_clk"; |
| 1486 | |
Can Guo | e814834 | 2017-10-16 12:10:27 +0800 | [diff] [blame] | 1487 | /* PM QoS */ |
| 1488 | qcom,pm-qos-irq-type = "affine_irq"; |
| 1489 | qcom,pm-qos-irq-latency = <70 70>; |
| 1490 | qcom,pm-qos-cpu-groups = <0x3f 0xc0>; |
| 1491 | qcom,pm-qos-legacy-latency-us = <70 70>, <70 70>; |
| 1492 | |
Xiaonian Wang | 3c14ea3 | 2017-04-08 06:39:42 +0800 | [diff] [blame] | 1493 | status = "disabled"; |
| 1494 | }; |
| 1495 | |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1496 | pil_modem: qcom,mss@4080000 { |
| 1497 | compatible = "qcom,pil-q6v55-mss"; |
| 1498 | reg = <0x4080000 0x100>, |
| 1499 | <0x1f63000 0x008>, |
| 1500 | <0x1f65000 0x008>, |
| 1501 | <0x1f64000 0x008>, |
| 1502 | <0x4180000 0x020>, |
Kyle Yan | 8e80530 | 2017-05-01 11:13:45 -0700 | [diff] [blame] | 1503 | <0xc2b0000 0x004>, |
Kyle Yan | 02f8039 | 2017-05-01 14:40:32 -0700 | [diff] [blame] | 1504 | <0xb2e0100 0x004>, |
| 1505 | <0x4180044 0x004>; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1506 | reg-names = "qdsp6_base", "halt_q6", "halt_modem", |
Kyle Yan | 8e80530 | 2017-05-01 11:13:45 -0700 | [diff] [blame] | 1507 | "halt_nc", "rmb_base", "restart_reg", |
Kyle Yan | 02f8039 | 2017-05-01 14:40:32 -0700 | [diff] [blame] | 1508 | "pdc_sync", "alt_reset"; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1509 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1510 | clocks = <&clock_rpmh RPMH_CXO_CLK>, |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1511 | <&clock_gcc GCC_MSS_CFG_AHB_CLK>, |
| 1512 | <&clock_gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, |
| 1513 | <&clock_gcc GCC_BOOT_ROM_AHB_CLK>, |
| 1514 | <&clock_gcc GCC_MSS_GPLL0_DIV_CLK_SRC>, |
| 1515 | <&clock_gcc GCC_MSS_SNOC_AXI_CLK>, |
Kyle Yan | 5eb4ef9 | 2017-04-17 11:59:36 -0700 | [diff] [blame] | 1516 | <&clock_gcc GCC_MSS_MFAB_AXIS_CLK>, |
| 1517 | <&clock_gcc GCC_PRNG_AHB_CLK>; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1518 | clock-names = "xo", "iface_clk", "bus_clk", |
| 1519 | "mem_clk", "gpll0_mss_clk", "snoc_axi_clk", |
Kyle Yan | f7c86b7 | 2017-04-25 13:11:26 -0700 | [diff] [blame] | 1520 | "mnoc_axi_clk", "prng_clk"; |
| 1521 | qcom,proxy-clock-names = "xo", "prng_clk"; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1522 | qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk", |
| 1523 | "gpll0_mss_clk", "snoc_axi_clk", |
| 1524 | "mnoc_axi_clk"; |
| 1525 | |
| 1526 | interrupts = <0 266 1>; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1527 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1528 | vdd_cx-voltage = <RPMH_REGULATOR_LEVEL_TURBO>; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1529 | vdd_mx-supply = <&pm8998_s6_level>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1530 | vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO>; |
Kyle Yan | 9df3160 | 2017-10-12 11:52:59 -0700 | [diff] [blame] | 1531 | vdd_mss-supply = <&pm8005_s2_level>; |
Kyle Yan | dbec557 | 2017-10-15 15:18:05 -0700 | [diff] [blame] | 1532 | vdd_mss-uV = <RPMH_REGULATOR_LEVEL_TURBO>; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1533 | qcom,firmware-name = "modem"; |
| 1534 | qcom,pil-self-auth; |
| 1535 | qcom,sysmon-id = <0>; |
| 1536 | qcom,ssctl-instance-id = <0x12>; |
| 1537 | qcom,override-acc; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1538 | qcom,signal-aop; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1539 | qcom,qdsp6v65-1-0; |
Kyle Yan | f248e35 | 2017-09-14 11:15:58 -0700 | [diff] [blame] | 1540 | qcom,mss_pdc_offset = <8>; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1541 | status = "ok"; |
| 1542 | memory-region = <&pil_modem_mem>; |
| 1543 | qcom,mem-protect-id = <0xF>; |
| 1544 | |
| 1545 | /* GPIO inputs from mss */ |
| 1546 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; |
| 1547 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; |
| 1548 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; |
| 1549 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; |
| 1550 | qcom,gpio-shutdown-ack = <&smp2pgpio_ssr_smp2p_1_in 7 0>; |
| 1551 | |
| 1552 | /* GPIO output to mss */ |
| 1553 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1554 | |
| 1555 | mboxes = <&qmp_aop 0>; |
| 1556 | mbox-names = "mss-pil"; |
Channagoud Kadabi | 814df40 | 2017-04-04 13:55:26 -0700 | [diff] [blame] | 1557 | qcom,mba-mem@0 { |
| 1558 | compatible = "qcom,pil-mba-mem"; |
| 1559 | memory-region = <&pil_mba_mem>; |
| 1560 | }; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1561 | }; |
| 1562 | |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1563 | qcom,lpass@17300000 { |
| 1564 | compatible = "qcom,pil-tz-generic"; |
| 1565 | reg = <0x17300000 0x00100>; |
| 1566 | interrupts = <0 162 1>; |
| 1567 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1568 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1569 | qcom,proxy-reg-names = "vdd_cx"; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1570 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1571 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1572 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1573 | clock-names = "xo"; |
| 1574 | qcom,proxy-clock-names = "xo"; |
| 1575 | |
| 1576 | qcom,pas-id = <1>; |
| 1577 | qcom,proxy-timeout-ms = <10000>; |
| 1578 | qcom,smem-id = <423>; |
| 1579 | qcom,sysmon-id = <1>; |
| 1580 | status = "ok"; |
| 1581 | qcom,ssctl-instance-id = <0x14>; |
| 1582 | qcom,firmware-name = "adsp"; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1583 | qcom,signal-aop; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1584 | memory-region = <&pil_adsp_mem>; |
| 1585 | |
| 1586 | /* GPIO inputs from lpass */ |
| 1587 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; |
| 1588 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; |
| 1589 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; |
| 1590 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; |
| 1591 | |
| 1592 | /* GPIO output to lpass */ |
| 1593 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1594 | |
| 1595 | mboxes = <&qmp_aop 0>; |
| 1596 | mbox-names = "adsp-pil"; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1597 | }; |
| 1598 | |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1599 | qcom,ssc@5c00000 { |
| 1600 | compatible = "qcom,pil-tz-generic"; |
| 1601 | reg = <0x5c00000 0x4000>; |
Kyle Yan | b3a29ae | 2017-05-23 13:37:11 -0700 | [diff] [blame] | 1602 | interrupts = <0 494 1>; |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1603 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1604 | vdd_cx-supply = <&pm8998_l27_level>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1605 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>; |
Kyle Yan | 2d11cb9 | 2017-10-16 11:57:36 -0700 | [diff] [blame] | 1606 | vdd_mx-supply = <&pm8998_l4_level>; |
| 1607 | qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>; |
| 1608 | qcom,proxy-reg-names = "vdd_cx", "vdd_mx"; |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1609 | qcom,keep-proxy-regs-on; |
| 1610 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1611 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1612 | clock-names = "xo"; |
| 1613 | qcom,proxy-clock-names = "xo"; |
| 1614 | |
| 1615 | qcom,pas-id = <12>; |
| 1616 | qcom,proxy-timeout-ms = <10000>; |
| 1617 | qcom,smem-id = <424>; |
| 1618 | qcom,sysmon-id = <3>; |
| 1619 | qcom,ssctl-instance-id = <0x16>; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1620 | qcom,signal-aop; |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1621 | qcom,firmware-name = "slpi"; |
| 1622 | status = "ok"; |
| 1623 | memory-region = <&pil_slpi_mem>; |
| 1624 | |
| 1625 | /* GPIO inputs from ssc */ |
| 1626 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_3_in 0 0>; |
| 1627 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_3_in 2 0>; |
| 1628 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_3_in 1 0>; |
| 1629 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_3_in 3 0>; |
| 1630 | |
| 1631 | /* GPIO output to ssc */ |
| 1632 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_3_out 0 0>; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1633 | |
| 1634 | mboxes = <&qmp_aop 0>; |
| 1635 | mbox-names = "slpi-pil"; |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1636 | }; |
| 1637 | |
Sagar Dharia | b7394b4 | 2016-11-29 01:01:01 -0700 | [diff] [blame] | 1638 | slim_aud: slim@171c0000 { |
| 1639 | cell-index = <1>; |
| 1640 | compatible = "qcom,slim-ngd"; |
| 1641 | reg = <0x171c0000 0x2c000>, |
| 1642 | <0x17184000 0x2a000>; |
| 1643 | reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| 1644 | interrupts = <0 163 0>, <0 164 0>; |
| 1645 | interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
Karthikeyan Ramasubramanian | b5d07ee | 2017-02-13 12:26:39 -0700 | [diff] [blame] | 1646 | qcom,apps-ch-pipes = <0x780000>; |
Sagar Dharia | b7394b4 | 2016-11-29 01:01:01 -0700 | [diff] [blame] | 1647 | qcom,ea-pc = <0x270>; |
Karthikeyan Ramasubramanian | 9cd18ff | 2017-05-09 17:11:26 -0600 | [diff] [blame] | 1648 | qcom,iommu-s1-bypass; |
| 1649 | |
| 1650 | iommu_slim_aud_ctrl_cb: qcom,iommu_slim_ctrl_cb { |
| 1651 | compatible = "qcom,iommu-slim-ctrl-cb"; |
| 1652 | iommus = <&apps_smmu 0x1806 0x0>, |
| 1653 | <&apps_smmu 0x180d 0x0>, |
| 1654 | <&apps_smmu 0x180e 0x1>, |
| 1655 | <&apps_smmu 0x1810 0x1>; |
| 1656 | }; |
Sagar Dharia | b7394b4 | 2016-11-29 01:01:01 -0700 | [diff] [blame] | 1657 | }; |
| 1658 | |
Karthikeyan Ramasubramanian | 430c646 | 2017-01-18 15:20:05 -0700 | [diff] [blame] | 1659 | slim_qca: slim@17240000 { |
Sungjun Park | b4a9b3c | 2017-05-04 10:12:35 -0700 | [diff] [blame] | 1660 | status = "ok"; |
Karthikeyan Ramasubramanian | 430c646 | 2017-01-18 15:20:05 -0700 | [diff] [blame] | 1661 | cell-index = <3>; |
| 1662 | compatible = "qcom,slim-ngd"; |
| 1663 | reg = <0x17240000 0x2c000>, |
| 1664 | <0x17204000 0x20000>; |
| 1665 | reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| 1666 | interrupts = <0 291 0>, <0 292 0>; |
| 1667 | interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
Karthikeyan Ramasubramanian | 9cd18ff | 2017-05-09 17:11:26 -0600 | [diff] [blame] | 1668 | qcom,iommu-s1-bypass; |
| 1669 | |
| 1670 | iommu_slim_qca_ctrl_cb: qcom,iommu_slim_ctrl_cb { |
| 1671 | compatible = "qcom,iommu-slim-ctrl-cb"; |
| 1672 | iommus = <&apps_smmu 0x1813 0x0>; |
| 1673 | }; |
Sungjun Park | b4a9b3c | 2017-05-04 10:12:35 -0700 | [diff] [blame] | 1674 | |
| 1675 | /* Slimbus Slave DT for WCN3990 */ |
| 1676 | btfmslim_codec: wcn3990 { |
| 1677 | compatible = "qcom,btfmslim_slave"; |
| 1678 | elemental-addr = [00 01 20 02 17 02]; |
| 1679 | qcom,btfm-slim-ifd = "btfmslim_slave_ifd"; |
| 1680 | qcom,btfm-slim-ifd-elemental-addr = [00 00 20 02 17 02]; |
| 1681 | }; |
Karthikeyan Ramasubramanian | 430c646 | 2017-01-18 15:20:05 -0700 | [diff] [blame] | 1682 | }; |
| 1683 | |
Satya Durga Srinivasu Prabhala | fbddbe7 | 2016-09-12 11:40:11 -0700 | [diff] [blame] | 1684 | eud: qcom,msm-eud@88e0000 { |
| 1685 | compatible = "qcom,msm-eud"; |
| 1686 | interrupt-names = "eud_irq"; |
| 1687 | interrupts = <GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>; |
Kyle Yan | 3801a1f | 2016-09-27 18:29:55 -0700 | [diff] [blame] | 1688 | reg = <0x88e0000 0x2000>; |
Satya Durga Srinivasu Prabhala | fbddbe7 | 2016-09-12 11:40:11 -0700 | [diff] [blame] | 1689 | reg-names = "eud_base"; |
Satya Durga Srinivasu Prabhala | 5a49778 | 2017-09-22 13:47:47 -0700 | [diff] [blame] | 1690 | clocks = <&clock_gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; |
| 1691 | clock-names = "cfg_ahb_clk"; |
Vamsi Krishna Samavedam | 61262a1 | 2017-10-17 20:45:42 -0700 | [diff] [blame] | 1692 | vdda33-supply = <&pm8998_l24>; |
Satya Durga Srinivasu Prabhala | fbddbe7 | 2016-09-12 11:40:11 -0700 | [diff] [blame] | 1693 | status = "ok"; |
| 1694 | }; |
| 1695 | |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1696 | qcom,spss@1880000 { |
| 1697 | compatible = "qcom,pil-tz-generic"; |
| 1698 | reg = <0x188101c 0x4>, |
| 1699 | <0x1881024 0x4>, |
| 1700 | <0x1881028 0x4>, |
| 1701 | <0x188103c 0x4>, |
| 1702 | <0x1882014 0x4>; |
| 1703 | reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", |
| 1704 | "sp2soc_irq_mask", "rmb_err", "rmb_err_spare2"; |
| 1705 | interrupts = <0 352 1>; |
| 1706 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1707 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1708 | qcom,proxy-reg-names = "vdd_cx"; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1709 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1710 | vdd_mx-supply = <&pm8998_s6_level>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1711 | vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1712 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1713 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1714 | clock-names = "xo"; |
| 1715 | qcom,proxy-clock-names = "xo"; |
| 1716 | qcom,pil-generic-irq-handler; |
| 1717 | status = "ok"; |
| 1718 | |
| 1719 | qcom,pas-id = <14>; |
| 1720 | qcom,proxy-timeout-ms = <10000>; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1721 | qcom,signal-aop; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1722 | qcom,firmware-name = "spss"; |
| 1723 | memory-region = <&pil_spss_mem>; |
| 1724 | qcom,spss-scsr-bits = <24 25>; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1725 | |
| 1726 | mboxes = <&qmp_aop 0>; |
| 1727 | mbox-names = "spss-pil"; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1728 | }; |
| 1729 | |
Satyajit Desai | 17da059 | 2016-08-08 18:38:32 -0700 | [diff] [blame] | 1730 | wdog: qcom,wdt@17980000{ |
| 1731 | compatible = "qcom,msm-watchdog"; |
| 1732 | reg = <0x17980000 0x1000>; |
| 1733 | reg-names = "wdt-base"; |
Satyajit Desai | db4f2e6e | 2017-04-17 14:08:59 -0700 | [diff] [blame] | 1734 | interrupts = <0 0 0>, <0 1 0>; |
Satyajit Desai | 17da059 | 2016-08-08 18:38:32 -0700 | [diff] [blame] | 1735 | qcom,bark-time = <11000>; |
Channagoud Kadabi | 63d9d4d | 2017-08-25 15:36:31 -0700 | [diff] [blame] | 1736 | qcom,pet-time = <9360>; |
Satyajit Desai | 17da059 | 2016-08-08 18:38:32 -0700 | [diff] [blame] | 1737 | qcom,ipi-ping; |
| 1738 | qcom,wakeup-enable; |
| 1739 | }; |
Satyajit Desai | 5e2b88a | 2016-08-10 17:08:08 -0700 | [diff] [blame] | 1740 | |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1741 | qcom,turing@8300000 { |
| 1742 | compatible = "qcom,pil-tz-generic"; |
| 1743 | reg = <0x8300000 0x100000>; |
| 1744 | interrupts = <0 578 1>; |
| 1745 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1746 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1747 | qcom,proxy-reg-names = "vdd_cx"; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1748 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1749 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1750 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1751 | clock-names = "xo"; |
| 1752 | qcom,proxy-clock-names = "xo"; |
| 1753 | |
| 1754 | qcom,pas-id = <18>; |
| 1755 | qcom,proxy-timeout-ms = <10000>; |
Kyle Yan | a7b7926 | 2017-04-09 11:37:24 -0700 | [diff] [blame] | 1756 | qcom,smem-id = <601>; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1757 | qcom,sysmon-id = <7>; |
| 1758 | qcom,ssctl-instance-id = <0x17>; |
| 1759 | qcom,firmware-name = "cdsp"; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1760 | qcom,signal-aop; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1761 | memory-region = <&pil_cdsp_mem>; |
| 1762 | |
| 1763 | /* GPIO inputs from turing */ |
| 1764 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_5_in 0 0>; |
| 1765 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_5_in 2 0>; |
| 1766 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_5_in 1 0>; |
| 1767 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_5_in 3 0>; |
| 1768 | |
| 1769 | /* GPIO output to turing*/ |
| 1770 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_5_out 0 0>; |
| 1771 | status = "ok"; |
Kyle Yan | a56d718 | 2017-09-13 11:22:48 -0700 | [diff] [blame] | 1772 | |
| 1773 | mboxes = <&qmp_aop 0>; |
| 1774 | mbox-names = "cdsp-pil"; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1775 | }; |
| 1776 | |
Kyle Yan | 74c7425 | 2017-02-13 13:30:45 -0800 | [diff] [blame] | 1777 | qcom,msm-rtb { |
| 1778 | compatible = "qcom,msm-rtb"; |
| 1779 | qcom,rtb-size = <0x100000>; |
| 1780 | }; |
| 1781 | |
Channagoud Kadabi | 3128223 | 2017-04-26 14:39:09 -0700 | [diff] [blame] | 1782 | qcom,mpm2-sleep-counter@0x0c221000 { |
| 1783 | compatible = "qcom,mpm2-sleep-counter"; |
| 1784 | reg = <0x0c221000 0x1000>; |
| 1785 | clock-frequency = <32768>; |
| 1786 | }; |
| 1787 | |
Sathish Ambley | 917cbd2 | 2017-02-28 10:46:26 -0800 | [diff] [blame] | 1788 | qcom,msm-cdsp-loader { |
| 1789 | compatible = "qcom,cdsp-loader"; |
| 1790 | qcom,proc-img-to-load = "cdsp"; |
| 1791 | }; |
| 1792 | |
Sathish Ambley | 521f22a | 2017-04-21 14:19:45 -0700 | [diff] [blame] | 1793 | qcom,msm-adsprpc-mem { |
| 1794 | compatible = "qcom,msm-adsprpc-mem-region"; |
| 1795 | memory-region = <&adsp_mem>; |
| 1796 | }; |
| 1797 | |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1798 | qcom,msm_fastrpc { |
| 1799 | compatible = "qcom,msm-fastrpc-compute"; |
Tharun Kumar Merugu | 26bf52e | 2017-08-11 12:03:29 +0530 | [diff] [blame] | 1800 | qcom,rpc-latency-us = <611>; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1801 | |
| 1802 | qcom,msm_fastrpc_compute_cb1 { |
| 1803 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1804 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1805 | iommus = <&apps_smmu 0x1401 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1806 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1807 | }; |
| 1808 | qcom,msm_fastrpc_compute_cb2 { |
| 1809 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1810 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1811 | iommus = <&apps_smmu 0x1402 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1812 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1813 | }; |
| 1814 | qcom,msm_fastrpc_compute_cb3 { |
| 1815 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1816 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1817 | iommus = <&apps_smmu 0x1403 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1818 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1819 | }; |
| 1820 | qcom,msm_fastrpc_compute_cb4 { |
| 1821 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1822 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1823 | iommus = <&apps_smmu 0x1404 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1824 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1825 | }; |
| 1826 | qcom,msm_fastrpc_compute_cb5 { |
| 1827 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1828 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1829 | iommus = <&apps_smmu 0x1405 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1830 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1831 | }; |
| 1832 | qcom,msm_fastrpc_compute_cb6 { |
| 1833 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1834 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1835 | iommus = <&apps_smmu 0x1406 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1836 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1837 | }; |
| 1838 | qcom,msm_fastrpc_compute_cb7 { |
| 1839 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1840 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1841 | iommus = <&apps_smmu 0x1407 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1842 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1843 | }; |
| 1844 | qcom,msm_fastrpc_compute_cb8 { |
| 1845 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1846 | label = "cdsprpc-smd"; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1847 | iommus = <&apps_smmu 0x1408 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1848 | dma-coherent; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1849 | }; |
Sathish Ambley | 521f22a | 2017-04-21 14:19:45 -0700 | [diff] [blame] | 1850 | qcom,msm_fastrpc_compute_cb9 { |
| 1851 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1852 | label = "cdsprpc-smd"; |
| 1853 | qcom,secure-context-bank; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1854 | iommus = <&apps_smmu 0x1409 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1855 | dma-coherent; |
Sathish Ambley | 521f22a | 2017-04-21 14:19:45 -0700 | [diff] [blame] | 1856 | }; |
| 1857 | qcom,msm_fastrpc_compute_cb10 { |
| 1858 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1859 | label = "cdsprpc-smd"; |
| 1860 | qcom,secure-context-bank; |
Patrick Daly | ac49501 | 2017-04-18 16:42:00 -0700 | [diff] [blame] | 1861 | iommus = <&apps_smmu 0x140A 0x30>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1862 | dma-coherent; |
Sathish Ambley | 521f22a | 2017-04-21 14:19:45 -0700 | [diff] [blame] | 1863 | }; |
| 1864 | qcom,msm_fastrpc_compute_cb11 { |
| 1865 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1866 | label = "adsprpc-smd"; |
Patrick Daly | c4aaa90 | 2017-04-24 12:45:11 -0700 | [diff] [blame] | 1867 | iommus = <&apps_smmu 0x1823 0x0>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1868 | dma-coherent; |
Sathish Ambley | 521f22a | 2017-04-21 14:19:45 -0700 | [diff] [blame] | 1869 | }; |
| 1870 | qcom,msm_fastrpc_compute_cb12 { |
| 1871 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1872 | label = "adsprpc-smd"; |
Patrick Daly | c4aaa90 | 2017-04-24 12:45:11 -0700 | [diff] [blame] | 1873 | iommus = <&apps_smmu 0x1824 0x0>; |
Tharun Kumar Merugu | eae8786 | 2017-07-12 17:35:48 +0530 | [diff] [blame] | 1874 | dma-coherent; |
Sathish Ambley | 521f22a | 2017-04-21 14:19:45 -0700 | [diff] [blame] | 1875 | }; |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1876 | }; |
| 1877 | |
Satyajit Desai | 5e2b88a | 2016-08-10 17:08:08 -0700 | [diff] [blame] | 1878 | qcom,msm-imem@146bf000 { |
| 1879 | compatible = "qcom,msm-imem"; |
| 1880 | reg = <0x146bf000 0x1000>; |
| 1881 | ranges = <0x0 0x146bf000 0x1000>; |
| 1882 | #address-cells = <1>; |
| 1883 | #size-cells = <1>; |
| 1884 | |
| 1885 | mem_dump_table@10 { |
| 1886 | compatible = "qcom,msm-imem-mem_dump_table"; |
| 1887 | reg = <0x10 8>; |
| 1888 | }; |
Kyle Yan | 3d71bbe | 2016-11-01 16:02:26 -0700 | [diff] [blame] | 1889 | |
Kyle Yan | a795b9d | 2017-02-14 16:16:13 -0800 | [diff] [blame] | 1890 | restart_reason@65c { |
| 1891 | compatible = "qcom,msm-imem-restart_reason"; |
| 1892 | reg = <0x65c 4>; |
| 1893 | }; |
| 1894 | |
Channagoud Kadabi | 3128223 | 2017-04-26 14:39:09 -0700 | [diff] [blame] | 1895 | boot_stats@6b0 { |
| 1896 | compatible = "qcom,msm-imem-boot_stats"; |
| 1897 | reg = <0x6b0 32>; |
| 1898 | }; |
| 1899 | |
Kyle Yan | 3d71bbe | 2016-11-01 16:02:26 -0700 | [diff] [blame] | 1900 | pil@94c { |
| 1901 | compatible = "qcom,msm-imem-pil"; |
| 1902 | reg = <0x94c 200>; |
| 1903 | }; |
Channagoud Kadabi | c251342 | 2017-04-25 18:53:42 -0700 | [diff] [blame] | 1904 | |
| 1905 | kaslr_offset@6d0 { |
| 1906 | compatible = "qcom,msm-imem-kaslr_offset"; |
| 1907 | reg = <0x6d0 12>; |
| 1908 | }; |
Mayank Rana | 0d88309 | 2017-05-05 17:30:55 -0700 | [diff] [blame] | 1909 | |
| 1910 | diag_dload@c8 { |
| 1911 | compatible = "qcom,msm-imem-diag-dload"; |
| 1912 | reg = <0xc8 200>; |
| 1913 | }; |
Satyajit Desai | 5e2b88a | 2016-08-10 17:08:08 -0700 | [diff] [blame] | 1914 | }; |
Kyle Yan | ddc4424 | 2016-06-20 14:42:14 -0700 | [diff] [blame] | 1915 | |
Kyle Yan | 74747da | 2016-09-14 16:24:30 -0700 | [diff] [blame] | 1916 | qcom,venus@aae0000 { |
| 1917 | compatible = "qcom,pil-tz-generic"; |
| 1918 | reg = <0xaae0000 0x4000>; |
| 1919 | |
| 1920 | vdd-supply = <&venus_gdsc>; |
| 1921 | qcom,proxy-reg-names = "vdd"; |
| 1922 | |
| 1923 | clocks = <&clock_videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, |
| 1924 | <&clock_videocc VIDEO_CC_VENUS_AHB_CLK>, |
| 1925 | <&clock_videocc VIDEO_CC_VENUS_CTL_AXI_CLK>; |
| 1926 | clock-names = "core_clk", "iface_clk", "bus_clk"; |
| 1927 | qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk"; |
| 1928 | |
| 1929 | qcom,pas-id = <9>; |
| 1930 | qcom,msm-bus,name = "pil-venus"; |
| 1931 | qcom,msm-bus,num-cases = <2>; |
| 1932 | qcom,msm-bus,num-paths = <1>; |
| 1933 | qcom,msm-bus,vectors-KBps = |
| 1934 | <63 512 0 0>, |
| 1935 | <63 512 0 304000>; |
| 1936 | qcom,proxy-timeout-ms = <100>; |
| 1937 | qcom,firmware-name = "venus"; |
| 1938 | memory-region = <&pil_video_mem>; |
| 1939 | status = "ok"; |
| 1940 | }; |
| 1941 | |
Ananda Kishore | 4772774 | 2017-05-04 01:04:30 +0530 | [diff] [blame] | 1942 | ssc_sensors: qcom,msm-ssc-sensors { |
| 1943 | compatible = "qcom,msm-ssc-sensors"; |
| 1944 | status = "ok"; |
| 1945 | qcom,firmware-name = "slpi"; |
| 1946 | }; |
| 1947 | |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1948 | cpuss_dump { |
| 1949 | compatible = "qcom,cpuss-dump"; |
| 1950 | qcom,l1_i_cache0 { |
| 1951 | qcom,dump-node = <&L1_I_0>; |
| 1952 | qcom,dump-id = <0x60>; |
| 1953 | }; |
| 1954 | qcom,l1_i_cache1 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1955 | qcom,dump-node = <&L1_I_100>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1956 | qcom,dump-id = <0x61>; |
| 1957 | }; |
| 1958 | qcom,l1_i_cache2 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1959 | qcom,dump-node = <&L1_I_200>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1960 | qcom,dump-id = <0x62>; |
| 1961 | }; |
| 1962 | qcom,l1_i_cache3 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1963 | qcom,dump-node = <&L1_I_300>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1964 | qcom,dump-id = <0x63>; |
| 1965 | }; |
| 1966 | qcom,l1_i_cache100 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1967 | qcom,dump-node = <&L1_I_400>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1968 | qcom,dump-id = <0x64>; |
| 1969 | }; |
| 1970 | qcom,l1_i_cache101 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1971 | qcom,dump-node = <&L1_I_500>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1972 | qcom,dump-id = <0x65>; |
| 1973 | }; |
| 1974 | qcom,l1_i_cache102 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1975 | qcom,dump-node = <&L1_I_600>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1976 | qcom,dump-id = <0x66>; |
| 1977 | }; |
| 1978 | qcom,l1_i_cache103 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1979 | qcom,dump-node = <&L1_I_700>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1980 | qcom,dump-id = <0x67>; |
| 1981 | }; |
| 1982 | qcom,l1_d_cache0 { |
| 1983 | qcom,dump-node = <&L1_D_0>; |
| 1984 | qcom,dump-id = <0x80>; |
| 1985 | }; |
| 1986 | qcom,l1_d_cache1 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1987 | qcom,dump-node = <&L1_D_100>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1988 | qcom,dump-id = <0x81>; |
| 1989 | }; |
| 1990 | qcom,l1_d_cache2 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1991 | qcom,dump-node = <&L1_D_200>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1992 | qcom,dump-id = <0x82>; |
| 1993 | }; |
| 1994 | qcom,l1_d_cache3 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1995 | qcom,dump-node = <&L1_D_300>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1996 | qcom,dump-id = <0x83>; |
| 1997 | }; |
| 1998 | qcom,l1_d_cache100 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 1999 | qcom,dump-node = <&L1_D_400>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 2000 | qcom,dump-id = <0x84>; |
| 2001 | }; |
| 2002 | qcom,l1_d_cache101 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 2003 | qcom,dump-node = <&L1_D_500>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 2004 | qcom,dump-id = <0x85>; |
| 2005 | }; |
| 2006 | qcom,l1_d_cache102 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 2007 | qcom,dump-node = <&L1_D_600>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 2008 | qcom,dump-id = <0x86>; |
| 2009 | }; |
| 2010 | qcom,l1_d_cache103 { |
Channagoud Kadabi | 0fd460c | 2017-04-04 21:09:57 -0700 | [diff] [blame] | 2011 | qcom,dump-node = <&L1_D_700>; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 2012 | qcom,dump-id = <0x87>; |
| 2013 | }; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2014 | qcom,llcc1_d_cache { |
| 2015 | qcom,dump-node = <&LLCC_1>; |
Channagoud Kadabi | 641331f | 2017-05-26 15:30:25 -0700 | [diff] [blame] | 2016 | qcom,dump-id = <0x140>; |
Channagoud Kadabi | f4fa169 | 2017-01-17 12:34:29 -0800 | [diff] [blame] | 2017 | }; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2018 | qcom,llcc2_d_cache { |
| 2019 | qcom,dump-node = <&LLCC_2>; |
Channagoud Kadabi | 641331f | 2017-05-26 15:30:25 -0700 | [diff] [blame] | 2020 | qcom,dump-id = <0x141>; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2021 | }; |
| 2022 | qcom,llcc3_d_cache { |
| 2023 | qcom,dump-node = <&LLCC_3>; |
Channagoud Kadabi | 641331f | 2017-05-26 15:30:25 -0700 | [diff] [blame] | 2024 | qcom,dump-id = <0x142>; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2025 | }; |
| 2026 | qcom,llcc4_d_cache { |
| 2027 | qcom,dump-node = <&LLCC_4>; |
Channagoud Kadabi | 641331f | 2017-05-26 15:30:25 -0700 | [diff] [blame] | 2028 | qcom,dump-id = <0x143>; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2029 | }; |
Channagoud Kadabi | ef56fcb | 2017-05-15 16:28:39 -0700 | [diff] [blame] | 2030 | qcom,l1_tlb_dump0 { |
| 2031 | qcom,dump-node = <&L1_TLB_0>; |
| 2032 | qcom,dump-id = <0x20>; |
| 2033 | }; |
| 2034 | qcom,l1_tlb_dump100 { |
| 2035 | qcom,dump-node = <&L1_TLB_100>; |
| 2036 | qcom,dump-id = <0x21>; |
| 2037 | }; |
| 2038 | qcom,l1_tlb_dump200 { |
| 2039 | qcom,dump-node = <&L1_TLB_200>; |
| 2040 | qcom,dump-id = <0x22>; |
| 2041 | }; |
| 2042 | qcom,l1_tlb_dump300 { |
| 2043 | qcom,dump-node = <&L1_TLB_300>; |
| 2044 | qcom,dump-id = <0x23>; |
| 2045 | }; |
| 2046 | qcom,l1_tlb_dump400 { |
| 2047 | qcom,dump-node = <&L1_TLB_400>; |
| 2048 | qcom,dump-id = <0x24>; |
| 2049 | }; |
| 2050 | qcom,l1_tlb_dump500 { |
| 2051 | qcom,dump-node = <&L1_TLB_500>; |
| 2052 | qcom,dump-id = <0x25>; |
| 2053 | }; |
| 2054 | qcom,l1_tlb_dump600 { |
| 2055 | qcom,dump-node = <&L1_TLB_600>; |
| 2056 | qcom,dump-id = <0x26>; |
| 2057 | }; |
| 2058 | qcom,l1_tlb_dump700 { |
| 2059 | qcom,dump-node = <&L1_TLB_700>; |
| 2060 | qcom,dump-id = <0x27>; |
| 2061 | }; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 2062 | }; |
| 2063 | |
Kyle Yan | ddc4424 | 2016-06-20 14:42:14 -0700 | [diff] [blame] | 2064 | kryo3xx-erp { |
| 2065 | compatible = "arm,arm64-kryo3xx-cpu-erp"; |
| 2066 | interrupts = <1 6 4>, |
| 2067 | <1 7 4>, |
| 2068 | <0 34 4>, |
| 2069 | <0 35 4>; |
| 2070 | |
| 2071 | interrupt-names = "l1-l2-faultirq", |
| 2072 | "l1-l2-errirq", |
| 2073 | "l3-scu-errirq", |
| 2074 | "l3-scu-faultirq"; |
| 2075 | }; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 2076 | |
Channagoud Kadabi | 59a7ff2 | 2017-03-27 21:59:51 -0700 | [diff] [blame] | 2077 | qcom,llcc@1100000 { |
Channagoud Kadabi | 8751c89 | 2016-10-14 13:40:19 -0700 | [diff] [blame] | 2078 | compatible = "qcom,llcc-core", "syscon", "simple-mfd"; |
Channagoud Kadabi | 59a7ff2 | 2017-03-27 21:59:51 -0700 | [diff] [blame] | 2079 | reg = <0x1100000 0x250000>; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 2080 | reg-names = "llcc_base"; |
Channagoud Kadabi | 59a7ff2 | 2017-03-27 21:59:51 -0700 | [diff] [blame] | 2081 | qcom,llcc-banks-off = <0x0 0x80000 0x100000 0x180000>; |
| 2082 | qcom,llcc-broadcast-off = <0x200000>; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 2083 | |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 2084 | llcc: qcom,sdm845-llcc { |
| 2085 | compatible = "qcom,sdm845-llcc"; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 2086 | #cache-cells = <1>; |
| 2087 | max-slices = <32>; |
| 2088 | }; |
| 2089 | |
Sankaran Nampoothiri | cddf47d | 2017-06-27 17:42:57 +0530 | [diff] [blame] | 2090 | qcom,llcc-perfmon { |
| 2091 | compatible = "qcom,llcc-perfmon"; |
| 2092 | }; |
| 2093 | |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 2094 | qcom,llcc-erp { |
| 2095 | compatible = "qcom,llcc-erp"; |
Channagoud Kadabi | c26a891 | 2016-11-21 13:57:20 -0800 | [diff] [blame] | 2096 | interrupt-names = "ecc_irq"; |
| 2097 | interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 2098 | }; |
| 2099 | |
| 2100 | qcom,llcc-amon { |
| 2101 | compatible = "qcom,llcc-amon"; |
| 2102 | }; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2103 | |
| 2104 | LLCC_1: llcc_1_dcache { |
Channagoud Kadabi | 028a01d | 2017-09-22 13:14:32 -0700 | [diff] [blame] | 2105 | qcom,dump-size = <0x1141c0>; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2106 | }; |
| 2107 | |
| 2108 | LLCC_2: llcc_2_dcache { |
Channagoud Kadabi | 028a01d | 2017-09-22 13:14:32 -0700 | [diff] [blame] | 2109 | qcom,dump-size = <0x1141c0>; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2110 | }; |
| 2111 | |
| 2112 | LLCC_3: llcc_3_dcache { |
Channagoud Kadabi | 028a01d | 2017-09-22 13:14:32 -0700 | [diff] [blame] | 2113 | qcom,dump-size = <0x1141c0>; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2114 | }; |
| 2115 | |
| 2116 | LLCC_4: llcc_4_dcache { |
Channagoud Kadabi | 028a01d | 2017-09-22 13:14:32 -0700 | [diff] [blame] | 2117 | qcom,dump-size = <0x1141c0>; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 2118 | }; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 2119 | }; |
Chris Lew | ecef30b | 2016-08-22 13:52:49 -0700 | [diff] [blame] | 2120 | |
| 2121 | qcom,ipc-spinlock@1f40000 { |
| 2122 | compatible = "qcom,ipc-spinlock-sfpb"; |
| 2123 | reg = <0x1f40000 0x8000>; |
| 2124 | qcom,num-locks = <8>; |
| 2125 | }; |
Chris Lew | 05f9fb7 | 2016-08-22 13:55:10 -0700 | [diff] [blame] | 2126 | |
| 2127 | qcom,smem@86000000 { |
| 2128 | compatible = "qcom,smem"; |
| 2129 | reg = <0x86000000 0x200000>, |
| 2130 | <0x17911008 0x4>, |
| 2131 | <0x778000 0x7000>, |
| 2132 | <0x1fd4000 0x8>; |
| 2133 | reg-names = "smem", "irq-reg-base", "aux-mem1", |
| 2134 | "smem_targ_info_reg"; |
| 2135 | qcom,mpu-enabled; |
| 2136 | }; |
Chris Lew | 031aed0 | 2016-08-22 13:58:59 -0700 | [diff] [blame] | 2137 | |
| 2138 | qcom,glink-mailbox-xprt-spss@1885008 { |
| 2139 | compatible = "qcom,glink-mailbox-xprt"; |
| 2140 | reg = <0x1885008 0x8>, |
| 2141 | <0x1885010 0x4>, |
| 2142 | <0x188501c 0x4>, |
| 2143 | <0x1886008 0x4>; |
| 2144 | reg-names = "mbox-loc-addr", "mbox-loc-size", "irq-reg-base", |
| 2145 | "irq-rx-reset"; |
| 2146 | qcom,irq-mask = <0x1>; |
| 2147 | interrupts = <0 348 4>; |
| 2148 | label = "spss"; |
| 2149 | qcom,tx-ring-size = <0x400>; |
| 2150 | qcom,rx-ring-size = <0x400>; |
| 2151 | }; |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 2152 | |
Chris Lew | 7282977 | 2017-06-13 17:08:03 -0700 | [diff] [blame] | 2153 | qmp_aop: qcom,qmp-aop@c300000 { |
Chris Lew | 3930559 | 2017-03-03 17:18:07 -0800 | [diff] [blame] | 2154 | compatible = "qcom,qmp-mbox"; |
| 2155 | label = "aop"; |
| 2156 | reg = <0xc300000 0x100000>, |
| 2157 | <0x1799000c 0x4>; |
| 2158 | reg-names = "msgram", "irq-reg-base"; |
| 2159 | qcom,irq-mask = <0x1>; |
| 2160 | interrupts = <0 389 1>; |
Chris Lew | 7282977 | 2017-06-13 17:08:03 -0700 | [diff] [blame] | 2161 | priority = <0>; |
Chris Lew | 2a45151 | 2017-04-13 15:53:21 -0700 | [diff] [blame] | 2162 | mbox-desc-offset = <0x0>; |
Chris Lew | 3930559 | 2017-03-03 17:18:07 -0800 | [diff] [blame] | 2163 | #mbox-cells = <1>; |
| 2164 | }; |
| 2165 | |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 2166 | apps_rsc: mailbox@179e0000 { |
| 2167 | compatible = "qcom,tcs-drv"; |
Lina Iyer | 1a41084 | 2017-03-21 13:52:43 -0600 | [diff] [blame] | 2168 | label = "apps_rsc"; |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 2169 | reg = <0x179e0000 0x100>, <0x179e0d00 0x3000>; |
| 2170 | interrupts = <0 5 0>; |
| 2171 | #mbox-cells = <1>; |
| 2172 | qcom,drv-id = <2>; |
Lina Iyer | 45df896 | 2017-02-13 14:37:09 -0700 | [diff] [blame] | 2173 | qcom,tcs-config = <ACTIVE_TCS 2>, |
| 2174 | <SLEEP_TCS 3>, |
| 2175 | <WAKE_TCS 3>, |
| 2176 | <CONTROL_TCS 1>; |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 2177 | }; |
Lina Iyer | 4522ca4 | 2016-10-18 16:57:19 -0600 | [diff] [blame] | 2178 | |
| 2179 | disp_rsc: mailbox@af20000 { |
Lina Iyer | 4522ca4 | 2016-10-18 16:57:19 -0600 | [diff] [blame] | 2180 | compatible = "qcom,tcs-drv"; |
Lina Iyer | 1a41084 | 2017-03-21 13:52:43 -0600 | [diff] [blame] | 2181 | label = "display_rsc"; |
Lina Iyer | 4522ca4 | 2016-10-18 16:57:19 -0600 | [diff] [blame] | 2182 | reg = <0xaf20000 0x100>, <0xaf21c00 0x3000>; |
| 2183 | interrupts = <0 129 0>; |
| 2184 | #mbox-cells = <1>; |
| 2185 | qcom,drv-id = <0>; |
| 2186 | qcom,tcs-config = <SLEEP_TCS 1>, |
| 2187 | <WAKE_TCS 1>, |
| 2188 | <ACTIVE_TCS 0>, |
| 2189 | <CONTROL_TCS 1>; |
| 2190 | }; |
Lina Iyer | ac0d4ed | 2016-10-20 13:48:31 -0600 | [diff] [blame] | 2191 | |
| 2192 | system_pm { |
| 2193 | compatible = "qcom,system-pm"; |
| 2194 | mboxes = <&apps_rsc 0>; |
| 2195 | }; |
Karthikeyan Ramasubramanian | 4726046 | 2016-09-19 14:15:45 -0600 | [diff] [blame] | 2196 | |
| 2197 | qcom,glink-smem-native-xprt-modem@86000000 { |
| 2198 | compatible = "qcom,glink-smem-native-xprt"; |
| 2199 | reg = <0x86000000 0x200000>, |
| 2200 | <0x1799000c 0x4>; |
| 2201 | reg-names = "smem", "irq-reg-base"; |
| 2202 | qcom,irq-mask = <0x1000>; |
| 2203 | interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; |
| 2204 | label = "mpss"; |
| 2205 | }; |
| 2206 | |
| 2207 | qcom,glink-smem-native-xprt-adsp@86000000 { |
| 2208 | compatible = "qcom,glink-smem-native-xprt"; |
| 2209 | reg = <0x86000000 0x200000>, |
| 2210 | <0x1799000c 0x4>; |
| 2211 | reg-names = "smem", "irq-reg-base"; |
| 2212 | qcom,irq-mask = <0x100>; |
| 2213 | interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; |
| 2214 | label = "lpass"; |
Chris Lew | a696c27 | 2017-10-02 15:27:00 -0700 | [diff] [blame] | 2215 | cpu-affinity = <1 2>; |
Chris Lew | 13311dd | 2017-05-11 13:04:33 -0700 | [diff] [blame] | 2216 | qcom,qos-config = <&glink_qos_adsp>; |
| 2217 | qcom,ramp-time = <0xaf>; |
| 2218 | }; |
| 2219 | |
| 2220 | glink_qos_adsp: qcom,glink-qos-config-adsp { |
| 2221 | compatible = "qcom,glink-qos-config"; |
| 2222 | qcom,flow-info = <0x3c 0x0>, |
| 2223 | <0x3c 0x0>, |
| 2224 | <0x3c 0x0>, |
| 2225 | <0x3c 0x0>; |
| 2226 | qcom,mtu-size = <0x800>; |
| 2227 | qcom,tput-stats-cycle = <0xa>; |
Karthikeyan Ramasubramanian | 4726046 | 2016-09-19 14:15:45 -0600 | [diff] [blame] | 2228 | }; |
| 2229 | |
| 2230 | qcom,glink-smem-native-xprt-dsps@86000000 { |
| 2231 | compatible = "qcom,glink-smem-native-xprt"; |
| 2232 | reg = <0x86000000 0x200000>, |
| 2233 | <0x1799000c 0x4>; |
| 2234 | reg-names = "smem", "irq-reg-base"; |
| 2235 | qcom,irq-mask = <0x1000000>; |
| 2236 | interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>; |
| 2237 | label = "dsps"; |
| 2238 | }; |
| 2239 | |
Chris Lew | 5d4752f | 2017-05-11 13:14:30 -0700 | [diff] [blame] | 2240 | glink_spi_xprt_wdsp: qcom,glink-spi-xprt-wdsp { |
| 2241 | compatible = "qcom,glink-spi-xprt"; |
| 2242 | label = "wdsp"; |
| 2243 | qcom,remote-fifo-config = <&glink_fifo_wdsp>; |
| 2244 | qcom,qos-config = <&glink_qos_wdsp>; |
| 2245 | qcom,ramp-time = <0x10>, |
| 2246 | <0x20>, |
| 2247 | <0x30>, |
| 2248 | <0x40>; |
| 2249 | }; |
| 2250 | |
| 2251 | glink_fifo_wdsp: qcom,glink-fifo-config-wdsp { |
| 2252 | compatible = "qcom,glink-fifo-config"; |
| 2253 | qcom,out-read-idx-reg = <0x12000>; |
| 2254 | qcom,out-write-idx-reg = <0x12004>; |
| 2255 | qcom,in-read-idx-reg = <0x1200C>; |
| 2256 | qcom,in-write-idx-reg = <0x12010>; |
| 2257 | }; |
| 2258 | |
| 2259 | glink_qos_wdsp: qcom,glink-qos-config-wdsp { |
| 2260 | compatible = "qcom,glink-qos-config"; |
| 2261 | qcom,flow-info = <0x80 0x0>, |
| 2262 | <0x70 0x1>, |
| 2263 | <0x60 0x2>, |
| 2264 | <0x50 0x3>; |
| 2265 | qcom,mtu-size = <0x800>; |
| 2266 | qcom,tput-stats-cycle = <0xa>; |
| 2267 | }; |
| 2268 | |
Karthikeyan Ramasubramanian | 4726046 | 2016-09-19 14:15:45 -0600 | [diff] [blame] | 2269 | qcom,glink-smem-native-xprt-cdsp@86000000 { |
| 2270 | compatible = "qcom,glink-smem-native-xprt"; |
| 2271 | reg = <0x86000000 0x200000>, |
| 2272 | <0x1799000c 0x4>; |
| 2273 | reg-names = "smem", "irq-reg-base"; |
| 2274 | qcom,irq-mask = <0x10>; |
| 2275 | interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; |
| 2276 | label = "cdsp"; |
| 2277 | }; |
Karthikeyan Ramasubramanian | a0e3ff5 | 2016-09-19 14:31:36 -0600 | [diff] [blame] | 2278 | |
| 2279 | glink_mpss: qcom,glink-ssr-modem { |
| 2280 | compatible = "qcom,glink_ssr"; |
| 2281 | label = "modem"; |
| 2282 | qcom,edge = "mpss"; |
| 2283 | qcom,notify-edges = <&glink_lpass>, <&glink_dsps>, |
| 2284 | <&glink_cdsp>, <&glink_spss>; |
| 2285 | qcom,xprt = "smem"; |
| 2286 | }; |
| 2287 | |
| 2288 | glink_lpass: qcom,glink-ssr-adsp { |
| 2289 | compatible = "qcom,glink_ssr"; |
| 2290 | label = "adsp"; |
| 2291 | qcom,edge = "lpass"; |
| 2292 | qcom,notify-edges = <&glink_mpss>, <&glink_dsps>, <&glink_cdsp>; |
| 2293 | qcom,xprt = "smem"; |
| 2294 | }; |
| 2295 | |
| 2296 | glink_dsps: qcom,glink-ssr-dsps { |
| 2297 | compatible = "qcom,glink_ssr"; |
| 2298 | label = "slpi"; |
| 2299 | qcom,edge = "dsps"; |
| 2300 | qcom,notify-edges = <&glink_mpss>, <&glink_lpass>, |
| 2301 | <&glink_cdsp>; |
| 2302 | qcom,xprt = "smem"; |
| 2303 | }; |
| 2304 | |
| 2305 | glink_cdsp: qcom,glink-ssr-cdsp { |
| 2306 | compatible = "qcom,glink_ssr"; |
| 2307 | label = "cdsp"; |
| 2308 | qcom,edge = "cdsp"; |
| 2309 | qcom,notify-edges = <&glink_mpss>, <&glink_lpass>, |
| 2310 | <&glink_dsps>; |
| 2311 | qcom,xprt = "smem"; |
| 2312 | }; |
| 2313 | |
| 2314 | glink_spss: qcom,glink-ssr-spss { |
| 2315 | compatible = "qcom,glink_ssr"; |
| 2316 | label = "spss"; |
| 2317 | qcom,edge = "spss"; |
| 2318 | qcom,notify-edges = <&glink_mpss>; |
| 2319 | qcom,xprt = "mailbox"; |
| 2320 | }; |
Karthikeyan Ramasubramanian | 8f0c100 | 2016-09-19 15:44:53 -0600 | [diff] [blame] | 2321 | |
| 2322 | qcom,ipc_router { |
| 2323 | compatible = "qcom,ipc_router"; |
| 2324 | qcom,node-id = <1>; |
| 2325 | }; |
| 2326 | |
| 2327 | qcom,ipc_router_modem_xprt { |
| 2328 | compatible = "qcom,ipc_router_glink_xprt"; |
| 2329 | qcom,ch-name = "IPCRTR"; |
| 2330 | qcom,xprt-remote = "mpss"; |
| 2331 | qcom,glink-xprt = "smem"; |
| 2332 | qcom,xprt-linkid = <1>; |
| 2333 | qcom,xprt-version = <1>; |
| 2334 | qcom,fragmented-data; |
| 2335 | }; |
| 2336 | |
| 2337 | qcom,ipc_router_q6_xprt { |
| 2338 | compatible = "qcom,ipc_router_glink_xprt"; |
| 2339 | qcom,ch-name = "IPCRTR"; |
| 2340 | qcom,xprt-remote = "lpass"; |
| 2341 | qcom,glink-xprt = "smem"; |
| 2342 | qcom,xprt-linkid = <1>; |
| 2343 | qcom,xprt-version = <1>; |
| 2344 | qcom,fragmented-data; |
| 2345 | }; |
| 2346 | |
| 2347 | qcom,ipc_router_dsps_xprt { |
| 2348 | compatible = "qcom,ipc_router_glink_xprt"; |
| 2349 | qcom,ch-name = "IPCRTR"; |
| 2350 | qcom,xprt-remote = "dsps"; |
| 2351 | qcom,glink-xprt = "smem"; |
| 2352 | qcom,xprt-linkid = <1>; |
| 2353 | qcom,xprt-version = <1>; |
| 2354 | qcom,fragmented-data; |
Arun Kumar Neelakantam | 6947b8b | 2017-06-29 21:39:22 +0530 | [diff] [blame] | 2355 | qcom,dynamic-wakeup-source; |
Karthikeyan Ramasubramanian | 8f0c100 | 2016-09-19 15:44:53 -0600 | [diff] [blame] | 2356 | }; |
| 2357 | |
| 2358 | qcom,ipc_router_cdsp_xprt { |
| 2359 | compatible = "qcom,ipc_router_glink_xprt"; |
| 2360 | qcom,ch-name = "IPCRTR"; |
| 2361 | qcom,xprt-remote = "cdsp"; |
| 2362 | qcom,glink-xprt = "smem"; |
| 2363 | qcom,xprt-linkid = <1>; |
| 2364 | qcom,xprt-version = <1>; |
| 2365 | qcom,fragmented-data; |
| 2366 | }; |
Karthikeyan Ramasubramanian | 608a252 | 2016-09-19 15:50:38 -0600 | [diff] [blame] | 2367 | |
Chris Lew | a342b70 | 2017-08-14 11:17:51 -0700 | [diff] [blame] | 2368 | qcom,qsee_ipc_irq_bridge { |
| 2369 | compatible = "qcom,qsee-ipc-irq-bridge"; |
| 2370 | |
Chris Lew | 3667a9f | 2017-09-27 08:47:11 -0700 | [diff] [blame] | 2371 | qcom,qsee-ipc-irq-spss { |
Chris Lew | a342b70 | 2017-08-14 11:17:51 -0700 | [diff] [blame] | 2372 | qcom,rx-irq-clr = <0x1888008 0x4>; |
| 2373 | qcom,rx-irq-clr-mask = <0x1>; |
| 2374 | qcom,dev-name = "qsee_ipc_irq_spss"; |
| 2375 | interrupts = <0 349 4>; |
| 2376 | label = "spss"; |
| 2377 | }; |
| 2378 | }; |
| 2379 | |
Kineret Berger | 4e32885 | 2017-02-16 10:49:03 +0200 | [diff] [blame] | 2380 | qcom,spcom { |
| 2381 | compatible = "qcom,spcom"; |
| 2382 | |
| 2383 | /* predefined channels, remote side is server */ |
| 2384 | qcom,spcom-ch-names = "sp_kernel", "sp_ssr"; |
| 2385 | status = "ok"; |
| 2386 | }; |
| 2387 | |
Reut Zysman | 0be87ce | 2017-03-19 14:35:54 +0200 | [diff] [blame] | 2388 | spss_utils: qcom,spss_utils { |
| 2389 | compatible = "qcom,spss-utils"; |
| 2390 | /* spss fuses physical address */ |
| 2391 | qcom,spss-fuse1-addr = <0x007841c4>; |
| 2392 | qcom,spss-fuse1-bit = <27>; |
| 2393 | qcom,spss-fuse2-addr = <0x007841c4>; |
| 2394 | qcom,spss-fuse2-bit = <26>; |
| 2395 | qcom,spss-dev-firmware-name = "spss1d"; /* 8 chars max */ |
| 2396 | qcom,spss-test-firmware-name = "spss1t"; /* 8 chars max */ |
| 2397 | qcom,spss-prod-firmware-name = "spss1p"; /* 8 chars max */ |
| 2398 | qcom,spss-debug-reg-addr = <0x01886020>; |
| 2399 | status = "ok"; |
| 2400 | }; |
| 2401 | |
Karthikeyan Ramasubramanian | 608a252 | 2016-09-19 15:50:38 -0600 | [diff] [blame] | 2402 | qcom,glink_pkt { |
| 2403 | compatible = "qcom,glinkpkt"; |
| 2404 | |
| 2405 | qcom,glinkpkt-at-mdm0 { |
| 2406 | qcom,glinkpkt-transport = "smem"; |
| 2407 | qcom,glinkpkt-edge = "mpss"; |
| 2408 | qcom,glinkpkt-ch-name = "DS"; |
| 2409 | qcom,glinkpkt-dev-name = "at_mdm0"; |
| 2410 | }; |
| 2411 | |
| 2412 | qcom,glinkpkt-loopback_cntl { |
| 2413 | qcom,glinkpkt-transport = "lloop"; |
| 2414 | qcom,glinkpkt-edge = "local"; |
| 2415 | qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT"; |
| 2416 | qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl"; |
| 2417 | }; |
| 2418 | |
| 2419 | qcom,glinkpkt-loopback_data { |
| 2420 | qcom,glinkpkt-transport = "lloop"; |
| 2421 | qcom,glinkpkt-edge = "local"; |
| 2422 | qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT"; |
| 2423 | qcom,glinkpkt-dev-name = "glink_pkt_loopback"; |
| 2424 | }; |
| 2425 | |
| 2426 | qcom,glinkpkt-apr-apps2 { |
| 2427 | qcom,glinkpkt-transport = "smem"; |
| 2428 | qcom,glinkpkt-edge = "adsp"; |
| 2429 | qcom,glinkpkt-ch-name = "apr_apps2"; |
| 2430 | qcom,glinkpkt-dev-name = "apr_apps2"; |
| 2431 | }; |
| 2432 | |
| 2433 | qcom,glinkpkt-data40-cntl { |
| 2434 | qcom,glinkpkt-transport = "smem"; |
| 2435 | qcom,glinkpkt-edge = "mpss"; |
| 2436 | qcom,glinkpkt-ch-name = "DATA40_CNTL"; |
| 2437 | qcom,glinkpkt-dev-name = "smdcntl8"; |
| 2438 | }; |
| 2439 | |
| 2440 | qcom,glinkpkt-data1 { |
| 2441 | qcom,glinkpkt-transport = "smem"; |
| 2442 | qcom,glinkpkt-edge = "mpss"; |
| 2443 | qcom,glinkpkt-ch-name = "DATA1"; |
| 2444 | qcom,glinkpkt-dev-name = "smd7"; |
| 2445 | }; |
| 2446 | |
| 2447 | qcom,glinkpkt-data4 { |
| 2448 | qcom,glinkpkt-transport = "smem"; |
| 2449 | qcom,glinkpkt-edge = "mpss"; |
| 2450 | qcom,glinkpkt-ch-name = "DATA4"; |
| 2451 | qcom,glinkpkt-dev-name = "smd8"; |
| 2452 | }; |
| 2453 | |
| 2454 | qcom,glinkpkt-data11 { |
| 2455 | qcom,glinkpkt-transport = "smem"; |
| 2456 | qcom,glinkpkt-edge = "mpss"; |
| 2457 | qcom,glinkpkt-ch-name = "DATA11"; |
| 2458 | qcom,glinkpkt-dev-name = "smd11"; |
| 2459 | }; |
| 2460 | }; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2461 | |
Yan He | 907385d | 2016-11-14 17:13:30 -0800 | [diff] [blame] | 2462 | qcom,sps { |
| 2463 | compatible = "qcom,msm_sps_4k"; |
| 2464 | qcom,pipe-attr-ee; |
| 2465 | }; |
| 2466 | |
Abir Ghosh | 089b50d0 | 2017-04-27 21:40:38 -0700 | [diff] [blame] | 2467 | qcom,qbt1000 { |
| 2468 | compatible = "qcom,qbt1000"; |
| 2469 | clock-names = "core", "iface"; |
| 2470 | clock-frequency = <25000000>; |
| 2471 | qcom,ipc-gpio = <&tlmm 121 0>; |
| 2472 | qcom,finger-detect-gpio = <&pm8998_gpios 5 0>; |
| 2473 | }; |
| 2474 | |
AnilKumar Chimata | e9577f4 | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2475 | qcom_seecom: qseecom@86d00000 { |
| 2476 | compatible = "qcom,qseecom"; |
| 2477 | reg = <0x86d00000 0x2200000>; |
| 2478 | reg-names = "secapp-region"; |
| 2479 | qcom,hlos-num-ce-hw-instances = <1>; |
| 2480 | qcom,hlos-ce-hw-instance = <0>; |
| 2481 | qcom,qsee-ce-hw-instance = <0>; |
| 2482 | qcom,disk-encrypt-pipe-pair = <2>; |
| 2483 | qcom,support-fde; |
| 2484 | qcom,no-clock-support; |
AnilKumar Chimata | a9de12a | 2017-07-03 18:00:34 +0530 | [diff] [blame] | 2485 | qcom,fde-key-size; |
AnilKumar Chimata | e9577f4 | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2486 | qcom,msm-bus,name = "qseecom-noc"; |
| 2487 | qcom,msm-bus,num-cases = <4>; |
| 2488 | qcom,msm-bus,num-paths = <1>; |
| 2489 | qcom,msm-bus,vectors-KBps = |
| 2490 | <125 512 0 0>, |
| 2491 | <125 512 200000 400000>, |
| 2492 | <125 512 300000 800000>, |
| 2493 | <125 512 400000 1000000>; |
| 2494 | clock-names = "core_clk_src", "core_clk", |
| 2495 | "iface_clk", "bus_clk"; |
| 2496 | clocks = <&clock_gcc GCC_CE1_CLK>, |
| 2497 | <&clock_gcc GCC_CE1_CLK>, |
| 2498 | <&clock_gcc GCC_CE1_AHB_CLK>, |
| 2499 | <&clock_gcc GCC_CE1_AXI_CLK>; |
| 2500 | qcom,ce-opp-freq = <171430000>; |
| 2501 | qcom,qsee-reentrancy-support = <2>; |
| 2502 | }; |
| 2503 | |
AnilKumar Chimata | 51e7043 | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2504 | qcom_rng: qrng@793000 { |
| 2505 | compatible = "qcom,msm-rng"; |
| 2506 | reg = <0x793000 0x1000>; |
| 2507 | qcom,msm-rng-iface-clk; |
| 2508 | qcom,no-qrng-config; |
| 2509 | qcom,msm-bus,name = "msm-rng-noc"; |
| 2510 | qcom,msm-bus,num-cases = <2>; |
| 2511 | qcom,msm-bus,num-paths = <1>; |
| 2512 | qcom,msm-bus,vectors-KBps = |
| 2513 | <1 618 0 0>, /* No vote */ |
Zhen Kong | 39570f0 | 2017-11-10 14:05:03 -0800 | [diff] [blame] | 2514 | <1 618 0 300000>; /* 75 MHz */ |
AnilKumar Chimata | 51e7043 | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2515 | clocks = <&clock_gcc GCC_PRNG_AHB_CLK>; |
| 2516 | clock-names = "iface_clk"; |
| 2517 | }; |
| 2518 | |
AnilKumar Chimata | c329784 | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2519 | qcom_tzlog: tz-log@146bf720 { |
| 2520 | compatible = "qcom,tz-log"; |
| 2521 | reg = <0x146bf720 0x3000>; |
| 2522 | qcom,hyplog-enabled; |
| 2523 | hyplog-address-offset = <0x410>; |
| 2524 | hyplog-size-offset = <0x414>; |
| 2525 | }; |
| 2526 | |
AnilKumar Chimata | 285924a | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2527 | qcom_cedev: qcedev@1de0000 { |
| 2528 | compatible = "qcom,qcedev"; |
| 2529 | reg = <0x1de0000 0x20000>, |
| 2530 | <0x1dc4000 0x24000>; |
| 2531 | reg-names = "crypto-base","crypto-bam-base"; |
| 2532 | interrupts = <0 272 0>; |
Zhen Kong | 12ce0da | 2017-08-31 12:33:21 -0700 | [diff] [blame] | 2533 | qcom,bam-pipe-pair = <3>; |
AnilKumar Chimata | 285924a | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2534 | qcom,ce-hw-instance = <0>; |
| 2535 | qcom,ce-device = <0>; |
| 2536 | qcom,ce-hw-shared; |
| 2537 | qcom,bam-ee = <0>; |
| 2538 | qcom,msm-bus,name = "qcedev-noc"; |
| 2539 | qcom,msm-bus,num-cases = <2>; |
| 2540 | qcom,msm-bus,num-paths = <1>; |
| 2541 | qcom,msm-bus,vectors-KBps = |
| 2542 | <125 512 0 0>, |
| 2543 | <125 512 393600 393600>; |
| 2544 | clock-names = "core_clk_src", "core_clk", |
| 2545 | "iface_clk", "bus_clk"; |
| 2546 | clocks = <&clock_gcc GCC_CE1_CLK>, |
| 2547 | <&clock_gcc GCC_CE1_CLK>, |
| 2548 | <&clock_gcc GCC_CE1_AHB_CLK>, |
| 2549 | <&clock_gcc GCC_CE1_AXI_CLK>; |
| 2550 | qcom,ce-opp-freq = <171430000>; |
AnilKumar Chimata | fb8eae4 | 2017-05-03 13:04:47 -0700 | [diff] [blame] | 2551 | qcom,request-bw-before-clk; |
Zhen Kong | 12ce0da | 2017-08-31 12:33:21 -0700 | [diff] [blame] | 2552 | qcom,smmu-s1-enable; |
| 2553 | iommus = <&apps_smmu 0x706 0x1>, |
| 2554 | <&apps_smmu 0x716 0x1>; |
AnilKumar Chimata | 285924a | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2555 | }; |
| 2556 | |
Tatenda Chipeperekwa | d1ae6b1 | 2017-07-10 12:54:29 -0700 | [diff] [blame] | 2557 | qcom_msmhdcp: qcom,msm_hdcp { |
| 2558 | compatible = "qcom,msm-hdcp"; |
| 2559 | }; |
| 2560 | |
AnilKumar Chimata | 285924a | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2561 | qcom_crypto: qcrypto@1de0000 { |
| 2562 | compatible = "qcom,qcrypto"; |
| 2563 | reg = <0x1de0000 0x20000>, |
| 2564 | <0x1dc4000 0x24000>; |
| 2565 | reg-names = "crypto-base","crypto-bam-base"; |
| 2566 | interrupts = <0 272 0>; |
| 2567 | qcom,bam-pipe-pair = <2>; |
| 2568 | qcom,ce-hw-instance = <0>; |
| 2569 | qcom,ce-device = <0>; |
| 2570 | qcom,bam-ee = <0>; |
| 2571 | qcom,ce-hw-shared; |
| 2572 | qcom,clk-mgmt-sus-res; |
| 2573 | qcom,msm-bus,name = "qcrypto-noc"; |
| 2574 | qcom,msm-bus,num-cases = <2>; |
| 2575 | qcom,msm-bus,num-paths = <1>; |
| 2576 | qcom,msm-bus,vectors-KBps = |
| 2577 | <125 512 0 0>, |
| 2578 | <125 512 393600 393600>; |
| 2579 | clock-names = "core_clk_src", "core_clk", |
| 2580 | "iface_clk", "bus_clk"; |
| 2581 | clocks = <&clock_gcc GCC_CE1_CLK>, |
| 2582 | <&clock_gcc GCC_CE1_CLK>, |
| 2583 | <&clock_gcc GCC_CE1_AHB_CLK>, |
| 2584 | <&clock_gcc GCC_CE1_AXI_CLK>; |
| 2585 | qcom,ce-opp-freq = <171430000>; |
AnilKumar Chimata | fb8eae4 | 2017-05-03 13:04:47 -0700 | [diff] [blame] | 2586 | qcom,request-bw-before-clk; |
AnilKumar Chimata | 285924a | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2587 | qcom,use-sw-aes-cbc-ecb-ctr-algo; |
| 2588 | qcom,use-sw-aes-xts-algo; |
| 2589 | qcom,use-sw-aes-ccm-algo; |
| 2590 | qcom,use-sw-ahash-algo; |
| 2591 | qcom,use-sw-aead-algo; |
| 2592 | qcom,use-sw-hmac-algo; |
Zhen Kong | 12ce0da | 2017-08-31 12:33:21 -0700 | [diff] [blame] | 2593 | qcom,smmu-s1-enable; |
| 2594 | iommus = <&apps_smmu 0x704 0x1>, |
| 2595 | <&apps_smmu 0x714 0x1>; |
AnilKumar Chimata | 285924a | 2017-04-18 22:52:12 -0700 | [diff] [blame] | 2596 | }; |
| 2597 | |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2598 | qcom,msm_gsi { |
| 2599 | compatible = "qcom,msm_gsi"; |
| 2600 | }; |
| 2601 | |
Ritesh Harjani | 0cd528f | 2017-04-19 14:19:55 +0530 | [diff] [blame] | 2602 | qcom,rmtfs_sharedmem@0 { |
| 2603 | compatible = "qcom,sharedmem-uio"; |
| 2604 | reg = <0x0 0x200000>; |
| 2605 | reg-names = "rmtfs"; |
| 2606 | qcom,client-id = <0x00000001>; |
Sahitya Tummala | fb2ae1c | 2017-10-05 15:03:45 +0530 | [diff] [blame] | 2607 | qcom,guard-memory; |
Ritesh Harjani | 0cd528f | 2017-04-19 14:19:55 +0530 | [diff] [blame] | 2608 | }; |
| 2609 | |
Amir Levy | 9654f17 | 2016-11-30 15:33:23 +0200 | [diff] [blame] | 2610 | qcom,rmnet-ipa { |
| 2611 | compatible = "qcom,rmnet-ipa3"; |
| 2612 | qcom,rmnet-ipa-ssr; |
| 2613 | qcom,ipa-loaduC; |
| 2614 | qcom,ipa-advertise-sg-support; |
Skylar Chang | fdadb6e6 | 2017-04-19 15:49:52 -0700 | [diff] [blame] | 2615 | qcom,ipa-napi-enable; |
Amir Levy | 9654f17 | 2016-11-30 15:33:23 +0200 | [diff] [blame] | 2616 | }; |
| 2617 | |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2618 | ipa_hw: qcom,ipa@01e00000 { |
| 2619 | compatible = "qcom,ipa"; |
| 2620 | reg = <0x1e00000 0x34000>, |
| 2621 | <0x1e04000 0x2c000>; |
| 2622 | reg-names = "ipa-base", "gsi-base"; |
| 2623 | interrupts = |
| 2624 | <0 311 0>, |
| 2625 | <0 432 0>; |
| 2626 | interrupt-names = "ipa-irq", "gsi-irq"; |
| 2627 | qcom,ipa-hw-ver = <13>; /* IPA core version = IPAv3.5.1 */ |
| 2628 | qcom,ipa-hw-mode = <1>; |
| 2629 | qcom,ee = <0>; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2630 | qcom,use-ipa-tethering-bridge; |
| 2631 | qcom,modem-cfg-emb-pipe-flt; |
| 2632 | qcom,ipa-wdi2; |
| 2633 | qcom,use-64-bit-dma-mask; |
Ghanim Fodi | b8d3075 | 2017-04-08 13:41:24 +0300 | [diff] [blame] | 2634 | qcom,arm-smmu; |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 2635 | qcom,bandwidth-vote-for-ipa; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2636 | qcom,msm-bus,name = "ipa"; |
Skylar Chang | 0e66d4f | 2017-08-29 14:27:53 -0700 | [diff] [blame] | 2637 | qcom,msm-bus,num-cases = <5>; |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 2638 | qcom,msm-bus,num-paths = <4>; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2639 | qcom,msm-bus,vectors-KBps = |
| 2640 | /* No vote */ |
| 2641 | <90 512 0 0>, |
| 2642 | <90 585 0 0>, |
| 2643 | <1 676 0 0>, |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 2644 | <143 777 0 0>, |
Skylar Chang | 0e66d4f | 2017-08-29 14:27:53 -0700 | [diff] [blame] | 2645 | /* SVS2 */ |
| 2646 | <90 512 80000 600000>, |
| 2647 | <90 585 80000 350000>, |
| 2648 | <1 676 40000 40000>, /*gcc_config_noc_clk_src */ |
| 2649 | <143 777 0 75>, /* IB defined for IPA2X_clk in MHz*/ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2650 | /* SVS */ |
| 2651 | <90 512 80000 640000>, |
| 2652 | <90 585 80000 640000>, |
| 2653 | <1 676 80000 80000>, |
Skylar Chang | 0e66d4f | 2017-08-29 14:27:53 -0700 | [diff] [blame] | 2654 | <143 777 0 150>, /* IB defined for IPA2X_clk in MHz*/ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2655 | /* NOMINAL */ |
| 2656 | <90 512 206000 960000>, |
| 2657 | <90 585 206000 960000>, |
| 2658 | <1 676 206000 160000>, |
Skylar Chang | 0e66d4f | 2017-08-29 14:27:53 -0700 | [diff] [blame] | 2659 | <143 777 0 300>, /* IB defined for IPA2X_clk in MHz*/ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2660 | /* TURBO */ |
| 2661 | <90 512 206000 3600000>, |
| 2662 | <90 585 206000 3600000>, |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 2663 | <1 676 206000 300000>, |
David Dai | c063f0f | 2017-07-05 11:21:21 -0700 | [diff] [blame] | 2664 | <143 777 0 355>; /* IB defined for IPA clk in MHz*/ |
Skylar Chang | 0e66d4f | 2017-08-29 14:27:53 -0700 | [diff] [blame] | 2665 | qcom,bus-vector-names = |
| 2666 | "MIN", "SVS2", "SVS", "NOMINAL", "TURBO"; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2667 | |
| 2668 | /* IPA RAM mmap */ |
| 2669 | qcom,ipa-ram-mmap = < |
| 2670 | 0x280 /* ofst_start; */ |
| 2671 | 0x0 /* nat_ofst; */ |
| 2672 | 0x0 /* nat_size; */ |
| 2673 | 0x288 /* v4_flt_hash_ofst; */ |
| 2674 | 0x78 /* v4_flt_hash_size; */ |
| 2675 | 0x4000 /* v4_flt_hash_size_ddr; */ |
| 2676 | 0x308 /* v4_flt_nhash_ofst; */ |
| 2677 | 0x78 /* v4_flt_nhash_size; */ |
| 2678 | 0x4000 /* v4_flt_nhash_size_ddr; */ |
| 2679 | 0x388 /* v6_flt_hash_ofst; */ |
| 2680 | 0x78 /* v6_flt_hash_size; */ |
| 2681 | 0x4000 /* v6_flt_hash_size_ddr; */ |
| 2682 | 0x408 /* v6_flt_nhash_ofst; */ |
| 2683 | 0x78 /* v6_flt_nhash_size; */ |
| 2684 | 0x4000 /* v6_flt_nhash_size_ddr; */ |
| 2685 | 0xf /* v4_rt_num_index; */ |
| 2686 | 0x0 /* v4_modem_rt_index_lo; */ |
| 2687 | 0x7 /* v4_modem_rt_index_hi; */ |
| 2688 | 0x8 /* v4_apps_rt_index_lo; */ |
| 2689 | 0xe /* v4_apps_rt_index_hi; */ |
| 2690 | 0x488 /* v4_rt_hash_ofst; */ |
| 2691 | 0x78 /* v4_rt_hash_size; */ |
| 2692 | 0x4000 /* v4_rt_hash_size_ddr; */ |
| 2693 | 0x508 /* v4_rt_nhash_ofst; */ |
| 2694 | 0x78 /* v4_rt_nhash_size; */ |
| 2695 | 0x4000 /* v4_rt_nhash_size_ddr; */ |
| 2696 | 0xf /* v6_rt_num_index; */ |
| 2697 | 0x0 /* v6_modem_rt_index_lo; */ |
| 2698 | 0x7 /* v6_modem_rt_index_hi; */ |
| 2699 | 0x8 /* v6_apps_rt_index_lo; */ |
| 2700 | 0xe /* v6_apps_rt_index_hi; */ |
| 2701 | 0x588 /* v6_rt_hash_ofst; */ |
| 2702 | 0x78 /* v6_rt_hash_size; */ |
| 2703 | 0x4000 /* v6_rt_hash_size_ddr; */ |
| 2704 | 0x608 /* v6_rt_nhash_ofst; */ |
| 2705 | 0x78 /* v6_rt_nhash_size; */ |
| 2706 | 0x4000 /* v6_rt_nhash_size_ddr; */ |
| 2707 | 0x688 /* modem_hdr_ofst; */ |
| 2708 | 0x140 /* modem_hdr_size; */ |
| 2709 | 0x7c8 /* apps_hdr_ofst; */ |
| 2710 | 0x0 /* apps_hdr_size; */ |
| 2711 | 0x800 /* apps_hdr_size_ddr; */ |
| 2712 | 0x7d0 /* modem_hdr_proc_ctx_ofst; */ |
| 2713 | 0x200 /* modem_hdr_proc_ctx_size; */ |
| 2714 | 0x9d0 /* apps_hdr_proc_ctx_ofst; */ |
| 2715 | 0x200 /* apps_hdr_proc_ctx_size; */ |
| 2716 | 0x0 /* apps_hdr_proc_ctx_size_ddr; */ |
| 2717 | 0x0 /* modem_comp_decomp_ofst; diff */ |
| 2718 | 0x0 /* modem_comp_decomp_size; diff */ |
| 2719 | 0xbd8 /* modem_ofst; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2720 | 0x1024 /* modem_size; */ |
| 2721 | 0x2000 /* apps_v4_flt_hash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2722 | 0x0 /* apps_v4_flt_hash_size; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2723 | 0x2000 /* apps_v4_flt_nhash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2724 | 0x0 /* apps_v4_flt_nhash_size; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2725 | 0x2000 /* apps_v6_flt_hash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2726 | 0x0 /* apps_v6_flt_hash_size; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2727 | 0x2000 /* apps_v6_flt_nhash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2728 | 0x0 /* apps_v6_flt_nhash_size; */ |
| 2729 | 0x80 /* uc_info_ofst; */ |
| 2730 | 0x200 /* uc_info_size; */ |
| 2731 | 0x2000 /* end_ofst; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2732 | 0x2000 /* apps_v4_rt_hash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2733 | 0x0 /* apps_v4_rt_hash_size; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2734 | 0x2000 /* apps_v4_rt_nhash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2735 | 0x0 /* apps_v4_rt_nhash_size; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2736 | 0x2000 /* apps_v6_rt_hash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2737 | 0x0 /* apps_v6_rt_hash_size; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2738 | 0x2000 /* apps_v6_rt_nhash_ofst; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2739 | 0x0 /* apps_v6_rt_nhash_size; */ |
Amir Levy | df8f28d | 2017-04-25 11:26:41 +0300 | [diff] [blame] | 2740 | 0x1c00 /* uc_event_ring_ofst; */ |
| 2741 | 0x400 /* uc_event_ring_size; */ |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2742 | >; |
Ghanim Fodi | 154110e | 2017-04-07 19:27:15 +0300 | [diff] [blame] | 2743 | |
| 2744 | /* smp2p gpio information */ |
| 2745 | qcom,smp2pgpio_map_ipa_1_out { |
| 2746 | compatible = "qcom,smp2pgpio-map-ipa-1-out"; |
| 2747 | gpios = <&smp2pgpio_ipa_1_out 0 0>; |
| 2748 | }; |
| 2749 | |
| 2750 | qcom,smp2pgpio_map_ipa_1_in { |
| 2751 | compatible = "qcom,smp2pgpio-map-ipa-1-in"; |
| 2752 | gpios = <&smp2pgpio_ipa_1_in 0 0>; |
| 2753 | }; |
Ghanim Fodi | b8d3075 | 2017-04-08 13:41:24 +0300 | [diff] [blame] | 2754 | |
| 2755 | ipa_smmu_ap: ipa_smmu_ap { |
| 2756 | compatible = "qcom,ipa-smmu-ap-cb"; |
Michael Adisumarta | 9e96c72 | 2017-10-20 15:28:39 -0700 | [diff] [blame] | 2757 | qcom,smmu-s1-bypass; |
Patrick Daly | c4aaa90 | 2017-04-24 12:45:11 -0700 | [diff] [blame] | 2758 | iommus = <&apps_smmu 0x720 0x0>; |
Ghanim Fodi | b8d3075 | 2017-04-08 13:41:24 +0300 | [diff] [blame] | 2759 | qcom,iova-mapping = <0x20000000 0x40000000>; |
Michael Adisumarta | 389894e | 2017-10-09 14:22:10 -0700 | [diff] [blame] | 2760 | qcom,additional-mapping = |
| 2761 | /* modem tables in IMEM */ |
| 2762 | <0x146BD000 0x146BD000 0x2000>; |
Ghanim Fodi | b8d3075 | 2017-04-08 13:41:24 +0300 | [diff] [blame] | 2763 | }; |
| 2764 | |
| 2765 | ipa_smmu_wlan: ipa_smmu_wlan { |
| 2766 | compatible = "qcom,ipa-smmu-wlan-cb"; |
Michael Adisumarta | 389894e | 2017-10-09 14:22:10 -0700 | [diff] [blame] | 2767 | qcom,smmu-s1-bypass; |
Patrick Daly | c4aaa90 | 2017-04-24 12:45:11 -0700 | [diff] [blame] | 2768 | iommus = <&apps_smmu 0x721 0x0>; |
Michael Adisumarta | 389894e | 2017-10-09 14:22:10 -0700 | [diff] [blame] | 2769 | qcom,additional-mapping = |
| 2770 | /* ipa-uc ram */ |
| 2771 | <0x1E60000 0x1E60000 0x80000>; |
Ghanim Fodi | b8d3075 | 2017-04-08 13:41:24 +0300 | [diff] [blame] | 2772 | }; |
| 2773 | |
| 2774 | ipa_smmu_uc: ipa_smmu_uc { |
| 2775 | compatible = "qcom,ipa-smmu-uc-cb"; |
Michael Adisumarta | 389894e | 2017-10-09 14:22:10 -0700 | [diff] [blame] | 2776 | qcom,smmu-s1-bypass; |
Patrick Daly | c4aaa90 | 2017-04-24 12:45:11 -0700 | [diff] [blame] | 2777 | iommus = <&apps_smmu 0x722 0x0>; |
Ghanim Fodi | b8d3075 | 2017-04-08 13:41:24 +0300 | [diff] [blame] | 2778 | qcom,iova-mapping = <0x40000000 0x20000000>; |
| 2779 | }; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 2780 | }; |
Channagoud Kadabi | 39d26f2 | 2016-10-27 18:41:04 -0700 | [diff] [blame] | 2781 | |
Amir Levy | f5eede2 | 2017-02-07 09:16:50 +0200 | [diff] [blame] | 2782 | qcom,ipa_fws { |
| 2783 | compatible = "qcom,pil-tz-generic"; |
| 2784 | qcom,pas-id = <0xf>; |
| 2785 | qcom,firmware-name = "ipa_fws"; |
Michael Adisumarta | 0738b5d | 2017-09-25 20:44:32 -0700 | [diff] [blame] | 2786 | qcom,pil-force-shutdown; |
Amir Levy | f5eede2 | 2017-02-07 09:16:50 +0200 | [diff] [blame] | 2787 | }; |
| 2788 | |
Channagoud Kadabi | 39d26f2 | 2016-10-27 18:41:04 -0700 | [diff] [blame] | 2789 | qcom,chd_sliver { |
| 2790 | compatible = "qcom,core-hang-detect"; |
| 2791 | label = "silver"; |
| 2792 | qcom,threshold-arr = <0x17e00058 0x17e10058 |
| 2793 | 0x17e20058 0x17e30058>; |
| 2794 | qcom,config-arr = <0x17e00060 0x17e10060 |
| 2795 | 0x17e20060 0x17e30060>; |
| 2796 | }; |
| 2797 | |
| 2798 | qcom,chd_gold { |
| 2799 | compatible = "qcom,core-hang-detect"; |
| 2800 | label = "gold"; |
| 2801 | qcom,threshold-arr = <0x17e40058 0x17e50058 |
| 2802 | 0x17e60058 0x17e70058>; |
| 2803 | qcom,config-arr = <0x17e40060 0x17e50060 |
| 2804 | 0x17e60060 0x17e70060>; |
| 2805 | }; |
| 2806 | |
| 2807 | qcom,ghd { |
Kyle Yan | 5dda245 | 2016-11-16 16:44:17 -0800 | [diff] [blame] | 2808 | compatible = "qcom,gladiator-hang-detect-v2"; |
Channagoud Kadabi | 39d26f2 | 2016-10-27 18:41:04 -0700 | [diff] [blame] | 2809 | qcom,threshold-arr = <0x1799041c 0x17990420>; |
| 2810 | qcom,config-reg = <0x17990434>; |
| 2811 | }; |
Mahesh Sivasubramanian | f0dddb6 | 2016-10-19 14:17:44 -0600 | [diff] [blame] | 2812 | |
Kyle Yan | 3a641f4 | 2016-11-21 14:00:04 -0800 | [diff] [blame] | 2813 | qcom,msm-gladiator-v3@17900000 { |
| 2814 | compatible = "qcom,msm-gladiator-v3"; |
| 2815 | reg = <0x17900000 0xd080>; |
| 2816 | reg-names = "gladiator_base"; |
| 2817 | interrupts = <0 17 0>; |
| 2818 | }; |
| 2819 | |
Mahesh Sivasubramanian | f0dddb6 | 2016-10-19 14:17:44 -0600 | [diff] [blame] | 2820 | cmd_db: qcom,cmd-db@861e0000 { |
| 2821 | compatible = "qcom,cmd-db"; |
Mahesh Sivasubramanian | d65a35e | 2017-04-28 11:18:13 -0600 | [diff] [blame] | 2822 | reg = <0xc3f000c 8>; |
Mahesh Sivasubramanian | f0dddb6 | 2016-10-19 14:17:44 -0600 | [diff] [blame] | 2823 | }; |
Satyajit Desai | 260bd39 | 2017-02-22 10:28:02 -0800 | [diff] [blame] | 2824 | |
| 2825 | dcc: dcc_v2@10a2000 { |
| 2826 | compatible = "qcom,dcc_v2"; |
| 2827 | reg = <0x10a2000 0x1000>, |
| 2828 | <0x10ae000 0x2000>; |
| 2829 | reg-names = "dcc-base", "dcc-ram-base"; |
Satyajit Desai | abf5490 | 2017-04-19 17:24:56 -0700 | [diff] [blame] | 2830 | |
| 2831 | dcc-ram-offset = <0x6000>; |
Satyajit Desai | 9f29326 | 2017-09-29 14:31:44 -0700 | [diff] [blame] | 2832 | |
| 2833 | qcom,curr-link-list = <2>; |
| 2834 | qcom,link-list = <DCC_READ 0x1740300 6 0>, |
| 2835 | <DCC_READ 0x1620500 4 0>, |
| 2836 | <DCC_READ 0x7840000 1 0>, |
| 2837 | <DCC_READ 0x7841010 12 0>, |
| 2838 | <DCC_READ 0x7842000 16 0>, |
| 2839 | <DCC_READ 0x7842500 2 0>, |
| 2840 | <DCC_LOOP 7 0 0>, |
| 2841 | <DCC_READ 0x7841000 1 0>, |
| 2842 | <DCC_LOOP 1 0 0>, |
| 2843 | <DCC_LOOP 165 0 0>, |
| 2844 | <DCC_READ 0x7841008 2 0>, |
| 2845 | <DCC_LOOP 1 0 0>, |
| 2846 | <DCC_READ 0x17dc3a84 2 0>, |
| 2847 | <DCC_READ 0x17db3a84 1 0>, |
| 2848 | <DCC_READ 0x1301000 2 0>, |
| 2849 | <DCC_READ 0x17990044 1 0>, |
| 2850 | <DCC_READ 0x17d45f00 1 0>, |
| 2851 | <DCC_READ 0x17d45f08 6 0>, |
| 2852 | <DCC_READ 0x17d45f80 1 0>, |
| 2853 | <DCC_READ 0x17d47418 1 0>, |
| 2854 | <DCC_READ 0x17d47570 1 0>, |
| 2855 | <DCC_READ 0x17d47588 1 0>, |
| 2856 | <DCC_READ 0x17d43700 1 0>, |
| 2857 | <DCC_READ 0x17d43708 6 0>, |
| 2858 | <DCC_READ 0x17d43780 1 0>, |
| 2859 | <DCC_READ 0x17d44c18 1 0>, |
| 2860 | <DCC_READ 0x17d44d70 1 0>, |
| 2861 | <DCC_READ 0x17d44d88 1 0>, |
| 2862 | <DCC_READ 0x17d41700 1 0>, |
| 2863 | <DCC_READ 0x17d41708 6 0>, |
| 2864 | <DCC_READ 0x17d41780 1 0>, |
| 2865 | <DCC_READ 0x17d42c18 1 0>, |
| 2866 | <DCC_READ 0x17d42d70 1 0>, |
| 2867 | <DCC_READ 0x17d42d88 1 0>, |
| 2868 | <DCC_WRITE 0x69ea00c 0x600007 1>, |
| 2869 | <DCC_WRITE 0x69ea01c 0x136800 1>, |
| 2870 | <DCC_READ 0x69ea014 1 1>, |
| 2871 | <DCC_WRITE 0x69ea01c 0x136810 1>, |
| 2872 | <DCC_READ 0x69ea014 1 1>, |
| 2873 | <DCC_WRITE 0x69ea01c 0x136820 1>, |
| 2874 | <DCC_READ 0x69ea014 1 1>, |
| 2875 | <DCC_WRITE 0x69ea01c 0x136830 1>, |
| 2876 | <DCC_READ 0x69ea014 1 1>, |
| 2877 | <DCC_WRITE 0x69ea01c 0x136840 1>, |
| 2878 | <DCC_READ 0x69ea014 1 1>, |
| 2879 | <DCC_WRITE 0x69ea01c 0x136850 1>, |
| 2880 | <DCC_READ 0x69ea014 1 1>, |
| 2881 | <DCC_WRITE 0x69ea01c 0x136860 1>, |
| 2882 | <DCC_READ 0x69ea014 1 1>, |
| 2883 | <DCC_WRITE 0x69ea01c 0x136870 1>, |
| 2884 | <DCC_READ 0x69ea014 1 1>, |
| 2885 | <DCC_WRITE 0x069ea01C 0x0003e9a0 1>, |
| 2886 | <DCC_WRITE 0x069ea01C 0x001368a0 1>, |
| 2887 | <DCC_READ 0x069ea014 1 1>, |
| 2888 | <DCC_WRITE 0x069ea01c 0x0003c0a0 1>, |
| 2889 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2890 | <DCC_READ 0x069ea014 1 1>, |
| 2891 | <DCC_WRITE 0x069ea01c 0x0003d1a0 1>, |
| 2892 | <DCC_WRITE 0x069ea01C 0x001368a0 1>, |
| 2893 | <DCC_READ 0x069ea014 1 1>, |
| 2894 | <DCC_WRITE 0x069ea01c 0x0003d2a0 1>, |
| 2895 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2896 | <DCC_READ 0x069ea014 1 1>, |
| 2897 | <DCC_WRITE 0x069ea01C 0x0003d5a0 1>, |
| 2898 | <DCC_WRITE 0x069ea01C 0x001368a0 1>, |
| 2899 | <DCC_READ 0x069ea014 1 1>, |
| 2900 | <DCC_WRITE 0x069ea01C 0x0003d6a0 1>, |
| 2901 | <DCC_WRITE 0x069ea01C 0x001368a0 1>, |
| 2902 | <DCC_READ 0x069ea014 1 1>, |
| 2903 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2904 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2905 | <DCC_READ 0x069ea014 1 1>, |
| 2906 | <DCC_WRITE 0x069ea01c 0x0003b1a0 1>, |
| 2907 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2908 | <DCC_READ 0x069ea014 1 1>, |
| 2909 | <DCC_WRITE 0x069ea01c 0x0003b2a0 1>, |
| 2910 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2911 | <DCC_READ 0x069ea014 1 1>, |
| 2912 | <DCC_WRITE 0x069ea01c 0x0003b5a0 1>, |
| 2913 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2914 | <DCC_READ 0x069ea014 1 1>, |
| 2915 | <DCC_WRITE 0x069ea01c 0x0003b6a0 1>, |
| 2916 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2917 | <DCC_READ 0x069ea014 1 1>, |
| 2918 | <DCC_WRITE 0x069ea01c 0x0003c2a0 1>, |
| 2919 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2920 | <DCC_READ 0x069ea014 1 1>, |
| 2921 | <DCC_WRITE 0x069ea01c 0x0003c5a0 1>, |
| 2922 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2923 | <DCC_READ 0x069ea014 1 1>, |
| 2924 | <DCC_WRITE 0x069ea01c 0x0003c6a0 1>, |
| 2925 | <DCC_WRITE 0x069ea01c 0x001368a0 1>, |
| 2926 | <DCC_READ 0x069ea014 1 1>, |
| 2927 | <DCC_WRITE 0x069ea01c 0x00f1e000 1>, |
| 2928 | <DCC_WRITE 0x069ea008 0x00000007 1>, |
| 2929 | <DCC_READ 0x013e7e00 31 0>, |
| 2930 | <DCC_READ 0x01132100 1 0>, |
| 2931 | <DCC_READ 0x01136044 4 0>, |
| 2932 | <DCC_READ 0x011360b0 1 0>, |
| 2933 | <DCC_READ 0x0113e030 2 0>, |
| 2934 | <DCC_READ 0x01141000 1 0>, |
| 2935 | <DCC_READ 0x01142028 1 0>, |
| 2936 | <DCC_READ 0x01148058 4 0>, |
| 2937 | <DCC_READ 0x01160410 3 0>, |
| 2938 | <DCC_READ 0x011604a0 1 0>, |
| 2939 | <DCC_READ 0x011604b8 1 0>, |
| 2940 | <DCC_READ 0x01165804 1 0>, |
| 2941 | <DCC_READ 0x01166418 1 0>, |
| 2942 | <DCC_READ 0x011b2100 1 0>, |
| 2943 | <DCC_READ 0x011b6044 4 0>, |
| 2944 | <DCC_READ 0x011be030 2 0>, |
| 2945 | <DCC_READ 0x011c1000 1 0>, |
| 2946 | <DCC_READ 0x011c2028 1 0>, |
| 2947 | <DCC_READ 0x011c8058 4 0>, |
| 2948 | <DCC_READ 0x011e0410 3 0>, |
| 2949 | <DCC_READ 0x011e04a0 1 0>, |
| 2950 | <DCC_READ 0x011e04b8 1 0>, |
| 2951 | <DCC_READ 0x011e5804 1 0>, |
| 2952 | <DCC_READ 0x011e6418 1 0>, |
| 2953 | <DCC_READ 0x01232100 1 0>, |
| 2954 | <DCC_READ 0x01236044 4 0>, |
| 2955 | <DCC_READ 0x012360B0 1 0>, |
| 2956 | <DCC_READ 0x0123E030 2 0>, |
| 2957 | <DCC_READ 0x01241000 1 0>, |
| 2958 | <DCC_READ 0x01242028 1 0>, |
| 2959 | <DCC_READ 0x01248058 4 0>, |
| 2960 | <DCC_READ 0x01260410 3 0>, |
| 2961 | <DCC_READ 0x012604a0 1 0>, |
| 2962 | <DCC_READ 0x012604b8 1 0>, |
| 2963 | <DCC_READ 0x01265804 1 0>, |
| 2964 | <DCC_READ 0x01266418 1 0>, |
| 2965 | <DCC_READ 0x012b2100 1 0>, |
| 2966 | <DCC_READ 0x012b6044 3 0>, |
| 2967 | <DCC_READ 0x012b6050 1 0>, |
| 2968 | <DCC_READ 0x012b60b0 1 0>, |
| 2969 | <DCC_READ 0x012be030 2 0>, |
| 2970 | <DCC_READ 0x012c1000 1 0>, |
| 2971 | <DCC_READ 0x012c2028 1 0>, |
| 2972 | <DCC_READ 0x012c8058 4 0>, |
| 2973 | <DCC_READ 0x012e0410 3 0>, |
| 2974 | <DCC_READ 0x012e04a0 1 0>, |
| 2975 | <DCC_READ 0x012e04b8 1 0>, |
| 2976 | <DCC_READ 0x012e5804 1 0>, |
| 2977 | <DCC_READ 0x012e6418 1 0>, |
| 2978 | <DCC_READ 0x01380900 8 0>, |
| 2979 | <DCC_READ 0x01380d00 5 0>, |
| 2980 | <DCC_READ 0x01350110 4 0>, |
| 2981 | <DCC_READ 0x01430280 1 0>, |
| 2982 | <DCC_READ 0x01430288 1 0>, |
| 2983 | <DCC_READ 0x0143028c 7 0>, |
| 2984 | <DCC_READ 0x01132100 1 0>, |
| 2985 | <DCC_READ 0x01136044 4 0>, |
| 2986 | <DCC_READ 0x011360b0 1 0>, |
| 2987 | <DCC_READ 0x0113e030 2 0>, |
| 2988 | <DCC_READ 0x01141000 1 0>, |
| 2989 | <DCC_READ 0x01142028 1 0>, |
| 2990 | <DCC_READ 0x01148058 4 0>, |
| 2991 | <DCC_READ 0x01160410 3 0>, |
| 2992 | <DCC_READ 0x011604a0 1 0>, |
| 2993 | <DCC_READ 0x011604b8 1 0>, |
| 2994 | <DCC_READ 0x01165804 1 0>, |
| 2995 | <DCC_READ 0x01166418 1 0>, |
| 2996 | <DCC_READ 0x011b2100 1 0>, |
| 2997 | <DCC_READ 0x011b6044 4 0>, |
| 2998 | <DCC_READ 0x011be030 2 0>, |
| 2999 | <DCC_READ 0x011c1000 1 0>, |
| 3000 | <DCC_READ 0x011c2028 1 0>, |
| 3001 | <DCC_READ 0x011c8058 4 0>, |
| 3002 | <DCC_READ 0x011e0410 3 0>, |
| 3003 | <DCC_READ 0x011e04a0 1 0>, |
| 3004 | <DCC_READ 0x011e04b8 1 0>, |
| 3005 | <DCC_READ 0x011e5804 1 0>, |
| 3006 | <DCC_READ 0x011e6418 1 0>, |
| 3007 | <DCC_READ 0x01232100 1 0>, |
| 3008 | <DCC_READ 0x01236044 4 0>, |
| 3009 | <DCC_READ 0x012360b0 1 0>, |
| 3010 | <DCC_READ 0x0123e030 2 0>, |
| 3011 | <DCC_READ 0x01241000 1 0>, |
| 3012 | <DCC_READ 0x01242028 1 0>, |
| 3013 | <DCC_READ 0x01248058 4 0>, |
| 3014 | <DCC_READ 0x01260410 3 0>, |
| 3015 | <DCC_READ 0x012604a0 1 0>, |
| 3016 | <DCC_READ 0x012604b8 1 0>, |
| 3017 | <DCC_READ 0x01265804 1 0>, |
| 3018 | <DCC_READ 0x01266418 1 0>, |
| 3019 | <DCC_READ 0x012b2100 1 0>, |
| 3020 | <DCC_READ 0x012b6044 3 0>, |
| 3021 | <DCC_READ 0x012b6050 1 0>, |
| 3022 | <DCC_READ 0x012b60b0 1 0>, |
| 3023 | <DCC_READ 0x012be030 2 0>, |
| 3024 | <DCC_READ 0x012C1000 1 0>, |
| 3025 | <DCC_READ 0x012C2028 1 0>, |
| 3026 | <DCC_READ 0x012C8058 4 0>, |
| 3027 | <DCC_READ 0x012e0410 3 0>, |
| 3028 | <DCC_READ 0x012e04a0 1 0>, |
| 3029 | <DCC_READ 0x012e04b8 1 0>, |
| 3030 | <DCC_READ 0x012e5804 1 0>, |
| 3031 | <DCC_READ 0x012e6418 1 0>, |
| 3032 | <DCC_READ 0x01380900 8 0>, |
| 3033 | <DCC_READ 0x01380d00 5 0>, |
| 3034 | <DCC_READ 0x01350110 4 0>, |
| 3035 | <DCC_READ 0x01430280 1 0>, |
| 3036 | <DCC_READ 0x01430288 1 0>, |
| 3037 | <DCC_READ 0x0143028c 7 0>, |
| 3038 | <DCC_READ 0x0c201244 1 0>, |
| 3039 | <DCC_READ 0x0c202244 1 0>; |
Satyajit Desai | 260bd39 | 2017-02-22 10:28:02 -0800 | [diff] [blame] | 3040 | }; |
Syed Rameez Mustafa | 38ae773 | 2017-03-29 14:55:38 -0700 | [diff] [blame] | 3041 | |
| 3042 | qcom,msm-core@780000 { |
| 3043 | compatible = "qcom,apss-core-ea"; |
| 3044 | reg = <0x780000 0x1000>; |
| 3045 | }; |
Yuanyuan Liu | 2da2cc0 | 2017-04-05 18:02:58 -0700 | [diff] [blame] | 3046 | |
| 3047 | qcom,icnss@18800000 { |
| 3048 | compatible = "qcom,icnss"; |
| 3049 | reg = <0x18800000 0x800000>, |
| 3050 | <0xa0000000 0x10000000>, |
| 3051 | <0xb0000000 0x10000>; |
| 3052 | reg-names = "membase", "smmu_iova_base", "smmu_iova_ipa"; |
Patrick Daly | 0bfea05 | 2017-04-18 16:44:07 -0700 | [diff] [blame] | 3053 | iommus = <&apps_smmu 0x0040 0x1>; |
Yuanyuan Liu | 2da2cc0 | 2017-04-05 18:02:58 -0700 | [diff] [blame] | 3054 | interrupts = <0 414 0 /* CE0 */ >, |
| 3055 | <0 415 0 /* CE1 */ >, |
| 3056 | <0 416 0 /* CE2 */ >, |
| 3057 | <0 417 0 /* CE3 */ >, |
| 3058 | <0 418 0 /* CE4 */ >, |
| 3059 | <0 419 0 /* CE5 */ >, |
| 3060 | <0 420 0 /* CE6 */ >, |
| 3061 | <0 421 0 /* CE7 */ >, |
| 3062 | <0 422 0 /* CE8 */ >, |
| 3063 | <0 423 0 /* CE9 */ >, |
| 3064 | <0 424 0 /* CE10 */ >, |
| 3065 | <0 425 0 /* CE11 */ >; |
| 3066 | qcom,wlan-msa-memory = <0x100000>; |
Yuanyuan Liu | 5438b74 | 2017-05-09 17:44:47 -0700 | [diff] [blame] | 3067 | |
| 3068 | vdd-0.8-cx-mx-supply = <&pm8998_l5>; |
| 3069 | vdd-1.8-xo-supply = <&pm8998_l7>; |
| 3070 | vdd-1.3-rfa-supply = <&pm8998_l17>; |
| 3071 | vdd-3.3-ch0-supply = <&pm8998_l25>; |
| 3072 | qcom,vdd-0.8-cx-mx-config = <800000 800000>; |
| 3073 | qcom,vdd-3.3-ch0-config = <3104000 3312000>; |
Hardik Kantilal Patel | f908d6d | 2017-07-19 11:38:43 +0530 | [diff] [blame] | 3074 | qcom,smmu-s1-bypass; |
Yuanyuan Liu | 2da2cc0 | 2017-04-05 18:02:58 -0700 | [diff] [blame] | 3075 | }; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3076 | |
Manaf Meethalavalappu Pallikunhi | 5849bae | 2017-06-29 15:47:17 +0530 | [diff] [blame] | 3077 | qmi-tmd-devices { |
| 3078 | compatible = "qcom,qmi_cooling_devices"; |
| 3079 | |
| 3080 | modem { |
| 3081 | qcom,instance-id = <0x0>; |
| 3082 | |
| 3083 | modem_pa: modem_pa { |
| 3084 | qcom,qmi-dev-name = "pa"; |
| 3085 | #cooling-cells = <2>; |
| 3086 | }; |
| 3087 | |
| 3088 | modem_proc: modem_proc { |
| 3089 | qcom,qmi-dev-name = "modem"; |
| 3090 | #cooling-cells = <2>; |
| 3091 | }; |
| 3092 | |
| 3093 | modem_current: modem_current { |
| 3094 | qcom,qmi-dev-name = "modem_current"; |
| 3095 | #cooling-cells = <2>; |
| 3096 | }; |
| 3097 | |
Ram Chandrasekar | 8a67871 | 2017-09-13 16:06:09 -0600 | [diff] [blame] | 3098 | modem_skin: modem_skin { |
| 3099 | qcom,qmi-dev-name = "modem_skin"; |
| 3100 | #cooling-cells = <2>; |
| 3101 | }; |
| 3102 | |
Manaf Meethalavalappu Pallikunhi | 5849bae | 2017-06-29 15:47:17 +0530 | [diff] [blame] | 3103 | modem_vdd: modem_vdd { |
| 3104 | qcom,qmi-dev-name = "cpuv_restriction_cold"; |
| 3105 | #cooling-cells = <2>; |
| 3106 | }; |
| 3107 | }; |
| 3108 | |
| 3109 | adsp { |
| 3110 | qcom,instance-id = <0x1>; |
| 3111 | |
| 3112 | adsp_vdd: adsp_vdd { |
| 3113 | qcom,qmi-dev-name = "cpuv_restriction_cold"; |
| 3114 | #cooling-cells = <2>; |
| 3115 | }; |
| 3116 | }; |
| 3117 | |
| 3118 | cdsp { |
| 3119 | qcom,instance-id = <0x43>; |
| 3120 | |
| 3121 | cdsp_vdd: cdsp_vdd { |
| 3122 | qcom,qmi-dev-name = "cpuv_restriction_cold"; |
| 3123 | #cooling-cells = <2>; |
| 3124 | }; |
| 3125 | }; |
| 3126 | |
| 3127 | slpi { |
| 3128 | qcom,instance-id = <0x53>; |
| 3129 | |
| 3130 | slpi_vdd: slpi_vdd { |
| 3131 | qcom,qmi-dev-name = "cpuv_restriction_cold"; |
| 3132 | #cooling-cells = <2>; |
| 3133 | }; |
| 3134 | }; |
| 3135 | }; |
| 3136 | |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3137 | thermal_zones: thermal-zones { |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3138 | aoss0-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3139 | polling-delay-passive = <0>; |
| 3140 | polling-delay = <0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3141 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3142 | thermal-sensors = <&tsens0 0>; |
| 3143 | trips { |
| 3144 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3145 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3146 | hysteresis = <1000>; |
| 3147 | type = "passive"; |
| 3148 | }; |
| 3149 | }; |
| 3150 | }; |
| 3151 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3152 | cpu0-silver-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3153 | polling-delay-passive = <0>; |
| 3154 | polling-delay = <0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3155 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3156 | thermal-sensors = <&tsens0 1>; |
| 3157 | trips { |
| 3158 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3159 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3160 | hysteresis = <1000>; |
| 3161 | type = "passive"; |
| 3162 | }; |
| 3163 | }; |
| 3164 | }; |
| 3165 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3166 | cpu1-silver-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3167 | polling-delay-passive = <0>; |
| 3168 | polling-delay = <0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3169 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3170 | thermal-sensors = <&tsens0 2>; |
| 3171 | trips { |
| 3172 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3173 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3174 | hysteresis = <1000>; |
| 3175 | type = "passive"; |
| 3176 | }; |
| 3177 | }; |
| 3178 | }; |
| 3179 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3180 | cpu2-silver-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3181 | polling-delay-passive = <0>; |
| 3182 | polling-delay = <0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3183 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3184 | thermal-sensors = <&tsens0 3>; |
| 3185 | trips { |
| 3186 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3187 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3188 | hysteresis = <1000>; |
| 3189 | type = "passive"; |
| 3190 | }; |
| 3191 | }; |
| 3192 | }; |
| 3193 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3194 | cpu3-silver-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3195 | polling-delay-passive = <0>; |
| 3196 | polling-delay = <0>; |
| 3197 | thermal-sensors = <&tsens0 4>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3198 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3199 | trips { |
| 3200 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3201 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3202 | hysteresis = <1000>; |
| 3203 | type = "passive"; |
| 3204 | }; |
| 3205 | }; |
| 3206 | }; |
| 3207 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3208 | kryo-l3-0-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3209 | polling-delay-passive = <0>; |
| 3210 | polling-delay = <0>; |
| 3211 | thermal-sensors = <&tsens0 5>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3212 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3213 | trips { |
| 3214 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3215 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3216 | hysteresis = <1000>; |
| 3217 | type = "passive"; |
| 3218 | }; |
| 3219 | }; |
| 3220 | }; |
| 3221 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3222 | kryo-l3-1-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3223 | polling-delay-passive = <0>; |
| 3224 | polling-delay = <0>; |
| 3225 | thermal-sensors = <&tsens0 6>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3226 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3227 | trips { |
| 3228 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3229 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3230 | hysteresis = <1000>; |
| 3231 | type = "passive"; |
| 3232 | }; |
| 3233 | }; |
| 3234 | }; |
| 3235 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3236 | cpu0-gold-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3237 | polling-delay-passive = <0>; |
| 3238 | polling-delay = <0>; |
| 3239 | thermal-sensors = <&tsens0 7>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3240 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3241 | trips { |
| 3242 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3243 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3244 | hysteresis = <1000>; |
| 3245 | type = "passive"; |
| 3246 | }; |
| 3247 | }; |
| 3248 | }; |
| 3249 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3250 | cpu1-gold-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3251 | polling-delay-passive = <0>; |
| 3252 | polling-delay = <0>; |
| 3253 | thermal-sensors = <&tsens0 8>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3254 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3255 | trips { |
| 3256 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3257 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3258 | hysteresis = <1000>; |
| 3259 | type = "passive"; |
| 3260 | }; |
| 3261 | }; |
| 3262 | }; |
| 3263 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3264 | cpu2-gold-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3265 | polling-delay-passive = <0>; |
| 3266 | polling-delay = <0>; |
| 3267 | thermal-sensors = <&tsens0 9>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3268 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3269 | trips { |
| 3270 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3271 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3272 | hysteresis = <1000>; |
| 3273 | type = "passive"; |
| 3274 | }; |
| 3275 | }; |
| 3276 | }; |
| 3277 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3278 | cpu3-gold-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3279 | polling-delay-passive = <0>; |
| 3280 | polling-delay = <0>; |
| 3281 | thermal-sensors = <&tsens0 10>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3282 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3283 | trips { |
| 3284 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3285 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3286 | hysteresis = <1000>; |
| 3287 | type = "passive"; |
| 3288 | }; |
| 3289 | }; |
| 3290 | }; |
| 3291 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3292 | gpu0-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3293 | polling-delay-passive = <0>; |
| 3294 | polling-delay = <0>; |
| 3295 | thermal-sensors = <&tsens0 11>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3296 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3297 | trips { |
| 3298 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3299 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3300 | hysteresis = <1000>; |
| 3301 | type = "passive"; |
| 3302 | }; |
| 3303 | }; |
| 3304 | }; |
| 3305 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3306 | gpu1-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3307 | polling-delay-passive = <0>; |
| 3308 | polling-delay = <0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3309 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3310 | thermal-sensors = <&tsens0 12>; |
| 3311 | trips { |
| 3312 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3313 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3314 | hysteresis = <1000>; |
| 3315 | type = "passive"; |
| 3316 | }; |
| 3317 | }; |
| 3318 | }; |
| 3319 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3320 | aoss1-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3321 | polling-delay-passive = <0>; |
| 3322 | polling-delay = <0>; |
| 3323 | thermal-sensors = <&tsens1 0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3324 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3325 | trips { |
| 3326 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3327 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3328 | hysteresis = <1000>; |
| 3329 | type = "passive"; |
| 3330 | }; |
| 3331 | }; |
| 3332 | }; |
| 3333 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3334 | mdm-dsp-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3335 | polling-delay-passive = <0>; |
| 3336 | polling-delay = <0>; |
| 3337 | thermal-sensors = <&tsens1 1>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3338 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3339 | trips { |
| 3340 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3341 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3342 | hysteresis = <1000>; |
| 3343 | type = "passive"; |
| 3344 | }; |
| 3345 | }; |
| 3346 | }; |
| 3347 | |
| 3348 | |
| 3349 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3350 | ddr-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3351 | polling-delay-passive = <0>; |
| 3352 | polling-delay = <0>; |
| 3353 | thermal-sensors = <&tsens1 2>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3354 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3355 | trips { |
| 3356 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3357 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3358 | hysteresis = <1000>; |
| 3359 | type = "passive"; |
| 3360 | }; |
| 3361 | }; |
| 3362 | }; |
| 3363 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3364 | wlan-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3365 | polling-delay-passive = <0>; |
| 3366 | polling-delay = <0>; |
| 3367 | thermal-sensors = <&tsens1 3>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3368 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3369 | trips { |
| 3370 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3371 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3372 | hysteresis = <1000>; |
| 3373 | type = "passive"; |
| 3374 | }; |
| 3375 | }; |
| 3376 | }; |
| 3377 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3378 | compute-hvx-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3379 | polling-delay-passive = <0>; |
| 3380 | polling-delay = <0>; |
| 3381 | thermal-sensors = <&tsens1 4>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3382 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3383 | trips { |
| 3384 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3385 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3386 | hysteresis = <1000>; |
| 3387 | type = "passive"; |
| 3388 | }; |
| 3389 | }; |
| 3390 | }; |
| 3391 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3392 | camera-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3393 | polling-delay-passive = <0>; |
| 3394 | polling-delay = <0>; |
| 3395 | thermal-sensors = <&tsens1 5>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3396 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3397 | trips { |
| 3398 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3399 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3400 | hysteresis = <1000>; |
| 3401 | type = "passive"; |
| 3402 | }; |
| 3403 | }; |
| 3404 | }; |
| 3405 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3406 | mmss-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3407 | polling-delay-passive = <0>; |
| 3408 | polling-delay = <0>; |
| 3409 | thermal-sensors = <&tsens1 6>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3410 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3411 | trips { |
| 3412 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3413 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3414 | hysteresis = <1000>; |
| 3415 | type = "passive"; |
| 3416 | }; |
| 3417 | }; |
| 3418 | }; |
| 3419 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3420 | mdm-core-usr { |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3421 | polling-delay-passive = <0>; |
| 3422 | polling-delay = <0>; |
| 3423 | thermal-sensors = <&tsens1 7>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3424 | thermal-governor = "user_space"; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3425 | trips { |
| 3426 | active-config0 { |
Ram Chandrasekar | a6e5177 | 2017-05-18 16:23:54 -0600 | [diff] [blame] | 3427 | temperature = <125000>; |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3428 | hysteresis = <1000>; |
| 3429 | type = "passive"; |
| 3430 | }; |
| 3431 | }; |
| 3432 | }; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3433 | |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3434 | gpu-virt-max-step { |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3435 | polling-delay-passive = <10>; |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3436 | polling-delay = <100>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3437 | thermal-governor = "step_wise"; |
| 3438 | trips { |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3439 | gpu_trip0: gpu-trip0 { |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3440 | temperature = <95000>; |
| 3441 | hysteresis = <0>; |
| 3442 | type = "passive"; |
| 3443 | }; |
| 3444 | }; |
| 3445 | cooling-maps { |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3446 | gpu_cdev0 { |
| 3447 | trip = <&gpu_trip0>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3448 | cooling-device = |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3449 | <&msm_gpu 0 THERMAL_NO_LIMIT>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3450 | }; |
| 3451 | }; |
| 3452 | }; |
| 3453 | |
Ram Chandrasekar | debcd41 | 2017-06-23 13:47:38 -0600 | [diff] [blame] | 3454 | silv-virt-max-step { |
| 3455 | polling-delay-passive = <0>; |
| 3456 | polling-delay = <0>; |
| 3457 | thermal-governor = "step_wise"; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3458 | trips { |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3459 | silver-trip { |
| 3460 | temperature = <120000>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3461 | hysteresis = <0>; |
| 3462 | type = "passive"; |
| 3463 | }; |
| 3464 | }; |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3465 | }; |
| 3466 | |
Ram Chandrasekar | debcd41 | 2017-06-23 13:47:38 -0600 | [diff] [blame] | 3467 | gold-virt-max-step { |
| 3468 | polling-delay-passive = <0>; |
| 3469 | polling-delay = <0>; |
| 3470 | thermal-governor = "step_wise"; |
Ram Chandrasekar | b4392bf | 2017-05-15 16:04:03 -0600 | [diff] [blame] | 3471 | trips { |
| 3472 | gold-trip { |
| 3473 | temperature = <120000>; |
| 3474 | hysteresis = <0>; |
| 3475 | type = "passive"; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3476 | }; |
| 3477 | }; |
| 3478 | }; |
| 3479 | |
Siddartha Mohanadoss | d550ea4 | 2017-05-12 10:03:17 -0700 | [diff] [blame] | 3480 | pop-mem-step { |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3481 | polling-delay-passive = <10>; |
| 3482 | polling-delay = <0>; |
| 3483 | thermal-sensors = <&tsens1 2>; |
| 3484 | thermal-governor = "step_wise"; |
| 3485 | trips { |
| 3486 | pop_trip: pop-trip { |
| 3487 | temperature = <95000>; |
| 3488 | hysteresis = <0>; |
| 3489 | type = "passive"; |
| 3490 | }; |
| 3491 | }; |
| 3492 | cooling-maps { |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 3493 | pop_cdev4 { |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3494 | trip = <&pop_trip>; |
| 3495 | cooling-device = |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 3496 | <&CPU4 THERMAL_NO_LIMIT |
| 3497 | (THERMAL_MAX_LIMIT-1)>; |
| 3498 | }; |
| 3499 | pop_cdev5 { |
| 3500 | trip = <&pop_trip>; |
| 3501 | cooling-device = |
| 3502 | <&CPU5 THERMAL_NO_LIMIT |
| 3503 | (THERMAL_MAX_LIMIT-1)>; |
| 3504 | }; |
| 3505 | pop_cdev6 { |
| 3506 | trip = <&pop_trip>; |
| 3507 | cooling-device = |
| 3508 | <&CPU6 THERMAL_NO_LIMIT |
| 3509 | (THERMAL_MAX_LIMIT-1)>; |
| 3510 | }; |
| 3511 | pop_cdev7 { |
| 3512 | trip = <&pop_trip>; |
| 3513 | cooling-device = |
| 3514 | <&CPU7 THERMAL_NO_LIMIT |
| 3515 | (THERMAL_MAX_LIMIT-1)>; |
Ram Chandrasekar | 36ffe55 | 2017-04-17 16:33:05 -0600 | [diff] [blame] | 3516 | }; |
| 3517 | }; |
| 3518 | }; |
| 3519 | |
Ram Chandrasekar | b9880e4 | 2017-11-17 16:19:27 -0700 | [diff] [blame] | 3520 | cpu0-silver-step { |
| 3521 | polling-delay-passive = <100>; |
| 3522 | polling-delay = <0>; |
| 3523 | thermal-sensors = <&tsens0 1>; |
| 3524 | thermal-governor = "step_wise"; |
| 3525 | trips { |
| 3526 | emerg_config0: emerg-config0 { |
| 3527 | temperature = <110000>; |
| 3528 | hysteresis = <10000>; |
| 3529 | type = "passive"; |
| 3530 | }; |
| 3531 | }; |
| 3532 | cooling-maps { |
| 3533 | emerg_cdev0 { |
| 3534 | trip = <&emerg_config0>; |
| 3535 | cooling-device = |
| 3536 | <&CPU0 THERMAL_MAX_LIMIT |
| 3537 | THERMAL_MAX_LIMIT>; |
| 3538 | }; |
| 3539 | }; |
| 3540 | }; |
| 3541 | |
| 3542 | cpu1-silver-step { |
| 3543 | polling-delay-passive = <100>; |
| 3544 | polling-delay = <0>; |
| 3545 | thermal-sensors = <&tsens0 2>; |
| 3546 | thermal-governor = "step_wise"; |
| 3547 | trips { |
| 3548 | emerg_config1: emerg-config1 { |
| 3549 | temperature = <110000>; |
| 3550 | hysteresis = <10000>; |
| 3551 | type = "passive"; |
| 3552 | }; |
| 3553 | }; |
| 3554 | cooling-maps { |
| 3555 | emerg_cdev1 { |
| 3556 | trip = <&emerg_config1>; |
| 3557 | cooling-device = |
| 3558 | <&CPU1 THERMAL_MAX_LIMIT |
| 3559 | THERMAL_MAX_LIMIT>; |
| 3560 | }; |
| 3561 | }; |
| 3562 | }; |
| 3563 | |
| 3564 | cpu2-silver-step { |
| 3565 | polling-delay-passive = <100>; |
| 3566 | polling-delay = <0>; |
| 3567 | thermal-sensors = <&tsens0 3>; |
| 3568 | thermal-governor = "step_wise"; |
| 3569 | trips { |
| 3570 | emerg_config2: emerg-config2 { |
| 3571 | temperature = <110000>; |
| 3572 | hysteresis = <10000>; |
| 3573 | type = "passive"; |
| 3574 | }; |
| 3575 | }; |
| 3576 | cooling-maps { |
| 3577 | emerg_cdev2 { |
| 3578 | trip = <&emerg_config2>; |
| 3579 | cooling-device = |
| 3580 | <&CPU2 THERMAL_MAX_LIMIT |
| 3581 | THERMAL_MAX_LIMIT>; |
| 3582 | }; |
| 3583 | }; |
| 3584 | }; |
| 3585 | |
| 3586 | cpu3-silver-step { |
| 3587 | polling-delay-passive = <100>; |
| 3588 | polling-delay = <0>; |
| 3589 | thermal-sensors = <&tsens0 4>; |
| 3590 | thermal-governor = "step_wise"; |
| 3591 | trips { |
| 3592 | emerg_config3: emerg-config3 { |
| 3593 | temperature = <110000>; |
| 3594 | hysteresis = <10000>; |
| 3595 | type = "passive"; |
| 3596 | }; |
| 3597 | }; |
| 3598 | cooling-maps { |
| 3599 | emerg_cdev3 { |
| 3600 | trip = <&emerg_config3>; |
| 3601 | cooling-device = |
| 3602 | <&CPU3 THERMAL_MAX_LIMIT |
| 3603 | THERMAL_MAX_LIMIT>; |
| 3604 | }; |
| 3605 | }; |
| 3606 | }; |
| 3607 | |
| 3608 | cpu0-gold-step { |
| 3609 | polling-delay-passive = <100>; |
| 3610 | polling-delay = <0>; |
| 3611 | thermal-sensors = <&tsens0 7>; |
| 3612 | thermal-governor = "step_wise"; |
| 3613 | trips { |
| 3614 | emerg_config4: emerg-config4 { |
| 3615 | temperature = <110000>; |
| 3616 | hysteresis = <10000>; |
| 3617 | type = "passive"; |
| 3618 | }; |
| 3619 | }; |
| 3620 | cooling-maps { |
| 3621 | emerg_cdev4 { |
| 3622 | trip = <&emerg_config4>; |
| 3623 | cooling-device = |
| 3624 | <&CPU4 THERMAL_MAX_LIMIT |
| 3625 | THERMAL_MAX_LIMIT>; |
| 3626 | }; |
| 3627 | }; |
| 3628 | }; |
| 3629 | |
| 3630 | cpu1-gold-step { |
| 3631 | polling-delay-passive = <100>; |
| 3632 | polling-delay = <0>; |
| 3633 | thermal-sensors = <&tsens0 8>; |
| 3634 | thermal-governor = "step_wise"; |
| 3635 | trips { |
| 3636 | emerg_config5: emerg-config5 { |
| 3637 | temperature = <110000>; |
| 3638 | hysteresis = <10000>; |
| 3639 | type = "passive"; |
| 3640 | }; |
| 3641 | }; |
| 3642 | cooling-maps { |
| 3643 | emerg_cdev5 { |
| 3644 | trip = <&emerg_config5>; |
| 3645 | cooling-device = |
| 3646 | <&CPU5 THERMAL_MAX_LIMIT |
| 3647 | THERMAL_MAX_LIMIT>; |
| 3648 | }; |
| 3649 | }; |
| 3650 | }; |
| 3651 | |
| 3652 | cpu2-gold-step { |
| 3653 | polling-delay-passive = <100>; |
| 3654 | polling-delay = <0>; |
| 3655 | thermal-sensors = <&tsens0 9>; |
| 3656 | thermal-governor = "step_wise"; |
| 3657 | trips { |
| 3658 | emerg_config6: emerg-config6 { |
| 3659 | temperature = <110000>; |
| 3660 | hysteresis = <10000>; |
| 3661 | type = "passive"; |
| 3662 | }; |
| 3663 | }; |
| 3664 | cooling-maps { |
| 3665 | emerg_cdev6 { |
| 3666 | trip = <&emerg_config6>; |
| 3667 | cooling-device = |
| 3668 | <&CPU6 THERMAL_MAX_LIMIT |
| 3669 | THERMAL_MAX_LIMIT>; |
| 3670 | }; |
| 3671 | }; |
| 3672 | }; |
| 3673 | |
| 3674 | cpu3-gold-step { |
| 3675 | polling-delay-passive = <100>; |
| 3676 | polling-delay = <0>; |
| 3677 | thermal-sensors = <&tsens0 10>; |
| 3678 | thermal-governor = "step_wise"; |
| 3679 | trips { |
| 3680 | emerg_config7: emerg-config7 { |
| 3681 | temperature = <110000>; |
| 3682 | hysteresis = <10000>; |
| 3683 | type = "passive"; |
| 3684 | }; |
| 3685 | }; |
| 3686 | cooling-maps { |
| 3687 | emerg_cdev7 { |
| 3688 | trip = <&emerg_config7>; |
| 3689 | cooling-device = |
| 3690 | <&CPU7 THERMAL_MAX_LIMIT |
| 3691 | THERMAL_MAX_LIMIT>; |
| 3692 | }; |
| 3693 | }; |
| 3694 | }; |
| 3695 | |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 3696 | lmh-dcvs-01 { |
| 3697 | polling-delay-passive = <0>; |
| 3698 | polling-delay = <0>; |
| 3699 | thermal-governor = "user_space"; |
| 3700 | thermal-sensors = <&lmh_dcvs1>; |
| 3701 | |
| 3702 | trips { |
| 3703 | active-config { |
| 3704 | temperature = <95000>; |
| 3705 | hysteresis = <30000>; |
| 3706 | type = "passive"; |
| 3707 | }; |
| 3708 | }; |
| 3709 | }; |
| 3710 | |
| 3711 | lmh-dcvs-00 { |
| 3712 | polling-delay-passive = <0>; |
| 3713 | polling-delay = <0>; |
| 3714 | thermal-governor = "user_space"; |
| 3715 | thermal-sensors = <&lmh_dcvs0>; |
| 3716 | |
| 3717 | trips { |
| 3718 | active-config { |
| 3719 | temperature = <95000>; |
| 3720 | hysteresis = <30000>; |
| 3721 | type = "passive"; |
| 3722 | }; |
| 3723 | }; |
| 3724 | }; |
| 3725 | |
Siddartha Mohanadoss | 5495704 | 2017-04-10 11:03:16 -0700 | [diff] [blame] | 3726 | }; |
| 3727 | |
| 3728 | tsens0: tsens@c222000 { |
| 3729 | compatible = "qcom,sdm845-tsens"; |
| 3730 | reg = <0xc222000 0x4>, |
| 3731 | <0xc263000 0x1ff>; |
| 3732 | reg-names = "tsens_srot_physical", |
| 3733 | "tsens_tm_physical"; |
| 3734 | interrupts = <0 506 0>, <0 508 0>; |
| 3735 | interrupt-names = "tsens-upper-lower", "tsens-critical"; |
| 3736 | #thermal-sensor-cells = <1>; |
| 3737 | }; |
| 3738 | |
| 3739 | tsens1: tsens@c223000 { |
| 3740 | compatible = "qcom,sdm845-tsens"; |
| 3741 | reg = <0xc223000 0x4>, |
| 3742 | <0xc265000 0x1ff>; |
| 3743 | reg-names = "tsens_srot_physical", |
| 3744 | "tsens_tm_physical"; |
| 3745 | interrupts = <0 507 0>, <0 509 0>; |
| 3746 | interrupt-names = "tsens-upper-lower", "tsens-critical"; |
| 3747 | #thermal-sensor-cells = <1>; |
| 3748 | }; |
Sujeev Dias | 2bf23ec | 2017-05-05 19:40:31 -0700 | [diff] [blame] | 3749 | |
Satyajit Desai | 89c4e2e | 2017-05-11 19:34:47 -0700 | [diff] [blame] | 3750 | mem_dump { |
| 3751 | compatible = "qcom,mem-dump"; |
| 3752 | memory-region = <&dump_mem>; |
| 3753 | |
| 3754 | rpmh_dump { |
| 3755 | qcom,dump-size = <0x2000000>; |
| 3756 | qcom,dump-id = <0xec>; |
| 3757 | }; |
| 3758 | |
Channagoud Kadabi | 1b95f20 | 2017-11-06 11:38:23 -0800 | [diff] [blame] | 3759 | fcm_dump { |
| 3760 | qcom,dump-size = <0x400>; |
| 3761 | qcom,dump-id = <0xee>; |
| 3762 | }; |
| 3763 | |
Satyajit Desai | 89c4e2e | 2017-05-11 19:34:47 -0700 | [diff] [blame] | 3764 | rpm_sw_dump { |
| 3765 | qcom,dump-size = <0x28000>; |
| 3766 | qcom,dump-id = <0xea>; |
| 3767 | }; |
| 3768 | |
| 3769 | pmic_dump { |
| 3770 | qcom,dump-size = <0x10000>; |
| 3771 | qcom,dump-id = <0xe4>; |
| 3772 | }; |
| 3773 | |
| 3774 | tmc_etf_dump { |
| 3775 | qcom,dump-size = <0x10000>; |
| 3776 | qcom,dump-id = <0xf0>; |
| 3777 | }; |
| 3778 | |
| 3779 | tmc_etf_swao_dump { |
| 3780 | qcom,dump-size = <0x8400>; |
| 3781 | qcom,dump-id = <0xf1>; |
| 3782 | }; |
| 3783 | |
Satyajit Desai | 99df43f | 2017-05-25 17:49:54 -0700 | [diff] [blame] | 3784 | tmc_etr_reg_dump { |
| 3785 | qcom,dump-size = <0x1000>; |
| 3786 | qcom,dump-id = <0x100>; |
| 3787 | }; |
| 3788 | |
| 3789 | tmc_etf_reg_dump { |
| 3790 | qcom,dump-size = <0x1000>; |
| 3791 | qcom,dump-id = <0x101>; |
| 3792 | }; |
| 3793 | |
| 3794 | tmc_etf_swao_reg_dump { |
| 3795 | qcom,dump-size = <0x1000>; |
| 3796 | qcom,dump-id = <0x102>; |
| 3797 | }; |
| 3798 | |
Satyajit Desai | 89c4e2e | 2017-05-11 19:34:47 -0700 | [diff] [blame] | 3799 | misc_data_dump { |
| 3800 | qcom,dump-size = <0x1000>; |
| 3801 | qcom,dump-id = <0xe8>; |
| 3802 | }; |
Satyajit Desai | 6729c4a | 2017-10-26 15:22:41 -0700 | [diff] [blame] | 3803 | |
| 3804 | tpdm_swao_dump { |
| 3805 | qcom,dump-size = <0x512>; |
| 3806 | qcom,dump-id = <0xf2>; |
| 3807 | }; |
Satyajit Desai | 89c4e2e | 2017-05-11 19:34:47 -0700 | [diff] [blame] | 3808 | }; |
| 3809 | |
Sujeev Dias | 2bf23ec | 2017-05-05 19:40:31 -0700 | [diff] [blame] | 3810 | gpi_dma0: qcom,gpi-dma@0x800000 { |
Sujeev Dias | dfe09e1 | 2017-08-31 18:31:04 -0700 | [diff] [blame] | 3811 | #dma-cells = <5>; |
Sujeev Dias | 2bf23ec | 2017-05-05 19:40:31 -0700 | [diff] [blame] | 3812 | compatible = "qcom,gpi-dma"; |
| 3813 | reg = <0x800000 0x60000>; |
| 3814 | reg-names = "gpi-top"; |
| 3815 | interrupts = <0 244 0>, <0 245 0>, <0 246 0>, <0 247 0>, |
| 3816 | <0 248 0>, <0 249 0>, <0 250 0>, <0 251 0>, |
| 3817 | <0 252 0>, <0 253 0>, <0 254 0>, <0 255 0>, |
| 3818 | <0 256 0>; |
| 3819 | qcom,max-num-gpii = <13>; |
| 3820 | qcom,gpii-mask = <0xfa>; |
| 3821 | qcom,ev-factor = <2>; |
| 3822 | iommus = <&apps_smmu 0x0016 0x0>; |
Sujeev Dias | 6948421 | 2017-08-31 10:06:53 -0700 | [diff] [blame] | 3823 | qcom,smmu-cfg = <0x1>; |
| 3824 | qcom,iova-range = <0x0 0x100000 0x0 0x100000>; |
Sujeev Dias | 2bf23ec | 2017-05-05 19:40:31 -0700 | [diff] [blame] | 3825 | status = "ok"; |
| 3826 | }; |
| 3827 | |
| 3828 | gpi_dma1: qcom,gpi-dma@0xa00000 { |
Sujeev Dias | dfe09e1 | 2017-08-31 18:31:04 -0700 | [diff] [blame] | 3829 | #dma-cells = <5>; |
Sujeev Dias | 2bf23ec | 2017-05-05 19:40:31 -0700 | [diff] [blame] | 3830 | compatible = "qcom,gpi-dma"; |
| 3831 | reg = <0xa00000 0x60000>; |
| 3832 | reg-names = "gpi-top"; |
| 3833 | interrupts = <0 279 0>, <0 280 0>, <0 281 0>, <0 282 0>, |
| 3834 | <0 283 0>, <0 284 0>, <0 293 0>, <0 294 0>, |
| 3835 | <0 295 0>, <0 296 0>, <0 297 0>, <0 298 0>, |
| 3836 | <0 299 0>; |
| 3837 | qcom,max-num-gpii = <13>; |
| 3838 | qcom,gpii-mask = <0xfa>; |
| 3839 | qcom,ev-factor = <2>; |
| 3840 | iommus = <&apps_smmu 0x06d6 0x0>; |
Sujeev Dias | 6948421 | 2017-08-31 10:06:53 -0700 | [diff] [blame] | 3841 | qcom,smmu-cfg = <0x1>; |
| 3842 | qcom,iova-range = <0x0 0x100000 0x0 0x100000>; |
Sujeev Dias | 2bf23ec | 2017-05-05 19:40:31 -0700 | [diff] [blame] | 3843 | status = "ok"; |
| 3844 | }; |
Udaya Bhaskara Reddy Mallavarapu | 55ef0cb | 2017-06-12 14:45:28 +0530 | [diff] [blame] | 3845 | |
| 3846 | tspp: msm_tspp@0x8880000 { |
| 3847 | compatible = "qcom,msm_tspp"; |
| 3848 | reg = <0x088a7000 0x200>, /* MSM_TSIF0_PHYS */ |
| 3849 | <0x088a8000 0x200>, /* MSM_TSIF1_PHYS */ |
| 3850 | <0x088a9000 0x1000>, /* MSM_TSPP_PHYS */ |
| 3851 | <0x08884000 0x23000>; /* MSM_TSPP_BAM_PHYS */ |
| 3852 | reg-names = "MSM_TSIF0_PHYS", |
| 3853 | "MSM_TSIF1_PHYS", |
| 3854 | "MSM_TSPP_PHYS", |
| 3855 | "MSM_TSPP_BAM_PHYS"; |
| 3856 | interrupts = <0 121 0>, /* TSIF_TSPP_IRQ */ |
| 3857 | <0 119 0>, /* TSIF0_IRQ */ |
| 3858 | <0 120 0>, /* TSIF1_IRQ */ |
| 3859 | <0 122 0>; /* TSIF_BAM_IRQ */ |
| 3860 | interrupt-names = "TSIF_TSPP_IRQ", |
| 3861 | "TSIF0_IRQ", |
| 3862 | "TSIF1_IRQ", |
| 3863 | "TSIF_BAM_IRQ"; |
| 3864 | |
| 3865 | clock-names = "iface_clk", "ref_clk"; |
| 3866 | clocks = <&clock_gcc GCC_TSIF_AHB_CLK>, |
| 3867 | <&clock_gcc GCC_TSIF_REF_CLK>; |
| 3868 | |
| 3869 | qcom,msm-bus,name = "tsif"; |
| 3870 | qcom,msm-bus,num-cases = <2>; |
| 3871 | qcom,msm-bus,num-paths = <1>; |
| 3872 | qcom,msm-bus,vectors-KBps = |
| 3873 | <82 512 0 0>, /* No vote */ |
| 3874 | <82 512 12288 24576>; |
| 3875 | /* Max. bandwidth, 2xTSIF, each max of 96Mbps */ |
| 3876 | |
| 3877 | pinctrl-names = "disabled", |
| 3878 | "tsif0-mode1", "tsif0-mode2", |
| 3879 | "tsif1-mode1", "tsif1-mode2", |
| 3880 | "dual-tsif-mode1", "dual-tsif-mode2"; |
| 3881 | |
| 3882 | pinctrl-0 = <>; /* disabled */ |
| 3883 | pinctrl-1 = <&tsif0_signals_active>; /* tsif0-mode1 */ |
| 3884 | pinctrl-2 = <&tsif0_signals_active |
| 3885 | &tsif0_sync_active>; /* tsif0-mode2 */ |
| 3886 | pinctrl-3 = <&tsif1_signals_active>; /* tsif1-mode1 */ |
| 3887 | pinctrl-4 = <&tsif1_signals_active |
| 3888 | &tsif1_sync_active>; /* tsif1-mode2 */ |
| 3889 | pinctrl-5 = <&tsif0_signals_active |
| 3890 | &tsif1_signals_active>; /* dual-tsif-mode1 */ |
| 3891 | pinctrl-6 = <&tsif0_signals_active |
| 3892 | &tsif0_sync_active |
| 3893 | &tsif1_signals_active |
| 3894 | &tsif1_sync_active>; /* dual-tsif-mode2 */ |
Udaya Bhaskara Reddy Mallavarapu | 07bd073 | 2017-07-27 16:37:54 +0530 | [diff] [blame] | 3895 | |
| 3896 | qcom,smmu-s1-bypass; |
| 3897 | iommus = <&apps_smmu 0x20 0x0f>; |
Udaya Bhaskara Reddy Mallavarapu | 55ef0cb | 2017-06-12 14:45:28 +0530 | [diff] [blame] | 3898 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 3899 | }; |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 3900 | |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 3901 | &clock_cpucc { |
| 3902 | lmh_dcvs0: qcom,limits-dcvs@0 { |
| 3903 | compatible = "qcom,msm-hw-limits"; |
Ram Chandrasekar | 2d99658 | 2017-05-05 12:02:07 -0600 | [diff] [blame] | 3904 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 3905 | qcom,affinity = <0>; |
| 3906 | #thermal-sensor-cells = <0>; |
| 3907 | }; |
| 3908 | |
| 3909 | lmh_dcvs1: qcom,limits-dcvs@1 { |
| 3910 | compatible = "qcom,msm-hw-limits"; |
Ram Chandrasekar | 2d99658 | 2017-05-05 12:02:07 -0600 | [diff] [blame] | 3911 | interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 3912 | qcom,affinity = <1>; |
| 3913 | #thermal-sensor-cells = <0>; |
Ram Chandrasekar | 302184f | 2017-08-14 11:27:14 -0600 | [diff] [blame] | 3914 | isens_vref-supply = <&pm8998_l1_ao>; |
| 3915 | isens-vref-settings = <880000 880000 20000>; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 3916 | }; |
Maya Erez | 6e14acb | 2017-05-16 09:59:02 +0300 | [diff] [blame] | 3917 | |
| 3918 | wil6210: qcom,wil6210 { |
| 3919 | compatible = "qcom,wil6210"; |
| 3920 | qcom,pcie-parent = <&pcie0>; |
| 3921 | qcom,wigig-en = <&tlmm 39 0>; |
| 3922 | qcom,msm-bus,name = "wil6210"; |
| 3923 | qcom,msm-bus,num-cases = <2>; |
| 3924 | qcom,msm-bus,num-paths = <1>; |
| 3925 | qcom,msm-bus,vectors-KBps = |
| 3926 | <45 512 0 0>, |
| 3927 | <45 512 600000 800000>; /* ~4.6Gbps (MCS12) */ |
| 3928 | qcom,use-ext-supply; |
| 3929 | vdd-supply= <&pm8998_s7>; |
| 3930 | vddio-supply= <&pm8998_s5>; |
| 3931 | qcom,use-ext-clocks; |
| 3932 | clocks = <&clock_rpmh RPMH_RF_CLK3>, |
| 3933 | <&clock_rpmh RPMH_RF_CLK3_A>; |
| 3934 | clock-names = "rf_clk3_clk", "rf_clk3_pin_clk"; |
| 3935 | qcom,smmu-support; |
Alexei Avshalom Lazar | e6a2ffc | 2017-09-24 14:12:42 +0300 | [diff] [blame] | 3936 | qcom,smmu-mapping = <0x20000000 0xe0000000>; |
| 3937 | qcom,smmu-s1-en; |
| 3938 | qcom,smmu-fast-map; |
| 3939 | qcom,smmu-coherent; |
Maya Erez | dea3d79 | 2017-06-08 09:20:07 +0300 | [diff] [blame] | 3940 | qcom,keep-radio-on-during-sleep; |
Maya Erez | 6e14acb | 2017-05-16 09:59:02 +0300 | [diff] [blame] | 3941 | status = "disabled"; |
| 3942 | }; |
Ram Chandrasekar | 16ba4f4 | 2017-04-17 16:48:46 -0600 | [diff] [blame] | 3943 | }; |
| 3944 | |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 3945 | &pcie_0_gdsc { |
| 3946 | status = "ok"; |
| 3947 | }; |
| 3948 | |
| 3949 | &pcie_1_gdsc { |
| 3950 | status = "ok"; |
| 3951 | }; |
| 3952 | |
| 3953 | &ufs_card_gdsc { |
| 3954 | status = "ok"; |
| 3955 | }; |
| 3956 | |
| 3957 | &ufs_phy_gdsc { |
| 3958 | status = "ok"; |
| 3959 | }; |
| 3960 | |
| 3961 | &usb30_prim_gdsc { |
| 3962 | status = "ok"; |
| 3963 | }; |
| 3964 | |
| 3965 | &usb30_sec_gdsc { |
| 3966 | status = "ok"; |
| 3967 | }; |
| 3968 | |
| 3969 | &hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc { |
| 3970 | status = "ok"; |
| 3971 | }; |
| 3972 | |
| 3973 | &hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc { |
| 3974 | status = "ok"; |
| 3975 | }; |
| 3976 | |
| 3977 | &hlos1_vote_aggre_noc_mmu_tbu1_gdsc { |
| 3978 | status = "ok"; |
| 3979 | }; |
| 3980 | |
| 3981 | &hlos1_vote_aggre_noc_mmu_tbu2_gdsc { |
| 3982 | status = "ok"; |
| 3983 | }; |
| 3984 | |
| 3985 | &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc { |
| 3986 | status = "ok"; |
| 3987 | }; |
| 3988 | |
| 3989 | &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc { |
| 3990 | status = "ok"; |
| 3991 | }; |
| 3992 | |
| 3993 | &hlos1_vote_mmnoc_mmu_tbu_sf_gdsc { |
| 3994 | status = "ok"; |
| 3995 | }; |
| 3996 | |
| 3997 | &bps_gdsc { |
Deepak Katragadda | 38f645b | 2017-06-29 12:16:06 -0700 | [diff] [blame] | 3998 | qcom,support-hw-trigger; |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 3999 | status = "ok"; |
| 4000 | }; |
| 4001 | |
| 4002 | &ife_0_gdsc { |
| 4003 | status = "ok"; |
| 4004 | }; |
| 4005 | |
| 4006 | &ife_1_gdsc { |
| 4007 | status = "ok"; |
| 4008 | }; |
| 4009 | |
| 4010 | &ipe_0_gdsc { |
Deepak Katragadda | 38f645b | 2017-06-29 12:16:06 -0700 | [diff] [blame] | 4011 | qcom,support-hw-trigger; |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 4012 | status = "ok"; |
| 4013 | }; |
| 4014 | |
| 4015 | &ipe_1_gdsc { |
Deepak Katragadda | 38f645b | 2017-06-29 12:16:06 -0700 | [diff] [blame] | 4016 | qcom,support-hw-trigger; |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 4017 | status = "ok"; |
| 4018 | }; |
| 4019 | |
| 4020 | &titan_top_gdsc { |
| 4021 | status = "ok"; |
| 4022 | }; |
| 4023 | |
| 4024 | &mdss_core_gdsc { |
| 4025 | status = "ok"; |
| 4026 | }; |
| 4027 | |
| 4028 | &gpu_cx_gdsc { |
| 4029 | status = "ok"; |
| 4030 | }; |
| 4031 | |
Deepak Katragadda | 8d77fbb | 2016-10-17 13:04:17 -0700 | [diff] [blame] | 4032 | &gpu_gx_gdsc { |
Deepak Katragadda | 6c7e8e1 | 2017-04-05 13:21:16 -0700 | [diff] [blame] | 4033 | clock-names = "core_root_clk"; |
| 4034 | clocks = <&clock_gfx GPU_CC_GX_GFX3D_CLK_SRC>; |
| 4035 | qcom,force-enable-root-clk; |
Deepak Katragadda | 8d77fbb | 2016-10-17 13:04:17 -0700 | [diff] [blame] | 4036 | parent-supply = <&pm8005_s1_level>; |
| 4037 | status = "ok"; |
| 4038 | }; |
| 4039 | |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 4040 | &vcodec0_gdsc { |
Deepak Katragadda | cd267d0 | 2017-05-17 11:38:39 -0700 | [diff] [blame] | 4041 | qcom,support-hw-trigger; |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 4042 | status = "ok"; |
| 4043 | }; |
| 4044 | |
| 4045 | &vcodec1_gdsc { |
Deepak Katragadda | cd267d0 | 2017-05-17 11:38:39 -0700 | [diff] [blame] | 4046 | qcom,support-hw-trigger; |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 4047 | status = "ok"; |
| 4048 | }; |
| 4049 | |
| 4050 | &venus_gdsc { |
| 4051 | status = "ok"; |
| 4052 | }; |
David Collins | 5ab42b9 | 2016-07-07 17:38:51 -0700 | [diff] [blame] | 4053 | |
David Collins | 516e41e | 2017-03-10 11:58:17 -0800 | [diff] [blame] | 4054 | #include "pm8998.dtsi" |
David Collins | 516e41e | 2017-03-10 11:58:17 -0800 | [diff] [blame] | 4055 | #include "pm8005.dtsi" |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 4056 | #include "sdm845-regulator.dtsi" |
| 4057 | #include "sdm845-coresight.dtsi" |
| 4058 | #include "msm-arm-smmu-sdm845.dtsi" |
| 4059 | #include "sdm845-ion.dtsi" |
| 4060 | #include "sdm845-smp2p.dtsi" |
| 4061 | #include "sdm845-camera.dtsi" |
| 4062 | #include "sdm845-bus.dtsi" |
Saurabh Kothawade | 78041ee | 2017-01-16 16:38:09 -0800 | [diff] [blame] | 4063 | #include "sdm845-vidc.dtsi" |
Mahesh Sivasubramanian | 7a7b3c7 | 2016-11-04 14:31:59 -0600 | [diff] [blame] | 4064 | #include "sdm845-pm.dtsi" |
Banajit Goswami | 7885c69 | 2017-03-16 16:00:34 -0700 | [diff] [blame] | 4065 | #include "sdm845-pinctrl.dtsi" |
Tony Truong | c0e0a5f0 | 2017-03-15 11:57:40 -0700 | [diff] [blame] | 4066 | #include "sdm845-pcie.dtsi" |
Banajit Goswami | c0b7581 | 2017-03-16 16:14:17 -0700 | [diff] [blame] | 4067 | #include "sdm845-audio.dtsi" |
Lokesh Batra | f7f72ff | 2016-10-13 11:51:59 -0700 | [diff] [blame] | 4068 | #include "sdm845-gpu.dtsi" |
Pratham Pratap | 507936c | 2017-09-25 15:01:59 +0530 | [diff] [blame] | 4069 | #include "sdm845-670-usb-common.dtsi" |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4070 | |
| 4071 | &pm8998_temp_alarm { |
| 4072 | cooling-maps { |
| 4073 | trip0_cpu0 { |
| 4074 | trip = <&pm8998_trip0>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4075 | cooling-device = |
| 4076 | <&CPU0 (THERMAL_MAX_LIMIT-1) |
| 4077 | (THERMAL_MAX_LIMIT-1)>; |
| 4078 | }; |
| 4079 | trip0_cpu1 { |
| 4080 | trip = <&pm8998_trip0>; |
| 4081 | cooling-device = |
| 4082 | <&CPU1 (THERMAL_MAX_LIMIT-1) |
| 4083 | (THERMAL_MAX_LIMIT-1)>; |
| 4084 | }; |
| 4085 | trip0_cpu2 { |
| 4086 | trip = <&pm8998_trip0>; |
| 4087 | cooling-device = |
| 4088 | <&CPU2 (THERMAL_MAX_LIMIT-1) |
| 4089 | (THERMAL_MAX_LIMIT-1)>; |
| 4090 | }; |
| 4091 | trip0_cpu3 { |
| 4092 | trip = <&pm8998_trip0>; |
| 4093 | cooling-device = |
| 4094 | <&CPU3 (THERMAL_MAX_LIMIT-1) |
| 4095 | (THERMAL_MAX_LIMIT-1)>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4096 | }; |
| 4097 | trip0_cpu4 { |
| 4098 | trip = <&pm8998_trip0>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4099 | cooling-device = |
| 4100 | <&CPU4 (THERMAL_MAX_LIMIT-1) |
| 4101 | (THERMAL_MAX_LIMIT-1)>; |
| 4102 | }; |
| 4103 | trip0_cpu5 { |
| 4104 | trip = <&pm8998_trip0>; |
| 4105 | cooling-device = |
| 4106 | <&CPU5 (THERMAL_MAX_LIMIT-1) |
| 4107 | (THERMAL_MAX_LIMIT-1)>; |
| 4108 | }; |
| 4109 | trip0_cpu6 { |
| 4110 | trip = <&pm8998_trip0>; |
| 4111 | cooling-device = |
| 4112 | <&CPU6 (THERMAL_MAX_LIMIT-1) |
| 4113 | (THERMAL_MAX_LIMIT-1)>; |
| 4114 | }; |
| 4115 | trip0_cpu7 { |
| 4116 | trip = <&pm8998_trip0>; |
| 4117 | cooling-device = |
| 4118 | <&CPU7 (THERMAL_MAX_LIMIT-1) |
| 4119 | (THERMAL_MAX_LIMIT-1)>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4120 | }; |
| 4121 | trip1_cpu1 { |
| 4122 | trip = <&pm8998_trip1>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4123 | cooling-device = |
| 4124 | <&CPU1 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4125 | }; |
| 4126 | trip1_cpu2 { |
| 4127 | trip = <&pm8998_trip1>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4128 | cooling-device = |
| 4129 | <&CPU2 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4130 | }; |
| 4131 | trip1_cpu3 { |
| 4132 | trip = <&pm8998_trip1>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4133 | cooling-device = |
| 4134 | <&CPU3 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4135 | }; |
| 4136 | trip1_cpu4 { |
| 4137 | trip = <&pm8998_trip1>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4138 | cooling-device = |
| 4139 | <&CPU4 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4140 | }; |
| 4141 | trip1_cpu5 { |
| 4142 | trip = <&pm8998_trip1>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4143 | cooling-device = |
| 4144 | <&CPU5 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4145 | }; |
| 4146 | trip1_cpu6 { |
| 4147 | trip = <&pm8998_trip1>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4148 | cooling-device = |
| 4149 | <&CPU6 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4150 | }; |
| 4151 | trip1_cpu7 { |
| 4152 | trip = <&pm8998_trip1>; |
Ram Chandrasekar | 543a0b1 | 2017-06-12 17:49:50 -0600 | [diff] [blame] | 4153 | cooling-device = |
| 4154 | <&CPU7 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; |
Ram Chandrasekar | a311528 | 2017-04-21 17:33:01 -0600 | [diff] [blame] | 4155 | }; |
| 4156 | }; |
| 4157 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4158 | |
| 4159 | &thermal_zones { |
| 4160 | aoss0-lowf { |
| 4161 | polling-delay-passive = <0>; |
| 4162 | polling-delay = <0>; |
| 4163 | thermal-governor = "low_limits_floor"; |
| 4164 | thermal-sensors = <&tsens0 0>; |
| 4165 | tracks-low; |
| 4166 | trips { |
| 4167 | aoss0_trip: aoss0-trip { |
| 4168 | temperature = <5000>; |
| 4169 | hysteresis = <5000>; |
| 4170 | type = "passive"; |
| 4171 | }; |
| 4172 | }; |
| 4173 | cooling-maps { |
| 4174 | cpu0_vdd_cdev { |
| 4175 | trip = <&aoss0_trip>; |
| 4176 | cooling-device = <&CPU0 4 4>; |
| 4177 | }; |
| 4178 | cpu4_vdd_cdev { |
| 4179 | trip = <&aoss0_trip>; |
| 4180 | cooling-device = <&CPU4 9 9>; |
| 4181 | }; |
| 4182 | gpu_vdd_cdev { |
| 4183 | trip = <&aoss0_trip>; |
| 4184 | cooling-device = <&msm_gpu 1 1>; |
| 4185 | }; |
| 4186 | cx_vdd_cdev { |
| 4187 | trip = <&aoss0_trip>; |
| 4188 | cooling-device = <&cx_cdev 0 0>; |
| 4189 | }; |
| 4190 | mx_vdd_cdev { |
| 4191 | trip = <&aoss0_trip>; |
| 4192 | cooling-device = <&mx_cdev 0 0>; |
| 4193 | }; |
| 4194 | ebi_vdd_cdev { |
| 4195 | trip = <&aoss0_trip>; |
| 4196 | cooling-device = <&ebi_cdev 0 0>; |
| 4197 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4198 | modem_vdd_cdev { |
| 4199 | trip = <&aoss0_trip>; |
| 4200 | cooling-device = <&modem_vdd 0 0>; |
| 4201 | }; |
| 4202 | adsp_vdd_cdev { |
| 4203 | trip = <&aoss0_trip>; |
| 4204 | cooling-device = <&adsp_vdd 0 0>; |
| 4205 | }; |
| 4206 | cdsp_vdd_cdev { |
| 4207 | trip = <&aoss0_trip>; |
| 4208 | cooling-device = <&cdsp_vdd 0 0>; |
| 4209 | }; |
| 4210 | slpi_vdd_cdev { |
| 4211 | trip = <&aoss0_trip>; |
| 4212 | cooling-device = <&slpi_vdd 0 0>; |
| 4213 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4214 | }; |
| 4215 | }; |
| 4216 | |
| 4217 | cpu0-silver-lowf { |
| 4218 | polling-delay-passive = <0>; |
| 4219 | polling-delay = <0>; |
| 4220 | thermal-governor = "low_limits_floor"; |
| 4221 | thermal-sensors = <&tsens0 1>; |
| 4222 | tracks-low; |
| 4223 | trips { |
| 4224 | cpu0_trip: cpu0-trip { |
| 4225 | temperature = <5000>; |
| 4226 | hysteresis = <5000>; |
| 4227 | type = "passive"; |
| 4228 | }; |
| 4229 | }; |
| 4230 | cooling-maps { |
| 4231 | cpu0_vdd_cdev { |
| 4232 | trip = <&cpu0_trip>; |
| 4233 | cooling-device = <&CPU0 4 4>; |
| 4234 | }; |
| 4235 | cpu4_vdd_cdev { |
| 4236 | trip = <&cpu0_trip>; |
| 4237 | cooling-device = <&CPU4 9 9>; |
| 4238 | }; |
| 4239 | gpu_vdd_cdev { |
| 4240 | trip = <&cpu0_trip>; |
| 4241 | cooling-device = <&msm_gpu 1 1>; |
| 4242 | }; |
| 4243 | cx_vdd_cdev { |
| 4244 | trip = <&cpu0_trip>; |
| 4245 | cooling-device = <&cx_cdev 0 0>; |
| 4246 | }; |
| 4247 | mx_vdd_cdev { |
| 4248 | trip = <&cpu0_trip>; |
| 4249 | cooling-device = <&mx_cdev 0 0>; |
| 4250 | }; |
| 4251 | ebi_vdd_cdev { |
| 4252 | trip = <&cpu0_trip>; |
| 4253 | cooling-device = <&ebi_cdev 0 0>; |
| 4254 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4255 | modem_vdd_cdev { |
| 4256 | trip = <&cpu0_trip>; |
| 4257 | cooling-device = <&modem_vdd 0 0>; |
| 4258 | }; |
| 4259 | adsp_vdd_cdev { |
| 4260 | trip = <&cpu0_trip>; |
| 4261 | cooling-device = <&adsp_vdd 0 0>; |
| 4262 | }; |
| 4263 | cdsp_vdd_cdev { |
| 4264 | trip = <&cpu0_trip>; |
| 4265 | cooling-device = <&cdsp_vdd 0 0>; |
| 4266 | }; |
| 4267 | slpi_vdd_cdev { |
| 4268 | trip = <&cpu0_trip>; |
| 4269 | cooling-device = <&slpi_vdd 0 0>; |
| 4270 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4271 | }; |
| 4272 | }; |
| 4273 | |
| 4274 | cpu1-silver-lowf { |
| 4275 | polling-delay-passive = <0>; |
| 4276 | polling-delay = <0>; |
| 4277 | thermal-governor = "low_limits_floor"; |
| 4278 | thermal-sensors = <&tsens0 2>; |
| 4279 | tracks-low; |
| 4280 | trips { |
| 4281 | cpu1_trip: cpu1-trip { |
| 4282 | temperature = <5000>; |
| 4283 | hysteresis = <5000>; |
| 4284 | type = "passive"; |
| 4285 | }; |
| 4286 | }; |
| 4287 | cooling-maps { |
| 4288 | cpu0_vdd_cdev { |
| 4289 | trip = <&cpu1_trip>; |
| 4290 | cooling-device = <&CPU0 4 4>; |
| 4291 | }; |
| 4292 | cpu4_vdd_cdev { |
| 4293 | trip = <&cpu1_trip>; |
| 4294 | cooling-device = <&CPU4 9 9>; |
| 4295 | }; |
| 4296 | gpu_vdd_cdev { |
| 4297 | trip = <&cpu1_trip>; |
| 4298 | cooling-device = <&msm_gpu 1 1>; |
| 4299 | }; |
| 4300 | cx_vdd_cdev { |
| 4301 | trip = <&cpu1_trip>; |
| 4302 | cooling-device = <&cx_cdev 0 0>; |
| 4303 | }; |
| 4304 | mx_vdd_cdev { |
| 4305 | trip = <&cpu1_trip>; |
| 4306 | cooling-device = <&mx_cdev 0 0>; |
| 4307 | }; |
| 4308 | ebi_vdd_cdev { |
| 4309 | trip = <&cpu1_trip>; |
| 4310 | cooling-device = <&ebi_cdev 0 0>; |
| 4311 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4312 | modem_vdd_cdev { |
| 4313 | trip = <&cpu1_trip>; |
| 4314 | cooling-device = <&modem_vdd 0 0>; |
| 4315 | }; |
| 4316 | adsp_vdd_cdev { |
| 4317 | trip = <&cpu1_trip>; |
| 4318 | cooling-device = <&adsp_vdd 0 0>; |
| 4319 | }; |
| 4320 | cdsp_vdd_cdev { |
| 4321 | trip = <&cpu1_trip>; |
| 4322 | cooling-device = <&cdsp_vdd 0 0>; |
| 4323 | }; |
| 4324 | slpi_vdd_cdev { |
| 4325 | trip = <&cpu1_trip>; |
| 4326 | cooling-device = <&slpi_vdd 0 0>; |
| 4327 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4328 | }; |
| 4329 | }; |
| 4330 | |
| 4331 | cpu2-silver-lowf { |
| 4332 | polling-delay-passive = <0>; |
| 4333 | polling-delay = <0>; |
| 4334 | thermal-governor = "low_limits_floor"; |
| 4335 | thermal-sensors = <&tsens0 3>; |
| 4336 | tracks-low; |
| 4337 | trips { |
| 4338 | cpu2_trip: cpu2-trip { |
| 4339 | temperature = <5000>; |
| 4340 | hysteresis = <5000>; |
| 4341 | type = "passive"; |
| 4342 | }; |
| 4343 | }; |
| 4344 | cooling-maps { |
| 4345 | cpu0_vdd_cdev { |
| 4346 | trip = <&cpu2_trip>; |
| 4347 | cooling-device = <&CPU0 4 4>; |
| 4348 | }; |
| 4349 | cpu4_vdd_cdev { |
| 4350 | trip = <&cpu2_trip>; |
| 4351 | cooling-device = <&CPU4 9 9>; |
| 4352 | }; |
| 4353 | gpu_vdd_cdev { |
| 4354 | trip = <&cpu2_trip>; |
| 4355 | cooling-device = <&msm_gpu 1 1>; |
| 4356 | }; |
| 4357 | cx_vdd_cdev { |
| 4358 | trip = <&cpu2_trip>; |
| 4359 | cooling-device = <&cx_cdev 0 0>; |
| 4360 | }; |
| 4361 | mx_vdd_cdev { |
| 4362 | trip = <&cpu2_trip>; |
| 4363 | cooling-device = <&mx_cdev 0 0>; |
| 4364 | }; |
| 4365 | ebi_vdd_cdev { |
| 4366 | trip = <&cpu2_trip>; |
| 4367 | cooling-device = <&ebi_cdev 0 0>; |
| 4368 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4369 | modem_vdd_cdev { |
| 4370 | trip = <&cpu2_trip>; |
| 4371 | cooling-device = <&modem_vdd 0 0>; |
| 4372 | }; |
| 4373 | adsp_vdd_cdev { |
| 4374 | trip = <&cpu2_trip>; |
| 4375 | cooling-device = <&adsp_vdd 0 0>; |
| 4376 | }; |
| 4377 | cdsp_vdd_cdev { |
| 4378 | trip = <&cpu2_trip>; |
| 4379 | cooling-device = <&cdsp_vdd 0 0>; |
| 4380 | }; |
| 4381 | slpi_vdd_cdev { |
| 4382 | trip = <&cpu2_trip>; |
| 4383 | cooling-device = <&slpi_vdd 0 0>; |
| 4384 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4385 | }; |
| 4386 | }; |
| 4387 | |
| 4388 | cpu3-silver-lowf { |
| 4389 | polling-delay-passive = <0>; |
| 4390 | polling-delay = <0>; |
| 4391 | thermal-governor = "low_limits_floor"; |
| 4392 | thermal-sensors = <&tsens0 4>; |
| 4393 | tracks-low; |
| 4394 | trips { |
| 4395 | cpu3_trip: cpu3-trip { |
| 4396 | temperature = <5000>; |
| 4397 | hysteresis = <5000>; |
| 4398 | type = "passive"; |
| 4399 | }; |
| 4400 | }; |
| 4401 | cooling-maps { |
| 4402 | cpu0_vdd_cdev { |
| 4403 | trip = <&cpu3_trip>; |
| 4404 | cooling-device = <&CPU0 4 4>; |
| 4405 | }; |
| 4406 | cpu4_vdd_cdev { |
| 4407 | trip = <&cpu3_trip>; |
| 4408 | cooling-device = <&CPU4 9 9>; |
| 4409 | }; |
| 4410 | gpu_vdd_cdev { |
| 4411 | trip = <&cpu3_trip>; |
| 4412 | cooling-device = <&msm_gpu 1 1>; |
| 4413 | }; |
| 4414 | cx_vdd_cdev { |
| 4415 | trip = <&cpu3_trip>; |
| 4416 | cooling-device = <&cx_cdev 0 0>; |
| 4417 | }; |
| 4418 | mx_vdd_cdev { |
| 4419 | trip = <&cpu3_trip>; |
| 4420 | cooling-device = <&mx_cdev 0 0>; |
| 4421 | }; |
| 4422 | ebi_vdd_cdev { |
| 4423 | trip = <&cpu3_trip>; |
| 4424 | cooling-device = <&ebi_cdev 0 0>; |
| 4425 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4426 | modem_vdd_cdev { |
| 4427 | trip = <&cpu3_trip>; |
| 4428 | cooling-device = <&modem_vdd 0 0>; |
| 4429 | }; |
| 4430 | adsp_vdd_cdev { |
| 4431 | trip = <&cpu3_trip>; |
| 4432 | cooling-device = <&adsp_vdd 0 0>; |
| 4433 | }; |
| 4434 | cdsp_vdd_cdev { |
| 4435 | trip = <&cpu3_trip>; |
| 4436 | cooling-device = <&cdsp_vdd 0 0>; |
| 4437 | }; |
| 4438 | slpi_vdd_cdev { |
| 4439 | trip = <&cpu3_trip>; |
| 4440 | cooling-device = <&slpi_vdd 0 0>; |
| 4441 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4442 | }; |
| 4443 | }; |
| 4444 | |
| 4445 | kryo-l3-0-lowf { |
| 4446 | polling-delay-passive = <0>; |
| 4447 | polling-delay = <0>; |
| 4448 | thermal-governor = "low_limits_floor"; |
| 4449 | thermal-sensors = <&tsens0 5>; |
| 4450 | tracks-low; |
| 4451 | trips { |
| 4452 | l3_0_trip: l3-0-trip { |
| 4453 | temperature = <5000>; |
| 4454 | hysteresis = <5000>; |
| 4455 | type = "passive"; |
| 4456 | }; |
| 4457 | }; |
| 4458 | cooling-maps { |
| 4459 | cpu0_vdd_cdev { |
| 4460 | trip = <&l3_0_trip>; |
| 4461 | cooling-device = <&CPU0 4 4>; |
| 4462 | }; |
| 4463 | cpu4_vdd_cdev { |
| 4464 | trip = <&l3_0_trip>; |
| 4465 | cooling-device = <&CPU4 9 9>; |
| 4466 | }; |
| 4467 | gpu_vdd_cdev { |
| 4468 | trip = <&l3_0_trip>; |
| 4469 | cooling-device = <&msm_gpu 1 1>; |
| 4470 | }; |
| 4471 | cx_vdd_cdev { |
| 4472 | trip = <&l3_0_trip>; |
| 4473 | cooling-device = <&cx_cdev 0 0>; |
| 4474 | }; |
| 4475 | mx_vdd_cdev { |
| 4476 | trip = <&l3_0_trip>; |
| 4477 | cooling-device = <&mx_cdev 0 0>; |
| 4478 | }; |
| 4479 | ebi_vdd_cdev { |
| 4480 | trip = <&l3_0_trip>; |
| 4481 | cooling-device = <&ebi_cdev 0 0>; |
| 4482 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4483 | modem_vdd_cdev { |
| 4484 | trip = <&l3_0_trip>; |
| 4485 | cooling-device = <&modem_vdd 0 0>; |
| 4486 | }; |
| 4487 | adsp_vdd_cdev { |
| 4488 | trip = <&l3_0_trip>; |
| 4489 | cooling-device = <&adsp_vdd 0 0>; |
| 4490 | }; |
| 4491 | cdsp_vdd_cdev { |
| 4492 | trip = <&l3_0_trip>; |
| 4493 | cooling-device = <&cdsp_vdd 0 0>; |
| 4494 | }; |
| 4495 | slpi_vdd_cdev { |
| 4496 | trip = <&l3_0_trip>; |
| 4497 | cooling-device = <&slpi_vdd 0 0>; |
| 4498 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4499 | }; |
| 4500 | }; |
| 4501 | |
| 4502 | kryo-l3-1-lowf { |
| 4503 | polling-delay-passive = <0>; |
| 4504 | polling-delay = <0>; |
| 4505 | thermal-governor = "low_limits_floor"; |
| 4506 | thermal-sensors = <&tsens0 6>; |
| 4507 | tracks-low; |
| 4508 | trips { |
| 4509 | l3_1_trip: l3-1-trip { |
| 4510 | temperature = <5000>; |
| 4511 | hysteresis = <5000>; |
| 4512 | type = "passive"; |
| 4513 | }; |
| 4514 | }; |
| 4515 | cooling-maps { |
| 4516 | cpu0_vdd_cdev { |
| 4517 | trip = <&l3_1_trip>; |
| 4518 | cooling-device = <&CPU0 4 4>; |
| 4519 | }; |
| 4520 | cpu4_vdd_cdev { |
| 4521 | trip = <&l3_1_trip>; |
| 4522 | cooling-device = <&CPU4 9 9>; |
| 4523 | }; |
| 4524 | gpu_vdd_cdev { |
| 4525 | trip = <&l3_1_trip>; |
| 4526 | cooling-device = <&msm_gpu 1 1>; |
| 4527 | }; |
| 4528 | cx_vdd_cdev { |
| 4529 | trip = <&l3_1_trip>; |
| 4530 | cooling-device = <&cx_cdev 0 0>; |
| 4531 | }; |
| 4532 | mx_vdd_cdev { |
| 4533 | trip = <&l3_1_trip>; |
| 4534 | cooling-device = <&mx_cdev 0 0>; |
| 4535 | }; |
| 4536 | ebi_vdd_cdev { |
| 4537 | trip = <&l3_1_trip>; |
| 4538 | cooling-device = <&ebi_cdev 0 0>; |
| 4539 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4540 | modem_vdd_cdev { |
| 4541 | trip = <&l3_1_trip>; |
| 4542 | cooling-device = <&modem_vdd 0 0>; |
| 4543 | }; |
| 4544 | adsp_vdd_cdev { |
| 4545 | trip = <&l3_1_trip>; |
| 4546 | cooling-device = <&adsp_vdd 0 0>; |
| 4547 | }; |
| 4548 | cdsp_vdd_cdev { |
| 4549 | trip = <&l3_1_trip>; |
| 4550 | cooling-device = <&cdsp_vdd 0 0>; |
| 4551 | }; |
| 4552 | slpi_vdd_cdev { |
| 4553 | trip = <&l3_1_trip>; |
| 4554 | cooling-device = <&slpi_vdd 0 0>; |
| 4555 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4556 | }; |
| 4557 | }; |
| 4558 | |
| 4559 | cpu0-gold-lowf { |
| 4560 | polling-delay-passive = <0>; |
| 4561 | polling-delay = <0>; |
| 4562 | thermal-governor = "low_limits_floor"; |
| 4563 | thermal-sensors = <&tsens0 7>; |
| 4564 | tracks-low; |
| 4565 | trips { |
| 4566 | cpug0_trip: cpug0-trip { |
| 4567 | temperature = <5000>; |
| 4568 | hysteresis = <5000>; |
| 4569 | type = "passive"; |
| 4570 | }; |
| 4571 | }; |
| 4572 | cooling-maps { |
| 4573 | cpu0_vdd_cdev { |
| 4574 | trip = <&cpug0_trip>; |
| 4575 | cooling-device = <&CPU0 4 4>; |
| 4576 | }; |
| 4577 | cpu4_vdd_cdev { |
| 4578 | trip = <&cpug0_trip>; |
| 4579 | cooling-device = <&CPU4 9 9>; |
| 4580 | }; |
| 4581 | gpu_vdd_cdev { |
| 4582 | trip = <&cpug0_trip>; |
| 4583 | cooling-device = <&msm_gpu 1 1>; |
| 4584 | }; |
| 4585 | cx_vdd_cdev { |
| 4586 | trip = <&cpug0_trip>; |
| 4587 | cooling-device = <&cx_cdev 0 0>; |
| 4588 | }; |
| 4589 | mx_vdd_cdev { |
| 4590 | trip = <&cpug0_trip>; |
| 4591 | cooling-device = <&mx_cdev 0 0>; |
| 4592 | }; |
| 4593 | ebi_vdd_cdev { |
| 4594 | trip = <&cpug0_trip>; |
| 4595 | cooling-device = <&ebi_cdev 0 0>; |
| 4596 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4597 | modem_vdd_cdev { |
| 4598 | trip = <&cpug0_trip>; |
| 4599 | cooling-device = <&modem_vdd 0 0>; |
| 4600 | }; |
| 4601 | adsp_vdd_cdev { |
| 4602 | trip = <&cpug0_trip>; |
| 4603 | cooling-device = <&adsp_vdd 0 0>; |
| 4604 | }; |
| 4605 | cdsp_vdd_cdev { |
| 4606 | trip = <&cpug0_trip>; |
| 4607 | cooling-device = <&cdsp_vdd 0 0>; |
| 4608 | }; |
| 4609 | slpi_vdd_cdev { |
| 4610 | trip = <&cpug0_trip>; |
| 4611 | cooling-device = <&slpi_vdd 0 0>; |
| 4612 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4613 | }; |
| 4614 | }; |
| 4615 | |
| 4616 | cpu1-gold-lowf { |
| 4617 | polling-delay-passive = <0>; |
| 4618 | polling-delay = <0>; |
| 4619 | thermal-governor = "low_limits_floor"; |
| 4620 | thermal-sensors = <&tsens0 8>; |
| 4621 | tracks-low; |
| 4622 | trips { |
| 4623 | cpug1_trip: cpug1-trip { |
| 4624 | temperature = <5000>; |
| 4625 | hysteresis = <5000>; |
| 4626 | type = "passive"; |
| 4627 | }; |
| 4628 | }; |
| 4629 | cooling-maps { |
| 4630 | cpu0_vdd_cdev { |
| 4631 | trip = <&cpug1_trip>; |
| 4632 | cooling-device = <&CPU0 4 4>; |
| 4633 | }; |
| 4634 | cpu4_vdd_cdev { |
| 4635 | trip = <&cpug1_trip>; |
| 4636 | cooling-device = <&CPU4 9 9>; |
| 4637 | }; |
| 4638 | gpu_vdd_cdev { |
| 4639 | trip = <&cpug1_trip>; |
| 4640 | cooling-device = <&msm_gpu 1 1>; |
| 4641 | }; |
| 4642 | cx_vdd_cdev { |
| 4643 | trip = <&cpug1_trip>; |
| 4644 | cooling-device = <&cx_cdev 0 0>; |
| 4645 | }; |
| 4646 | mx_vdd_cdev { |
| 4647 | trip = <&cpug1_trip>; |
| 4648 | cooling-device = <&mx_cdev 0 0>; |
| 4649 | }; |
| 4650 | ebi_vdd_cdev { |
| 4651 | trip = <&cpug1_trip>; |
| 4652 | cooling-device = <&ebi_cdev 0 0>; |
| 4653 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4654 | modem_vdd_cdev { |
| 4655 | trip = <&cpug1_trip>; |
| 4656 | cooling-device = <&modem_vdd 0 0>; |
| 4657 | }; |
| 4658 | adsp_vdd_cdev { |
| 4659 | trip = <&cpug1_trip>; |
| 4660 | cooling-device = <&adsp_vdd 0 0>; |
| 4661 | }; |
| 4662 | cdsp_vdd_cdev { |
| 4663 | trip = <&cpug1_trip>; |
| 4664 | cooling-device = <&cdsp_vdd 0 0>; |
| 4665 | }; |
| 4666 | slpi_vdd_cdev { |
| 4667 | trip = <&cpug1_trip>; |
| 4668 | cooling-device = <&slpi_vdd 0 0>; |
| 4669 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4670 | }; |
| 4671 | }; |
| 4672 | |
| 4673 | cpu2-gold-lowf { |
| 4674 | polling-delay-passive = <0>; |
| 4675 | polling-delay = <0>; |
| 4676 | thermal-governor = "low_limits_floor"; |
| 4677 | thermal-sensors = <&tsens0 9>; |
| 4678 | tracks-low; |
| 4679 | trips { |
| 4680 | cpug2_trip: cpug2-trip { |
| 4681 | temperature = <5000>; |
| 4682 | hysteresis = <5000>; |
| 4683 | type = "passive"; |
| 4684 | }; |
| 4685 | }; |
| 4686 | cooling-maps { |
| 4687 | cpu0_vdd_cdev { |
| 4688 | trip = <&cpug2_trip>; |
| 4689 | cooling-device = <&CPU0 4 4>; |
| 4690 | }; |
| 4691 | cpu4_vdd_cdev { |
| 4692 | trip = <&cpug2_trip>; |
| 4693 | cooling-device = <&CPU4 9 9>; |
| 4694 | }; |
| 4695 | gpu_vdd_cdev { |
| 4696 | trip = <&cpug2_trip>; |
| 4697 | cooling-device = <&msm_gpu 1 1>; |
| 4698 | }; |
| 4699 | cx_vdd_cdev { |
| 4700 | trip = <&cpug2_trip>; |
| 4701 | cooling-device = <&cx_cdev 0 0>; |
| 4702 | }; |
| 4703 | mx_vdd_cdev { |
| 4704 | trip = <&cpug2_trip>; |
| 4705 | cooling-device = <&mx_cdev 0 0>; |
| 4706 | }; |
| 4707 | ebi_vdd_cdev { |
| 4708 | trip = <&cpug2_trip>; |
| 4709 | cooling-device = <&ebi_cdev 0 0>; |
| 4710 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4711 | modem_vdd_cdev { |
| 4712 | trip = <&cpug2_trip>; |
| 4713 | cooling-device = <&modem_vdd 0 0>; |
| 4714 | }; |
| 4715 | adsp_vdd_cdev { |
| 4716 | trip = <&cpug2_trip>; |
| 4717 | cooling-device = <&adsp_vdd 0 0>; |
| 4718 | }; |
| 4719 | cdsp_vdd_cdev { |
| 4720 | trip = <&cpug2_trip>; |
| 4721 | cooling-device = <&cdsp_vdd 0 0>; |
| 4722 | }; |
| 4723 | slpi_vdd_cdev { |
| 4724 | trip = <&cpug2_trip>; |
| 4725 | cooling-device = <&slpi_vdd 0 0>; |
| 4726 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4727 | }; |
| 4728 | }; |
| 4729 | |
| 4730 | cpu3-gold-lowf { |
| 4731 | polling-delay-passive = <0>; |
| 4732 | polling-delay = <0>; |
| 4733 | thermal-governor = "low_limits_floor"; |
| 4734 | thermal-sensors = <&tsens0 10>; |
| 4735 | tracks-low; |
| 4736 | trips { |
| 4737 | cpug3_trip: cpug3-trip { |
| 4738 | temperature = <5000>; |
| 4739 | hysteresis = <5000>; |
| 4740 | type = "passive"; |
| 4741 | }; |
| 4742 | }; |
| 4743 | cooling-maps { |
| 4744 | cpu0_vdd_cdev { |
| 4745 | trip = <&cpug3_trip>; |
| 4746 | cooling-device = <&CPU0 4 4>; |
| 4747 | }; |
| 4748 | cpu4_vdd_cdev { |
| 4749 | trip = <&cpug3_trip>; |
| 4750 | cooling-device = <&CPU4 9 9>; |
| 4751 | }; |
| 4752 | gpu_vdd_cdev { |
| 4753 | trip = <&cpug3_trip>; |
| 4754 | cooling-device = <&msm_gpu 1 1>; |
| 4755 | }; |
| 4756 | cx_vdd_cdev { |
| 4757 | trip = <&cpug3_trip>; |
| 4758 | cooling-device = <&cx_cdev 0 0>; |
| 4759 | }; |
| 4760 | mx_vdd_cdev { |
| 4761 | trip = <&cpug3_trip>; |
| 4762 | cooling-device = <&mx_cdev 0 0>; |
| 4763 | }; |
| 4764 | ebi_vdd_cdev { |
| 4765 | trip = <&cpug3_trip>; |
| 4766 | cooling-device = <&ebi_cdev 0 0>; |
| 4767 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4768 | modem_vdd_cdev { |
| 4769 | trip = <&cpug3_trip>; |
| 4770 | cooling-device = <&modem_vdd 0 0>; |
| 4771 | }; |
| 4772 | adsp_vdd_cdev { |
| 4773 | trip = <&cpug3_trip>; |
| 4774 | cooling-device = <&adsp_vdd 0 0>; |
| 4775 | }; |
| 4776 | cdsp_vdd_cdev { |
| 4777 | trip = <&cpug3_trip>; |
| 4778 | cooling-device = <&cdsp_vdd 0 0>; |
| 4779 | }; |
| 4780 | slpi_vdd_cdev { |
| 4781 | trip = <&cpug3_trip>; |
| 4782 | cooling-device = <&slpi_vdd 0 0>; |
| 4783 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4784 | }; |
| 4785 | }; |
| 4786 | |
| 4787 | gpu0-lowf { |
| 4788 | polling-delay-passive = <0>; |
| 4789 | polling-delay = <0>; |
| 4790 | thermal-governor = "low_limits_floor"; |
| 4791 | thermal-sensors = <&tsens0 11>; |
| 4792 | tracks-low; |
| 4793 | trips { |
| 4794 | gpu0_trip_l: gpu0-trip { |
| 4795 | temperature = <5000>; |
| 4796 | hysteresis = <5000>; |
| 4797 | type = "passive"; |
| 4798 | }; |
| 4799 | }; |
| 4800 | cooling-maps { |
| 4801 | cpu0_vdd_cdev { |
| 4802 | trip = <&gpu0_trip_l>; |
| 4803 | cooling-device = <&CPU0 4 4>; |
| 4804 | }; |
| 4805 | cpu4_vdd_cdev { |
| 4806 | trip = <&gpu0_trip_l>; |
| 4807 | cooling-device = <&CPU4 9 9>; |
| 4808 | }; |
| 4809 | gpu_vdd_cdev { |
| 4810 | trip = <&gpu0_trip_l>; |
| 4811 | cooling-device = <&msm_gpu 1 1>; |
| 4812 | }; |
| 4813 | cx_vdd_cdev { |
| 4814 | trip = <&gpu0_trip_l>; |
| 4815 | cooling-device = <&cx_cdev 0 0>; |
| 4816 | }; |
| 4817 | mx_vdd_cdev { |
| 4818 | trip = <&gpu0_trip_l>; |
| 4819 | cooling-device = <&mx_cdev 0 0>; |
| 4820 | }; |
| 4821 | ebi_vdd_cdev { |
| 4822 | trip = <&gpu0_trip_l>; |
| 4823 | cooling-device = <&ebi_cdev 0 0>; |
| 4824 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4825 | modem_vdd_cdev { |
| 4826 | trip = <&gpu0_trip_l>; |
| 4827 | cooling-device = <&modem_vdd 0 0>; |
| 4828 | }; |
| 4829 | adsp_vdd_cdev { |
| 4830 | trip = <&gpu0_trip_l>; |
| 4831 | cooling-device = <&adsp_vdd 0 0>; |
| 4832 | }; |
| 4833 | cdsp_vdd_cdev { |
| 4834 | trip = <&gpu0_trip_l>; |
| 4835 | cooling-device = <&cdsp_vdd 0 0>; |
| 4836 | }; |
| 4837 | slpi_vdd_cdev { |
| 4838 | trip = <&gpu0_trip_l>; |
| 4839 | cooling-device = <&slpi_vdd 0 0>; |
| 4840 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4841 | }; |
| 4842 | }; |
| 4843 | |
| 4844 | gpu1-lowf { |
| 4845 | polling-delay-passive = <0>; |
| 4846 | polling-delay = <0>; |
| 4847 | thermal-governor = "low_limits_floor"; |
| 4848 | thermal-sensors = <&tsens0 12>; |
| 4849 | tracks-low; |
| 4850 | trips { |
| 4851 | gpu1_trip_l: gpu1-trip_l { |
| 4852 | temperature = <5000>; |
| 4853 | hysteresis = <5000>; |
| 4854 | type = "passive"; |
| 4855 | }; |
| 4856 | }; |
| 4857 | cooling-maps { |
| 4858 | cpu0_vdd_cdev { |
| 4859 | trip = <&gpu1_trip_l>; |
| 4860 | cooling-device = <&CPU0 4 4>; |
| 4861 | }; |
| 4862 | cpu4_vdd_cdev { |
| 4863 | trip = <&gpu1_trip_l>; |
| 4864 | cooling-device = <&CPU4 9 9>; |
| 4865 | }; |
| 4866 | gpu_vdd_cdev { |
| 4867 | trip = <&gpu1_trip_l>; |
| 4868 | cooling-device = <&msm_gpu 1 1>; |
| 4869 | }; |
| 4870 | cx_vdd_cdev { |
| 4871 | trip = <&gpu1_trip_l>; |
| 4872 | cooling-device = <&cx_cdev 0 0>; |
| 4873 | }; |
| 4874 | mx_vdd_cdev { |
| 4875 | trip = <&gpu1_trip_l>; |
| 4876 | cooling-device = <&mx_cdev 0 0>; |
| 4877 | }; |
| 4878 | ebi_vdd_cdev { |
| 4879 | trip = <&gpu1_trip_l>; |
| 4880 | cooling-device = <&ebi_cdev 0 0>; |
| 4881 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4882 | modem_vdd_cdev { |
| 4883 | trip = <&gpu1_trip_l>; |
| 4884 | cooling-device = <&modem_vdd 0 0>; |
| 4885 | }; |
| 4886 | adsp_vdd_cdev { |
| 4887 | trip = <&gpu1_trip_l>; |
| 4888 | cooling-device = <&adsp_vdd 0 0>; |
| 4889 | }; |
| 4890 | cdsp_vdd_cdev { |
| 4891 | trip = <&gpu1_trip_l>; |
| 4892 | cooling-device = <&cdsp_vdd 0 0>; |
| 4893 | }; |
| 4894 | slpi_vdd_cdev { |
| 4895 | trip = <&gpu1_trip_l>; |
| 4896 | cooling-device = <&slpi_vdd 0 0>; |
| 4897 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4898 | }; |
| 4899 | }; |
| 4900 | |
| 4901 | aoss1-lowf { |
| 4902 | polling-delay-passive = <0>; |
| 4903 | polling-delay = <0>; |
| 4904 | thermal-governor = "low_limits_floor"; |
| 4905 | thermal-sensors = <&tsens1 0>; |
| 4906 | tracks-low; |
| 4907 | trips { |
| 4908 | aoss1_trip: aoss1-trip { |
| 4909 | temperature = <5000>; |
| 4910 | hysteresis = <5000>; |
| 4911 | type = "passive"; |
| 4912 | }; |
| 4913 | }; |
| 4914 | cooling-maps { |
| 4915 | cpu0_vdd_cdev { |
| 4916 | trip = <&aoss1_trip>; |
| 4917 | cooling-device = <&CPU0 4 4>; |
| 4918 | }; |
| 4919 | cpu4_vdd_cdev { |
| 4920 | trip = <&aoss1_trip>; |
| 4921 | cooling-device = <&CPU4 9 9>; |
| 4922 | }; |
| 4923 | gpu_vdd_cdev { |
| 4924 | trip = <&aoss1_trip>; |
| 4925 | cooling-device = <&msm_gpu 1 1>; |
| 4926 | }; |
| 4927 | cx_vdd_cdev { |
| 4928 | trip = <&aoss1_trip>; |
| 4929 | cooling-device = <&cx_cdev 0 0>; |
| 4930 | }; |
| 4931 | mx_vdd_cdev { |
| 4932 | trip = <&aoss1_trip>; |
| 4933 | cooling-device = <&mx_cdev 0 0>; |
| 4934 | }; |
| 4935 | ebi_vdd_cdev { |
| 4936 | trip = <&aoss1_trip>; |
| 4937 | cooling-device = <&ebi_cdev 0 0>; |
| 4938 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4939 | modem_vdd_cdev { |
| 4940 | trip = <&aoss1_trip>; |
| 4941 | cooling-device = <&modem_vdd 0 0>; |
| 4942 | }; |
| 4943 | adsp_vdd_cdev { |
| 4944 | trip = <&aoss1_trip>; |
| 4945 | cooling-device = <&adsp_vdd 0 0>; |
| 4946 | }; |
| 4947 | cdsp_vdd_cdev { |
| 4948 | trip = <&aoss1_trip>; |
| 4949 | cooling-device = <&cdsp_vdd 0 0>; |
| 4950 | }; |
| 4951 | slpi_vdd_cdev { |
| 4952 | trip = <&aoss1_trip>; |
| 4953 | cooling-device = <&slpi_vdd 0 0>; |
| 4954 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 4955 | }; |
| 4956 | }; |
| 4957 | |
| 4958 | mdm-dsp-lowf { |
| 4959 | polling-delay-passive = <0>; |
| 4960 | polling-delay = <0>; |
| 4961 | thermal-governor = "low_limits_floor"; |
| 4962 | thermal-sensors = <&tsens1 1>; |
| 4963 | tracks-low; |
| 4964 | trips { |
| 4965 | dsp_trip: dsp-trip { |
| 4966 | temperature = <5000>; |
| 4967 | hysteresis = <5000>; |
| 4968 | type = "passive"; |
| 4969 | }; |
| 4970 | }; |
| 4971 | cooling-maps { |
| 4972 | cpu0_vdd_cdev { |
| 4973 | trip = <&dsp_trip>; |
| 4974 | cooling-device = <&CPU0 4 4>; |
| 4975 | }; |
| 4976 | cpu4_vdd_cdev { |
| 4977 | trip = <&dsp_trip>; |
| 4978 | cooling-device = <&CPU4 9 9>; |
| 4979 | }; |
| 4980 | gpu_vdd_cdev { |
| 4981 | trip = <&dsp_trip>; |
| 4982 | cooling-device = <&msm_gpu 1 1>; |
| 4983 | }; |
| 4984 | cx_vdd_cdev { |
| 4985 | trip = <&dsp_trip>; |
| 4986 | cooling-device = <&cx_cdev 0 0>; |
| 4987 | }; |
| 4988 | mx_vdd_cdev { |
| 4989 | trip = <&dsp_trip>; |
| 4990 | cooling-device = <&mx_cdev 0 0>; |
| 4991 | }; |
| 4992 | ebi_vdd_cdev { |
| 4993 | trip = <&dsp_trip>; |
| 4994 | cooling-device = <&ebi_cdev 0 0>; |
| 4995 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 4996 | modem_vdd_cdev { |
| 4997 | trip = <&dsp_trip>; |
| 4998 | cooling-device = <&modem_vdd 0 0>; |
| 4999 | }; |
| 5000 | adsp_vdd_cdev { |
| 5001 | trip = <&dsp_trip>; |
| 5002 | cooling-device = <&adsp_vdd 0 0>; |
| 5003 | }; |
| 5004 | cdsp_vdd_cdev { |
| 5005 | trip = <&dsp_trip>; |
| 5006 | cooling-device = <&cdsp_vdd 0 0>; |
| 5007 | }; |
| 5008 | slpi_vdd_cdev { |
| 5009 | trip = <&dsp_trip>; |
| 5010 | cooling-device = <&slpi_vdd 0 0>; |
| 5011 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 5012 | }; |
| 5013 | }; |
| 5014 | |
| 5015 | ddr-lowf { |
| 5016 | polling-delay-passive = <0>; |
| 5017 | polling-delay = <0>; |
| 5018 | thermal-governor = "low_limits_floor"; |
| 5019 | thermal-sensors = <&tsens1 2>; |
| 5020 | tracks-low; |
| 5021 | trips { |
| 5022 | ddr_trip: ddr-trip { |
| 5023 | temperature = <5000>; |
| 5024 | hysteresis = <5000>; |
| 5025 | type = "passive"; |
| 5026 | }; |
| 5027 | }; |
| 5028 | cooling-maps { |
| 5029 | cpu0_vdd_cdev { |
| 5030 | trip = <&ddr_trip>; |
| 5031 | cooling-device = <&CPU0 4 4>; |
| 5032 | }; |
| 5033 | cpu4_vdd_cdev { |
| 5034 | trip = <&ddr_trip>; |
| 5035 | cooling-device = <&CPU4 9 9>; |
| 5036 | }; |
| 5037 | gpu_vdd_cdev { |
| 5038 | trip = <&ddr_trip>; |
| 5039 | cooling-device = <&msm_gpu 1 1>; |
| 5040 | }; |
| 5041 | cx_vdd_cdev { |
| 5042 | trip = <&ddr_trip>; |
| 5043 | cooling-device = <&cx_cdev 0 0>; |
| 5044 | }; |
| 5045 | mx_vdd_cdev { |
| 5046 | trip = <&ddr_trip>; |
| 5047 | cooling-device = <&mx_cdev 0 0>; |
| 5048 | }; |
| 5049 | ebi_vdd_cdev { |
| 5050 | trip = <&ddr_trip>; |
| 5051 | cooling-device = <&ebi_cdev 0 0>; |
| 5052 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 5053 | modem_vdd_cdev { |
| 5054 | trip = <&ddr_trip>; |
| 5055 | cooling-device = <&modem_vdd 0 0>; |
| 5056 | }; |
| 5057 | adsp_vdd_cdev { |
| 5058 | trip = <&ddr_trip>; |
| 5059 | cooling-device = <&adsp_vdd 0 0>; |
| 5060 | }; |
| 5061 | cdsp_vdd_cdev { |
| 5062 | trip = <&ddr_trip>; |
| 5063 | cooling-device = <&cdsp_vdd 0 0>; |
| 5064 | }; |
| 5065 | slpi_vdd_cdev { |
| 5066 | trip = <&ddr_trip>; |
| 5067 | cooling-device = <&slpi_vdd 0 0>; |
| 5068 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 5069 | }; |
| 5070 | }; |
| 5071 | |
| 5072 | wlan-lowf { |
| 5073 | polling-delay-passive = <0>; |
| 5074 | polling-delay = <0>; |
| 5075 | thermal-governor = "low_limits_floor"; |
| 5076 | thermal-sensors = <&tsens1 3>; |
| 5077 | tracks-low; |
| 5078 | trips { |
| 5079 | wlan_trip: wlan-trip { |
| 5080 | temperature = <5000>; |
| 5081 | hysteresis = <5000>; |
| 5082 | type = "passive"; |
| 5083 | }; |
| 5084 | }; |
| 5085 | cooling-maps { |
| 5086 | cpu0_vdd_cdev { |
| 5087 | trip = <&wlan_trip>; |
| 5088 | cooling-device = <&CPU0 4 4>; |
| 5089 | }; |
| 5090 | cpu4_vdd_cdev { |
| 5091 | trip = <&wlan_trip>; |
| 5092 | cooling-device = <&CPU4 9 9>; |
| 5093 | }; |
| 5094 | gpu_vdd_cdev { |
| 5095 | trip = <&wlan_trip>; |
| 5096 | cooling-device = <&msm_gpu 1 1>; |
| 5097 | }; |
| 5098 | cx_vdd_cdev { |
| 5099 | trip = <&wlan_trip>; |
| 5100 | cooling-device = <&cx_cdev 0 0>; |
| 5101 | }; |
| 5102 | mx_vdd_cdev { |
| 5103 | trip = <&wlan_trip>; |
| 5104 | cooling-device = <&mx_cdev 0 0>; |
| 5105 | }; |
| 5106 | ebi_vdd_cdev { |
| 5107 | trip = <&wlan_trip>; |
| 5108 | cooling-device = <&ebi_cdev 0 0>; |
| 5109 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 5110 | modem_vdd_cdev { |
| 5111 | trip = <&wlan_trip>; |
| 5112 | cooling-device = <&modem_vdd 0 0>; |
| 5113 | }; |
| 5114 | adsp_vdd_cdev { |
| 5115 | trip = <&wlan_trip>; |
| 5116 | cooling-device = <&adsp_vdd 0 0>; |
| 5117 | }; |
| 5118 | cdsp_vdd_cdev { |
| 5119 | trip = <&wlan_trip>; |
| 5120 | cooling-device = <&cdsp_vdd 0 0>; |
| 5121 | }; |
| 5122 | slpi_vdd_cdev { |
| 5123 | trip = <&wlan_trip>; |
| 5124 | cooling-device = <&slpi_vdd 0 0>; |
| 5125 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 5126 | }; |
| 5127 | }; |
| 5128 | |
| 5129 | compute-hvx-lowf { |
| 5130 | polling-delay-passive = <0>; |
| 5131 | polling-delay = <0>; |
| 5132 | thermal-governor = "low_limits_floor"; |
| 5133 | thermal-sensors = <&tsens1 4>; |
| 5134 | tracks-low; |
| 5135 | trips { |
| 5136 | hvx_trip: hvx-trip { |
| 5137 | temperature = <5000>; |
| 5138 | hysteresis = <5000>; |
| 5139 | type = "passive"; |
| 5140 | }; |
| 5141 | }; |
| 5142 | cooling-maps { |
| 5143 | cpu0_vdd_cdev { |
| 5144 | trip = <&hvx_trip>; |
| 5145 | cooling-device = <&CPU0 4 4>; |
| 5146 | }; |
| 5147 | cpu4_vdd_cdev { |
| 5148 | trip = <&hvx_trip>; |
| 5149 | cooling-device = <&CPU4 9 9>; |
| 5150 | }; |
| 5151 | gpu_vdd_cdev { |
| 5152 | trip = <&hvx_trip>; |
| 5153 | cooling-device = <&msm_gpu 1 1>; |
| 5154 | }; |
| 5155 | cx_vdd_cdev { |
| 5156 | trip = <&hvx_trip>; |
| 5157 | cooling-device = <&cx_cdev 0 0>; |
| 5158 | }; |
| 5159 | mx_vdd_cdev { |
| 5160 | trip = <&hvx_trip>; |
| 5161 | cooling-device = <&mx_cdev 0 0>; |
| 5162 | }; |
| 5163 | ebi_vdd_cdev { |
| 5164 | trip = <&hvx_trip>; |
| 5165 | cooling-device = <&ebi_cdev 0 0>; |
| 5166 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 5167 | modem_vdd_cdev { |
| 5168 | trip = <&hvx_trip>; |
| 5169 | cooling-device = <&modem_vdd 0 0>; |
| 5170 | }; |
| 5171 | adsp_vdd_cdev { |
| 5172 | trip = <&hvx_trip>; |
| 5173 | cooling-device = <&adsp_vdd 0 0>; |
| 5174 | }; |
| 5175 | cdsp_vdd_cdev { |
| 5176 | trip = <&hvx_trip>; |
| 5177 | cooling-device = <&cdsp_vdd 0 0>; |
| 5178 | }; |
| 5179 | slpi_vdd_cdev { |
| 5180 | trip = <&hvx_trip>; |
| 5181 | cooling-device = <&slpi_vdd 0 0>; |
| 5182 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 5183 | }; |
| 5184 | }; |
| 5185 | |
| 5186 | camera-lowf { |
| 5187 | polling-delay-passive = <0>; |
| 5188 | polling-delay = <0>; |
| 5189 | thermal-governor = "low_limits_floor"; |
| 5190 | thermal-sensors = <&tsens1 5>; |
| 5191 | tracks-low; |
| 5192 | trips { |
| 5193 | camera_trip: camera-trip { |
| 5194 | temperature = <5000>; |
| 5195 | hysteresis = <5000>; |
| 5196 | type = "passive"; |
| 5197 | }; |
| 5198 | }; |
| 5199 | cooling-maps { |
| 5200 | cpu0_vdd_cdev { |
| 5201 | trip = <&camera_trip>; |
| 5202 | cooling-device = <&CPU0 4 4>; |
| 5203 | }; |
| 5204 | cpu4_vdd_cdev { |
| 5205 | trip = <&camera_trip>; |
| 5206 | cooling-device = <&CPU4 9 9>; |
| 5207 | }; |
| 5208 | gpu_vdd_cdev { |
| 5209 | trip = <&camera_trip>; |
| 5210 | cooling-device = <&msm_gpu 1 1>; |
| 5211 | }; |
| 5212 | cx_vdd_cdev { |
| 5213 | trip = <&camera_trip>; |
| 5214 | cooling-device = <&cx_cdev 0 0>; |
| 5215 | }; |
| 5216 | mx_vdd_cdev { |
| 5217 | trip = <&camera_trip>; |
| 5218 | cooling-device = <&mx_cdev 0 0>; |
| 5219 | }; |
| 5220 | ebi_vdd_cdev { |
| 5221 | trip = <&camera_trip>; |
| 5222 | cooling-device = <&ebi_cdev 0 0>; |
| 5223 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 5224 | modem_vdd_cdev { |
| 5225 | trip = <&camera_trip>; |
| 5226 | cooling-device = <&modem_vdd 0 0>; |
| 5227 | }; |
| 5228 | adsp_vdd_cdev { |
| 5229 | trip = <&camera_trip>; |
| 5230 | cooling-device = <&adsp_vdd 0 0>; |
| 5231 | }; |
| 5232 | cdsp_vdd_cdev { |
| 5233 | trip = <&camera_trip>; |
| 5234 | cooling-device = <&cdsp_vdd 0 0>; |
| 5235 | }; |
| 5236 | slpi_vdd_cdev { |
| 5237 | trip = <&camera_trip>; |
| 5238 | cooling-device = <&slpi_vdd 0 0>; |
| 5239 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 5240 | }; |
| 5241 | }; |
| 5242 | |
| 5243 | mmss-lowf { |
| 5244 | polling-delay-passive = <0>; |
| 5245 | polling-delay = <0>; |
| 5246 | thermal-governor = "low_limits_floor"; |
| 5247 | thermal-sensors = <&tsens1 6>; |
| 5248 | tracks-low; |
| 5249 | trips { |
| 5250 | mmss_trip: mmss-trip { |
| 5251 | temperature = <5000>; |
| 5252 | hysteresis = <5000>; |
| 5253 | type = "passive"; |
| 5254 | }; |
| 5255 | }; |
| 5256 | cooling-maps { |
| 5257 | cpu0_vdd_cdev { |
| 5258 | trip = <&mmss_trip>; |
| 5259 | cooling-device = <&CPU0 4 4>; |
| 5260 | }; |
| 5261 | cpu4_vdd_cdev { |
| 5262 | trip = <&mmss_trip>; |
| 5263 | cooling-device = <&CPU4 9 9>; |
| 5264 | }; |
| 5265 | gpu_vdd_cdev { |
| 5266 | trip = <&mmss_trip>; |
| 5267 | cooling-device = <&msm_gpu 1 1>; |
| 5268 | }; |
| 5269 | cx_vdd_cdev { |
| 5270 | trip = <&mmss_trip>; |
| 5271 | cooling-device = <&cx_cdev 0 0>; |
| 5272 | }; |
| 5273 | mx_vdd_cdev { |
| 5274 | trip = <&mmss_trip>; |
| 5275 | cooling-device = <&mx_cdev 0 0>; |
| 5276 | }; |
| 5277 | ebi_vdd_cdev { |
| 5278 | trip = <&mmss_trip>; |
| 5279 | cooling-device = <&ebi_cdev 0 0>; |
| 5280 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 5281 | modem_vdd_cdev { |
| 5282 | trip = <&mmss_trip>; |
| 5283 | cooling-device = <&modem_vdd 0 0>; |
| 5284 | }; |
| 5285 | adsp_vdd_cdev { |
| 5286 | trip = <&mmss_trip>; |
| 5287 | cooling-device = <&adsp_vdd 0 0>; |
| 5288 | }; |
| 5289 | cdsp_vdd_cdev { |
| 5290 | trip = <&mmss_trip>; |
| 5291 | cooling-device = <&cdsp_vdd 0 0>; |
| 5292 | }; |
| 5293 | slpi_vdd_cdev { |
| 5294 | trip = <&mmss_trip>; |
| 5295 | cooling-device = <&slpi_vdd 0 0>; |
| 5296 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 5297 | }; |
| 5298 | }; |
| 5299 | |
| 5300 | mdm-core-lowf { |
| 5301 | polling-delay-passive = <0>; |
| 5302 | polling-delay = <0>; |
| 5303 | thermal-governor = "low_limits_floor"; |
| 5304 | thermal-sensors = <&tsens1 7>; |
| 5305 | tracks-low; |
| 5306 | trips { |
| 5307 | mdm_trip: mdm-trip { |
| 5308 | temperature = <5000>; |
| 5309 | hysteresis = <5000>; |
| 5310 | type = "passive"; |
| 5311 | }; |
| 5312 | }; |
| 5313 | cooling-maps { |
| 5314 | cpu0_vdd_cdev { |
| 5315 | trip = <&mdm_trip>; |
| 5316 | cooling-device = <&CPU0 4 4>; |
| 5317 | }; |
| 5318 | cpu4_vdd_cdev { |
| 5319 | trip = <&mdm_trip>; |
| 5320 | cooling-device = <&CPU4 9 9>; |
| 5321 | }; |
| 5322 | gpu_vdd_cdev { |
| 5323 | trip = <&mdm_trip>; |
| 5324 | cooling-device = <&msm_gpu 1 1>; |
| 5325 | }; |
| 5326 | cx_vdd_cdev { |
| 5327 | trip = <&mdm_trip>; |
| 5328 | cooling-device = <&cx_cdev 0 0>; |
| 5329 | }; |
| 5330 | mx_vdd_cdev { |
| 5331 | trip = <&mdm_trip>; |
| 5332 | cooling-device = <&mx_cdev 0 0>; |
| 5333 | }; |
| 5334 | ebi_vdd_cdev { |
| 5335 | trip = <&mdm_trip>; |
| 5336 | cooling-device = <&ebi_cdev 0 0>; |
| 5337 | }; |
Ram Chandrasekar | 56f60de | 2017-07-03 16:26:18 -0600 | [diff] [blame] | 5338 | modem_vdd_cdev { |
| 5339 | trip = <&mdm_trip>; |
| 5340 | cooling-device = <&modem_vdd 0 0>; |
| 5341 | }; |
| 5342 | adsp_vdd_cdev { |
| 5343 | trip = <&mdm_trip>; |
| 5344 | cooling-device = <&adsp_vdd 0 0>; |
| 5345 | }; |
| 5346 | cdsp_vdd_cdev { |
| 5347 | trip = <&mdm_trip>; |
| 5348 | cooling-device = <&cdsp_vdd 0 0>; |
| 5349 | }; |
| 5350 | slpi_vdd_cdev { |
| 5351 | trip = <&mdm_trip>; |
| 5352 | cooling-device = <&slpi_vdd 0 0>; |
| 5353 | }; |
Ram Chandrasekar | 3ec09c0 | 2017-06-27 11:03:15 -0600 | [diff] [blame] | 5354 | }; |
| 5355 | }; |
| 5356 | }; |