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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* natsemi.c: A Linux PCI Ethernet driver for the NatSemi DP8381x series. */
2/*
3 Written/copyright 1999-2001 by Donald Becker.
4 Portions copyright (c) 2001,2002 Sun Microsystems (thockin@sun.com)
5 Portions copyright 2001,2002 Manfred Spraul (manfred@colorfullife.com)
Mark Brownb27a16b2006-02-02 00:00:01 +00006 Portions copyright 2004 Harald Welte <laforge@gnumonks.org>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
8 This software may be used and distributed according to the terms of
9 the GNU General Public License (GPL), incorporated herein by reference.
10 Drivers based on or derived from this code fall under the GPL and must
11 retain the authorship, copyright and license notice. This file is not
12 a complete program and may only be used when the entire operating
13 system is licensed under the GPL. License for under other terms may be
14 available. Contact the original author for details.
15
16 The original author may be reached as becker@scyld.com, or at
17 Scyld Computing Corporation
18 410 Severn Ave., Suite 210
19 Annapolis MD 21403
20
21 Support information and updates available at
22 http://www.scyld.com/network/netsemi.html
Jeff Garzik03a8c662006-06-27 07:57:22 -040023 [link no longer provides useful info -jgarzik]
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 TODO:
27 * big endian support with CFG:BEM instead of cpu_to_le32
Linus Torvalds1da177e2005-04-16 15:20:36 -070028*/
29
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <linux/module.h>
31#include <linux/kernel.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/errno.h>
35#include <linux/ioport.h>
36#include <linux/slab.h>
37#include <linux/interrupt.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/skbuff.h>
42#include <linux/init.h>
43#include <linux/spinlock.h>
44#include <linux/ethtool.h>
45#include <linux/delay.h>
46#include <linux/rtnetlink.h>
47#include <linux/mii.h>
48#include <linux/crc32.h>
49#include <linux/bitops.h>
Mark Brownb27a16b2006-02-02 00:00:01 +000050#include <linux/prefetch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <asm/processor.h> /* Processor type for cache alignment. */
52#include <asm/io.h>
53#include <asm/irq.h>
54#include <asm/uaccess.h>
55
56#define DRV_NAME "natsemi"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040057#define DRV_VERSION "2.1"
58#define DRV_RELDATE "Sept 11, 2006"
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
60#define RX_OFFSET 2
61
62/* Updated to recommendations in pci-skeleton v2.03. */
63
64/* The user-configurable values.
65 These may be modified when a driver module is loaded.*/
66
67#define NATSEMI_DEF_MSG (NETIF_MSG_DRV | \
68 NETIF_MSG_LINK | \
69 NETIF_MSG_WOL | \
70 NETIF_MSG_RX_ERR | \
71 NETIF_MSG_TX_ERR)
72static int debug = -1;
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074static int mtu;
75
76/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
77 This chip uses a 512 element hash table based on the Ethernet CRC. */
Arjan van de Venf71e1302006-03-03 21:33:57 -050078static const int multicast_filter_limit = 100;
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
80/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
81 Setting to > 1518 effectively disables this feature. */
82static int rx_copybreak;
83
Mark Brown1a147802007-05-03 10:36:56 +010084static int dspcfg_workaround = 1;
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086/* Used to pass the media type, etc.
87 Both 'options[]' and 'full_duplex[]' should exist for driver
88 interoperability.
89 The media type is usually passed in 'options[]'.
90*/
91#define MAX_UNITS 8 /* More are supported, limit only on options */
92static int options[MAX_UNITS];
93static int full_duplex[MAX_UNITS];
94
95/* Operational parameters that are set at compile time. */
96
97/* Keep the ring sizes a power of two for compile efficiency.
98 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
99 Making the Tx ring too large decreases the effectiveness of channel
100 bonding and packet priority.
101 There are no ill effects from too-large receive rings. */
102#define TX_RING_SIZE 16
103#define TX_QUEUE_LEN 10 /* Limit ring entries actually used, min 4. */
104#define RX_RING_SIZE 32
105
106/* Operational parameters that usually are not changed. */
107/* Time in jiffies before concluding the transmitter is hung. */
108#define TX_TIMEOUT (2*HZ)
109
110#define NATSEMI_HW_TIMEOUT 400
Mark Brownf2cade12007-10-09 22:57:39 +0100111#define NATSEMI_TIMER_FREQ 5*HZ
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112#define NATSEMI_PG0_NREGS 64
113#define NATSEMI_RFDR_NREGS 8
114#define NATSEMI_PG1_NREGS 4
115#define NATSEMI_NREGS (NATSEMI_PG0_NREGS + NATSEMI_RFDR_NREGS + \
116 NATSEMI_PG1_NREGS)
117#define NATSEMI_REGS_VER 1 /* v1 added RFDR registers */
118#define NATSEMI_REGS_SIZE (NATSEMI_NREGS * sizeof(u32))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
120/* Buffer sizes:
121 * The nic writes 32-bit values, even if the upper bytes of
122 * a 32-bit value are beyond the end of the buffer.
123 */
124#define NATSEMI_HEADERS 22 /* 2*mac,type,vlan,crc */
125#define NATSEMI_PADDING 16 /* 2 bytes should be sufficient */
126#define NATSEMI_LONGPKT 1518 /* limit for normal packets */
127#define NATSEMI_RX_LIMIT 2046 /* maximum supported by hardware */
128
129/* These identify the driver base version and may not be removed. */
Andrew Mortonaa738ad2008-02-09 23:41:08 -0800130static char version[] __devinitdata =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 KERN_INFO DRV_NAME " dp8381x driver, version "
132 DRV_VERSION ", " DRV_RELDATE "\n"
133 KERN_INFO " originally by Donald Becker <becker@scyld.com>\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 KERN_INFO " 2.4.x kernel port by Jeff Garzik, Tjeerd Mulder\n";
135
136MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
137MODULE_DESCRIPTION("National Semiconductor DP8381x series PCI Ethernet driver");
138MODULE_LICENSE("GPL");
139
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140module_param(mtu, int, 0);
141module_param(debug, int, 0);
142module_param(rx_copybreak, int, 0);
Mark Brown1a147802007-05-03 10:36:56 +0100143module_param(dspcfg_workaround, int, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144module_param_array(options, int, NULL, 0);
145module_param_array(full_duplex, int, NULL, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146MODULE_PARM_DESC(mtu, "DP8381x MTU (all boards)");
147MODULE_PARM_DESC(debug, "DP8381x default debug level");
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400148MODULE_PARM_DESC(rx_copybreak,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 "DP8381x copy breakpoint for copy-only-tiny-frames");
Mark Brown1a147802007-05-03 10:36:56 +0100150MODULE_PARM_DESC(dspcfg_workaround, "DP8381x: control DspCfg workaround");
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400151MODULE_PARM_DESC(options,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 "DP8381x: Bits 0-3: media type, bit 17: full duplex");
153MODULE_PARM_DESC(full_duplex, "DP8381x full duplex setting(s) (1)");
154
155/*
156 Theory of Operation
157
158I. Board Compatibility
159
160This driver is designed for National Semiconductor DP83815 PCI Ethernet NIC.
161It also works with other chips in in the DP83810 series.
162
163II. Board-specific settings
164
165This driver requires the PCI interrupt line to be valid.
166It honors the EEPROM-set values.
167
168III. Driver operation
169
170IIIa. Ring buffers
171
172This driver uses two statically allocated fixed-size descriptor lists
173formed into rings by a branch from the final descriptor to the beginning of
174the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
175The NatSemi design uses a 'next descriptor' pointer that the driver forms
176into a list.
177
178IIIb/c. Transmit/Receive Structure
179
180This driver uses a zero-copy receive and transmit scheme.
181The driver allocates full frame size skbuffs for the Rx ring buffers at
182open() time and passes the skb->data field to the chip as receive data
183buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
184a fresh skbuff is allocated and the frame is copied to the new skbuff.
185When the incoming frame is larger, the skbuff is passed directly up the
186protocol stack. Buffers consumed this way are replaced by newly allocated
187skbuffs in a later phase of receives.
188
189The RX_COPYBREAK value is chosen to trade-off the memory wasted by
190using a full-sized skbuff for small frames vs. the copying costs of larger
191frames. New boards are typically used in generously configured machines
192and the underfilled buffers have negligible impact compared to the benefit of
193a single allocation size, so the default value of zero results in never
194copying packets. When copying is done, the cost is usually mitigated by using
195a combined copy/checksum routine. Copying also preloads the cache, which is
196most useful with small frames.
197
198A subtle aspect of the operation is that unaligned buffers are not permitted
199by the hardware. Thus the IP header at offset 14 in an ethernet frame isn't
200longword aligned for further processing. On copies frames are put into the
201skbuff at an offset of "+2", 16-byte aligning the IP header.
202
203IIId. Synchronization
204
205Most operations are synchronized on the np->lock irq spinlock, except the
Mark Brown6344f052008-01-27 13:58:11 +0000206recieve and transmit paths which are synchronised using a combination of
207hardware descriptor ownership, disabling interrupts and NAPI poll scheduling.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208
209IVb. References
210
211http://www.scyld.com/expert/100mbps.html
212http://www.scyld.com/expert/NWay.html
213Datasheet is available from:
214http://www.national.com/pf/DP/DP83815.html
215
216IVc. Errata
217
218None characterised.
219*/
220
221
222
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223/*
224 * Support for fibre connections on Am79C874:
225 * This phy needs a special setup when connected to a fibre cable.
226 * http://www.amd.com/files/connectivitysolutions/networking/archivednetworking/22235.pdf
227 */
228#define PHYID_AM79C874 0x0022561b
229
Jeff Garzika2b524b2006-06-26 22:48:38 -0400230enum {
231 MII_MCTRL = 0x15, /* mode control register */
232 MII_FX_SEL = 0x0001, /* 100BASE-FX (fiber) */
233 MII_EN_SCRM = 0x0004, /* enable scrambler (tp) */
234};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235
Mark Brown6aab4442007-02-19 20:15:40 +0000236enum {
237 NATSEMI_FLAG_IGNORE_PHY = 0x1,
238};
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400239
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240/* array of board data directly indexed by pci_tbl[x].driver_data */
Andrew Mortonaa738ad2008-02-09 23:41:08 -0800241static struct {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242 const char *name;
243 unsigned long flags;
Jeff Garzika2b524b2006-06-26 22:48:38 -0400244 unsigned int eeprom_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245} natsemi_pci_info[] __devinitdata = {
Mark Brown6aab4442007-02-19 20:15:40 +0000246 { "Aculab E1/T1 PMXc cPCI carrier card", NATSEMI_FLAG_IGNORE_PHY, 128 },
Jeff Garzika2b524b2006-06-26 22:48:38 -0400247 { "NatSemi DP8381[56]", 0, 24 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248};
249
Andrew Mortonaa738ad2008-02-09 23:41:08 -0800250static struct pci_device_id natsemi_pci_tbl[] __devinitdata = {
Mark Brown6aab4442007-02-19 20:15:40 +0000251 { PCI_VENDOR_ID_NS, 0x0020, 0x12d9, 0x000c, 0, 0, 0 },
Mark Brown36c843d2007-02-25 15:37:27 +0000252 { PCI_VENDOR_ID_NS, 0x0020, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
Jeff Garzika2b524b2006-06-26 22:48:38 -0400253 { } /* terminate list */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254};
255MODULE_DEVICE_TABLE(pci, natsemi_pci_tbl);
256
257/* Offsets to the device registers.
258 Unlike software-only systems, device drivers interact with complex hardware.
259 It's not useful to define symbolic names for every register bit in the
260 device.
261*/
262enum register_offsets {
263 ChipCmd = 0x00,
264 ChipConfig = 0x04,
265 EECtrl = 0x08,
266 PCIBusCfg = 0x0C,
267 IntrStatus = 0x10,
268 IntrMask = 0x14,
269 IntrEnable = 0x18,
270 IntrHoldoff = 0x1C, /* DP83816 only */
271 TxRingPtr = 0x20,
272 TxConfig = 0x24,
273 RxRingPtr = 0x30,
274 RxConfig = 0x34,
275 ClkRun = 0x3C,
276 WOLCmd = 0x40,
277 PauseCmd = 0x44,
278 RxFilterAddr = 0x48,
279 RxFilterData = 0x4C,
280 BootRomAddr = 0x50,
281 BootRomData = 0x54,
282 SiliconRev = 0x58,
283 StatsCtrl = 0x5C,
284 StatsData = 0x60,
285 RxPktErrs = 0x60,
286 RxMissed = 0x68,
287 RxCRCErrs = 0x64,
288 BasicControl = 0x80,
289 BasicStatus = 0x84,
290 AnegAdv = 0x90,
291 AnegPeer = 0x94,
292 PhyStatus = 0xC0,
293 MIntrCtrl = 0xC4,
294 MIntrStatus = 0xC8,
295 PhyCtrl = 0xE4,
296
297 /* These are from the spec, around page 78... on a separate table.
298 * The meaning of these registers depend on the value of PGSEL. */
299 PGSEL = 0xCC,
300 PMDCSR = 0xE4,
301 TSTDAT = 0xFC,
302 DSPCFG = 0xF4,
303 SDCFG = 0xF8
304};
305/* the values for the 'magic' registers above (PGSEL=1) */
306#define PMDCSR_VAL 0x189c /* enable preferred adaptation circuitry */
307#define TSTDAT_VAL 0x0
308#define DSPCFG_VAL 0x5040
309#define SDCFG_VAL 0x008c /* set voltage thresholds for Signal Detect */
310#define DSPCFG_LOCK 0x20 /* coefficient lock bit in DSPCFG */
311#define DSPCFG_COEF 0x1000 /* see coefficient (in TSTDAT) bit in DSPCFG */
312#define TSTDAT_FIXED 0xe8 /* magic number for bad coefficients */
313
314/* misc PCI space registers */
315enum pci_register_offsets {
316 PCIPM = 0x44,
317};
318
319enum ChipCmd_bits {
320 ChipReset = 0x100,
321 RxReset = 0x20,
322 TxReset = 0x10,
323 RxOff = 0x08,
324 RxOn = 0x04,
325 TxOff = 0x02,
326 TxOn = 0x01,
327};
328
329enum ChipConfig_bits {
330 CfgPhyDis = 0x200,
331 CfgPhyRst = 0x400,
332 CfgExtPhy = 0x1000,
333 CfgAnegEnable = 0x2000,
334 CfgAneg100 = 0x4000,
335 CfgAnegFull = 0x8000,
336 CfgAnegDone = 0x8000000,
337 CfgFullDuplex = 0x20000000,
338 CfgSpeed100 = 0x40000000,
339 CfgLink = 0x80000000,
340};
341
342enum EECtrl_bits {
343 EE_ShiftClk = 0x04,
344 EE_DataIn = 0x01,
345 EE_ChipSelect = 0x08,
346 EE_DataOut = 0x02,
347 MII_Data = 0x10,
348 MII_Write = 0x20,
349 MII_ShiftClk = 0x40,
350};
351
352enum PCIBusCfg_bits {
353 EepromReload = 0x4,
354};
355
356/* Bits in the interrupt status/mask registers. */
357enum IntrStatus_bits {
358 IntrRxDone = 0x0001,
359 IntrRxIntr = 0x0002,
360 IntrRxErr = 0x0004,
361 IntrRxEarly = 0x0008,
362 IntrRxIdle = 0x0010,
363 IntrRxOverrun = 0x0020,
364 IntrTxDone = 0x0040,
365 IntrTxIntr = 0x0080,
366 IntrTxErr = 0x0100,
367 IntrTxIdle = 0x0200,
368 IntrTxUnderrun = 0x0400,
369 StatsMax = 0x0800,
370 SWInt = 0x1000,
371 WOLPkt = 0x2000,
372 LinkChange = 0x4000,
373 IntrHighBits = 0x8000,
374 RxStatusFIFOOver = 0x10000,
375 IntrPCIErr = 0xf00000,
376 RxResetDone = 0x1000000,
377 TxResetDone = 0x2000000,
378 IntrAbnormalSummary = 0xCD20,
379};
380
381/*
382 * Default Interrupts:
383 * Rx OK, Rx Packet Error, Rx Overrun,
384 * Tx OK, Tx Packet Error, Tx Underrun,
385 * MIB Service, Phy Interrupt, High Bits,
386 * Rx Status FIFO overrun,
387 * Received Target Abort, Received Master Abort,
388 * Signalled System Error, Received Parity Error
389 */
390#define DEFAULT_INTR 0x00f1cd65
391
392enum TxConfig_bits {
393 TxDrthMask = 0x3f,
394 TxFlthMask = 0x3f00,
395 TxMxdmaMask = 0x700000,
396 TxMxdma_512 = 0x0,
397 TxMxdma_4 = 0x100000,
398 TxMxdma_8 = 0x200000,
399 TxMxdma_16 = 0x300000,
400 TxMxdma_32 = 0x400000,
401 TxMxdma_64 = 0x500000,
402 TxMxdma_128 = 0x600000,
403 TxMxdma_256 = 0x700000,
404 TxCollRetry = 0x800000,
405 TxAutoPad = 0x10000000,
406 TxMacLoop = 0x20000000,
407 TxHeartIgn = 0x40000000,
408 TxCarrierIgn = 0x80000000
409};
410
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400411/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412 * Tx Configuration:
413 * - 256 byte DMA burst length
414 * - fill threshold 512 bytes (i.e. restart DMA when 512 bytes are free)
415 * - 64 bytes initial drain threshold (i.e. begin actual transmission
416 * when 64 byte are in the fifo)
417 * - on tx underruns, increase drain threshold by 64.
418 * - at most use a drain threshold of 1472 bytes: The sum of the fill
419 * threshold and the drain threshold must be less than 2016 bytes.
420 *
421 */
422#define TX_FLTH_VAL ((512/32) << 8)
423#define TX_DRTH_VAL_START (64/32)
424#define TX_DRTH_VAL_INC 2
425#define TX_DRTH_VAL_LIMIT (1472/32)
426
427enum RxConfig_bits {
428 RxDrthMask = 0x3e,
429 RxMxdmaMask = 0x700000,
430 RxMxdma_512 = 0x0,
431 RxMxdma_4 = 0x100000,
432 RxMxdma_8 = 0x200000,
433 RxMxdma_16 = 0x300000,
434 RxMxdma_32 = 0x400000,
435 RxMxdma_64 = 0x500000,
436 RxMxdma_128 = 0x600000,
437 RxMxdma_256 = 0x700000,
438 RxAcceptLong = 0x8000000,
439 RxAcceptTx = 0x10000000,
440 RxAcceptRunt = 0x40000000,
441 RxAcceptErr = 0x80000000
442};
443#define RX_DRTH_VAL (128/8)
444
445enum ClkRun_bits {
446 PMEEnable = 0x100,
447 PMEStatus = 0x8000,
448};
449
450enum WolCmd_bits {
451 WakePhy = 0x1,
452 WakeUnicast = 0x2,
453 WakeMulticast = 0x4,
454 WakeBroadcast = 0x8,
455 WakeArp = 0x10,
456 WakePMatch0 = 0x20,
457 WakePMatch1 = 0x40,
458 WakePMatch2 = 0x80,
459 WakePMatch3 = 0x100,
460 WakeMagic = 0x200,
461 WakeMagicSecure = 0x400,
462 SecureHack = 0x100000,
463 WokePhy = 0x400000,
464 WokeUnicast = 0x800000,
465 WokeMulticast = 0x1000000,
466 WokeBroadcast = 0x2000000,
467 WokeArp = 0x4000000,
468 WokePMatch0 = 0x8000000,
469 WokePMatch1 = 0x10000000,
470 WokePMatch2 = 0x20000000,
471 WokePMatch3 = 0x40000000,
472 WokeMagic = 0x80000000,
473 WakeOptsSummary = 0x7ff
474};
475
476enum RxFilterAddr_bits {
477 RFCRAddressMask = 0x3ff,
478 AcceptMulticast = 0x00200000,
479 AcceptMyPhys = 0x08000000,
480 AcceptAllPhys = 0x10000000,
481 AcceptAllMulticast = 0x20000000,
482 AcceptBroadcast = 0x40000000,
483 RxFilterEnable = 0x80000000
484};
485
486enum StatsCtrl_bits {
487 StatsWarn = 0x1,
488 StatsFreeze = 0x2,
489 StatsClear = 0x4,
490 StatsStrobe = 0x8,
491};
492
493enum MIntrCtrl_bits {
494 MICRIntEn = 0x2,
495};
496
497enum PhyCtrl_bits {
498 PhyAddrMask = 0x1f,
499};
500
501#define PHY_ADDR_NONE 32
502#define PHY_ADDR_INTERNAL 1
503
504/* values we might find in the silicon revision register */
505#define SRR_DP83815_C 0x0302
506#define SRR_DP83815_D 0x0403
507#define SRR_DP83816_A4 0x0504
508#define SRR_DP83816_A5 0x0505
509
510/* The Rx and Tx buffer descriptors. */
511/* Note that using only 32 bit fields simplifies conversion to big-endian
512 architectures. */
513struct netdev_desc {
Al Viroeca1ad82008-03-16 22:21:54 +0000514 __le32 next_desc;
515 __le32 cmd_status;
516 __le32 addr;
517 __le32 software_use;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518};
519
520/* Bits in network_desc.status */
521enum desc_status_bits {
522 DescOwn=0x80000000, DescMore=0x40000000, DescIntr=0x20000000,
523 DescNoCRC=0x10000000, DescPktOK=0x08000000,
524 DescSizeMask=0xfff,
525
526 DescTxAbort=0x04000000, DescTxFIFO=0x02000000,
527 DescTxCarrier=0x01000000, DescTxDefer=0x00800000,
528 DescTxExcDefer=0x00400000, DescTxOOWCol=0x00200000,
529 DescTxExcColl=0x00100000, DescTxCollCount=0x000f0000,
530
531 DescRxAbort=0x04000000, DescRxOver=0x02000000,
532 DescRxDest=0x01800000, DescRxLong=0x00400000,
533 DescRxRunt=0x00200000, DescRxInvalid=0x00100000,
534 DescRxCRC=0x00080000, DescRxAlign=0x00040000,
535 DescRxLoop=0x00020000, DesRxColl=0x00010000,
536};
537
538struct netdev_private {
539 /* Descriptor rings first for alignment */
540 dma_addr_t ring_dma;
541 struct netdev_desc *rx_ring;
542 struct netdev_desc *tx_ring;
543 /* The addresses of receive-in-place skbuffs */
544 struct sk_buff *rx_skbuff[RX_RING_SIZE];
545 dma_addr_t rx_dma[RX_RING_SIZE];
546 /* address of a sent-in-place packet/buffer, for later free() */
547 struct sk_buff *tx_skbuff[TX_RING_SIZE];
548 dma_addr_t tx_dma[TX_RING_SIZE];
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700549 struct net_device *dev;
550 struct napi_struct napi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 struct net_device_stats stats;
552 /* Media monitoring timer */
553 struct timer_list timer;
554 /* Frequently used values: keep some adjacent for cache effect */
555 struct pci_dev *pci_dev;
556 struct netdev_desc *rx_head_desc;
557 /* Producer/consumer ring indices */
558 unsigned int cur_rx, dirty_rx;
559 unsigned int cur_tx, dirty_tx;
560 /* Based on MTU+slack. */
561 unsigned int rx_buf_sz;
562 int oom;
Mark Brownb27a16b2006-02-02 00:00:01 +0000563 /* Interrupt status */
564 u32 intr_status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 /* Do not touch the nic registers */
566 int hands_off;
Mark Brown68c90162007-02-19 20:15:39 +0000567 /* Don't pay attention to the reported link state. */
568 int ignore_phy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569 /* external phy that is used: only valid if dev->if_port != PORT_TP */
570 int mii;
571 int phy_addr_external;
572 unsigned int full_duplex;
573 /* Rx filter */
574 u32 cur_rx_mode;
575 u32 rx_filter[16];
576 /* FIFO and PCI burst thresholds */
577 u32 tx_config, rx_config;
578 /* original contents of ClkRun register */
579 u32 SavedClkRun;
580 /* silicon revision */
581 u32 srr;
582 /* expected DSPCFG value */
583 u16 dspcfg;
Mark Brown1a147802007-05-03 10:36:56 +0100584 int dspcfg_workaround;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585 /* parms saved in ethtool format */
586 u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */
587 u8 duplex; /* Duplex, half or full */
588 u8 autoneg; /* Autonegotiation enabled */
589 /* MII transceiver section */
590 u16 advertising;
591 unsigned int iosize;
592 spinlock_t lock;
593 u32 msg_enable;
Mark Browna8b4cf42006-03-28 14:08:55 -0800594 /* EEPROM data */
595 int eeprom_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596};
597
598static void move_int_phy(struct net_device *dev, int addr);
599static int eeprom_read(void __iomem *ioaddr, int location);
600static int mdio_read(struct net_device *dev, int reg);
601static void mdio_write(struct net_device *dev, int reg, u16 data);
602static void init_phy_fixup(struct net_device *dev);
603static int miiport_read(struct net_device *dev, int phy_id, int reg);
604static void miiport_write(struct net_device *dev, int phy_id, int reg, u16 data);
605static int find_mii(struct net_device *dev);
606static void natsemi_reset(struct net_device *dev);
607static void natsemi_reload_eeprom(struct net_device *dev);
608static void natsemi_stop_rxtx(struct net_device *dev);
609static int netdev_open(struct net_device *dev);
610static void do_cable_magic(struct net_device *dev);
611static void undo_cable_magic(struct net_device *dev);
612static void check_link(struct net_device *dev);
613static void netdev_timer(unsigned long data);
614static void dump_ring(struct net_device *dev);
615static void tx_timeout(struct net_device *dev);
616static int alloc_ring(struct net_device *dev);
617static void refill_rx(struct net_device *dev);
618static void init_ring(struct net_device *dev);
619static void drain_tx(struct net_device *dev);
620static void drain_ring(struct net_device *dev);
621static void free_ring(struct net_device *dev);
622static void reinit_ring(struct net_device *dev);
623static void init_registers(struct net_device *dev);
624static int start_tx(struct sk_buff *skb, struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100625static irqreturn_t intr_handler(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626static void netdev_error(struct net_device *dev, int intr_status);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700627static int natsemi_poll(struct napi_struct *napi, int budget);
Mark Brownb27a16b2006-02-02 00:00:01 +0000628static void netdev_rx(struct net_device *dev, int *work_done, int work_to_do);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629static void netdev_tx_done(struct net_device *dev);
630static int natsemi_change_mtu(struct net_device *dev, int new_mtu);
631#ifdef CONFIG_NET_POLL_CONTROLLER
632static void natsemi_poll_controller(struct net_device *dev);
633#endif
634static void __set_rx_mode(struct net_device *dev);
635static void set_rx_mode(struct net_device *dev);
636static void __get_stats(struct net_device *dev);
637static struct net_device_stats *get_stats(struct net_device *dev);
638static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
639static int netdev_set_wol(struct net_device *dev, u32 newval);
640static int netdev_get_wol(struct net_device *dev, u32 *supported, u32 *cur);
641static int netdev_set_sopass(struct net_device *dev, u8 *newval);
642static int netdev_get_sopass(struct net_device *dev, u8 *data);
643static int netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd);
644static int netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd);
645static void enable_wol_mode(struct net_device *dev, int enable_intr);
646static int netdev_close(struct net_device *dev);
647static int netdev_get_regs(struct net_device *dev, u8 *buf);
648static int netdev_get_eeprom(struct net_device *dev, u8 *buf);
Jeff Garzik7282d492006-09-13 14:30:00 -0400649static const struct ethtool_ops ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650
Mark Brown1a147802007-05-03 10:36:56 +0100651#define NATSEMI_ATTR(_name) \
652static ssize_t natsemi_show_##_name(struct device *dev, \
653 struct device_attribute *attr, char *buf); \
654 static ssize_t natsemi_set_##_name(struct device *dev, \
655 struct device_attribute *attr, \
656 const char *buf, size_t count); \
657 static DEVICE_ATTR(_name, 0644, natsemi_show_##_name, natsemi_set_##_name)
658
659#define NATSEMI_CREATE_FILE(_dev, _name) \
660 device_create_file(&_dev->dev, &dev_attr_##_name)
661#define NATSEMI_REMOVE_FILE(_dev, _name) \
Jeff Garzikf6c42862007-07-17 00:01:09 -0400662 device_remove_file(&_dev->dev, &dev_attr_##_name)
Mark Brown1a147802007-05-03 10:36:56 +0100663
664NATSEMI_ATTR(dspcfg_workaround);
665
666static ssize_t natsemi_show_dspcfg_workaround(struct device *dev,
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -0400667 struct device_attribute *attr,
Mark Brown1a147802007-05-03 10:36:56 +0100668 char *buf)
669{
670 struct netdev_private *np = netdev_priv(to_net_dev(dev));
671
672 return sprintf(buf, "%s\n", np->dspcfg_workaround ? "on" : "off");
673}
674
675static ssize_t natsemi_set_dspcfg_workaround(struct device *dev,
676 struct device_attribute *attr,
677 const char *buf, size_t count)
678{
679 struct netdev_private *np = netdev_priv(to_net_dev(dev));
680 int new_setting;
Gregory Haskinsd41f2d12007-06-15 17:17:50 -0400681 unsigned long flags;
Mark Brown1a147802007-05-03 10:36:56 +0100682
683 /* Find out the new setting */
684 if (!strncmp("on", buf, count - 1) || !strncmp("1", buf, count - 1))
685 new_setting = 1;
686 else if (!strncmp("off", buf, count - 1)
687 || !strncmp("0", buf, count - 1))
688 new_setting = 0;
689 else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -0400690 return count;
Mark Brown1a147802007-05-03 10:36:56 +0100691
692 spin_lock_irqsave(&np->lock, flags);
693
694 np->dspcfg_workaround = new_setting;
695
696 spin_unlock_irqrestore(&np->lock, flags);
697
698 return count;
699}
700
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701static inline void __iomem *ns_ioaddr(struct net_device *dev)
702{
703 return (void __iomem *) dev->base_addr;
704}
705
Mark Brownb27a16b2006-02-02 00:00:01 +0000706static inline void natsemi_irq_enable(struct net_device *dev)
707{
708 writel(1, ns_ioaddr(dev) + IntrEnable);
709 readl(ns_ioaddr(dev) + IntrEnable);
710}
711
712static inline void natsemi_irq_disable(struct net_device *dev)
713{
714 writel(0, ns_ioaddr(dev) + IntrEnable);
715 readl(ns_ioaddr(dev) + IntrEnable);
716}
717
Linus Torvalds1da177e2005-04-16 15:20:36 -0700718static void move_int_phy(struct net_device *dev, int addr)
719{
720 struct netdev_private *np = netdev_priv(dev);
721 void __iomem *ioaddr = ns_ioaddr(dev);
722 int target = 31;
723
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400724 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700725 * The internal phy is visible on the external mii bus. Therefore we must
726 * move it away before we can send commands to an external phy.
727 * There are two addresses we must avoid:
728 * - the address on the external phy that is used for transmission.
729 * - the address that we want to access. User space can access phys
730 * on the mii bus with SIOCGMIIREG/SIOCSMIIREG, independant from the
731 * phy that is used for transmission.
732 */
733
734 if (target == addr)
735 target--;
736 if (target == np->phy_addr_external)
737 target--;
738 writew(target, ioaddr + PhyCtrl);
739 readw(ioaddr + PhyCtrl);
740 udelay(1);
741}
742
Jeff Garzik5a40f092006-06-26 22:24:03 -0400743static void __devinit natsemi_init_media (struct net_device *dev)
744{
745 struct netdev_private *np = netdev_priv(dev);
746 u32 tmp;
747
Mark Brown68c90162007-02-19 20:15:39 +0000748 if (np->ignore_phy)
749 netif_carrier_on(dev);
750 else
751 netif_carrier_off(dev);
Jeff Garzik5a40f092006-06-26 22:24:03 -0400752
753 /* get the initial settings from hardware */
754 tmp = mdio_read(dev, MII_BMCR);
755 np->speed = (tmp & BMCR_SPEED100)? SPEED_100 : SPEED_10;
756 np->duplex = (tmp & BMCR_FULLDPLX)? DUPLEX_FULL : DUPLEX_HALF;
757 np->autoneg = (tmp & BMCR_ANENABLE)? AUTONEG_ENABLE: AUTONEG_DISABLE;
758 np->advertising= mdio_read(dev, MII_ADVERTISE);
759
760 if ((np->advertising & ADVERTISE_ALL) != ADVERTISE_ALL
761 && netif_msg_probe(np)) {
762 printk(KERN_INFO "natsemi %s: Transceiver default autonegotiation %s "
763 "10%s %s duplex.\n",
764 pci_name(np->pci_dev),
765 (mdio_read(dev, MII_BMCR) & BMCR_ANENABLE)?
766 "enabled, advertise" : "disabled, force",
767 (np->advertising &
768 (ADVERTISE_100FULL|ADVERTISE_100HALF))?
769 "0" : "",
770 (np->advertising &
771 (ADVERTISE_100FULL|ADVERTISE_10FULL))?
772 "full" : "half");
773 }
774 if (netif_msg_probe(np))
775 printk(KERN_INFO
776 "natsemi %s: Transceiver status %#04x advertising %#04x.\n",
777 pci_name(np->pci_dev), mdio_read(dev, MII_BMSR),
778 np->advertising);
779
780}
781
Linus Torvalds1da177e2005-04-16 15:20:36 -0700782static int __devinit natsemi_probe1 (struct pci_dev *pdev,
783 const struct pci_device_id *ent)
784{
785 struct net_device *dev;
786 struct netdev_private *np;
787 int i, option, irq, chip_idx = ent->driver_data;
788 static int find_cnt = -1;
Sergei Shtylyov703bb992008-04-12 20:58:30 +0400789 resource_size_t iostart;
790 unsigned long iosize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791 void __iomem *ioaddr;
792 const int pcibar = 1; /* PCI base address register */
793 int prev_eedata;
794 u32 tmp;
Joe Perches0795af52007-10-03 17:59:30 -0700795 DECLARE_MAC_BUF(mac);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796
797/* when built into the kernel, we only print version if device is found */
798#ifndef MODULE
799 static int printed_version;
800 if (!printed_version++)
801 printk(version);
802#endif
803
804 i = pci_enable_device(pdev);
805 if (i) return i;
806
807 /* natsemi has a non-standard PM control register
808 * in PCI config space. Some boards apparently need
809 * to be brought to D0 in this manner.
810 */
811 pci_read_config_dword(pdev, PCIPM, &tmp);
812 if (tmp & PCI_PM_CTRL_STATE_MASK) {
813 /* D0 state, disable PME assertion */
814 u32 newtmp = tmp & ~PCI_PM_CTRL_STATE_MASK;
815 pci_write_config_dword(pdev, PCIPM, newtmp);
816 }
817
818 find_cnt++;
819 iostart = pci_resource_start(pdev, pcibar);
820 iosize = pci_resource_len(pdev, pcibar);
821 irq = pdev->irq;
822
Jeff Garzika2b524b2006-06-26 22:48:38 -0400823 pci_set_master(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824
825 dev = alloc_etherdev(sizeof (struct netdev_private));
826 if (!dev)
827 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700828 SET_NETDEV_DEV(dev, &pdev->dev);
829
830 i = pci_request_regions(pdev, DRV_NAME);
831 if (i)
832 goto err_pci_request_regions;
833
834 ioaddr = ioremap(iostart, iosize);
835 if (!ioaddr) {
836 i = -ENOMEM;
837 goto err_ioremap;
838 }
839
840 /* Work around the dropped serial bit. */
841 prev_eedata = eeprom_read(ioaddr, 6);
842 for (i = 0; i < 3; i++) {
843 int eedata = eeprom_read(ioaddr, i + 7);
844 dev->dev_addr[i*2] = (eedata << 1) + (prev_eedata >> 15);
845 dev->dev_addr[i*2+1] = eedata >> 7;
846 prev_eedata = eedata;
847 }
848
849 dev->base_addr = (unsigned long __force) ioaddr;
850 dev->irq = irq;
851
852 np = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700853 netif_napi_add(dev, &np->napi, natsemi_poll, 64);
Ingo Molnarbbbab5c2007-10-24 13:58:57 +0200854 np->dev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700855
856 np->pci_dev = pdev;
857 pci_set_drvdata(pdev, dev);
858 np->iosize = iosize;
859 spin_lock_init(&np->lock);
860 np->msg_enable = (debug >= 0) ? (1<<debug)-1 : NATSEMI_DEF_MSG;
861 np->hands_off = 0;
Mark Brownb27a16b2006-02-02 00:00:01 +0000862 np->intr_status = 0;
Jeff Garzika2b524b2006-06-26 22:48:38 -0400863 np->eeprom_size = natsemi_pci_info[chip_idx].eeprom_size;
Mark Brown6aab4442007-02-19 20:15:40 +0000864 if (natsemi_pci_info[chip_idx].flags & NATSEMI_FLAG_IGNORE_PHY)
865 np->ignore_phy = 1;
866 else
867 np->ignore_phy = 0;
Mark Brown1a147802007-05-03 10:36:56 +0100868 np->dspcfg_workaround = dspcfg_workaround;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700869
870 /* Initial port:
Mark Brown68c90162007-02-19 20:15:39 +0000871 * - If configured to ignore the PHY set up for external.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700872 * - If the nic was configured to use an external phy and if find_mii
873 * finds a phy: use external port, first phy that replies.
874 * - Otherwise: internal port.
875 * Note that the phy address for the internal phy doesn't matter:
876 * The address would be used to access a phy over the mii bus, but
877 * the internal phy is accessed through mapped registers.
878 */
Mark Brown68c90162007-02-19 20:15:39 +0000879 if (np->ignore_phy || readl(ioaddr + ChipConfig) & CfgExtPhy)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880 dev->if_port = PORT_MII;
881 else
882 dev->if_port = PORT_TP;
883 /* Reset the chip to erase previous misconfiguration. */
884 natsemi_reload_eeprom(dev);
885 natsemi_reset(dev);
886
887 if (dev->if_port != PORT_TP) {
888 np->phy_addr_external = find_mii(dev);
Mark Brown68c90162007-02-19 20:15:39 +0000889 /* If we're ignoring the PHY it doesn't matter if we can't
890 * find one. */
891 if (!np->ignore_phy && np->phy_addr_external == PHY_ADDR_NONE) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700892 dev->if_port = PORT_TP;
893 np->phy_addr_external = PHY_ADDR_INTERNAL;
894 }
895 } else {
896 np->phy_addr_external = PHY_ADDR_INTERNAL;
897 }
898
899 option = find_cnt < MAX_UNITS ? options[find_cnt] : 0;
900 if (dev->mem_start)
901 option = dev->mem_start;
902
903 /* The lower four bits are the media type. */
904 if (option) {
905 if (option & 0x200)
906 np->full_duplex = 1;
907 if (option & 15)
908 printk(KERN_INFO
909 "natsemi %s: ignoring user supplied media type %d",
910 pci_name(np->pci_dev), option & 15);
911 }
912 if (find_cnt < MAX_UNITS && full_duplex[find_cnt])
913 np->full_duplex = 1;
914
915 /* The chip-specific entries in the device structure. */
916 dev->open = &netdev_open;
917 dev->hard_start_xmit = &start_tx;
918 dev->stop = &netdev_close;
919 dev->get_stats = &get_stats;
920 dev->set_multicast_list = &set_rx_mode;
921 dev->change_mtu = &natsemi_change_mtu;
922 dev->do_ioctl = &netdev_ioctl;
923 dev->tx_timeout = &tx_timeout;
924 dev->watchdog_timeo = TX_TIMEOUT;
Mark Brownb27a16b2006-02-02 00:00:01 +0000925
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926#ifdef CONFIG_NET_POLL_CONTROLLER
927 dev->poll_controller = &natsemi_poll_controller;
928#endif
929 SET_ETHTOOL_OPS(dev, &ethtool_ops);
930
931 if (mtu)
932 dev->mtu = mtu;
933
Jeff Garzik5a40f092006-06-26 22:24:03 -0400934 natsemi_init_media(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700935
936 /* save the silicon revision for later querying */
937 np->srr = readl(ioaddr + SiliconRev);
938 if (netif_msg_hw(np))
939 printk(KERN_INFO "natsemi %s: silicon revision %#04x.\n",
940 pci_name(np->pci_dev), np->srr);
941
942 i = register_netdev(dev);
943 if (i)
944 goto err_register_netdev;
945
Mark Brown1a147802007-05-03 10:36:56 +0100946 if (NATSEMI_CREATE_FILE(pdev, dspcfg_workaround))
947 goto err_create_file;
948
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 if (netif_msg_drv(np)) {
Sergei Shtylyov703bb992008-04-12 20:58:30 +0400950 printk(KERN_INFO "natsemi %s: %s at %#08llx "
Joe Perches0795af52007-10-03 17:59:30 -0700951 "(%s), %s, IRQ %d",
Sergei Shtylyov703bb992008-04-12 20:58:30 +0400952 dev->name, natsemi_pci_info[chip_idx].name,
953 (unsigned long long)iostart, pci_name(np->pci_dev),
954 print_mac(mac, dev->dev_addr), irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955 if (dev->if_port == PORT_TP)
956 printk(", port TP.\n");
Mark Brown68c90162007-02-19 20:15:39 +0000957 else if (np->ignore_phy)
958 printk(", port MII, ignoring PHY\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700959 else
960 printk(", port MII, phy ad %d.\n", np->phy_addr_external);
961 }
962 return 0;
963
Mark Brown1a147802007-05-03 10:36:56 +0100964 err_create_file:
965 unregister_netdev(dev);
966
Linus Torvalds1da177e2005-04-16 15:20:36 -0700967 err_register_netdev:
968 iounmap(ioaddr);
969
970 err_ioremap:
971 pci_release_regions(pdev);
972 pci_set_drvdata(pdev, NULL);
973
974 err_pci_request_regions:
975 free_netdev(dev);
976 return i;
977}
978
979
980/* Read the EEPROM and MII Management Data I/O (MDIO) interfaces.
981 The EEPROM code is for the common 93c06/46 EEPROMs with 6 bit addresses. */
982
983/* Delay between EEPROM clock transitions.
984 No extra delay is needed with 33Mhz PCI, but future 66Mhz access may need
985 a delay. Note that pre-2.0.34 kernels had a cache-alignment bug that
986 made udelay() unreliable.
987 The old method of using an ISA access as a delay, __SLOW_DOWN_IO__, is
Rolf Eike Beer405bbe92007-10-20 03:10:57 +0200988 deprecated.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989*/
990#define eeprom_delay(ee_addr) readl(ee_addr)
991
992#define EE_Write0 (EE_ChipSelect)
993#define EE_Write1 (EE_ChipSelect | EE_DataIn)
994
995/* The EEPROM commands include the alway-set leading bit. */
996enum EEPROM_Cmds {
997 EE_WriteCmd=(5 << 6), EE_ReadCmd=(6 << 6), EE_EraseCmd=(7 << 6),
998};
999
1000static int eeprom_read(void __iomem *addr, int location)
1001{
1002 int i;
1003 int retval = 0;
1004 void __iomem *ee_addr = addr + EECtrl;
1005 int read_cmd = location | EE_ReadCmd;
1006
1007 writel(EE_Write0, ee_addr);
1008
1009 /* Shift the read command bits out. */
1010 for (i = 10; i >= 0; i--) {
1011 short dataval = (read_cmd & (1 << i)) ? EE_Write1 : EE_Write0;
1012 writel(dataval, ee_addr);
1013 eeprom_delay(ee_addr);
1014 writel(dataval | EE_ShiftClk, ee_addr);
1015 eeprom_delay(ee_addr);
1016 }
1017 writel(EE_ChipSelect, ee_addr);
1018 eeprom_delay(ee_addr);
1019
1020 for (i = 0; i < 16; i++) {
1021 writel(EE_ChipSelect | EE_ShiftClk, ee_addr);
1022 eeprom_delay(ee_addr);
1023 retval |= (readl(ee_addr) & EE_DataOut) ? 1 << i : 0;
1024 writel(EE_ChipSelect, ee_addr);
1025 eeprom_delay(ee_addr);
1026 }
1027
1028 /* Terminate the EEPROM access. */
1029 writel(EE_Write0, ee_addr);
1030 writel(0, ee_addr);
1031 return retval;
1032}
1033
1034/* MII transceiver control section.
1035 * The 83815 series has an internal transceiver, and we present the
1036 * internal management registers as if they were MII connected.
1037 * External Phy registers are referenced through the MII interface.
1038 */
1039
1040/* clock transitions >= 20ns (25MHz)
1041 * One readl should be good to PCI @ 100MHz
1042 */
1043#define mii_delay(ioaddr) readl(ioaddr + EECtrl)
1044
1045static int mii_getbit (struct net_device *dev)
1046{
1047 int data;
1048 void __iomem *ioaddr = ns_ioaddr(dev);
1049
1050 writel(MII_ShiftClk, ioaddr + EECtrl);
1051 data = readl(ioaddr + EECtrl);
1052 writel(0, ioaddr + EECtrl);
1053 mii_delay(ioaddr);
1054 return (data & MII_Data)? 1 : 0;
1055}
1056
1057static void mii_send_bits (struct net_device *dev, u32 data, int len)
1058{
1059 u32 i;
1060 void __iomem *ioaddr = ns_ioaddr(dev);
1061
1062 for (i = (1 << (len-1)); i; i >>= 1)
1063 {
1064 u32 mdio_val = MII_Write | ((data & i)? MII_Data : 0);
1065 writel(mdio_val, ioaddr + EECtrl);
1066 mii_delay(ioaddr);
1067 writel(mdio_val | MII_ShiftClk, ioaddr + EECtrl);
1068 mii_delay(ioaddr);
1069 }
1070 writel(0, ioaddr + EECtrl);
1071 mii_delay(ioaddr);
1072}
1073
1074static int miiport_read(struct net_device *dev, int phy_id, int reg)
1075{
1076 u32 cmd;
1077 int i;
1078 u32 retval = 0;
1079
1080 /* Ensure sync */
1081 mii_send_bits (dev, 0xffffffff, 32);
1082 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1083 /* ST,OP = 0110'b for read operation */
1084 cmd = (0x06 << 10) | (phy_id << 5) | reg;
1085 mii_send_bits (dev, cmd, 14);
1086 /* Turnaround */
1087 if (mii_getbit (dev))
1088 return 0;
1089 /* Read data */
1090 for (i = 0; i < 16; i++) {
1091 retval <<= 1;
1092 retval |= mii_getbit (dev);
1093 }
1094 /* End cycle */
1095 mii_getbit (dev);
1096 return retval;
1097}
1098
1099static void miiport_write(struct net_device *dev, int phy_id, int reg, u16 data)
1100{
1101 u32 cmd;
1102
1103 /* Ensure sync */
1104 mii_send_bits (dev, 0xffffffff, 32);
1105 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1106 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1107 cmd = (0x5002 << 16) | (phy_id << 23) | (reg << 18) | data;
1108 mii_send_bits (dev, cmd, 32);
1109 /* End cycle */
1110 mii_getbit (dev);
1111}
1112
1113static int mdio_read(struct net_device *dev, int reg)
1114{
1115 struct netdev_private *np = netdev_priv(dev);
1116 void __iomem *ioaddr = ns_ioaddr(dev);
1117
1118 /* The 83815 series has two ports:
1119 * - an internal transceiver
1120 * - an external mii bus
1121 */
1122 if (dev->if_port == PORT_TP)
1123 return readw(ioaddr+BasicControl+(reg<<2));
1124 else
1125 return miiport_read(dev, np->phy_addr_external, reg);
1126}
1127
1128static void mdio_write(struct net_device *dev, int reg, u16 data)
1129{
1130 struct netdev_private *np = netdev_priv(dev);
1131 void __iomem *ioaddr = ns_ioaddr(dev);
1132
1133 /* The 83815 series has an internal transceiver; handle separately */
1134 if (dev->if_port == PORT_TP)
1135 writew(data, ioaddr+BasicControl+(reg<<2));
1136 else
1137 miiport_write(dev, np->phy_addr_external, reg, data);
1138}
1139
1140static void init_phy_fixup(struct net_device *dev)
1141{
1142 struct netdev_private *np = netdev_priv(dev);
1143 void __iomem *ioaddr = ns_ioaddr(dev);
1144 int i;
1145 u32 cfg;
1146 u16 tmp;
1147
1148 /* restore stuff lost when power was out */
1149 tmp = mdio_read(dev, MII_BMCR);
1150 if (np->autoneg == AUTONEG_ENABLE) {
1151 /* renegotiate if something changed */
1152 if ((tmp & BMCR_ANENABLE) == 0
1153 || np->advertising != mdio_read(dev, MII_ADVERTISE))
1154 {
1155 /* turn on autonegotiation and force negotiation */
1156 tmp |= (BMCR_ANENABLE | BMCR_ANRESTART);
1157 mdio_write(dev, MII_ADVERTISE, np->advertising);
1158 }
1159 } else {
1160 /* turn off auto negotiation, set speed and duplexity */
1161 tmp &= ~(BMCR_ANENABLE | BMCR_SPEED100 | BMCR_FULLDPLX);
1162 if (np->speed == SPEED_100)
1163 tmp |= BMCR_SPEED100;
1164 if (np->duplex == DUPLEX_FULL)
1165 tmp |= BMCR_FULLDPLX;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001166 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 * Note: there is no good way to inform the link partner
1168 * that our capabilities changed. The user has to unplug
1169 * and replug the network cable after some changes, e.g.
1170 * after switching from 10HD, autoneg off to 100 HD,
1171 * autoneg off.
1172 */
1173 }
1174 mdio_write(dev, MII_BMCR, tmp);
1175 readl(ioaddr + ChipConfig);
1176 udelay(1);
1177
1178 /* find out what phy this is */
1179 np->mii = (mdio_read(dev, MII_PHYSID1) << 16)
1180 + mdio_read(dev, MII_PHYSID2);
1181
1182 /* handle external phys here */
1183 switch (np->mii) {
1184 case PHYID_AM79C874:
1185 /* phy specific configuration for fibre/tp operation */
1186 tmp = mdio_read(dev, MII_MCTRL);
1187 tmp &= ~(MII_FX_SEL | MII_EN_SCRM);
1188 if (dev->if_port == PORT_FIBRE)
1189 tmp |= MII_FX_SEL;
1190 else
1191 tmp |= MII_EN_SCRM;
1192 mdio_write(dev, MII_MCTRL, tmp);
1193 break;
1194 default:
1195 break;
1196 }
1197 cfg = readl(ioaddr + ChipConfig);
1198 if (cfg & CfgExtPhy)
1199 return;
1200
1201 /* On page 78 of the spec, they recommend some settings for "optimum
1202 performance" to be done in sequence. These settings optimize some
1203 of the 100Mbit autodetection circuitry. They say we only want to
1204 do this for rev C of the chip, but engineers at NSC (Bradley
1205 Kennedy) recommends always setting them. If you don't, you get
1206 errors on some autonegotiations that make the device unusable.
1207
1208 It seems that the DSP needs a few usec to reinitialize after
1209 the start of the phy. Just retry writing these values until they
1210 stick.
1211 */
1212 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1213
1214 int dspcfg;
1215 writew(1, ioaddr + PGSEL);
1216 writew(PMDCSR_VAL, ioaddr + PMDCSR);
1217 writew(TSTDAT_VAL, ioaddr + TSTDAT);
1218 np->dspcfg = (np->srr <= SRR_DP83815_C)?
1219 DSPCFG_VAL : (DSPCFG_COEF | readw(ioaddr + DSPCFG));
1220 writew(np->dspcfg, ioaddr + DSPCFG);
1221 writew(SDCFG_VAL, ioaddr + SDCFG);
1222 writew(0, ioaddr + PGSEL);
1223 readl(ioaddr + ChipConfig);
1224 udelay(10);
1225
1226 writew(1, ioaddr + PGSEL);
1227 dspcfg = readw(ioaddr + DSPCFG);
1228 writew(0, ioaddr + PGSEL);
1229 if (np->dspcfg == dspcfg)
1230 break;
1231 }
1232
1233 if (netif_msg_link(np)) {
1234 if (i==NATSEMI_HW_TIMEOUT) {
1235 printk(KERN_INFO
1236 "%s: DSPCFG mismatch after retrying for %d usec.\n",
1237 dev->name, i*10);
1238 } else {
1239 printk(KERN_INFO
1240 "%s: DSPCFG accepted after %d usec.\n",
1241 dev->name, i*10);
1242 }
1243 }
1244 /*
1245 * Enable PHY Specific event based interrupts. Link state change
1246 * and Auto-Negotiation Completion are among the affected.
1247 * Read the intr status to clear it (needed for wake events).
1248 */
1249 readw(ioaddr + MIntrStatus);
1250 writew(MICRIntEn, ioaddr + MIntrCtrl);
1251}
1252
1253static int switch_port_external(struct net_device *dev)
1254{
1255 struct netdev_private *np = netdev_priv(dev);
1256 void __iomem *ioaddr = ns_ioaddr(dev);
1257 u32 cfg;
1258
1259 cfg = readl(ioaddr + ChipConfig);
1260 if (cfg & CfgExtPhy)
1261 return 0;
1262
1263 if (netif_msg_link(np)) {
1264 printk(KERN_INFO "%s: switching to external transceiver.\n",
1265 dev->name);
1266 }
1267
1268 /* 1) switch back to external phy */
1269 writel(cfg | (CfgExtPhy | CfgPhyDis), ioaddr + ChipConfig);
1270 readl(ioaddr + ChipConfig);
1271 udelay(1);
1272
1273 /* 2) reset the external phy: */
1274 /* resetting the external PHY has been known to cause a hub supplying
1275 * power over Ethernet to kill the power. We don't want to kill
1276 * power to this computer, so we avoid resetting the phy.
1277 */
1278
1279 /* 3) reinit the phy fixup, it got lost during power down. */
1280 move_int_phy(dev, np->phy_addr_external);
1281 init_phy_fixup(dev);
1282
1283 return 1;
1284}
1285
1286static int switch_port_internal(struct net_device *dev)
1287{
1288 struct netdev_private *np = netdev_priv(dev);
1289 void __iomem *ioaddr = ns_ioaddr(dev);
1290 int i;
1291 u32 cfg;
1292 u16 bmcr;
1293
1294 cfg = readl(ioaddr + ChipConfig);
1295 if (!(cfg &CfgExtPhy))
1296 return 0;
1297
1298 if (netif_msg_link(np)) {
1299 printk(KERN_INFO "%s: switching to internal transceiver.\n",
1300 dev->name);
1301 }
1302 /* 1) switch back to internal phy: */
1303 cfg = cfg & ~(CfgExtPhy | CfgPhyDis);
1304 writel(cfg, ioaddr + ChipConfig);
1305 readl(ioaddr + ChipConfig);
1306 udelay(1);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001307
Linus Torvalds1da177e2005-04-16 15:20:36 -07001308 /* 2) reset the internal phy: */
1309 bmcr = readw(ioaddr+BasicControl+(MII_BMCR<<2));
1310 writel(bmcr | BMCR_RESET, ioaddr+BasicControl+(MII_BMCR<<2));
1311 readl(ioaddr + ChipConfig);
1312 udelay(10);
1313 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1314 bmcr = readw(ioaddr+BasicControl+(MII_BMCR<<2));
1315 if (!(bmcr & BMCR_RESET))
1316 break;
1317 udelay(10);
1318 }
1319 if (i==NATSEMI_HW_TIMEOUT && netif_msg_link(np)) {
1320 printk(KERN_INFO
1321 "%s: phy reset did not complete in %d usec.\n",
1322 dev->name, i*10);
1323 }
1324 /* 3) reinit the phy fixup, it got lost during power down. */
1325 init_phy_fixup(dev);
1326
1327 return 1;
1328}
1329
1330/* Scan for a PHY on the external mii bus.
1331 * There are two tricky points:
1332 * - Do not scan while the internal phy is enabled. The internal phy will
1333 * crash: e.g. reads from the DSPCFG register will return odd values and
1334 * the nasty random phy reset code will reset the nic every few seconds.
1335 * - The internal phy must be moved around, an external phy could
1336 * have the same address as the internal phy.
1337 */
1338static int find_mii(struct net_device *dev)
1339{
1340 struct netdev_private *np = netdev_priv(dev);
1341 int tmp;
1342 int i;
1343 int did_switch;
1344
1345 /* Switch to external phy */
1346 did_switch = switch_port_external(dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001347
Linus Torvalds1da177e2005-04-16 15:20:36 -07001348 /* Scan the possible phy addresses:
1349 *
1350 * PHY address 0 means that the phy is in isolate mode. Not yet
1351 * supported due to lack of test hardware. User space should
1352 * handle it through ethtool.
1353 */
1354 for (i = 1; i <= 31; i++) {
1355 move_int_phy(dev, i);
1356 tmp = miiport_read(dev, i, MII_BMSR);
1357 if (tmp != 0xffff && tmp != 0x0000) {
1358 /* found something! */
1359 np->mii = (mdio_read(dev, MII_PHYSID1) << 16)
1360 + mdio_read(dev, MII_PHYSID2);
1361 if (netif_msg_probe(np)) {
1362 printk(KERN_INFO "natsemi %s: found external phy %08x at address %d.\n",
1363 pci_name(np->pci_dev), np->mii, i);
1364 }
1365 break;
1366 }
1367 }
1368 /* And switch back to internal phy: */
1369 if (did_switch)
1370 switch_port_internal(dev);
1371 return i;
1372}
1373
1374/* CFG bits [13:16] [18:23] */
1375#define CFG_RESET_SAVE 0xfde000
1376/* WCSR bits [0:4] [9:10] */
1377#define WCSR_RESET_SAVE 0x61f
1378/* RFCR bits [20] [22] [27:31] */
1379#define RFCR_RESET_SAVE 0xf8500000;
1380
1381static void natsemi_reset(struct net_device *dev)
1382{
1383 int i;
1384 u32 cfg;
1385 u32 wcsr;
1386 u32 rfcr;
1387 u16 pmatch[3];
1388 u16 sopass[3];
1389 struct netdev_private *np = netdev_priv(dev);
1390 void __iomem *ioaddr = ns_ioaddr(dev);
1391
1392 /*
1393 * Resetting the chip causes some registers to be lost.
1394 * Natsemi suggests NOT reloading the EEPROM while live, so instead
1395 * we save the state that would have been loaded from EEPROM
1396 * on a normal power-up (see the spec EEPROM map). This assumes
1397 * whoever calls this will follow up with init_registers() eventually.
1398 */
1399
1400 /* CFG */
1401 cfg = readl(ioaddr + ChipConfig) & CFG_RESET_SAVE;
1402 /* WCSR */
1403 wcsr = readl(ioaddr + WOLCmd) & WCSR_RESET_SAVE;
1404 /* RFCR */
1405 rfcr = readl(ioaddr + RxFilterAddr) & RFCR_RESET_SAVE;
1406 /* PMATCH */
1407 for (i = 0; i < 3; i++) {
1408 writel(i*2, ioaddr + RxFilterAddr);
1409 pmatch[i] = readw(ioaddr + RxFilterData);
1410 }
1411 /* SOPAS */
1412 for (i = 0; i < 3; i++) {
1413 writel(0xa+(i*2), ioaddr + RxFilterAddr);
1414 sopass[i] = readw(ioaddr + RxFilterData);
1415 }
1416
1417 /* now whack the chip */
1418 writel(ChipReset, ioaddr + ChipCmd);
1419 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1420 if (!(readl(ioaddr + ChipCmd) & ChipReset))
1421 break;
1422 udelay(5);
1423 }
1424 if (i==NATSEMI_HW_TIMEOUT) {
1425 printk(KERN_WARNING "%s: reset did not complete in %d usec.\n",
1426 dev->name, i*5);
1427 } else if (netif_msg_hw(np)) {
1428 printk(KERN_DEBUG "%s: reset completed in %d usec.\n",
1429 dev->name, i*5);
1430 }
1431
1432 /* restore CFG */
1433 cfg |= readl(ioaddr + ChipConfig) & ~CFG_RESET_SAVE;
1434 /* turn on external phy if it was selected */
1435 if (dev->if_port == PORT_TP)
1436 cfg &= ~(CfgExtPhy | CfgPhyDis);
1437 else
1438 cfg |= (CfgExtPhy | CfgPhyDis);
1439 writel(cfg, ioaddr + ChipConfig);
1440 /* restore WCSR */
1441 wcsr |= readl(ioaddr + WOLCmd) & ~WCSR_RESET_SAVE;
1442 writel(wcsr, ioaddr + WOLCmd);
1443 /* read RFCR */
1444 rfcr |= readl(ioaddr + RxFilterAddr) & ~RFCR_RESET_SAVE;
1445 /* restore PMATCH */
1446 for (i = 0; i < 3; i++) {
1447 writel(i*2, ioaddr + RxFilterAddr);
1448 writew(pmatch[i], ioaddr + RxFilterData);
1449 }
1450 for (i = 0; i < 3; i++) {
1451 writel(0xa+(i*2), ioaddr + RxFilterAddr);
1452 writew(sopass[i], ioaddr + RxFilterData);
1453 }
1454 /* restore RFCR */
1455 writel(rfcr, ioaddr + RxFilterAddr);
1456}
1457
Mark Browne72fd962006-02-02 00:00:02 +00001458static void reset_rx(struct net_device *dev)
1459{
1460 int i;
1461 struct netdev_private *np = netdev_priv(dev);
1462 void __iomem *ioaddr = ns_ioaddr(dev);
1463
1464 np->intr_status &= ~RxResetDone;
1465
1466 writel(RxReset, ioaddr + ChipCmd);
1467
1468 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1469 np->intr_status |= readl(ioaddr + IntrStatus);
1470 if (np->intr_status & RxResetDone)
1471 break;
1472 udelay(15);
1473 }
1474 if (i==NATSEMI_HW_TIMEOUT) {
1475 printk(KERN_WARNING "%s: RX reset did not complete in %d usec.\n",
1476 dev->name, i*15);
1477 } else if (netif_msg_hw(np)) {
1478 printk(KERN_WARNING "%s: RX reset took %d usec.\n",
1479 dev->name, i*15);
1480 }
1481}
1482
Linus Torvalds1da177e2005-04-16 15:20:36 -07001483static void natsemi_reload_eeprom(struct net_device *dev)
1484{
1485 struct netdev_private *np = netdev_priv(dev);
1486 void __iomem *ioaddr = ns_ioaddr(dev);
1487 int i;
1488
1489 writel(EepromReload, ioaddr + PCIBusCfg);
1490 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1491 udelay(50);
1492 if (!(readl(ioaddr + PCIBusCfg) & EepromReload))
1493 break;
1494 }
1495 if (i==NATSEMI_HW_TIMEOUT) {
1496 printk(KERN_WARNING "natsemi %s: EEPROM did not reload in %d usec.\n",
1497 pci_name(np->pci_dev), i*50);
1498 } else if (netif_msg_hw(np)) {
1499 printk(KERN_DEBUG "natsemi %s: EEPROM reloaded in %d usec.\n",
1500 pci_name(np->pci_dev), i*50);
1501 }
1502}
1503
1504static void natsemi_stop_rxtx(struct net_device *dev)
1505{
1506 void __iomem * ioaddr = ns_ioaddr(dev);
1507 struct netdev_private *np = netdev_priv(dev);
1508 int i;
1509
1510 writel(RxOff | TxOff, ioaddr + ChipCmd);
1511 for(i=0;i< NATSEMI_HW_TIMEOUT;i++) {
1512 if ((readl(ioaddr + ChipCmd) & (TxOn|RxOn)) == 0)
1513 break;
1514 udelay(5);
1515 }
1516 if (i==NATSEMI_HW_TIMEOUT) {
1517 printk(KERN_WARNING "%s: Tx/Rx process did not stop in %d usec.\n",
1518 dev->name, i*5);
1519 } else if (netif_msg_hw(np)) {
1520 printk(KERN_DEBUG "%s: Tx/Rx process stopped in %d usec.\n",
1521 dev->name, i*5);
1522 }
1523}
1524
1525static int netdev_open(struct net_device *dev)
1526{
1527 struct netdev_private *np = netdev_priv(dev);
1528 void __iomem * ioaddr = ns_ioaddr(dev);
1529 int i;
1530
1531 /* Reset the chip, just in case. */
1532 natsemi_reset(dev);
1533
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001534 i = request_irq(dev->irq, &intr_handler, IRQF_SHARED, dev->name, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001535 if (i) return i;
1536
1537 if (netif_msg_ifup(np))
1538 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
1539 dev->name, dev->irq);
1540 i = alloc_ring(dev);
1541 if (i < 0) {
1542 free_irq(dev->irq, dev);
1543 return i;
1544 }
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001545 napi_enable(&np->napi);
1546
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547 init_ring(dev);
1548 spin_lock_irq(&np->lock);
1549 init_registers(dev);
1550 /* now set the MAC address according to dev->dev_addr */
1551 for (i = 0; i < 3; i++) {
1552 u16 mac = (dev->dev_addr[2*i+1]<<8) + dev->dev_addr[2*i];
1553
1554 writel(i*2, ioaddr + RxFilterAddr);
1555 writew(mac, ioaddr + RxFilterData);
1556 }
1557 writel(np->cur_rx_mode, ioaddr + RxFilterAddr);
1558 spin_unlock_irq(&np->lock);
1559
1560 netif_start_queue(dev);
1561
1562 if (netif_msg_ifup(np))
1563 printk(KERN_DEBUG "%s: Done netdev_open(), status: %#08x.\n",
1564 dev->name, (int)readl(ioaddr + ChipCmd));
1565
1566 /* Set the timer to check for link beat. */
1567 init_timer(&np->timer);
Mark Brown0e5d5442007-10-10 11:05:44 +01001568 np->timer.expires = round_jiffies(jiffies + NATSEMI_TIMER_FREQ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001569 np->timer.data = (unsigned long)dev;
1570 np->timer.function = &netdev_timer; /* timer handler */
1571 add_timer(&np->timer);
1572
1573 return 0;
1574}
1575
1576static void do_cable_magic(struct net_device *dev)
1577{
1578 struct netdev_private *np = netdev_priv(dev);
1579 void __iomem *ioaddr = ns_ioaddr(dev);
1580
1581 if (dev->if_port != PORT_TP)
1582 return;
1583
1584 if (np->srr >= SRR_DP83816_A5)
1585 return;
1586
1587 /*
1588 * 100 MBit links with short cables can trip an issue with the chip.
1589 * The problem manifests as lots of CRC errors and/or flickering
1590 * activity LED while idle. This process is based on instructions
1591 * from engineers at National.
1592 */
1593 if (readl(ioaddr + ChipConfig) & CfgSpeed100) {
1594 u16 data;
1595
1596 writew(1, ioaddr + PGSEL);
1597 /*
1598 * coefficient visibility should already be enabled via
1599 * DSPCFG | 0x1000
1600 */
1601 data = readw(ioaddr + TSTDAT) & 0xff;
1602 /*
1603 * the value must be negative, and within certain values
1604 * (these values all come from National)
1605 */
1606 if (!(data & 0x80) || ((data >= 0xd8) && (data <= 0xff))) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001607 np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001608
1609 /* the bug has been triggered - fix the coefficient */
1610 writew(TSTDAT_FIXED, ioaddr + TSTDAT);
1611 /* lock the value */
1612 data = readw(ioaddr + DSPCFG);
1613 np->dspcfg = data | DSPCFG_LOCK;
1614 writew(np->dspcfg, ioaddr + DSPCFG);
1615 }
1616 writew(0, ioaddr + PGSEL);
1617 }
1618}
1619
1620static void undo_cable_magic(struct net_device *dev)
1621{
1622 u16 data;
1623 struct netdev_private *np = netdev_priv(dev);
1624 void __iomem * ioaddr = ns_ioaddr(dev);
1625
1626 if (dev->if_port != PORT_TP)
1627 return;
1628
1629 if (np->srr >= SRR_DP83816_A5)
1630 return;
1631
1632 writew(1, ioaddr + PGSEL);
1633 /* make sure the lock bit is clear */
1634 data = readw(ioaddr + DSPCFG);
1635 np->dspcfg = data & ~DSPCFG_LOCK;
1636 writew(np->dspcfg, ioaddr + DSPCFG);
1637 writew(0, ioaddr + PGSEL);
1638}
1639
1640static void check_link(struct net_device *dev)
1641{
1642 struct netdev_private *np = netdev_priv(dev);
1643 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Brown68c90162007-02-19 20:15:39 +00001644 int duplex = np->duplex;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001645 u16 bmsr;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001646
Mark Brown68c90162007-02-19 20:15:39 +00001647 /* If we are ignoring the PHY then don't try reading it. */
1648 if (np->ignore_phy)
1649 goto propagate_state;
1650
Linus Torvalds1da177e2005-04-16 15:20:36 -07001651 /* The link status field is latched: it remains low after a temporary
1652 * link failure until it's read. We need the current link status,
1653 * thus read twice.
1654 */
1655 mdio_read(dev, MII_BMSR);
1656 bmsr = mdio_read(dev, MII_BMSR);
1657
1658 if (!(bmsr & BMSR_LSTATUS)) {
1659 if (netif_carrier_ok(dev)) {
1660 if (netif_msg_link(np))
1661 printk(KERN_NOTICE "%s: link down.\n",
Mark Brown68c90162007-02-19 20:15:39 +00001662 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001663 netif_carrier_off(dev);
1664 undo_cable_magic(dev);
1665 }
1666 return;
1667 }
1668 if (!netif_carrier_ok(dev)) {
1669 if (netif_msg_link(np))
1670 printk(KERN_NOTICE "%s: link up.\n", dev->name);
1671 netif_carrier_on(dev);
1672 do_cable_magic(dev);
1673 }
1674
1675 duplex = np->full_duplex;
1676 if (!duplex) {
1677 if (bmsr & BMSR_ANEGCOMPLETE) {
1678 int tmp = mii_nway_result(
1679 np->advertising & mdio_read(dev, MII_LPA));
1680 if (tmp == LPA_100FULL || tmp == LPA_10FULL)
1681 duplex = 1;
1682 } else if (mdio_read(dev, MII_BMCR) & BMCR_FULLDPLX)
1683 duplex = 1;
1684 }
1685
Mark Brown68c90162007-02-19 20:15:39 +00001686propagate_state:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001687 /* if duplex is set then bit 28 must be set, too */
1688 if (duplex ^ !!(np->rx_config & RxAcceptTx)) {
1689 if (netif_msg_link(np))
1690 printk(KERN_INFO
1691 "%s: Setting %s-duplex based on negotiated "
1692 "link capability.\n", dev->name,
1693 duplex ? "full" : "half");
1694 if (duplex) {
1695 np->rx_config |= RxAcceptTx;
1696 np->tx_config |= TxCarrierIgn | TxHeartIgn;
1697 } else {
1698 np->rx_config &= ~RxAcceptTx;
1699 np->tx_config &= ~(TxCarrierIgn | TxHeartIgn);
1700 }
1701 writel(np->tx_config, ioaddr + TxConfig);
1702 writel(np->rx_config, ioaddr + RxConfig);
1703 }
1704}
1705
1706static void init_registers(struct net_device *dev)
1707{
1708 struct netdev_private *np = netdev_priv(dev);
1709 void __iomem * ioaddr = ns_ioaddr(dev);
1710
1711 init_phy_fixup(dev);
1712
1713 /* clear any interrupts that are pending, such as wake events */
1714 readl(ioaddr + IntrStatus);
1715
1716 writel(np->ring_dma, ioaddr + RxRingPtr);
1717 writel(np->ring_dma + RX_RING_SIZE * sizeof(struct netdev_desc),
1718 ioaddr + TxRingPtr);
1719
1720 /* Initialize other registers.
1721 * Configure the PCI bus bursts and FIFO thresholds.
1722 * Configure for standard, in-spec Ethernet.
1723 * Start with half-duplex. check_link will update
1724 * to the correct settings.
1725 */
1726
1727 /* DRTH: 2: start tx if 64 bytes are in the fifo
1728 * FLTH: 0x10: refill with next packet if 512 bytes are free
1729 * MXDMA: 0: up to 256 byte bursts.
1730 * MXDMA must be <= FLTH
1731 * ECRETRY=1
1732 * ATP=1
1733 */
1734 np->tx_config = TxAutoPad | TxCollRetry | TxMxdma_256 |
1735 TX_FLTH_VAL | TX_DRTH_VAL_START;
1736 writel(np->tx_config, ioaddr + TxConfig);
1737
1738 /* DRTH 0x10: start copying to memory if 128 bytes are in the fifo
1739 * MXDMA 0: up to 256 byte bursts
1740 */
1741 np->rx_config = RxMxdma_256 | RX_DRTH_VAL;
1742 /* if receive ring now has bigger buffers than normal, enable jumbo */
1743 if (np->rx_buf_sz > NATSEMI_LONGPKT)
1744 np->rx_config |= RxAcceptLong;
1745
1746 writel(np->rx_config, ioaddr + RxConfig);
1747
1748 /* Disable PME:
1749 * The PME bit is initialized from the EEPROM contents.
1750 * PCI cards probably have PME disabled, but motherboard
1751 * implementations may have PME set to enable WakeOnLan.
1752 * With PME set the chip will scan incoming packets but
1753 * nothing will be written to memory. */
1754 np->SavedClkRun = readl(ioaddr + ClkRun);
1755 writel(np->SavedClkRun & ~PMEEnable, ioaddr + ClkRun);
1756 if (np->SavedClkRun & PMEStatus && netif_msg_wol(np)) {
1757 printk(KERN_NOTICE "%s: Wake-up event %#08x\n",
1758 dev->name, readl(ioaddr + WOLCmd));
1759 }
1760
1761 check_link(dev);
1762 __set_rx_mode(dev);
1763
1764 /* Enable interrupts by setting the interrupt mask. */
1765 writel(DEFAULT_INTR, ioaddr + IntrMask);
broonie@sirena.org.uk14fdd902007-03-14 19:49:13 +00001766 natsemi_irq_enable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001767
1768 writel(RxOn | TxOn, ioaddr + ChipCmd);
1769 writel(StatsClear, ioaddr + StatsCtrl); /* Clear Stats */
1770}
1771
1772/*
1773 * netdev_timer:
1774 * Purpose:
1775 * 1) check for link changes. Usually they are handled by the MII interrupt
1776 * but it doesn't hurt to check twice.
1777 * 2) check for sudden death of the NIC:
1778 * It seems that a reference set for this chip went out with incorrect info,
1779 * and there exist boards that aren't quite right. An unexpected voltage
1780 * drop can cause the PHY to get itself in a weird state (basically reset).
Mark Brown1a147802007-05-03 10:36:56 +01001781 * NOTE: this only seems to affect revC chips. The user can disable
1782 * this check via dspcfg_workaround sysfs option.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001783 * 3) check of death of the RX path due to OOM
1784 */
1785static void netdev_timer(unsigned long data)
1786{
1787 struct net_device *dev = (struct net_device *)data;
1788 struct netdev_private *np = netdev_priv(dev);
1789 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Brownf2cade12007-10-09 22:57:39 +01001790 int next_tick = NATSEMI_TIMER_FREQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001791
1792 if (netif_msg_timer(np)) {
1793 /* DO NOT read the IntrStatus register,
1794 * a read clears any pending interrupts.
1795 */
1796 printk(KERN_DEBUG "%s: Media selection timer tick.\n",
1797 dev->name);
1798 }
1799
1800 if (dev->if_port == PORT_TP) {
1801 u16 dspcfg;
1802
1803 spin_lock_irq(&np->lock);
1804 /* check for a nasty random phy-reset - use dspcfg as a flag */
1805 writew(1, ioaddr+PGSEL);
1806 dspcfg = readw(ioaddr+DSPCFG);
1807 writew(0, ioaddr+PGSEL);
Mark Brown1a147802007-05-03 10:36:56 +01001808 if (np->dspcfg_workaround && dspcfg != np->dspcfg) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001809 if (!netif_queue_stopped(dev)) {
1810 spin_unlock_irq(&np->lock);
Mark Brownd0ed4862007-05-03 10:36:50 +01001811 if (netif_msg_drv(np))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001812 printk(KERN_NOTICE "%s: possible phy reset: "
1813 "re-initializing\n", dev->name);
1814 disable_irq(dev->irq);
1815 spin_lock_irq(&np->lock);
1816 natsemi_stop_rxtx(dev);
1817 dump_ring(dev);
1818 reinit_ring(dev);
1819 init_registers(dev);
1820 spin_unlock_irq(&np->lock);
1821 enable_irq(dev->irq);
1822 } else {
1823 /* hurry back */
1824 next_tick = HZ;
1825 spin_unlock_irq(&np->lock);
1826 }
1827 } else {
1828 /* init_registers() calls check_link() for the above case */
1829 check_link(dev);
1830 spin_unlock_irq(&np->lock);
1831 }
1832 } else {
1833 spin_lock_irq(&np->lock);
1834 check_link(dev);
1835 spin_unlock_irq(&np->lock);
1836 }
1837 if (np->oom) {
1838 disable_irq(dev->irq);
1839 np->oom = 0;
1840 refill_rx(dev);
1841 enable_irq(dev->irq);
1842 if (!np->oom) {
1843 writel(RxOn, ioaddr + ChipCmd);
1844 } else {
1845 next_tick = 1;
1846 }
1847 }
Mark Brown0e5d5442007-10-10 11:05:44 +01001848
1849 if (next_tick > 1)
1850 mod_timer(&np->timer, round_jiffies(jiffies + next_tick));
1851 else
1852 mod_timer(&np->timer, jiffies + next_tick);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001853}
1854
1855static void dump_ring(struct net_device *dev)
1856{
1857 struct netdev_private *np = netdev_priv(dev);
1858
1859 if (netif_msg_pktdata(np)) {
1860 int i;
1861 printk(KERN_DEBUG " Tx ring at %p:\n", np->tx_ring);
1862 for (i = 0; i < TX_RING_SIZE; i++) {
1863 printk(KERN_DEBUG " #%d desc. %#08x %#08x %#08x.\n",
1864 i, np->tx_ring[i].next_desc,
1865 np->tx_ring[i].cmd_status,
1866 np->tx_ring[i].addr);
1867 }
1868 printk(KERN_DEBUG " Rx ring %p:\n", np->rx_ring);
1869 for (i = 0; i < RX_RING_SIZE; i++) {
1870 printk(KERN_DEBUG " #%d desc. %#08x %#08x %#08x.\n",
1871 i, np->rx_ring[i].next_desc,
1872 np->rx_ring[i].cmd_status,
1873 np->rx_ring[i].addr);
1874 }
1875 }
1876}
1877
1878static void tx_timeout(struct net_device *dev)
1879{
1880 struct netdev_private *np = netdev_priv(dev);
1881 void __iomem * ioaddr = ns_ioaddr(dev);
1882
1883 disable_irq(dev->irq);
1884 spin_lock_irq(&np->lock);
1885 if (!np->hands_off) {
1886 if (netif_msg_tx_err(np))
1887 printk(KERN_WARNING
1888 "%s: Transmit timed out, status %#08x,"
1889 " resetting...\n",
1890 dev->name, readl(ioaddr + IntrStatus));
1891 dump_ring(dev);
1892
1893 natsemi_reset(dev);
1894 reinit_ring(dev);
1895 init_registers(dev);
1896 } else {
1897 printk(KERN_WARNING
1898 "%s: tx_timeout while in hands_off state?\n",
1899 dev->name);
1900 }
1901 spin_unlock_irq(&np->lock);
1902 enable_irq(dev->irq);
1903
1904 dev->trans_start = jiffies;
1905 np->stats.tx_errors++;
1906 netif_wake_queue(dev);
1907}
1908
1909static int alloc_ring(struct net_device *dev)
1910{
1911 struct netdev_private *np = netdev_priv(dev);
1912 np->rx_ring = pci_alloc_consistent(np->pci_dev,
1913 sizeof(struct netdev_desc) * (RX_RING_SIZE+TX_RING_SIZE),
1914 &np->ring_dma);
1915 if (!np->rx_ring)
1916 return -ENOMEM;
1917 np->tx_ring = &np->rx_ring[RX_RING_SIZE];
1918 return 0;
1919}
1920
1921static void refill_rx(struct net_device *dev)
1922{
1923 struct netdev_private *np = netdev_priv(dev);
1924
1925 /* Refill the Rx ring buffers. */
1926 for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1927 struct sk_buff *skb;
1928 int entry = np->dirty_rx % RX_RING_SIZE;
1929 if (np->rx_skbuff[entry] == NULL) {
1930 unsigned int buflen = np->rx_buf_sz+NATSEMI_PADDING;
1931 skb = dev_alloc_skb(buflen);
1932 np->rx_skbuff[entry] = skb;
1933 if (skb == NULL)
1934 break; /* Better luck next round. */
1935 skb->dev = dev; /* Mark as being used by this device. */
1936 np->rx_dma[entry] = pci_map_single(np->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001937 skb->data, buflen, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001938 np->rx_ring[entry].addr = cpu_to_le32(np->rx_dma[entry]);
1939 }
1940 np->rx_ring[entry].cmd_status = cpu_to_le32(np->rx_buf_sz);
1941 }
1942 if (np->cur_rx - np->dirty_rx == RX_RING_SIZE) {
1943 if (netif_msg_rx_err(np))
1944 printk(KERN_WARNING "%s: going OOM.\n", dev->name);
1945 np->oom = 1;
1946 }
1947}
1948
1949static void set_bufsize(struct net_device *dev)
1950{
1951 struct netdev_private *np = netdev_priv(dev);
1952 if (dev->mtu <= ETH_DATA_LEN)
1953 np->rx_buf_sz = ETH_DATA_LEN + NATSEMI_HEADERS;
1954 else
1955 np->rx_buf_sz = dev->mtu + NATSEMI_HEADERS;
1956}
1957
1958/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1959static void init_ring(struct net_device *dev)
1960{
1961 struct netdev_private *np = netdev_priv(dev);
1962 int i;
1963
1964 /* 1) TX ring */
1965 np->dirty_tx = np->cur_tx = 0;
1966 for (i = 0; i < TX_RING_SIZE; i++) {
1967 np->tx_skbuff[i] = NULL;
1968 np->tx_ring[i].next_desc = cpu_to_le32(np->ring_dma
1969 +sizeof(struct netdev_desc)
1970 *((i+1)%TX_RING_SIZE+RX_RING_SIZE));
1971 np->tx_ring[i].cmd_status = 0;
1972 }
1973
1974 /* 2) RX ring */
1975 np->dirty_rx = 0;
1976 np->cur_rx = RX_RING_SIZE;
1977 np->oom = 0;
1978 set_bufsize(dev);
1979
1980 np->rx_head_desc = &np->rx_ring[0];
1981
1982 /* Please be carefull before changing this loop - at least gcc-2.95.1
1983 * miscompiles it otherwise.
1984 */
1985 /* Initialize all Rx descriptors. */
1986 for (i = 0; i < RX_RING_SIZE; i++) {
1987 np->rx_ring[i].next_desc = cpu_to_le32(np->ring_dma
1988 +sizeof(struct netdev_desc)
1989 *((i+1)%RX_RING_SIZE));
1990 np->rx_ring[i].cmd_status = cpu_to_le32(DescOwn);
1991 np->rx_skbuff[i] = NULL;
1992 }
1993 refill_rx(dev);
1994 dump_ring(dev);
1995}
1996
1997static void drain_tx(struct net_device *dev)
1998{
1999 struct netdev_private *np = netdev_priv(dev);
2000 int i;
2001
2002 for (i = 0; i < TX_RING_SIZE; i++) {
2003 if (np->tx_skbuff[i]) {
2004 pci_unmap_single(np->pci_dev,
2005 np->tx_dma[i], np->tx_skbuff[i]->len,
2006 PCI_DMA_TODEVICE);
2007 dev_kfree_skb(np->tx_skbuff[i]);
2008 np->stats.tx_dropped++;
2009 }
2010 np->tx_skbuff[i] = NULL;
2011 }
2012}
2013
2014static void drain_rx(struct net_device *dev)
2015{
2016 struct netdev_private *np = netdev_priv(dev);
2017 unsigned int buflen = np->rx_buf_sz;
2018 int i;
2019
2020 /* Free all the skbuffs in the Rx queue. */
2021 for (i = 0; i < RX_RING_SIZE; i++) {
2022 np->rx_ring[i].cmd_status = 0;
Al Viroeca1ad82008-03-16 22:21:54 +00002023 np->rx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002024 if (np->rx_skbuff[i]) {
2025 pci_unmap_single(np->pci_dev,
2026 np->rx_dma[i], buflen,
2027 PCI_DMA_FROMDEVICE);
2028 dev_kfree_skb(np->rx_skbuff[i]);
2029 }
2030 np->rx_skbuff[i] = NULL;
2031 }
2032}
2033
2034static void drain_ring(struct net_device *dev)
2035{
2036 drain_rx(dev);
2037 drain_tx(dev);
2038}
2039
2040static void free_ring(struct net_device *dev)
2041{
2042 struct netdev_private *np = netdev_priv(dev);
2043 pci_free_consistent(np->pci_dev,
2044 sizeof(struct netdev_desc) * (RX_RING_SIZE+TX_RING_SIZE),
2045 np->rx_ring, np->ring_dma);
2046}
2047
2048static void reinit_rx(struct net_device *dev)
2049{
2050 struct netdev_private *np = netdev_priv(dev);
2051 int i;
2052
2053 /* RX Ring */
2054 np->dirty_rx = 0;
2055 np->cur_rx = RX_RING_SIZE;
2056 np->rx_head_desc = &np->rx_ring[0];
2057 /* Initialize all Rx descriptors. */
2058 for (i = 0; i < RX_RING_SIZE; i++)
2059 np->rx_ring[i].cmd_status = cpu_to_le32(DescOwn);
2060
2061 refill_rx(dev);
2062}
2063
2064static void reinit_ring(struct net_device *dev)
2065{
2066 struct netdev_private *np = netdev_priv(dev);
2067 int i;
2068
2069 /* drain TX ring */
2070 drain_tx(dev);
2071 np->dirty_tx = np->cur_tx = 0;
2072 for (i=0;i<TX_RING_SIZE;i++)
2073 np->tx_ring[i].cmd_status = 0;
2074
2075 reinit_rx(dev);
2076}
2077
2078static int start_tx(struct sk_buff *skb, struct net_device *dev)
2079{
2080 struct netdev_private *np = netdev_priv(dev);
2081 void __iomem * ioaddr = ns_ioaddr(dev);
2082 unsigned entry;
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002083 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002084
2085 /* Note: Ordering is important here, set the field with the
2086 "ownership" bit last, and only then increment cur_tx. */
2087
2088 /* Calculate the next Tx descriptor entry. */
2089 entry = np->cur_tx % TX_RING_SIZE;
2090
2091 np->tx_skbuff[entry] = skb;
2092 np->tx_dma[entry] = pci_map_single(np->pci_dev,
2093 skb->data,skb->len, PCI_DMA_TODEVICE);
2094
2095 np->tx_ring[entry].addr = cpu_to_le32(np->tx_dma[entry]);
2096
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002097 spin_lock_irqsave(&np->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002098
2099 if (!np->hands_off) {
2100 np->tx_ring[entry].cmd_status = cpu_to_le32(DescOwn | skb->len);
2101 /* StrongARM: Explicitly cache flush np->tx_ring and
2102 * skb->data,skb->len. */
2103 wmb();
2104 np->cur_tx++;
2105 if (np->cur_tx - np->dirty_tx >= TX_QUEUE_LEN - 1) {
2106 netdev_tx_done(dev);
2107 if (np->cur_tx - np->dirty_tx >= TX_QUEUE_LEN - 1)
2108 netif_stop_queue(dev);
2109 }
2110 /* Wake the potentially-idle transmit channel. */
2111 writel(TxOn, ioaddr + ChipCmd);
2112 } else {
2113 dev_kfree_skb_irq(skb);
2114 np->stats.tx_dropped++;
2115 }
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002116 spin_unlock_irqrestore(&np->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002117
2118 dev->trans_start = jiffies;
2119
2120 if (netif_msg_tx_queued(np)) {
2121 printk(KERN_DEBUG "%s: Transmit frame #%d queued in slot %d.\n",
2122 dev->name, np->cur_tx, entry);
2123 }
2124 return 0;
2125}
2126
2127static void netdev_tx_done(struct net_device *dev)
2128{
2129 struct netdev_private *np = netdev_priv(dev);
2130
2131 for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
2132 int entry = np->dirty_tx % TX_RING_SIZE;
2133 if (np->tx_ring[entry].cmd_status & cpu_to_le32(DescOwn))
2134 break;
2135 if (netif_msg_tx_done(np))
2136 printk(KERN_DEBUG
2137 "%s: tx frame #%d finished, status %#08x.\n",
2138 dev->name, np->dirty_tx,
2139 le32_to_cpu(np->tx_ring[entry].cmd_status));
2140 if (np->tx_ring[entry].cmd_status & cpu_to_le32(DescPktOK)) {
2141 np->stats.tx_packets++;
2142 np->stats.tx_bytes += np->tx_skbuff[entry]->len;
2143 } else { /* Various Tx errors */
2144 int tx_status =
2145 le32_to_cpu(np->tx_ring[entry].cmd_status);
2146 if (tx_status & (DescTxAbort|DescTxExcColl))
2147 np->stats.tx_aborted_errors++;
2148 if (tx_status & DescTxFIFO)
2149 np->stats.tx_fifo_errors++;
2150 if (tx_status & DescTxCarrier)
2151 np->stats.tx_carrier_errors++;
2152 if (tx_status & DescTxOOWCol)
2153 np->stats.tx_window_errors++;
2154 np->stats.tx_errors++;
2155 }
2156 pci_unmap_single(np->pci_dev,np->tx_dma[entry],
2157 np->tx_skbuff[entry]->len,
2158 PCI_DMA_TODEVICE);
2159 /* Free the original skb. */
2160 dev_kfree_skb_irq(np->tx_skbuff[entry]);
2161 np->tx_skbuff[entry] = NULL;
2162 }
2163 if (netif_queue_stopped(dev)
2164 && np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
2165 /* The ring is no longer full, wake queue. */
2166 netif_wake_queue(dev);
2167 }
2168}
2169
Mark Brownb27a16b2006-02-02 00:00:01 +00002170/* The interrupt handler doesn't actually handle interrupts itself, it
2171 * schedules a NAPI poll if there is anything to do. */
David Howells7d12e782006-10-05 14:55:46 +01002172static irqreturn_t intr_handler(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002173{
2174 struct net_device *dev = dev_instance;
2175 struct netdev_private *np = netdev_priv(dev);
2176 void __iomem * ioaddr = ns_ioaddr(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002177
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002178 /* Reading IntrStatus automatically acknowledges so don't do
2179 * that while interrupts are disabled, (for example, while a
2180 * poll is scheduled). */
2181 if (np->hands_off || !readl(ioaddr + IntrEnable))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002182 return IRQ_NONE;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002183
Mark Brownb27a16b2006-02-02 00:00:01 +00002184 np->intr_status = readl(ioaddr + IntrStatus);
2185
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002186 if (!np->intr_status)
2187 return IRQ_NONE;
2188
Mark Brownb27a16b2006-02-02 00:00:01 +00002189 if (netif_msg_intr(np))
2190 printk(KERN_DEBUG
2191 "%s: Interrupt, status %#08x, mask %#08x.\n",
2192 dev->name, np->intr_status,
2193 readl(ioaddr + IntrMask));
2194
Mark Brownb27a16b2006-02-02 00:00:01 +00002195 prefetch(&np->rx_skbuff[np->cur_rx % RX_RING_SIZE]);
2196
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002197 if (netif_rx_schedule_prep(dev, &np->napi)) {
Mark Brownb27a16b2006-02-02 00:00:01 +00002198 /* Disable interrupts and register for poll */
2199 natsemi_irq_disable(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002200 __netif_rx_schedule(dev, &np->napi);
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002201 } else
2202 printk(KERN_WARNING
2203 "%s: Ignoring interrupt, status %#08x, mask %#08x.\n",
2204 dev->name, np->intr_status,
2205 readl(ioaddr + IntrMask));
2206
Mark Brownb27a16b2006-02-02 00:00:01 +00002207 return IRQ_HANDLED;
2208}
2209
2210/* This is the NAPI poll routine. As well as the standard RX handling
2211 * it also handles all other interrupts that the chip might raise.
2212 */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002213static int natsemi_poll(struct napi_struct *napi, int budget)
Mark Brownb27a16b2006-02-02 00:00:01 +00002214{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002215 struct netdev_private *np = container_of(napi, struct netdev_private, napi);
2216 struct net_device *dev = np->dev;
Mark Brownb27a16b2006-02-02 00:00:01 +00002217 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Brownb27a16b2006-02-02 00:00:01 +00002218 int work_done = 0;
2219
Linus Torvalds1da177e2005-04-16 15:20:36 -07002220 do {
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002221 if (netif_msg_intr(np))
2222 printk(KERN_DEBUG
2223 "%s: Poll, status %#08x, mask %#08x.\n",
2224 dev->name, np->intr_status,
2225 readl(ioaddr + IntrMask));
2226
broonie@sirena.org.ukd2a90032007-03-14 19:49:15 +00002227 /* netdev_rx() may read IntrStatus again if the RX state
2228 * machine falls over so do it first. */
2229 if (np->intr_status &
2230 (IntrRxDone | IntrRxIntr | RxStatusFIFOOver |
2231 IntrRxErr | IntrRxOverrun)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002232 netdev_rx(dev, &work_done, budget);
broonie@sirena.org.ukd2a90032007-03-14 19:49:15 +00002233 }
2234
Mark Brownb27a16b2006-02-02 00:00:01 +00002235 if (np->intr_status &
2236 (IntrTxDone | IntrTxIntr | IntrTxIdle | IntrTxErr)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002237 spin_lock(&np->lock);
2238 netdev_tx_done(dev);
2239 spin_unlock(&np->lock);
2240 }
2241
2242 /* Abnormal error summary/uncommon events handlers. */
Mark Brownb27a16b2006-02-02 00:00:01 +00002243 if (np->intr_status & IntrAbnormalSummary)
2244 netdev_error(dev, np->intr_status);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002245
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002246 if (work_done >= budget)
2247 return work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002248
Mark Brownb27a16b2006-02-02 00:00:01 +00002249 np->intr_status = readl(ioaddr + IntrStatus);
2250 } while (np->intr_status);
2251
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002252 netif_rx_complete(dev, napi);
Mark Brownb27a16b2006-02-02 00:00:01 +00002253
2254 /* Reenable interrupts providing nothing is trying to shut
2255 * the chip down. */
2256 spin_lock(&np->lock);
David S. Miller4ec24112008-01-07 20:48:21 -08002257 if (!np->hands_off)
Mark Brownb27a16b2006-02-02 00:00:01 +00002258 natsemi_irq_enable(dev);
2259 spin_unlock(&np->lock);
2260
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002261 return work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002262}
2263
2264/* This routine is logically part of the interrupt handler, but separated
2265 for clarity and better register allocation. */
Mark Brownb27a16b2006-02-02 00:00:01 +00002266static void netdev_rx(struct net_device *dev, int *work_done, int work_to_do)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002267{
2268 struct netdev_private *np = netdev_priv(dev);
2269 int entry = np->cur_rx % RX_RING_SIZE;
2270 int boguscnt = np->dirty_rx + RX_RING_SIZE - np->cur_rx;
2271 s32 desc_status = le32_to_cpu(np->rx_head_desc->cmd_status);
2272 unsigned int buflen = np->rx_buf_sz;
2273 void __iomem * ioaddr = ns_ioaddr(dev);
2274
2275 /* If the driver owns the next entry it's a new packet. Send it up. */
2276 while (desc_status < 0) { /* e.g. & DescOwn */
2277 int pkt_len;
2278 if (netif_msg_rx_status(np))
2279 printk(KERN_DEBUG
2280 " netdev_rx() entry %d status was %#08x.\n",
2281 entry, desc_status);
2282 if (--boguscnt < 0)
2283 break;
Mark Brownb27a16b2006-02-02 00:00:01 +00002284
2285 if (*work_done >= work_to_do)
2286 break;
2287
2288 (*work_done)++;
2289
Linus Torvalds1da177e2005-04-16 15:20:36 -07002290 pkt_len = (desc_status & DescSizeMask) - 4;
2291 if ((desc_status&(DescMore|DescPktOK|DescRxLong)) != DescPktOK){
2292 if (desc_status & DescMore) {
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002293 unsigned long flags;
2294
Linus Torvalds1da177e2005-04-16 15:20:36 -07002295 if (netif_msg_rx_err(np))
2296 printk(KERN_WARNING
2297 "%s: Oversized(?) Ethernet "
2298 "frame spanned multiple "
2299 "buffers, entry %#08x "
2300 "status %#08x.\n", dev->name,
2301 np->cur_rx, desc_status);
2302 np->stats.rx_length_errors++;
Mark Browne72fd962006-02-02 00:00:02 +00002303
2304 /* The RX state machine has probably
2305 * locked up beneath us. Follow the
2306 * reset procedure documented in
2307 * AN-1287. */
2308
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002309 spin_lock_irqsave(&np->lock, flags);
Mark Browne72fd962006-02-02 00:00:02 +00002310 reset_rx(dev);
2311 reinit_rx(dev);
2312 writel(np->ring_dma, ioaddr + RxRingPtr);
2313 check_link(dev);
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002314 spin_unlock_irqrestore(&np->lock, flags);
Mark Browne72fd962006-02-02 00:00:02 +00002315
2316 /* We'll enable RX on exit from this
2317 * function. */
2318 break;
2319
Linus Torvalds1da177e2005-04-16 15:20:36 -07002320 } else {
2321 /* There was an error. */
2322 np->stats.rx_errors++;
2323 if (desc_status & (DescRxAbort|DescRxOver))
2324 np->stats.rx_over_errors++;
2325 if (desc_status & (DescRxLong|DescRxRunt))
2326 np->stats.rx_length_errors++;
2327 if (desc_status & (DescRxInvalid|DescRxAlign))
2328 np->stats.rx_frame_errors++;
2329 if (desc_status & DescRxCRC)
2330 np->stats.rx_crc_errors++;
2331 }
2332 } else if (pkt_len > np->rx_buf_sz) {
2333 /* if this is the tail of a double buffer
2334 * packet, we've already counted the error
2335 * on the first part. Ignore the second half.
2336 */
2337 } else {
2338 struct sk_buff *skb;
2339 /* Omit CRC size. */
2340 /* Check if the packet is long enough to accept
2341 * without copying to a minimally-sized skbuff. */
2342 if (pkt_len < rx_copybreak
2343 && (skb = dev_alloc_skb(pkt_len + RX_OFFSET)) != NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002344 /* 16 byte align the IP header */
2345 skb_reserve(skb, RX_OFFSET);
2346 pci_dma_sync_single_for_cpu(np->pci_dev,
2347 np->rx_dma[entry],
2348 buflen,
2349 PCI_DMA_FROMDEVICE);
David S. Miller8c7b7fa2007-07-10 22:08:12 -07002350 skb_copy_to_linear_data(skb,
2351 np->rx_skbuff[entry]->data, pkt_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002352 skb_put(skb, pkt_len);
2353 pci_dma_sync_single_for_device(np->pci_dev,
2354 np->rx_dma[entry],
2355 buflen,
2356 PCI_DMA_FROMDEVICE);
2357 } else {
2358 pci_unmap_single(np->pci_dev, np->rx_dma[entry],
2359 buflen, PCI_DMA_FROMDEVICE);
2360 skb_put(skb = np->rx_skbuff[entry], pkt_len);
2361 np->rx_skbuff[entry] = NULL;
2362 }
2363 skb->protocol = eth_type_trans(skb, dev);
Mark Brownb27a16b2006-02-02 00:00:01 +00002364 netif_receive_skb(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002365 dev->last_rx = jiffies;
2366 np->stats.rx_packets++;
2367 np->stats.rx_bytes += pkt_len;
2368 }
2369 entry = (++np->cur_rx) % RX_RING_SIZE;
2370 np->rx_head_desc = &np->rx_ring[entry];
2371 desc_status = le32_to_cpu(np->rx_head_desc->cmd_status);
2372 }
2373 refill_rx(dev);
2374
2375 /* Restart Rx engine if stopped. */
2376 if (np->oom)
2377 mod_timer(&np->timer, jiffies + 1);
2378 else
2379 writel(RxOn, ioaddr + ChipCmd);
2380}
2381
2382static void netdev_error(struct net_device *dev, int intr_status)
2383{
2384 struct netdev_private *np = netdev_priv(dev);
2385 void __iomem * ioaddr = ns_ioaddr(dev);
2386
2387 spin_lock(&np->lock);
2388 if (intr_status & LinkChange) {
2389 u16 lpa = mdio_read(dev, MII_LPA);
2390 if (mdio_read(dev, MII_BMCR) & BMCR_ANENABLE
2391 && netif_msg_link(np)) {
2392 printk(KERN_INFO
2393 "%s: Autonegotiation advertising"
2394 " %#04x partner %#04x.\n", dev->name,
2395 np->advertising, lpa);
2396 }
2397
2398 /* read MII int status to clear the flag */
2399 readw(ioaddr + MIntrStatus);
2400 check_link(dev);
2401 }
2402 if (intr_status & StatsMax) {
2403 __get_stats(dev);
2404 }
2405 if (intr_status & IntrTxUnderrun) {
2406 if ((np->tx_config & TxDrthMask) < TX_DRTH_VAL_LIMIT) {
2407 np->tx_config += TX_DRTH_VAL_INC;
2408 if (netif_msg_tx_err(np))
2409 printk(KERN_NOTICE
2410 "%s: increased tx threshold, txcfg %#08x.\n",
2411 dev->name, np->tx_config);
2412 } else {
2413 if (netif_msg_tx_err(np))
2414 printk(KERN_NOTICE
2415 "%s: tx underrun with maximum tx threshold, txcfg %#08x.\n",
2416 dev->name, np->tx_config);
2417 }
2418 writel(np->tx_config, ioaddr + TxConfig);
2419 }
2420 if (intr_status & WOLPkt && netif_msg_wol(np)) {
2421 int wol_status = readl(ioaddr + WOLCmd);
2422 printk(KERN_NOTICE "%s: Link wake-up event %#08x\n",
2423 dev->name, wol_status);
2424 }
2425 if (intr_status & RxStatusFIFOOver) {
2426 if (netif_msg_rx_err(np) && netif_msg_intr(np)) {
2427 printk(KERN_NOTICE "%s: Rx status FIFO overrun\n",
2428 dev->name);
2429 }
2430 np->stats.rx_fifo_errors++;
Andrew Mortonc76720c2007-08-10 14:05:23 -07002431 np->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002432 }
2433 /* Hmmmmm, it's not clear how to recover from PCI faults. */
2434 if (intr_status & IntrPCIErr) {
2435 printk(KERN_NOTICE "%s: PCI error %#08x\n", dev->name,
2436 intr_status & IntrPCIErr);
2437 np->stats.tx_fifo_errors++;
Andrew Mortonc76720c2007-08-10 14:05:23 -07002438 np->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002439 np->stats.rx_fifo_errors++;
Andrew Mortonc76720c2007-08-10 14:05:23 -07002440 np->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002441 }
2442 spin_unlock(&np->lock);
2443}
2444
2445static void __get_stats(struct net_device *dev)
2446{
2447 void __iomem * ioaddr = ns_ioaddr(dev);
2448 struct netdev_private *np = netdev_priv(dev);
2449
2450 /* The chip only need report frame silently dropped. */
2451 np->stats.rx_crc_errors += readl(ioaddr + RxCRCErrs);
2452 np->stats.rx_missed_errors += readl(ioaddr + RxMissed);
2453}
2454
2455static struct net_device_stats *get_stats(struct net_device *dev)
2456{
2457 struct netdev_private *np = netdev_priv(dev);
2458
2459 /* The chip only need report frame silently dropped. */
2460 spin_lock_irq(&np->lock);
2461 if (netif_running(dev) && !np->hands_off)
2462 __get_stats(dev);
2463 spin_unlock_irq(&np->lock);
2464
2465 return &np->stats;
2466}
2467
2468#ifdef CONFIG_NET_POLL_CONTROLLER
2469static void natsemi_poll_controller(struct net_device *dev)
2470{
2471 disable_irq(dev->irq);
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002472 intr_handler(dev->irq, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002473 enable_irq(dev->irq);
2474}
2475#endif
2476
2477#define HASH_TABLE 0x200
2478static void __set_rx_mode(struct net_device *dev)
2479{
2480 void __iomem * ioaddr = ns_ioaddr(dev);
2481 struct netdev_private *np = netdev_priv(dev);
2482 u8 mc_filter[64]; /* Multicast hash filter */
2483 u32 rx_mode;
2484
2485 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002486 rx_mode = RxFilterEnable | AcceptBroadcast
2487 | AcceptAllMulticast | AcceptAllPhys | AcceptMyPhys;
2488 } else if ((dev->mc_count > multicast_filter_limit)
2489 || (dev->flags & IFF_ALLMULTI)) {
2490 rx_mode = RxFilterEnable | AcceptBroadcast
2491 | AcceptAllMulticast | AcceptMyPhys;
2492 } else {
2493 struct dev_mc_list *mclist;
2494 int i;
2495 memset(mc_filter, 0, sizeof(mc_filter));
2496 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2497 i++, mclist = mclist->next) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07002498 int b = (ether_crc(ETH_ALEN, mclist->dmi_addr) >> 23) & 0x1ff;
2499 mc_filter[b/8] |= (1 << (b & 0x07));
Linus Torvalds1da177e2005-04-16 15:20:36 -07002500 }
2501 rx_mode = RxFilterEnable | AcceptBroadcast
2502 | AcceptMulticast | AcceptMyPhys;
2503 for (i = 0; i < 64; i += 2) {
Herbert Xu760f86d2005-04-16 16:24:16 +10002504 writel(HASH_TABLE + i, ioaddr + RxFilterAddr);
2505 writel((mc_filter[i + 1] << 8) + mc_filter[i],
2506 ioaddr + RxFilterData);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002507 }
2508 }
2509 writel(rx_mode, ioaddr + RxFilterAddr);
2510 np->cur_rx_mode = rx_mode;
2511}
2512
2513static int natsemi_change_mtu(struct net_device *dev, int new_mtu)
2514{
2515 if (new_mtu < 64 || new_mtu > NATSEMI_RX_LIMIT-NATSEMI_HEADERS)
2516 return -EINVAL;
2517
2518 dev->mtu = new_mtu;
2519
2520 /* synchronized against open : rtnl_lock() held by caller */
2521 if (netif_running(dev)) {
2522 struct netdev_private *np = netdev_priv(dev);
2523 void __iomem * ioaddr = ns_ioaddr(dev);
2524
2525 disable_irq(dev->irq);
2526 spin_lock(&np->lock);
2527 /* stop engines */
2528 natsemi_stop_rxtx(dev);
2529 /* drain rx queue */
2530 drain_rx(dev);
2531 /* change buffers */
2532 set_bufsize(dev);
2533 reinit_rx(dev);
2534 writel(np->ring_dma, ioaddr + RxRingPtr);
2535 /* restart engines */
2536 writel(RxOn | TxOn, ioaddr + ChipCmd);
2537 spin_unlock(&np->lock);
2538 enable_irq(dev->irq);
2539 }
2540 return 0;
2541}
2542
2543static void set_rx_mode(struct net_device *dev)
2544{
2545 struct netdev_private *np = netdev_priv(dev);
2546 spin_lock_irq(&np->lock);
2547 if (!np->hands_off)
2548 __set_rx_mode(dev);
2549 spin_unlock_irq(&np->lock);
2550}
2551
2552static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2553{
2554 struct netdev_private *np = netdev_priv(dev);
2555 strncpy(info->driver, DRV_NAME, ETHTOOL_BUSINFO_LEN);
2556 strncpy(info->version, DRV_VERSION, ETHTOOL_BUSINFO_LEN);
2557 strncpy(info->bus_info, pci_name(np->pci_dev), ETHTOOL_BUSINFO_LEN);
2558}
2559
2560static int get_regs_len(struct net_device *dev)
2561{
2562 return NATSEMI_REGS_SIZE;
2563}
2564
2565static int get_eeprom_len(struct net_device *dev)
2566{
Mark Browna8b4cf42006-03-28 14:08:55 -08002567 struct netdev_private *np = netdev_priv(dev);
2568 return np->eeprom_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002569}
2570
2571static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2572{
2573 struct netdev_private *np = netdev_priv(dev);
2574 spin_lock_irq(&np->lock);
2575 netdev_get_ecmd(dev, ecmd);
2576 spin_unlock_irq(&np->lock);
2577 return 0;
2578}
2579
2580static int set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2581{
2582 struct netdev_private *np = netdev_priv(dev);
2583 int res;
2584 spin_lock_irq(&np->lock);
2585 res = netdev_set_ecmd(dev, ecmd);
2586 spin_unlock_irq(&np->lock);
2587 return res;
2588}
2589
2590static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2591{
2592 struct netdev_private *np = netdev_priv(dev);
2593 spin_lock_irq(&np->lock);
2594 netdev_get_wol(dev, &wol->supported, &wol->wolopts);
2595 netdev_get_sopass(dev, wol->sopass);
2596 spin_unlock_irq(&np->lock);
2597}
2598
2599static int set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2600{
2601 struct netdev_private *np = netdev_priv(dev);
2602 int res;
2603 spin_lock_irq(&np->lock);
2604 netdev_set_wol(dev, wol->wolopts);
2605 res = netdev_set_sopass(dev, wol->sopass);
2606 spin_unlock_irq(&np->lock);
2607 return res;
2608}
2609
2610static void get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
2611{
2612 struct netdev_private *np = netdev_priv(dev);
2613 regs->version = NATSEMI_REGS_VER;
2614 spin_lock_irq(&np->lock);
2615 netdev_get_regs(dev, buf);
2616 spin_unlock_irq(&np->lock);
2617}
2618
2619static u32 get_msglevel(struct net_device *dev)
2620{
2621 struct netdev_private *np = netdev_priv(dev);
2622 return np->msg_enable;
2623}
2624
2625static void set_msglevel(struct net_device *dev, u32 val)
2626{
2627 struct netdev_private *np = netdev_priv(dev);
2628 np->msg_enable = val;
2629}
2630
2631static int nway_reset(struct net_device *dev)
2632{
2633 int tmp;
2634 int r = -EINVAL;
2635 /* if autoneg is off, it's an error */
2636 tmp = mdio_read(dev, MII_BMCR);
2637 if (tmp & BMCR_ANENABLE) {
2638 tmp |= (BMCR_ANRESTART);
2639 mdio_write(dev, MII_BMCR, tmp);
2640 r = 0;
2641 }
2642 return r;
2643}
2644
2645static u32 get_link(struct net_device *dev)
2646{
2647 /* LSTATUS is latched low until a read - so read twice */
2648 mdio_read(dev, MII_BMSR);
2649 return (mdio_read(dev, MII_BMSR)&BMSR_LSTATUS) ? 1:0;
2650}
2651
2652static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data)
2653{
2654 struct netdev_private *np = netdev_priv(dev);
Mark Browna8b4cf42006-03-28 14:08:55 -08002655 u8 *eebuf;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002656 int res;
2657
Mark Browna8b4cf42006-03-28 14:08:55 -08002658 eebuf = kmalloc(np->eeprom_size, GFP_KERNEL);
2659 if (!eebuf)
2660 return -ENOMEM;
2661
Linus Torvalds1da177e2005-04-16 15:20:36 -07002662 eeprom->magic = PCI_VENDOR_ID_NS | (PCI_DEVICE_ID_NS_83815<<16);
2663 spin_lock_irq(&np->lock);
2664 res = netdev_get_eeprom(dev, eebuf);
2665 spin_unlock_irq(&np->lock);
2666 if (!res)
2667 memcpy(data, eebuf+eeprom->offset, eeprom->len);
Mark Browna8b4cf42006-03-28 14:08:55 -08002668 kfree(eebuf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002669 return res;
2670}
2671
Jeff Garzik7282d492006-09-13 14:30:00 -04002672static const struct ethtool_ops ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002673 .get_drvinfo = get_drvinfo,
2674 .get_regs_len = get_regs_len,
2675 .get_eeprom_len = get_eeprom_len,
2676 .get_settings = get_settings,
2677 .set_settings = set_settings,
2678 .get_wol = get_wol,
2679 .set_wol = set_wol,
2680 .get_regs = get_regs,
2681 .get_msglevel = get_msglevel,
2682 .set_msglevel = set_msglevel,
2683 .nway_reset = nway_reset,
2684 .get_link = get_link,
2685 .get_eeprom = get_eeprom,
2686};
2687
2688static int netdev_set_wol(struct net_device *dev, u32 newval)
2689{
2690 struct netdev_private *np = netdev_priv(dev);
2691 void __iomem * ioaddr = ns_ioaddr(dev);
2692 u32 data = readl(ioaddr + WOLCmd) & ~WakeOptsSummary;
2693
2694 /* translate to bitmasks this chip understands */
2695 if (newval & WAKE_PHY)
2696 data |= WakePhy;
2697 if (newval & WAKE_UCAST)
2698 data |= WakeUnicast;
2699 if (newval & WAKE_MCAST)
2700 data |= WakeMulticast;
2701 if (newval & WAKE_BCAST)
2702 data |= WakeBroadcast;
2703 if (newval & WAKE_ARP)
2704 data |= WakeArp;
2705 if (newval & WAKE_MAGIC)
2706 data |= WakeMagic;
2707 if (np->srr >= SRR_DP83815_D) {
2708 if (newval & WAKE_MAGICSECURE) {
2709 data |= WakeMagicSecure;
2710 }
2711 }
2712
2713 writel(data, ioaddr + WOLCmd);
2714
2715 return 0;
2716}
2717
2718static int netdev_get_wol(struct net_device *dev, u32 *supported, u32 *cur)
2719{
2720 struct netdev_private *np = netdev_priv(dev);
2721 void __iomem * ioaddr = ns_ioaddr(dev);
2722 u32 regval = readl(ioaddr + WOLCmd);
2723
2724 *supported = (WAKE_PHY | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST
2725 | WAKE_ARP | WAKE_MAGIC);
2726
2727 if (np->srr >= SRR_DP83815_D) {
2728 /* SOPASS works on revD and higher */
2729 *supported |= WAKE_MAGICSECURE;
2730 }
2731 *cur = 0;
2732
2733 /* translate from chip bitmasks */
2734 if (regval & WakePhy)
2735 *cur |= WAKE_PHY;
2736 if (regval & WakeUnicast)
2737 *cur |= WAKE_UCAST;
2738 if (regval & WakeMulticast)
2739 *cur |= WAKE_MCAST;
2740 if (regval & WakeBroadcast)
2741 *cur |= WAKE_BCAST;
2742 if (regval & WakeArp)
2743 *cur |= WAKE_ARP;
2744 if (regval & WakeMagic)
2745 *cur |= WAKE_MAGIC;
2746 if (regval & WakeMagicSecure) {
2747 /* this can be on in revC, but it's broken */
2748 *cur |= WAKE_MAGICSECURE;
2749 }
2750
2751 return 0;
2752}
2753
2754static int netdev_set_sopass(struct net_device *dev, u8 *newval)
2755{
2756 struct netdev_private *np = netdev_priv(dev);
2757 void __iomem * ioaddr = ns_ioaddr(dev);
2758 u16 *sval = (u16 *)newval;
2759 u32 addr;
2760
2761 if (np->srr < SRR_DP83815_D) {
2762 return 0;
2763 }
2764
2765 /* enable writing to these registers by disabling the RX filter */
2766 addr = readl(ioaddr + RxFilterAddr) & ~RFCRAddressMask;
2767 addr &= ~RxFilterEnable;
2768 writel(addr, ioaddr + RxFilterAddr);
2769
2770 /* write the three words to (undocumented) RFCR vals 0xa, 0xc, 0xe */
2771 writel(addr | 0xa, ioaddr + RxFilterAddr);
2772 writew(sval[0], ioaddr + RxFilterData);
2773
2774 writel(addr | 0xc, ioaddr + RxFilterAddr);
2775 writew(sval[1], ioaddr + RxFilterData);
2776
2777 writel(addr | 0xe, ioaddr + RxFilterAddr);
2778 writew(sval[2], ioaddr + RxFilterData);
2779
2780 /* re-enable the RX filter */
2781 writel(addr | RxFilterEnable, ioaddr + RxFilterAddr);
2782
2783 return 0;
2784}
2785
2786static int netdev_get_sopass(struct net_device *dev, u8 *data)
2787{
2788 struct netdev_private *np = netdev_priv(dev);
2789 void __iomem * ioaddr = ns_ioaddr(dev);
2790 u16 *sval = (u16 *)data;
2791 u32 addr;
2792
2793 if (np->srr < SRR_DP83815_D) {
2794 sval[0] = sval[1] = sval[2] = 0;
2795 return 0;
2796 }
2797
2798 /* read the three words from (undocumented) RFCR vals 0xa, 0xc, 0xe */
2799 addr = readl(ioaddr + RxFilterAddr) & ~RFCRAddressMask;
2800
2801 writel(addr | 0xa, ioaddr + RxFilterAddr);
2802 sval[0] = readw(ioaddr + RxFilterData);
2803
2804 writel(addr | 0xc, ioaddr + RxFilterAddr);
2805 sval[1] = readw(ioaddr + RxFilterData);
2806
2807 writel(addr | 0xe, ioaddr + RxFilterAddr);
2808 sval[2] = readw(ioaddr + RxFilterData);
2809
2810 writel(addr, ioaddr + RxFilterAddr);
2811
2812 return 0;
2813}
2814
2815static int netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
2816{
2817 struct netdev_private *np = netdev_priv(dev);
2818 u32 tmp;
2819
2820 ecmd->port = dev->if_port;
2821 ecmd->speed = np->speed;
2822 ecmd->duplex = np->duplex;
2823 ecmd->autoneg = np->autoneg;
2824 ecmd->advertising = 0;
2825 if (np->advertising & ADVERTISE_10HALF)
2826 ecmd->advertising |= ADVERTISED_10baseT_Half;
2827 if (np->advertising & ADVERTISE_10FULL)
2828 ecmd->advertising |= ADVERTISED_10baseT_Full;
2829 if (np->advertising & ADVERTISE_100HALF)
2830 ecmd->advertising |= ADVERTISED_100baseT_Half;
2831 if (np->advertising & ADVERTISE_100FULL)
2832 ecmd->advertising |= ADVERTISED_100baseT_Full;
2833 ecmd->supported = (SUPPORTED_Autoneg |
2834 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2835 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2836 SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE);
2837 ecmd->phy_address = np->phy_addr_external;
2838 /*
2839 * We intentionally report the phy address of the external
2840 * phy, even if the internal phy is used. This is necessary
2841 * to work around a deficiency of the ethtool interface:
2842 * It's only possible to query the settings of the active
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002843 * port. Therefore
Linus Torvalds1da177e2005-04-16 15:20:36 -07002844 * # ethtool -s ethX port mii
2845 * actually sends an ioctl to switch to port mii with the
2846 * settings that are used for the current active port.
2847 * If we would report a different phy address in this
2848 * command, then
2849 * # ethtool -s ethX port tp;ethtool -s ethX port mii
2850 * would unintentionally change the phy address.
2851 *
2852 * Fortunately the phy address doesn't matter with the
2853 * internal phy...
2854 */
2855
2856 /* set information based on active port type */
2857 switch (ecmd->port) {
2858 default:
2859 case PORT_TP:
2860 ecmd->advertising |= ADVERTISED_TP;
2861 ecmd->transceiver = XCVR_INTERNAL;
2862 break;
2863 case PORT_MII:
2864 ecmd->advertising |= ADVERTISED_MII;
2865 ecmd->transceiver = XCVR_EXTERNAL;
2866 break;
2867 case PORT_FIBRE:
2868 ecmd->advertising |= ADVERTISED_FIBRE;
2869 ecmd->transceiver = XCVR_EXTERNAL;
2870 break;
2871 }
2872
2873 /* if autonegotiation is on, try to return the active speed/duplex */
2874 if (ecmd->autoneg == AUTONEG_ENABLE) {
2875 ecmd->advertising |= ADVERTISED_Autoneg;
2876 tmp = mii_nway_result(
2877 np->advertising & mdio_read(dev, MII_LPA));
2878 if (tmp == LPA_100FULL || tmp == LPA_100HALF)
2879 ecmd->speed = SPEED_100;
2880 else
2881 ecmd->speed = SPEED_10;
2882 if (tmp == LPA_100FULL || tmp == LPA_10FULL)
2883 ecmd->duplex = DUPLEX_FULL;
2884 else
2885 ecmd->duplex = DUPLEX_HALF;
2886 }
2887
2888 /* ignore maxtxpkt, maxrxpkt for now */
2889
2890 return 0;
2891}
2892
2893static int netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
2894{
2895 struct netdev_private *np = netdev_priv(dev);
2896
2897 if (ecmd->port != PORT_TP && ecmd->port != PORT_MII && ecmd->port != PORT_FIBRE)
2898 return -EINVAL;
2899 if (ecmd->transceiver != XCVR_INTERNAL && ecmd->transceiver != XCVR_EXTERNAL)
2900 return -EINVAL;
2901 if (ecmd->autoneg == AUTONEG_ENABLE) {
2902 if ((ecmd->advertising & (ADVERTISED_10baseT_Half |
2903 ADVERTISED_10baseT_Full |
2904 ADVERTISED_100baseT_Half |
2905 ADVERTISED_100baseT_Full)) == 0) {
2906 return -EINVAL;
2907 }
2908 } else if (ecmd->autoneg == AUTONEG_DISABLE) {
2909 if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100)
2910 return -EINVAL;
2911 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
2912 return -EINVAL;
2913 } else {
2914 return -EINVAL;
2915 }
2916
2917 /*
Mark Brown68c90162007-02-19 20:15:39 +00002918 * If we're ignoring the PHY then autoneg and the internal
2919 * transciever are really not going to work so don't let the
2920 * user select them.
2921 */
2922 if (np->ignore_phy && (ecmd->autoneg == AUTONEG_ENABLE ||
2923 ecmd->port == PORT_TP))
2924 return -EINVAL;
2925
2926 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002927 * maxtxpkt, maxrxpkt: ignored for now.
2928 *
2929 * transceiver:
2930 * PORT_TP is always XCVR_INTERNAL, PORT_MII and PORT_FIBRE are always
2931 * XCVR_EXTERNAL. The implementation thus ignores ecmd->transceiver and
2932 * selects based on ecmd->port.
2933 *
2934 * Actually PORT_FIBRE is nearly identical to PORT_MII: it's for fibre
2935 * phys that are connected to the mii bus. It's used to apply fibre
2936 * specific updates.
2937 */
2938
2939 /* WHEW! now lets bang some bits */
2940
2941 /* save the parms */
2942 dev->if_port = ecmd->port;
2943 np->autoneg = ecmd->autoneg;
2944 np->phy_addr_external = ecmd->phy_address & PhyAddrMask;
2945 if (np->autoneg == AUTONEG_ENABLE) {
2946 /* advertise only what has been requested */
2947 np->advertising &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
2948 if (ecmd->advertising & ADVERTISED_10baseT_Half)
2949 np->advertising |= ADVERTISE_10HALF;
2950 if (ecmd->advertising & ADVERTISED_10baseT_Full)
2951 np->advertising |= ADVERTISE_10FULL;
2952 if (ecmd->advertising & ADVERTISED_100baseT_Half)
2953 np->advertising |= ADVERTISE_100HALF;
2954 if (ecmd->advertising & ADVERTISED_100baseT_Full)
2955 np->advertising |= ADVERTISE_100FULL;
2956 } else {
2957 np->speed = ecmd->speed;
2958 np->duplex = ecmd->duplex;
2959 /* user overriding the initial full duplex parm? */
2960 if (np->duplex == DUPLEX_HALF)
2961 np->full_duplex = 0;
2962 }
2963
2964 /* get the right phy enabled */
2965 if (ecmd->port == PORT_TP)
2966 switch_port_internal(dev);
2967 else
2968 switch_port_external(dev);
2969
2970 /* set parms and see how this affected our link status */
2971 init_phy_fixup(dev);
2972 check_link(dev);
2973 return 0;
2974}
2975
2976static int netdev_get_regs(struct net_device *dev, u8 *buf)
2977{
2978 int i;
2979 int j;
2980 u32 rfcr;
2981 u32 *rbuf = (u32 *)buf;
2982 void __iomem * ioaddr = ns_ioaddr(dev);
2983
2984 /* read non-mii page 0 of registers */
2985 for (i = 0; i < NATSEMI_PG0_NREGS/2; i++) {
2986 rbuf[i] = readl(ioaddr + i*4);
2987 }
2988
2989 /* read current mii registers */
2990 for (i = NATSEMI_PG0_NREGS/2; i < NATSEMI_PG0_NREGS; i++)
2991 rbuf[i] = mdio_read(dev, i & 0x1f);
2992
2993 /* read only the 'magic' registers from page 1 */
2994 writew(1, ioaddr + PGSEL);
2995 rbuf[i++] = readw(ioaddr + PMDCSR);
2996 rbuf[i++] = readw(ioaddr + TSTDAT);
2997 rbuf[i++] = readw(ioaddr + DSPCFG);
2998 rbuf[i++] = readw(ioaddr + SDCFG);
2999 writew(0, ioaddr + PGSEL);
3000
3001 /* read RFCR indexed registers */
3002 rfcr = readl(ioaddr + RxFilterAddr);
3003 for (j = 0; j < NATSEMI_RFDR_NREGS; j++) {
3004 writel(j*2, ioaddr + RxFilterAddr);
3005 rbuf[i++] = readw(ioaddr + RxFilterData);
3006 }
3007 writel(rfcr, ioaddr + RxFilterAddr);
3008
3009 /* the interrupt status is clear-on-read - see if we missed any */
3010 if (rbuf[4] & rbuf[5]) {
3011 printk(KERN_WARNING
3012 "%s: shoot, we dropped an interrupt (%#08x)\n",
3013 dev->name, rbuf[4] & rbuf[5]);
3014 }
3015
3016 return 0;
3017}
3018
3019#define SWAP_BITS(x) ( (((x) & 0x0001) << 15) | (((x) & 0x0002) << 13) \
3020 | (((x) & 0x0004) << 11) | (((x) & 0x0008) << 9) \
3021 | (((x) & 0x0010) << 7) | (((x) & 0x0020) << 5) \
3022 | (((x) & 0x0040) << 3) | (((x) & 0x0080) << 1) \
3023 | (((x) & 0x0100) >> 1) | (((x) & 0x0200) >> 3) \
3024 | (((x) & 0x0400) >> 5) | (((x) & 0x0800) >> 7) \
3025 | (((x) & 0x1000) >> 9) | (((x) & 0x2000) >> 11) \
3026 | (((x) & 0x4000) >> 13) | (((x) & 0x8000) >> 15) )
3027
3028static int netdev_get_eeprom(struct net_device *dev, u8 *buf)
3029{
3030 int i;
3031 u16 *ebuf = (u16 *)buf;
3032 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Browna8b4cf42006-03-28 14:08:55 -08003033 struct netdev_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003034
3035 /* eeprom_read reads 16 bits, and indexes by 16 bits */
Mark Browna8b4cf42006-03-28 14:08:55 -08003036 for (i = 0; i < np->eeprom_size/2; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003037 ebuf[i] = eeprom_read(ioaddr, i);
3038 /* The EEPROM itself stores data bit-swapped, but eeprom_read
3039 * reads it back "sanely". So we swap it back here in order to
3040 * present it to userland as it is stored. */
3041 ebuf[i] = SWAP_BITS(ebuf[i]);
3042 }
3043 return 0;
3044}
3045
3046static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3047{
3048 struct mii_ioctl_data *data = if_mii(rq);
3049 struct netdev_private *np = netdev_priv(dev);
3050
3051 switch(cmd) {
3052 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
3053 case SIOCDEVPRIVATE: /* for binary compat, remove in 2.5 */
3054 data->phy_id = np->phy_addr_external;
3055 /* Fall Through */
3056
3057 case SIOCGMIIREG: /* Read MII PHY register. */
3058 case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */
3059 /* The phy_id is not enough to uniquely identify
3060 * the intended target. Therefore the command is sent to
3061 * the given mii on the current port.
3062 */
3063 if (dev->if_port == PORT_TP) {
3064 if ((data->phy_id & 0x1f) == np->phy_addr_external)
3065 data->val_out = mdio_read(dev,
3066 data->reg_num & 0x1f);
3067 else
3068 data->val_out = 0;
3069 } else {
3070 move_int_phy(dev, data->phy_id & 0x1f);
3071 data->val_out = miiport_read(dev, data->phy_id & 0x1f,
3072 data->reg_num & 0x1f);
3073 }
3074 return 0;
3075
3076 case SIOCSMIIREG: /* Write MII PHY register. */
3077 case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */
3078 if (!capable(CAP_NET_ADMIN))
3079 return -EPERM;
3080 if (dev->if_port == PORT_TP) {
3081 if ((data->phy_id & 0x1f) == np->phy_addr_external) {
3082 if ((data->reg_num & 0x1f) == MII_ADVERTISE)
3083 np->advertising = data->val_in;
3084 mdio_write(dev, data->reg_num & 0x1f,
3085 data->val_in);
3086 }
3087 } else {
3088 if ((data->phy_id & 0x1f) == np->phy_addr_external) {
3089 if ((data->reg_num & 0x1f) == MII_ADVERTISE)
3090 np->advertising = data->val_in;
3091 }
3092 move_int_phy(dev, data->phy_id & 0x1f);
3093 miiport_write(dev, data->phy_id & 0x1f,
3094 data->reg_num & 0x1f,
3095 data->val_in);
3096 }
3097 return 0;
3098 default:
3099 return -EOPNOTSUPP;
3100 }
3101}
3102
3103static void enable_wol_mode(struct net_device *dev, int enable_intr)
3104{
3105 void __iomem * ioaddr = ns_ioaddr(dev);
3106 struct netdev_private *np = netdev_priv(dev);
3107
3108 if (netif_msg_wol(np))
3109 printk(KERN_INFO "%s: remaining active for wake-on-lan\n",
3110 dev->name);
3111
3112 /* For WOL we must restart the rx process in silent mode.
3113 * Write NULL to the RxRingPtr. Only possible if
3114 * rx process is stopped
3115 */
3116 writel(0, ioaddr + RxRingPtr);
3117
3118 /* read WoL status to clear */
3119 readl(ioaddr + WOLCmd);
3120
3121 /* PME on, clear status */
3122 writel(np->SavedClkRun | PMEEnable | PMEStatus, ioaddr + ClkRun);
3123
3124 /* and restart the rx process */
3125 writel(RxOn, ioaddr + ChipCmd);
3126
3127 if (enable_intr) {
3128 /* enable the WOL interrupt.
3129 * Could be used to send a netlink message.
3130 */
3131 writel(WOLPkt | LinkChange, ioaddr + IntrMask);
broonie@sirena.org.uk14fdd902007-03-14 19:49:13 +00003132 natsemi_irq_enable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003133 }
3134}
3135
3136static int netdev_close(struct net_device *dev)
3137{
3138 void __iomem * ioaddr = ns_ioaddr(dev);
3139 struct netdev_private *np = netdev_priv(dev);
3140
3141 if (netif_msg_ifdown(np))
3142 printk(KERN_DEBUG
3143 "%s: Shutting down ethercard, status was %#04x.\n",
3144 dev->name, (int)readl(ioaddr + ChipCmd));
3145 if (netif_msg_pktdata(np))
3146 printk(KERN_DEBUG
3147 "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
3148 dev->name, np->cur_tx, np->dirty_tx,
3149 np->cur_rx, np->dirty_rx);
3150
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003151 napi_disable(&np->napi);
3152
Linus Torvalds1da177e2005-04-16 15:20:36 -07003153 /*
3154 * FIXME: what if someone tries to close a device
3155 * that is suspended?
3156 * Should we reenable the nic to switch to
3157 * the final WOL settings?
3158 */
3159
3160 del_timer_sync(&np->timer);
3161 disable_irq(dev->irq);
3162 spin_lock_irq(&np->lock);
Mark Brownb27a16b2006-02-02 00:00:01 +00003163 natsemi_irq_disable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003164 np->hands_off = 1;
3165 spin_unlock_irq(&np->lock);
3166 enable_irq(dev->irq);
3167
3168 free_irq(dev->irq, dev);
3169
3170 /* Interrupt disabled, interrupt handler released,
3171 * queue stopped, timer deleted, rtnl_lock held
3172 * All async codepaths that access the driver are disabled.
3173 */
3174 spin_lock_irq(&np->lock);
3175 np->hands_off = 0;
3176 readl(ioaddr + IntrMask);
3177 readw(ioaddr + MIntrStatus);
3178
3179 /* Freeze Stats */
3180 writel(StatsFreeze, ioaddr + StatsCtrl);
3181
3182 /* Stop the chip's Tx and Rx processes. */
3183 natsemi_stop_rxtx(dev);
3184
3185 __get_stats(dev);
3186 spin_unlock_irq(&np->lock);
3187
3188 /* clear the carrier last - an interrupt could reenable it otherwise */
3189 netif_carrier_off(dev);
3190 netif_stop_queue(dev);
3191
3192 dump_ring(dev);
3193 drain_ring(dev);
3194 free_ring(dev);
3195
3196 {
3197 u32 wol = readl(ioaddr + WOLCmd) & WakeOptsSummary;
3198 if (wol) {
3199 /* restart the NIC in WOL mode.
3200 * The nic must be stopped for this.
3201 */
3202 enable_wol_mode(dev, 0);
3203 } else {
3204 /* Restore PME enable bit unmolested */
3205 writel(np->SavedClkRun, ioaddr + ClkRun);
3206 }
3207 }
3208 return 0;
3209}
3210
3211
3212static void __devexit natsemi_remove1 (struct pci_dev *pdev)
3213{
3214 struct net_device *dev = pci_get_drvdata(pdev);
3215 void __iomem * ioaddr = ns_ioaddr(dev);
3216
Mark Brown1a147802007-05-03 10:36:56 +01003217 NATSEMI_REMOVE_FILE(pdev, dspcfg_workaround);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003218 unregister_netdev (dev);
3219 pci_release_regions (pdev);
3220 iounmap(ioaddr);
3221 free_netdev (dev);
3222 pci_set_drvdata(pdev, NULL);
3223}
3224
3225#ifdef CONFIG_PM
3226
3227/*
3228 * The ns83815 chip doesn't have explicit RxStop bits.
3229 * Kicking the Rx or Tx process for a new packet reenables the Rx process
3230 * of the nic, thus this function must be very careful:
3231 *
3232 * suspend/resume synchronization:
3233 * entry points:
3234 * netdev_open, netdev_close, netdev_ioctl, set_rx_mode, intr_handler,
3235 * start_tx, tx_timeout
3236 *
3237 * No function accesses the hardware without checking np->hands_off.
3238 * the check occurs under spin_lock_irq(&np->lock);
3239 * exceptions:
3240 * * netdev_ioctl: noncritical access.
3241 * * netdev_open: cannot happen due to the device_detach
3242 * * netdev_close: doesn't hurt.
3243 * * netdev_timer: timer stopped by natsemi_suspend.
3244 * * intr_handler: doesn't acquire the spinlock. suspend calls
3245 * disable_irq() to enforce synchronization.
Mark Brownb27a16b2006-02-02 00:00:01 +00003246 * * natsemi_poll: checks before reenabling interrupts. suspend
3247 * sets hands_off, disables interrupts and then waits with
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003248 * napi_disable().
Linus Torvalds1da177e2005-04-16 15:20:36 -07003249 *
3250 * Interrupts must be disabled, otherwise hands_off can cause irq storms.
3251 */
3252
3253static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state)
3254{
3255 struct net_device *dev = pci_get_drvdata (pdev);
3256 struct netdev_private *np = netdev_priv(dev);
3257 void __iomem * ioaddr = ns_ioaddr(dev);
3258
3259 rtnl_lock();
3260 if (netif_running (dev)) {
3261 del_timer_sync(&np->timer);
3262
3263 disable_irq(dev->irq);
3264 spin_lock_irq(&np->lock);
3265
broonie@sirena.org.uk14fdd902007-03-14 19:49:13 +00003266 natsemi_irq_disable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003267 np->hands_off = 1;
3268 natsemi_stop_rxtx(dev);
3269 netif_stop_queue(dev);
3270
3271 spin_unlock_irq(&np->lock);
3272 enable_irq(dev->irq);
3273
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003274 napi_disable(&np->napi);
Mark Brownb27a16b2006-02-02 00:00:01 +00003275
Linus Torvalds1da177e2005-04-16 15:20:36 -07003276 /* Update the error counts. */
3277 __get_stats(dev);
3278
3279 /* pci_power_off(pdev, -1); */
3280 drain_ring(dev);
3281 {
3282 u32 wol = readl(ioaddr + WOLCmd) & WakeOptsSummary;
3283 /* Restore PME enable bit */
3284 if (wol) {
3285 /* restart the NIC in WOL mode.
3286 * The nic must be stopped for this.
3287 * FIXME: use the WOL interrupt
3288 */
3289 enable_wol_mode(dev, 0);
3290 } else {
3291 /* Restore PME enable bit unmolested */
3292 writel(np->SavedClkRun, ioaddr + ClkRun);
3293 }
3294 }
3295 }
3296 netif_device_detach(dev);
3297 rtnl_unlock();
3298 return 0;
3299}
3300
3301
3302static int natsemi_resume (struct pci_dev *pdev)
3303{
3304 struct net_device *dev = pci_get_drvdata (pdev);
3305 struct netdev_private *np = netdev_priv(dev);
Mark Browna8a935d2007-10-10 17:11:12 +01003306 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003307
3308 rtnl_lock();
3309 if (netif_device_present(dev))
3310 goto out;
3311 if (netif_running(dev)) {
3312 BUG_ON(!np->hands_off);
Mark Browna8a935d2007-10-10 17:11:12 +01003313 ret = pci_enable_device(pdev);
3314 if (ret < 0) {
3315 dev_err(&pdev->dev,
3316 "pci_enable_device() failed: %d\n", ret);
3317 goto out;
3318 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003319 /* pci_power_on(pdev); */
3320
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003321 napi_enable(&np->napi);
3322
Linus Torvalds1da177e2005-04-16 15:20:36 -07003323 natsemi_reset(dev);
3324 init_ring(dev);
3325 disable_irq(dev->irq);
3326 spin_lock_irq(&np->lock);
3327 np->hands_off = 0;
3328 init_registers(dev);
3329 netif_device_attach(dev);
3330 spin_unlock_irq(&np->lock);
3331 enable_irq(dev->irq);
3332
Mark Brown0e5d5442007-10-10 11:05:44 +01003333 mod_timer(&np->timer, round_jiffies(jiffies + 1*HZ));
Linus Torvalds1da177e2005-04-16 15:20:36 -07003334 }
3335 netif_device_attach(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003336out:
3337 rtnl_unlock();
Mark Browna8a935d2007-10-10 17:11:12 +01003338 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003339}
3340
3341#endif /* CONFIG_PM */
3342
3343static struct pci_driver natsemi_driver = {
3344 .name = DRV_NAME,
3345 .id_table = natsemi_pci_tbl,
3346 .probe = natsemi_probe1,
3347 .remove = __devexit_p(natsemi_remove1),
3348#ifdef CONFIG_PM
3349 .suspend = natsemi_suspend,
3350 .resume = natsemi_resume,
3351#endif
3352};
3353
3354static int __init natsemi_init_mod (void)
3355{
3356/* when a module, this is printed whether or not devices are found in probe */
3357#ifdef MODULE
3358 printk(version);
3359#endif
3360
Jeff Garzik29917622006-08-19 17:48:59 -04003361 return pci_register_driver(&natsemi_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003362}
3363
3364static void __exit natsemi_exit_mod (void)
3365{
3366 pci_unregister_driver (&natsemi_driver);
3367}
3368
3369module_init(natsemi_init_mod);
3370module_exit(natsemi_exit_mod);
3371